svga: check return value of define_query_vgpu{9,10}
[mesa.git] / src / gallium / drivers / svga / svga_swtnl_backend.c
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25
26 #include "draw/draw_vbuf.h"
27 #include "draw/draw_context.h"
28 #include "draw/draw_vertex.h"
29
30 #include "util/u_debug.h"
31 #include "util/u_inlines.h"
32 #include "util/u_math.h"
33 #include "util/u_memory.h"
34
35 #include "svga_context.h"
36 #include "svga_state.h"
37 #include "svga_swtnl.h"
38
39 #include "svga_types.h"
40 #include "svga_reg.h"
41 #include "svga3d_reg.h"
42 #include "svga_draw.h"
43 #include "svga_shader.h"
44 #include "svga_swtnl_private.h"
45
46
47 static const struct vertex_info *
48 svga_vbuf_render_get_vertex_info(struct vbuf_render *render)
49 {
50 struct svga_vbuf_render *svga_render = svga_vbuf_render(render);
51 struct svga_context *svga = svga_render->svga;
52
53 svga_swtnl_update_vdecl(svga);
54
55 return &svga_render->vertex_info;
56 }
57
58
59 static boolean
60 svga_vbuf_render_allocate_vertices(struct vbuf_render *render,
61 ushort vertex_size,
62 ushort nr_vertices)
63 {
64 struct svga_vbuf_render *svga_render = svga_vbuf_render(render);
65 struct svga_context *svga = svga_render->svga;
66 struct pipe_screen *screen = svga->pipe.screen;
67 size_t size = (size_t)nr_vertices * (size_t)vertex_size;
68 boolean new_vbuf = FALSE;
69 boolean new_ibuf = FALSE;
70
71 SVGA_STATS_TIME_PUSH(svga_sws(svga),
72 SVGA_STATS_TIME_VBUFRENDERALLOCVERT);
73
74 if (svga_render->vertex_size != vertex_size)
75 svga->swtnl.new_vdecl = TRUE;
76 svga_render->vertex_size = (size_t)vertex_size;
77
78 if (svga->swtnl.new_vbuf)
79 new_ibuf = new_vbuf = TRUE;
80 svga->swtnl.new_vbuf = FALSE;
81
82 if (svga_render->vbuf_size
83 < svga_render->vbuf_offset + svga_render->vbuf_used + size)
84 new_vbuf = TRUE;
85
86 if (new_vbuf)
87 pipe_resource_reference(&svga_render->vbuf, NULL);
88 if (new_ibuf)
89 pipe_resource_reference(&svga_render->ibuf, NULL);
90
91 if (!svga_render->vbuf) {
92 svga_render->vbuf_size = MAX2(size, svga_render->vbuf_alloc_size);
93 svga_render->vbuf = pipe_buffer_create(screen,
94 PIPE_BIND_VERTEX_BUFFER,
95 PIPE_USAGE_STREAM,
96 svga_render->vbuf_size);
97 if (!svga_render->vbuf) {
98 svga_context_flush(svga, NULL);
99 assert(!svga_render->vbuf);
100 svga_render->vbuf = pipe_buffer_create(screen,
101 PIPE_BIND_VERTEX_BUFFER,
102 PIPE_USAGE_STREAM,
103 svga_render->vbuf_size);
104 /* The buffer allocation may fail if we run out of memory.
105 * The draw module's vbuf code should handle that without crashing.
106 */
107 }
108
109 svga->swtnl.new_vdecl = TRUE;
110 svga_render->vbuf_offset = 0;
111 } else {
112 svga_render->vbuf_offset += svga_render->vbuf_used;
113 }
114
115 svga_render->vbuf_used = 0;
116
117 if (svga->swtnl.new_vdecl)
118 svga_render->vdecl_offset = svga_render->vbuf_offset;
119
120 SVGA_STATS_TIME_POP(svga_sws(svga));
121
122 return TRUE;
123 }
124
125
126 static void *
127 svga_vbuf_render_map_vertices(struct vbuf_render *render)
128 {
129 struct svga_vbuf_render *svga_render = svga_vbuf_render(render);
130 struct svga_context *svga = svga_render->svga;
131 void * retPtr = NULL;
132
133 SVGA_STATS_TIME_PUSH(svga_sws(svga),
134 SVGA_STATS_TIME_VBUFRENDERMAPVERT);
135
136 if (svga_render->vbuf) {
137 char *ptr = (char*)pipe_buffer_map(&svga->pipe,
138 svga_render->vbuf,
139 PIPE_TRANSFER_WRITE |
140 PIPE_TRANSFER_FLUSH_EXPLICIT |
141 PIPE_TRANSFER_DISCARD_RANGE |
142 PIPE_TRANSFER_UNSYNCHRONIZED,
143 &svga_render->vbuf_transfer);
144 if (ptr) {
145 svga_render->vbuf_ptr = ptr;
146 retPtr = ptr + svga_render->vbuf_offset;
147 }
148 else {
149 svga_render->vbuf_ptr = NULL;
150 svga_render->vbuf_transfer = NULL;
151 retPtr = NULL;
152 }
153 }
154 else {
155 /* we probably ran out of memory when allocating the vertex buffer */
156 retPtr = NULL;
157 }
158
159 SVGA_STATS_TIME_POP(svga_sws(svga));
160 return retPtr;
161 }
162
163
164 static void
165 svga_vbuf_render_unmap_vertices(struct vbuf_render *render,
166 ushort min_index,
167 ushort max_index)
168 {
169 struct svga_vbuf_render *svga_render = svga_vbuf_render(render);
170 struct svga_context *svga = svga_render->svga;
171 unsigned offset, length;
172 size_t used = svga_render->vertex_size * ((size_t)max_index + 1);
173
174 SVGA_STATS_TIME_PUSH(svga_sws(svga),
175 SVGA_STATS_TIME_VBUFRENDERUNMAPVERT);
176
177 offset = svga_render->vbuf_offset + svga_render->vertex_size * min_index;
178 length = svga_render->vertex_size * (max_index + 1 - min_index);
179
180 if (0) {
181 /* dump vertex data */
182 const float *f = (const float *) ((char *) svga_render->vbuf_ptr +
183 svga_render->vbuf_offset);
184 unsigned i;
185 debug_printf("swtnl vertex data:\n");
186 for (i = 0; i < length / 4; i += 4) {
187 debug_printf("%u: %f %f %f %f\n", i, f[i], f[i+1], f[i+2], f[i+3]);
188 }
189 }
190
191 pipe_buffer_flush_mapped_range(&svga->pipe,
192 svga_render->vbuf_transfer,
193 offset, length);
194 pipe_buffer_unmap(&svga->pipe, svga_render->vbuf_transfer);
195 svga_render->min_index = min_index;
196 svga_render->max_index = max_index;
197 svga_render->vbuf_used = MAX2(svga_render->vbuf_used, used);
198
199 SVGA_STATS_TIME_POP(svga_sws(svga));
200 }
201
202
203 static void
204 svga_vbuf_render_set_primitive(struct vbuf_render *render,
205 enum pipe_prim_type prim)
206 {
207 struct svga_vbuf_render *svga_render = svga_vbuf_render(render);
208 svga_render->prim = prim;
209 }
210
211
212 static void
213 svga_vbuf_submit_state(struct svga_vbuf_render *svga_render)
214 {
215 struct svga_context *svga = svga_render->svga;
216 SVGA3dVertexDecl vdecl[PIPE_MAX_ATTRIBS];
217 enum pipe_error ret;
218 unsigned i;
219 static const unsigned zero[PIPE_MAX_ATTRIBS] = {0};
220
221 /* if the vdecl or vbuf hasn't changed do nothing */
222 if (!svga->swtnl.new_vdecl)
223 return;
224
225 SVGA_STATS_TIME_PUSH(svga_sws(svga),
226 SVGA_STATS_TIME_VBUFSUBMITSTATE);
227
228 memcpy(vdecl, svga_render->vdecl, sizeof(vdecl));
229
230 /* flush the hw state */
231 ret = svga_hwtnl_flush(svga->hwtnl);
232 if (ret != PIPE_OK) {
233 svga_context_flush(svga, NULL);
234 ret = svga_hwtnl_flush(svga->hwtnl);
235 /* if we hit this path we might become synced with hw */
236 svga->swtnl.new_vbuf = TRUE;
237 assert(ret == PIPE_OK);
238 }
239
240 for (i = 0; i < svga_render->vdecl_count; i++) {
241 vdecl[i].array.offset += svga_render->vdecl_offset;
242 }
243
244 svga_hwtnl_vertex_decls(svga->hwtnl,
245 svga_render->vdecl_count,
246 vdecl,
247 zero,
248 svga_render->layout_id);
249
250 /* Specify the vertex buffer (there's only ever one) */
251 {
252 struct pipe_vertex_buffer vb;
253 vb.is_user_buffer = false;
254 vb.buffer.resource = svga_render->vbuf;
255 vb.buffer_offset = svga_render->vdecl_offset;
256 vb.stride = vdecl[0].array.stride;
257 svga_hwtnl_vertex_buffers(svga->hwtnl, 1, &vb);
258 }
259
260 /* We have already taken care of flatshading, so let the hwtnl
261 * module use whatever is most convenient:
262 */
263 if (svga->state.sw.need_pipeline) {
264 svga_hwtnl_set_flatshade(svga->hwtnl, FALSE, FALSE);
265 svga_hwtnl_set_fillmode(svga->hwtnl, PIPE_POLYGON_MODE_FILL);
266 }
267 else {
268 svga_hwtnl_set_flatshade(svga->hwtnl,
269 svga->curr.rast->templ.flatshade ||
270 svga->state.hw_draw.fs->uses_flat_interp,
271 svga->curr.rast->templ.flatshade_first);
272
273 svga_hwtnl_set_fillmode(svga->hwtnl, svga->curr.rast->hw_fillmode);
274 }
275
276 svga->swtnl.new_vdecl = FALSE;
277 SVGA_STATS_TIME_POP(svga_sws(svga));
278 }
279
280
281 static void
282 svga_vbuf_render_draw_arrays(struct vbuf_render *render,
283 unsigned start, uint nr)
284 {
285 struct svga_vbuf_render *svga_render = svga_vbuf_render(render);
286 struct svga_context *svga = svga_render->svga;
287 unsigned bias = (svga_render->vbuf_offset - svga_render->vdecl_offset)
288 / svga_render->vertex_size;
289 enum pipe_error ret = PIPE_OK;
290 /* instancing will already have been resolved at this point by 'draw' */
291 const unsigned start_instance = 0;
292 const unsigned instance_count = 1;
293
294 SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_VBUFDRAWARRAYS);
295
296 /* off to hardware */
297 svga_vbuf_submit_state(svga_render);
298
299 /* Need to call update_state() again as the draw module may have
300 * altered some of our state behind our backs. Testcase:
301 * redbook/polys.c
302 */
303 svga_update_state_retry(svga, SVGA_STATE_HW_DRAW);
304
305 ret = svga_hwtnl_draw_arrays(svga->hwtnl, svga_render->prim, start + bias,
306 nr, start_instance, instance_count);
307 if (ret != PIPE_OK) {
308 svga_context_flush(svga, NULL);
309 ret = svga_hwtnl_draw_arrays(svga->hwtnl, svga_render->prim,
310 start + bias, nr,
311 start_instance, instance_count);
312 svga->swtnl.new_vbuf = TRUE;
313 assert(ret == PIPE_OK);
314 }
315 SVGA_STATS_TIME_POP(svga_sws(svga));
316 }
317
318
319 static void
320 svga_vbuf_render_draw_elements(struct vbuf_render *render,
321 const ushort *indices,
322 uint nr_indices)
323 {
324 struct svga_vbuf_render *svga_render = svga_vbuf_render(render);
325 struct svga_context *svga = svga_render->svga;
326 int bias = (svga_render->vbuf_offset - svga_render->vdecl_offset)
327 / svga_render->vertex_size;
328 boolean ret;
329 /* instancing will already have been resolved at this point by 'draw' */
330 const struct pipe_draw_info info = {
331 .index_size = 2,
332 .mode = svga_render->prim,
333 .has_user_indices = 1,
334 .index.user = indices,
335 .start_instance = 0,
336 .instance_count = 1,
337 .index_bias = bias,
338 .min_index = svga_render->min_index,
339 .max_index = svga_render->max_index,
340 .start = 0,
341 .count = nr_indices
342 };
343
344 assert((svga_render->vbuf_offset - svga_render->vdecl_offset)
345 % svga_render->vertex_size == 0);
346
347 SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_VBUFDRAWELEMENTS);
348
349 /* off to hardware */
350 svga_vbuf_submit_state(svga_render);
351
352 /* Need to call update_state() again as the draw module may have
353 * altered some of our state behind our backs. Testcase:
354 * redbook/polys.c
355 */
356 svga_update_state_retry(svga, SVGA_STATE_HW_DRAW);
357 ret = svga_hwtnl_draw_range_elements(svga->hwtnl, &info, nr_indices);
358 if (ret != PIPE_OK) {
359 svga_context_flush(svga, NULL);
360 ret = svga_hwtnl_draw_range_elements(svga->hwtnl, &info, nr_indices);
361 svga->swtnl.new_vbuf = TRUE;
362 assert(ret == PIPE_OK);
363 }
364 SVGA_STATS_TIME_POP(svga_sws(svga));
365 }
366
367
368 static void
369 svga_vbuf_render_release_vertices(struct vbuf_render *render)
370 {
371
372 }
373
374
375 static void
376 svga_vbuf_render_destroy(struct vbuf_render *render)
377 {
378 struct svga_vbuf_render *svga_render = svga_vbuf_render(render);
379
380 pipe_resource_reference(&svga_render->vbuf, NULL);
381 pipe_resource_reference(&svga_render->ibuf, NULL);
382 FREE(svga_render);
383 }
384
385
386 /**
387 * Create a new primitive render.
388 */
389 struct vbuf_render *
390 svga_vbuf_render_create(struct svga_context *svga)
391 {
392 struct svga_vbuf_render *svga_render = CALLOC_STRUCT(svga_vbuf_render);
393
394 svga_render->svga = svga;
395 svga_render->ibuf_size = 0;
396 svga_render->vbuf_size = 0;
397 svga_render->ibuf_alloc_size = 4*1024;
398 svga_render->vbuf_alloc_size = 64*1024;
399 svga_render->layout_id = SVGA3D_INVALID_ID;
400 svga_render->base.max_vertex_buffer_bytes = 64*1024/10;
401 svga_render->base.max_indices = 65536;
402 svga_render->base.get_vertex_info = svga_vbuf_render_get_vertex_info;
403 svga_render->base.allocate_vertices = svga_vbuf_render_allocate_vertices;
404 svga_render->base.map_vertices = svga_vbuf_render_map_vertices;
405 svga_render->base.unmap_vertices = svga_vbuf_render_unmap_vertices;
406 svga_render->base.set_primitive = svga_vbuf_render_set_primitive;
407 svga_render->base.draw_elements = svga_vbuf_render_draw_elements;
408 svga_render->base.draw_arrays = svga_vbuf_render_draw_arrays;
409 svga_render->base.release_vertices = svga_vbuf_render_release_vertices;
410 svga_render->base.destroy = svga_vbuf_render_destroy;
411
412 return &svga_render->base;
413 }