svga: s/unsigned/pipe_prim_type/
[mesa.git] / src / gallium / drivers / svga / svga_swtnl_state.c
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #include "draw/draw_context.h"
27 #include "draw/draw_vbuf.h"
28 #include "util/u_bitmask.h"
29 #include "util/u_inlines.h"
30 #include "pipe/p_state.h"
31
32 #include "svga_cmd.h"
33 #include "svga_context.h"
34 #include "svga_shader.h"
35 #include "svga_swtnl.h"
36 #include "svga_state.h"
37 #include "svga_tgsi.h"
38 #include "svga_swtnl_private.h"
39
40
41 #define SVGA_POINT_ADJ_X -0.375f
42 #define SVGA_POINT_ADJ_Y -0.5f
43
44 #define SVGA_LINE_ADJ_X -0.5f
45 #define SVGA_LINE_ADJ_Y -0.5f
46
47 #define SVGA_TRIANGLE_ADJ_X -0.375f
48 #define SVGA_TRIANGLE_ADJ_Y -0.5f
49
50
51 static void set_draw_viewport( struct svga_context *svga )
52 {
53 struct pipe_viewport_state vp = svga->curr.viewport;
54 float adjx = 0.0f;
55 float adjy = 0.0f;
56
57 if (svga_have_vgpu10(svga)) {
58 if (svga->curr.reduced_prim == PIPE_PRIM_TRIANGLES) {
59 adjy = 0.25;
60 }
61 }
62 else {
63 switch (svga->curr.reduced_prim) {
64 case PIPE_PRIM_POINTS:
65 adjx = SVGA_POINT_ADJ_X;
66 adjy = SVGA_POINT_ADJ_Y;
67 break;
68 case PIPE_PRIM_LINES:
69 /* XXX: This is to compensate for the fact that wide lines are
70 * going to be drawn with triangles, but we're not catching all
71 * cases where that will happen.
72 */
73 if (svga->curr.rast->need_pipeline & SVGA_PIPELINE_FLAG_LINES)
74 {
75 adjx = SVGA_LINE_ADJ_X + 0.175f;
76 adjy = SVGA_LINE_ADJ_Y - 0.175f;
77 }
78 else {
79 adjx = SVGA_LINE_ADJ_X;
80 adjy = SVGA_LINE_ADJ_Y;
81 }
82 break;
83 case PIPE_PRIM_TRIANGLES:
84 adjx += SVGA_TRIANGLE_ADJ_X;
85 adjy += SVGA_TRIANGLE_ADJ_Y;
86 break;
87 default:
88 /* nothing */
89 break;
90 }
91 }
92
93 vp.translate[0] += adjx;
94 vp.translate[1] += adjy;
95
96 draw_set_viewport_states(svga->swtnl.draw, 0, 1, &vp);
97 }
98
99 static enum pipe_error
100 update_swtnl_draw( struct svga_context *svga,
101 unsigned dirty )
102 {
103 SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_SWTNLUPDATEDRAW);
104
105 draw_flush( svga->swtnl.draw );
106
107 if (dirty & SVGA_NEW_VS)
108 draw_bind_vertex_shader(svga->swtnl.draw,
109 svga->curr.vs->draw_shader);
110
111 if (dirty & SVGA_NEW_FS)
112 draw_bind_fragment_shader(svga->swtnl.draw,
113 svga->curr.fs->draw_shader);
114
115 if (dirty & SVGA_NEW_VBUFFER)
116 draw_set_vertex_buffers(svga->swtnl.draw, 0,
117 svga->curr.num_vertex_buffers,
118 svga->curr.vb);
119
120 if (dirty & SVGA_NEW_VELEMENT)
121 draw_set_vertex_elements(svga->swtnl.draw,
122 svga->curr.velems->count,
123 svga->curr.velems->velem );
124
125 if (dirty & SVGA_NEW_CLIP)
126 draw_set_clip_state(svga->swtnl.draw,
127 &svga->curr.clip);
128
129 if (dirty & (SVGA_NEW_VIEWPORT |
130 SVGA_NEW_REDUCED_PRIMITIVE |
131 SVGA_NEW_RAST))
132 set_draw_viewport( svga );
133
134 if (dirty & SVGA_NEW_RAST)
135 draw_set_rasterizer_state(svga->swtnl.draw,
136 &svga->curr.rast->templ,
137 (void *) svga->curr.rast);
138
139 /* Tell the draw module how deep the Z/depth buffer is.
140 *
141 * If no depth buffer is bound, send the utility function the
142 * format for no bound depth (PIPE_FORMAT_NONE).
143 */
144 if (dirty & SVGA_NEW_FRAME_BUFFER)
145 draw_set_zs_format(svga->swtnl.draw,
146 (svga->curr.framebuffer.zsbuf) ?
147 svga->curr.framebuffer.zsbuf->format : PIPE_FORMAT_NONE);
148
149 SVGA_STATS_TIME_POP(svga_sws(svga));
150 return PIPE_OK;
151 }
152
153
154 struct svga_tracked_state svga_update_swtnl_draw =
155 {
156 "update draw module state",
157 (SVGA_NEW_VS |
158 SVGA_NEW_VBUFFER |
159 SVGA_NEW_VELEMENT |
160 SVGA_NEW_CLIP |
161 SVGA_NEW_VIEWPORT |
162 SVGA_NEW_RAST |
163 SVGA_NEW_FRAME_BUFFER |
164 SVGA_NEW_REDUCED_PRIMITIVE),
165 update_swtnl_draw
166 };
167
168
169 static SVGA3dSurfaceFormat
170 translate_vertex_format(SVGA3dDeclType format)
171 {
172 switch (format) {
173 case SVGA3D_DECLTYPE_FLOAT1:
174 return SVGA3D_R32_FLOAT;
175 case SVGA3D_DECLTYPE_FLOAT2:
176 return SVGA3D_R32G32_FLOAT;
177 case SVGA3D_DECLTYPE_FLOAT3:
178 return SVGA3D_R32G32B32_FLOAT;
179 case SVGA3D_DECLTYPE_FLOAT4:
180 return SVGA3D_R32G32B32A32_FLOAT;
181 default:
182 assert(!"Unexpected format in translate_vertex_format()");
183 return SVGA3D_R32G32B32A32_FLOAT;
184 }
185 }
186
187
188 static SVGA3dElementLayoutId
189 svga_vdecl_to_input_element(struct svga_context *svga,
190 const SVGA3dVertexDecl *vdecl, unsigned num_decls)
191 {
192 SVGA3dElementLayoutId id;
193 SVGA3dInputElementDesc elements[PIPE_MAX_ATTRIBS];
194 enum pipe_error ret;
195 unsigned i;
196
197 assert(num_decls <= PIPE_MAX_ATTRIBS);
198 assert(svga_have_vgpu10(svga));
199
200 for (i = 0; i < num_decls; i++) {
201 elements[i].inputSlot = 0; /* vertex buffer index */
202 elements[i].alignedByteOffset = vdecl[i].array.offset;
203 elements[i].format = translate_vertex_format(vdecl[i].identity.type);
204 elements[i].inputSlotClass = SVGA3D_INPUT_PER_VERTEX_DATA;
205 elements[i].instanceDataStepRate = 0;
206 elements[i].inputRegister = i;
207 }
208
209 id = util_bitmask_add(svga->input_element_object_id_bm);
210
211 ret = SVGA3D_vgpu10_DefineElementLayout(svga->swc, num_decls, id, elements);
212 if (ret != PIPE_OK) {
213 svga_context_flush(svga, NULL);
214 ret = SVGA3D_vgpu10_DefineElementLayout(svga->swc, num_decls, id, elements);
215 assert(ret == PIPE_OK);
216 }
217
218 return id;
219 }
220
221
222 enum pipe_error
223 svga_swtnl_update_vdecl( struct svga_context *svga )
224 {
225 struct svga_vbuf_render *svga_render = svga_vbuf_render(svga->swtnl.backend);
226 struct draw_context *draw = svga->swtnl.draw;
227 struct vertex_info *vinfo = &svga_render->vertex_info;
228 SVGA3dVertexDecl vdecl[PIPE_MAX_ATTRIBS];
229 struct svga_fragment_shader *fs = svga->curr.fs;
230 int offset = 0;
231 int nr_decls = 0;
232 int src;
233 unsigned i;
234 int any_change;
235
236 SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_SWTNLUPDATEVDECL);
237
238 memset(vinfo, 0, sizeof(*vinfo));
239 memset(vdecl, 0, sizeof(vdecl));
240
241 draw_prepare_shader_outputs(draw);
242
243 /* always add position */
244 src = draw_find_shader_output(draw, TGSI_SEMANTIC_POSITION, 0);
245 draw_emit_vertex_attr(vinfo, EMIT_4F, src);
246 vinfo->attrib[0].emit = EMIT_4F;
247 vdecl[0].array.offset = offset;
248 vdecl[0].identity.method = SVGA3D_DECLMETHOD_DEFAULT;
249 vdecl[0].identity.type = SVGA3D_DECLTYPE_FLOAT4;
250 vdecl[0].identity.usage = SVGA3D_DECLUSAGE_POSITIONT;
251 vdecl[0].identity.usageIndex = 0;
252 offset += 16;
253 nr_decls++;
254
255 for (i = 0; i < fs->base.info.num_inputs; i++) {
256 const unsigned sem_name = fs->base.info.input_semantic_name[i];
257 const unsigned sem_index = fs->base.info.input_semantic_index[i];
258
259 src = draw_find_shader_output(draw, sem_name, sem_index);
260
261 vdecl[nr_decls].array.offset = offset;
262 vdecl[nr_decls].identity.usageIndex = sem_index;
263
264 switch (sem_name) {
265 case TGSI_SEMANTIC_COLOR:
266 draw_emit_vertex_attr(vinfo, EMIT_4F, src);
267 vdecl[nr_decls].identity.usage = SVGA3D_DECLUSAGE_COLOR;
268 vdecl[nr_decls].identity.type = SVGA3D_DECLTYPE_FLOAT4;
269 offset += 16;
270 nr_decls++;
271 break;
272 case TGSI_SEMANTIC_GENERIC:
273 draw_emit_vertex_attr(vinfo, EMIT_4F, src);
274 vdecl[nr_decls].identity.usage = SVGA3D_DECLUSAGE_TEXCOORD;
275 vdecl[nr_decls].identity.type = SVGA3D_DECLTYPE_FLOAT4;
276 vdecl[nr_decls].identity.usageIndex =
277 svga_remap_generic_index(fs->generic_remap_table, sem_index);
278 offset += 16;
279 nr_decls++;
280 break;
281 case TGSI_SEMANTIC_FOG:
282 draw_emit_vertex_attr(vinfo, EMIT_1F, src);
283 vdecl[nr_decls].identity.usage = SVGA3D_DECLUSAGE_TEXCOORD;
284 vdecl[nr_decls].identity.type = SVGA3D_DECLTYPE_FLOAT1;
285 assert(vdecl[nr_decls].identity.usageIndex == 0);
286 offset += 4;
287 nr_decls++;
288 break;
289 case TGSI_SEMANTIC_POSITION:
290 /* generated internally, not a vertex shader output */
291 break;
292 default:
293 assert(0);
294 }
295 }
296
297 draw_compute_vertex_size(vinfo);
298
299 svga_render->vdecl_count = nr_decls;
300 for (i = 0; i < svga_render->vdecl_count; i++) {
301 vdecl[i].array.stride = offset;
302 }
303
304 any_change = memcmp(svga_render->vdecl, vdecl, sizeof(vdecl));
305
306 if (svga_have_vgpu10(svga)) {
307 enum pipe_error ret;
308
309 if (!any_change && svga_render->layout_id != SVGA3D_INVALID_ID) {
310 goto done;
311 }
312
313 if (svga_render->layout_id != SVGA3D_INVALID_ID) {
314 /* destroy old */
315 ret = SVGA3D_vgpu10_DestroyElementLayout(svga->swc,
316 svga_render->layout_id);
317 if (ret != PIPE_OK) {
318 svga_context_flush(svga, NULL);
319 ret = SVGA3D_vgpu10_DestroyElementLayout(svga->swc,
320 svga_render->layout_id);
321 assert(ret == PIPE_OK);
322 }
323
324 /**
325 * reset current layout id state after the element layout is
326 * destroyed, so that if a new layout has the same layout id, we
327 * will know to re-issue the SetInputLayout command.
328 */
329 if (svga->state.hw_draw.layout_id == svga_render->layout_id)
330 svga->state.hw_draw.layout_id = SVGA3D_INVALID_ID;
331
332 util_bitmask_clear(svga->input_element_object_id_bm,
333 svga_render->layout_id);
334 }
335
336 svga_render->layout_id =
337 svga_vdecl_to_input_element(svga, vdecl, nr_decls);
338
339 /* bind new */
340 if (svga->state.hw_draw.layout_id != svga_render->layout_id) {
341 ret = SVGA3D_vgpu10_SetInputLayout(svga->swc, svga_render->layout_id);
342 if (ret != PIPE_OK) {
343 svga_context_flush(svga, NULL);
344 ret = SVGA3D_vgpu10_SetInputLayout(svga->swc,
345 svga_render->layout_id);
346 assert(ret == PIPE_OK);
347 }
348
349 svga->state.hw_draw.layout_id = svga_render->layout_id;
350 }
351 }
352 else {
353 if (!any_change)
354 goto done;
355 }
356
357 memcpy(svga_render->vdecl, vdecl, sizeof(vdecl));
358 svga->swtnl.new_vdecl = TRUE;
359
360 done:
361 SVGA_STATS_TIME_POP(svga_sws(svga));
362 return PIPE_OK;
363 }
364
365
366 static enum pipe_error
367 update_swtnl_vdecl( struct svga_context *svga,
368 unsigned dirty )
369 {
370 return svga_swtnl_update_vdecl( svga );
371 }
372
373
374 struct svga_tracked_state svga_update_swtnl_vdecl =
375 {
376 "update draw module vdecl",
377 (SVGA_NEW_VS |
378 SVGA_NEW_FS),
379 update_swtnl_vdecl
380 };