1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 **********************************************************/
27 #include "pipe/p_shader_tokens.h"
28 #include "tgsi/tgsi_parse.h"
29 #include "util/u_memory.h"
31 #include "svga_tgsi_emit.h"
35 * Translate TGSI semantic info into SVGA3d semantic info.
36 * This is called for VS outputs and PS inputs only.
39 translate_vs_ps_semantic(struct svga_shader_emitter
*emit
,
40 struct tgsi_declaration_semantic semantic
,
44 switch (semantic
.Name
) {
45 case TGSI_SEMANTIC_POSITION
:
46 *idx
= semantic
.Index
;
47 *usage
= SVGA3D_DECLUSAGE_POSITION
;
49 case TGSI_SEMANTIC_COLOR
:
50 *idx
= semantic
.Index
;
51 *usage
= SVGA3D_DECLUSAGE_COLOR
;
53 case TGSI_SEMANTIC_BCOLOR
:
54 *idx
= semantic
.Index
+ 2; /* sharing with COLOR */
55 *usage
= SVGA3D_DECLUSAGE_COLOR
;
57 case TGSI_SEMANTIC_FOG
:
59 assert(semantic
.Index
== 0);
60 *usage
= SVGA3D_DECLUSAGE_TEXCOORD
;
62 case TGSI_SEMANTIC_PSIZE
:
63 *idx
= semantic
.Index
;
64 *usage
= SVGA3D_DECLUSAGE_PSIZE
;
66 case TGSI_SEMANTIC_GENERIC
:
67 *idx
= svga_remap_generic_index(emit
->key
.generic_remap_table
,
69 *usage
= SVGA3D_DECLUSAGE_TEXCOORD
;
71 case TGSI_SEMANTIC_NORMAL
:
72 *idx
= semantic
.Index
;
73 *usage
= SVGA3D_DECLUSAGE_NORMAL
;
75 case TGSI_SEMANTIC_CLIPDIST
:
76 case TGSI_SEMANTIC_CLIPVERTEX
:
77 /* XXX at this time we don't support clip distance or clip vertices */
78 debug_warn_once("unsupported clip distance/vertex attribute\n");
79 *usage
= SVGA3D_DECLUSAGE_TEXCOORD
;
84 *usage
= SVGA3D_DECLUSAGE_TEXCOORD
;
94 * Emit a PS input (or VS depth/fog output) register declaration.
95 * For example, if usage = SVGA3D_DECLUSAGE_TEXCOORD, reg.num = 1, and
96 * index = 3, we'll emit "dcl_texcoord3 v1".
99 emit_decl(struct svga_shader_emitter
*emit
,
100 SVGA3dShaderDestToken reg
,
105 SVGA3dShaderInstToken opcode
;
107 /* check values against bitfield sizes */
109 assert(usage
<= SVGA3D_DECLUSAGE_MAX
);
111 opcode
= inst_token(SVGA3DOP_DCL
);
118 dcl
.values
[0] |= 1<<31;
120 return (emit_instruction(emit
, opcode
) &&
121 svga_shader_emit_dwords(emit
, dcl
.values
, ARRAY_SIZE(dcl
.values
)));
126 * Emit declaration for PS front/back-face input register.
129 emit_vface_decl(struct svga_shader_emitter
*emit
)
131 if (!emit
->emitted_vface
) {
132 SVGA3dShaderDestToken reg
=
133 dst_register(SVGA3DREG_MISCTYPE
, SVGA3DMISCREG_FACE
);
135 if (!emit_decl(emit
, reg
, 0, 0))
138 emit
->emitted_vface
= TRUE
;
145 * Emit PS input register to pass depth/fog coordinates.
146 * Note that this always goes into texcoord[0].
149 ps30_input_emit_depth_fog(struct svga_shader_emitter
*emit
,
150 struct src_register
*out
)
152 struct src_register reg
;
154 if (emit
->emitted_depth_fog
) {
155 *out
= emit
->ps_depth_fog
;
159 if (emit
->ps30_input_count
>= SVGA3D_INPUTREG_MAX
)
162 reg
= src_register(SVGA3DREG_INPUT
,
163 emit
->ps30_input_count
++);
165 *out
= emit
->ps_depth_fog
= reg
;
167 emit
->emitted_depth_fog
= TRUE
;
169 return emit_decl(emit
, dst(reg
), SVGA3D_DECLUSAGE_TEXCOORD
, 0);
174 * Process a PS input declaration.
175 * We'll emit a declaration like "dcl_texcoord1 v2"
178 ps30_input(struct svga_shader_emitter
*emit
,
179 struct tgsi_declaration_semantic semantic
,
182 unsigned usage
, index
;
183 SVGA3dShaderDestToken reg
;
185 if (semantic
.Name
== TGSI_SEMANTIC_POSITION
) {
187 emit
->ps_true_pos
= src_register(SVGA3DREG_MISCTYPE
,
188 SVGA3DMISCREG_POSITION
);
189 emit
->ps_true_pos
.base
.swizzle
= TRANSLATE_SWIZZLE(TGSI_SWIZZLE_X
,
193 reg
= writemask(dst(emit
->ps_true_pos
),
195 emit
->ps_reads_pos
= TRUE
;
197 if (emit
->info
.reads_z
) {
198 emit
->ps_temp_pos
= dst_register(SVGA3DREG_TEMP
,
201 emit
->input_map
[idx
] = src_register(SVGA3DREG_TEMP
,
205 if (!ps30_input_emit_depth_fog(emit
, &emit
->ps_depth_pos
))
208 emit
->ps_depth_pos
.base
.swizzle
= TRANSLATE_SWIZZLE(TGSI_SWIZZLE_Z
,
214 emit
->input_map
[idx
] = emit
->ps_true_pos
;
217 return emit_decl(emit
, reg
, 0, 0);
219 else if (emit
->key
.fs
.light_twoside
&&
220 (semantic
.Name
== TGSI_SEMANTIC_COLOR
)) {
222 if (!translate_vs_ps_semantic(emit
, semantic
, &usage
, &index
))
225 emit
->internal_color_idx
[emit
->internal_color_count
] = idx
;
226 emit
->input_map
[idx
] =
227 src_register(SVGA3DREG_INPUT
, emit
->ps30_input_count
);
228 emit
->ps30_input_count
++;
229 emit
->internal_color_count
++;
231 reg
= dst(emit
->input_map
[idx
]);
233 if (!emit_decl(emit
, reg
, usage
, index
))
236 semantic
.Name
= TGSI_SEMANTIC_BCOLOR
;
237 if (!translate_vs_ps_semantic(emit
, semantic
, &usage
, &index
))
240 if (emit
->ps30_input_count
>= SVGA3D_INPUTREG_MAX
)
243 reg
= dst_register(SVGA3DREG_INPUT
, emit
->ps30_input_count
++);
245 if (!emit_decl(emit
, reg
, usage
, index
))
248 if (!emit_vface_decl(emit
))
253 else if (semantic
.Name
== TGSI_SEMANTIC_FACE
) {
254 if (!emit_vface_decl(emit
))
256 emit
->emit_frontface
= TRUE
;
257 emit
->internal_frontface_idx
= idx
;
260 else if (semantic
.Name
== TGSI_SEMANTIC_FOG
) {
262 assert(semantic
.Index
== 0);
264 if (!ps30_input_emit_depth_fog(emit
, &emit
->input_map
[idx
]))
267 emit
->input_map
[idx
].base
.swizzle
= TRANSLATE_SWIZZLE(TGSI_SWIZZLE_X
,
275 if (!translate_vs_ps_semantic(emit
, semantic
, &usage
, &index
))
278 if (emit
->ps30_input_count
>= SVGA3D_INPUTREG_MAX
)
281 emit
->input_map
[idx
] =
282 src_register(SVGA3DREG_INPUT
, emit
->ps30_input_count
++);
284 reg
= dst(emit
->input_map
[idx
]);
286 if (!emit_decl(emit
, reg
, usage
, index
))
289 if (semantic
.Name
== TGSI_SEMANTIC_GENERIC
&&
290 emit
->key
.sprite_origin_lower_left
&&
292 emit
->key
.sprite_coord_enable
& (1 << semantic
.Index
)) {
293 /* This is a sprite texture coord with lower-left origin.
294 * We need to invert the texture T coordinate since the SVGA3D
295 * device only supports an upper-left origin.
297 unsigned unit
= index
- 1;
299 emit
->inverted_texcoords
|= (1 << unit
);
301 /* save original texcoord reg */
302 emit
->ps_true_texcoord
[unit
] = emit
->input_map
[idx
];
304 /* this temp register will be the results of the MAD instruction */
305 emit
->ps_inverted_texcoord
[unit
] =
306 src_register(SVGA3DREG_TEMP
, emit
->nr_hw_temp
);
309 emit
->ps_inverted_texcoord_input
[unit
] = idx
;
311 /* replace input_map entry with the temp register */
312 emit
->input_map
[idx
] = emit
->ps_inverted_texcoord
[unit
];
322 * Process a PS output declaration.
323 * Note that we don't actually emit a SVGA3DOpDcl for PS outputs.
324 * \idx register index, such as OUT[2] (not semantic index)
327 ps30_output(struct svga_shader_emitter
*emit
,
328 struct tgsi_declaration_semantic semantic
,
331 switch (semantic
.Name
) {
332 case TGSI_SEMANTIC_COLOR
:
333 if (emit
->unit
== PIPE_SHADER_FRAGMENT
) {
334 if (emit
->key
.fs
.white_fragments
) {
335 /* Used for XOR logicop mode */
336 emit
->output_map
[idx
] = dst_register(SVGA3DREG_TEMP
,
338 emit
->temp_color_output
[idx
] = emit
->output_map
[idx
];
339 emit
->true_color_output
[idx
] = dst_register(SVGA3DREG_COLOROUT
,
342 else if (emit
->key
.fs
.write_color0_to_n_cbufs
) {
343 /* We'll write color output [0] to all render targets.
344 * Prepare all the output registers here, but only when the
345 * semantic.Index == 0 so we don't do this more than once.
347 if (semantic
.Index
== 0) {
349 for (i
= 0; i
< emit
->key
.fs
.write_color0_to_n_cbufs
; i
++) {
350 emit
->output_map
[idx
+i
] = dst_register(SVGA3DREG_TEMP
,
352 emit
->temp_color_output
[i
] = emit
->output_map
[idx
+i
];
353 emit
->true_color_output
[i
] = dst_register(SVGA3DREG_COLOROUT
,
359 emit
->output_map
[idx
] =
360 dst_register(SVGA3DREG_COLOROUT
, semantic
.Index
);
364 emit
->output_map
[idx
] = dst_register(SVGA3DREG_COLOROUT
,
368 case TGSI_SEMANTIC_POSITION
:
369 emit
->output_map
[idx
] = dst_register(SVGA3DREG_TEMP
,
371 emit
->temp_pos
= emit
->output_map
[idx
];
372 emit
->true_pos
= dst_register(SVGA3DREG_DEPTHOUT
,
377 /* A wild stab in the dark. */
378 emit
->output_map
[idx
] = dst_register(SVGA3DREG_COLOROUT
, 0);
387 * Declare a VS input register.
388 * We still make up the input semantics the same as in 2.0
391 vs30_input(struct svga_shader_emitter
*emit
,
392 struct tgsi_declaration_semantic semantic
,
396 SVGA3dShaderInstToken opcode
;
397 unsigned usage
, index
;
399 opcode
= inst_token(SVGA3DOP_DCL
);
403 emit
->input_map
[idx
] = src_register(SVGA3DREG_INPUT
, idx
);
404 dcl
.dst
= dst_register(SVGA3DREG_INPUT
, idx
);
406 assert(dcl
.dst
.reserved0
);
408 svga_generate_vdecl_semantics(idx
, &usage
, &index
);
412 dcl
.values
[0] |= 1<<31;
414 return (emit_instruction(emit
, opcode
) &&
415 svga_shader_emit_dwords(emit
, dcl
.values
, ARRAY_SIZE(dcl
.values
)));
420 * Declare VS output for holding depth/fog.
423 vs30_output_emit_depth_fog(struct svga_shader_emitter
*emit
,
424 SVGA3dShaderDestToken
*out
)
426 SVGA3dShaderDestToken reg
;
428 if (emit
->emitted_depth_fog
) {
429 *out
= emit
->vs_depth_fog
;
433 reg
= dst_register(SVGA3DREG_OUTPUT
, emit
->vs30_output_count
++);
435 *out
= emit
->vs_depth_fog
= reg
;
437 emit
->emitted_depth_fog
= TRUE
;
439 return emit_decl(emit
, reg
, SVGA3D_DECLUSAGE_TEXCOORD
, 0);
444 * Declare a VS output.
445 * VS3.0 outputs have proper declarations and semantic info for
446 * matching against PS inputs.
449 vs30_output(struct svga_shader_emitter
*emit
,
450 struct tgsi_declaration_semantic semantic
,
454 SVGA3dShaderInstToken opcode
;
455 unsigned usage
, index
;
457 opcode
= inst_token(SVGA3DOP_DCL
);
461 if (!translate_vs_ps_semantic(emit
, semantic
, &usage
, &index
))
464 if (emit
->vs30_output_count
>= SVGA3D_OUTPUTREG_MAX
)
467 dcl
.dst
= dst_register(SVGA3DREG_OUTPUT
, emit
->vs30_output_count
++);
470 dcl
.values
[0] |= 1<<31;
472 if (semantic
.Name
== TGSI_SEMANTIC_POSITION
) {
474 emit
->output_map
[idx
] = dst_register(SVGA3DREG_TEMP
,
476 emit
->temp_pos
= emit
->output_map
[idx
];
477 emit
->true_pos
= dcl
.dst
;
479 /* Grab an extra output for the depth output */
480 if (!vs30_output_emit_depth_fog(emit
, &emit
->depth_pos
))
484 else if (semantic
.Name
== TGSI_SEMANTIC_PSIZE
) {
485 emit
->output_map
[idx
] = dst_register(SVGA3DREG_TEMP
,
487 emit
->temp_psiz
= emit
->output_map
[idx
];
489 /* This has the effect of not declaring psiz (below) and not
490 * emitting the final MOV to true_psiz in the postamble.
492 if (!emit
->key
.vs
.allow_psiz
)
495 emit
->true_psiz
= dcl
.dst
;
497 else if (semantic
.Name
== TGSI_SEMANTIC_FOG
) {
499 * Fog is shared with depth.
500 * So we need to decrement out_count since emit_depth_fog will increment it.
502 emit
->vs30_output_count
--;
504 if (!vs30_output_emit_depth_fog(emit
, &emit
->output_map
[idx
]))
510 emit
->output_map
[idx
] = dcl
.dst
;
513 return (emit_instruction(emit
, opcode
) &&
514 svga_shader_emit_dwords(emit
, dcl
.values
, ARRAY_SIZE(dcl
.values
)));
518 /** Translate PIPE_TEXTURE_x to SVGA3DSAMP_x */
520 svga_tgsi_sampler_type(const struct svga_shader_emitter
*emit
, int idx
)
522 switch (emit
->sampler_target
[idx
]) {
523 case TGSI_TEXTURE_1D
:
524 return SVGA3DSAMP_2D
;
525 case TGSI_TEXTURE_2D
:
526 case TGSI_TEXTURE_RECT
:
527 return SVGA3DSAMP_2D
;
528 case TGSI_TEXTURE_SHADOW2D
:
529 return SVGA3DSAMP_2D_SHADOW
;
530 case TGSI_TEXTURE_3D
:
531 return SVGA3DSAMP_VOLUME
;
532 case TGSI_TEXTURE_CUBE
:
533 return SVGA3DSAMP_CUBE
;
536 return SVGA3DSAMP_UNKNOWN
;
541 ps30_sampler(struct svga_shader_emitter
*emit
,
545 SVGA3dShaderInstToken opcode
;
547 opcode
= inst_token(SVGA3DOP_DCL
);
551 dcl
.dst
= dst_register(SVGA3DREG_SAMPLER
, idx
);
552 dcl
.type
= svga_tgsi_sampler_type(emit
, idx
);
553 dcl
.values
[0] |= 1<<31;
555 return (emit_instruction(emit
, opcode
) &&
556 svga_shader_emit_dwords(emit
, dcl
.values
, ARRAY_SIZE(dcl
.values
)));
561 svga_shader_emit_samplers_decl(struct svga_shader_emitter
*emit
)
565 for (i
= 0; i
< emit
->num_samplers
; i
++) {
566 if (!ps30_sampler(emit
, i
))
574 svga_translate_decl_sm30(struct svga_shader_emitter
*emit
,
575 const struct tgsi_full_declaration
*decl
)
577 unsigned first
= decl
->Range
.First
;
578 unsigned last
= decl
->Range
.Last
;
581 for (idx
= first
; idx
<= last
; idx
++) {
584 switch (decl
->Declaration
.File
) {
585 case TGSI_FILE_SAMPLER
:
586 assert (emit
->unit
== PIPE_SHADER_FRAGMENT
);
587 /* just keep track of the number of samplers here.
588 * Will emit the declaration in the helpers function.
590 emit
->num_samplers
= MAX2(emit
->num_samplers
, decl
->Range
.Last
+ 1);
593 case TGSI_FILE_INPUT
:
594 if (emit
->unit
== PIPE_SHADER_VERTEX
)
595 ok
= vs30_input(emit
, decl
->Semantic
, idx
);
597 ok
= ps30_input(emit
, decl
->Semantic
, idx
);
600 case TGSI_FILE_OUTPUT
:
601 if (emit
->unit
== PIPE_SHADER_VERTEX
)
602 ok
= vs30_output(emit
, decl
->Semantic
, idx
);
604 ok
= ps30_output(emit
, decl
->Semantic
, idx
);
607 case TGSI_FILE_SAMPLER_VIEW
:
609 unsigned unit
= decl
->Range
.First
;
610 assert(decl
->Range
.First
== decl
->Range
.Last
);
611 emit
->sampler_target
[unit
] = decl
->SamplerView
.Resource
;
616 /* don't need to declare other vars */