svga: Wip for passing depth in a texcoord
[mesa.git] / src / gallium / drivers / svga / svga_tgsi_emit.h
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #ifndef SVGA_TGSI_EMIT_H
27 #define SVGA_TGSI_EMIT_H
28
29 #include "tgsi/tgsi_scan.h"
30 #include "svga_hw_reg.h"
31 #include "svga_tgsi.h"
32 #include "svga3d_shaderdefs.h"
33
34 struct src_register
35 {
36 SVGA3dShaderSrcToken base;
37 SVGA3dShaderSrcToken indirect;
38 };
39
40
41 struct svga_arl_consts {
42 int number;
43 int idx;
44 int swizzle;
45 int arl_num;
46 };
47
48 /* Internal functions:
49 */
50
51 struct svga_shader_emitter
52 {
53 boolean use_sm30;
54
55 unsigned size;
56 char *buf;
57 char *ptr;
58
59 union svga_compile_key key;
60 struct tgsi_shader_info info;
61 int unit;
62
63 int imm_start;
64
65 int nr_hw_float_const;
66 int nr_hw_int_const;
67 int nr_hw_temp;
68
69 int insn_offset;
70
71 int internal_temp_count;
72 int internal_imm_count;
73
74 int internal_color_idx[2]; /* diffuse, specular */
75 int internal_color_count;
76
77 boolean emitted_vface;
78 boolean emit_frontface;
79 int internal_frontface_idx;
80
81 int ps30_input_count;
82 int vs30_output_count;
83
84 int dynamic_branching_level;
85
86 boolean in_main_func;
87
88 boolean created_zero_immediate;
89 int zero_immediate_idx;
90
91 boolean created_loop_const;
92 int loop_const_idx;
93
94 boolean created_sincos_consts;
95 int sincos_consts_idx;
96
97 unsigned label[32];
98 unsigned nr_labels;
99
100 struct src_register input_map[PIPE_MAX_ATTRIBS];
101 SVGA3dShaderDestToken output_map[PIPE_MAX_ATTRIBS];
102
103 boolean ps_reads_pos;
104 struct src_register ps_true_pos;
105 struct src_register ps_depth_pos;
106 SVGA3dShaderDestToken ps_temp_pos;
107
108 struct src_register imm_0055;
109 SVGA3dShaderDestToken temp_pos;
110 SVGA3dShaderDestToken true_pos;
111 SVGA3dShaderDestToken depth_pos;
112
113 SVGA3dShaderDestToken temp_col[PIPE_MAX_COLOR_BUFS];
114 SVGA3dShaderDestToken true_col[PIPE_MAX_COLOR_BUFS];
115
116 SVGA3dShaderDestToken temp_psiz;
117 SVGA3dShaderDestToken true_psiz;
118
119 struct svga_arl_consts arl_consts[12];
120 int num_arl_consts;
121 int current_arl;
122 };
123
124
125 boolean svga_shader_emit_dword( struct svga_shader_emitter *emit,
126 unsigned dword );
127
128 boolean svga_shader_emit_dwords( struct svga_shader_emitter *emit,
129 const unsigned *dwords,
130 unsigned nr );
131
132 boolean svga_shader_emit_opcode( struct svga_shader_emitter *emit,
133 unsigned opcode );
134
135 boolean svga_shader_emit_instructions( struct svga_shader_emitter *emit,
136 const struct tgsi_token *tokens );
137
138 boolean svga_translate_decl_sm20( struct svga_shader_emitter *emit,
139 const struct tgsi_full_declaration *decl );
140
141 boolean svga_translate_decl_sm30( struct svga_shader_emitter *emit,
142 const struct tgsi_full_declaration *decl );
143
144
145 static INLINE boolean emit_dst( struct svga_shader_emitter *emit,
146 SVGA3dShaderDestToken dest )
147 {
148 assert(dest.reserved0);
149 assert(dest.mask);
150 return svga_shader_emit_dword( emit, dest.value );
151 }
152
153 static INLINE boolean emit_src( struct svga_shader_emitter *emit,
154 const struct src_register src )
155 {
156 if (src.base.relAddr) {
157 assert(src.base.reserved0);
158 assert(src.indirect.reserved0);
159 return (svga_shader_emit_dword( emit, src.base.value ) &&
160 svga_shader_emit_dword( emit, src.indirect.value ));
161 }
162 else {
163 assert(src.base.reserved0);
164 return svga_shader_emit_dword( emit, src.base.value );
165 }
166 }
167
168
169 static INLINE boolean emit_instruction( struct svga_shader_emitter *emit,
170 SVGA3dShaderInstToken opcode )
171 {
172 return svga_shader_emit_opcode( emit, opcode.value );
173 }
174
175
176 static INLINE boolean emit_op1( struct svga_shader_emitter *emit,
177 SVGA3dShaderInstToken inst,
178 SVGA3dShaderDestToken dest,
179 struct src_register src0 )
180 {
181 return (emit_instruction( emit, inst ) &&
182 emit_dst( emit, dest ) &&
183 emit_src( emit, src0 ));
184 }
185
186 static INLINE boolean emit_op2( struct svga_shader_emitter *emit,
187 SVGA3dShaderInstToken inst,
188 SVGA3dShaderDestToken dest,
189 struct src_register src0,
190 struct src_register src1 )
191 {
192 return (emit_instruction( emit, inst ) &&
193 emit_dst( emit, dest ) &&
194 emit_src( emit, src0 ) &&
195 emit_src( emit, src1 ));
196 }
197
198 static INLINE boolean emit_op3( struct svga_shader_emitter *emit,
199 SVGA3dShaderInstToken inst,
200 SVGA3dShaderDestToken dest,
201 struct src_register src0,
202 struct src_register src1,
203 struct src_register src2 )
204 {
205 return (emit_instruction( emit, inst ) &&
206 emit_dst( emit, dest ) &&
207 emit_src( emit, src0 ) &&
208 emit_src( emit, src1 ) &&
209 emit_src( emit, src2 ));
210 }
211
212
213 static INLINE boolean emit_op4( struct svga_shader_emitter *emit,
214 SVGA3dShaderInstToken inst,
215 SVGA3dShaderDestToken dest,
216 struct src_register src0,
217 struct src_register src1,
218 struct src_register src2,
219 struct src_register src3)
220 {
221 return (emit_instruction( emit, inst ) &&
222 emit_dst( emit, dest ) &&
223 emit_src( emit, src0 ) &&
224 emit_src( emit, src1 ) &&
225 emit_src( emit, src2 ) &&
226 emit_src( emit, src3 ));
227 }
228
229
230 #define TRANSLATE_SWIZZLE(x,y,z,w) ((x) | ((y) << 2) | ((z) << 4) | ((w) << 6))
231 #define SWIZZLE_XYZW \
232 TRANSLATE_SWIZZLE(TGSI_SWIZZLE_X,TGSI_SWIZZLE_Y,TGSI_SWIZZLE_Z,TGSI_SWIZZLE_W)
233 #define SWIZZLE_XXXX \
234 TRANSLATE_SWIZZLE(TGSI_SWIZZLE_X,TGSI_SWIZZLE_X,TGSI_SWIZZLE_X,TGSI_SWIZZLE_X)
235 #define SWIZZLE_YYYY \
236 TRANSLATE_SWIZZLE(TGSI_SWIZZLE_Y,TGSI_SWIZZLE_Y,TGSI_SWIZZLE_Y,TGSI_SWIZZLE_Y)
237 #define SWIZZLE_ZZZZ \
238 TRANSLATE_SWIZZLE(TGSI_SWIZZLE_Z,TGSI_SWIZZLE_Z,TGSI_SWIZZLE_Z,TGSI_SWIZZLE_Z)
239 #define SWIZZLE_WWWW \
240 TRANSLATE_SWIZZLE(TGSI_SWIZZLE_W,TGSI_SWIZZLE_W,TGSI_SWIZZLE_W,TGSI_SWIZZLE_W)
241
242
243
244 static INLINE SVGA3dShaderInstToken
245 inst_token( unsigned opcode )
246 {
247 SVGA3dShaderInstToken inst;
248
249 inst.value = 0;
250 inst.op = opcode;
251
252 return inst;
253 }
254
255 static INLINE SVGA3dShaderDestToken
256 dst_register( unsigned file,
257 int number )
258 {
259 SVGA3dShaderDestToken dest;
260
261 dest.value = 0;
262 dest.num = number;
263 dest.type_upper = file >> 3;
264 dest.relAddr = 0;
265 dest.reserved1 = 0;
266 dest.mask = 0xf;
267 dest.dstMod = 0;
268 dest.shfScale = 0;
269 dest.type_lower = file & 0x7;
270 dest.reserved0 = 1; /* is_reg */
271
272 return dest;
273 }
274
275 static INLINE SVGA3dShaderDestToken
276 writemask( SVGA3dShaderDestToken dest,
277 unsigned mask )
278 {
279 assert(dest.mask & mask);
280 dest.mask &= mask;
281 return dest;
282 }
283
284
285 static INLINE SVGA3dShaderSrcToken
286 src_token( unsigned file, int number )
287 {
288 SVGA3dShaderSrcToken src;
289
290 src.value = 0;
291 src.num = number;
292 src.type_upper = file >> 3;
293 src.relAddr = 0;
294 src.reserved1 = 0;
295 src.swizzle = SWIZZLE_XYZW;
296 src.srcMod = 0;
297 src.type_lower = file & 0x7;
298 src.reserved0 = 1; /* is_reg */
299
300 return src;
301 }
302
303
304 static INLINE struct src_register
305 absolute( struct src_register src )
306 {
307 src.base.srcMod = SVGA3DSRCMOD_ABS;
308
309 return src;
310 }
311
312
313 static INLINE struct src_register
314 negate( struct src_register src )
315 {
316 switch (src.base.srcMod) {
317 case SVGA3DSRCMOD_ABS:
318 src.base.srcMod = SVGA3DSRCMOD_ABSNEG;
319 break;
320 case SVGA3DSRCMOD_ABSNEG:
321 src.base.srcMod = SVGA3DSRCMOD_ABS;
322 break;
323 case SVGA3DSRCMOD_NEG:
324 src.base.srcMod = SVGA3DSRCMOD_NONE;
325 break;
326 case SVGA3DSRCMOD_NONE:
327 src.base.srcMod = SVGA3DSRCMOD_NEG;
328 break;
329 }
330 return src;
331 }
332
333
334 static INLINE struct src_register
335 src_register( unsigned file, int number )
336 {
337 struct src_register src;
338
339 src.base = src_token( file, number );
340 src.indirect.value = 0;
341
342 return src;
343 }
344
345 static INLINE SVGA3dShaderDestToken dst( struct src_register src )
346 {
347 return dst_register( SVGA3dShaderGetRegType( src.base.value ),
348 src.base.num );
349 }
350
351 static INLINE struct src_register src( SVGA3dShaderDestToken dst )
352 {
353 return src_register( SVGA3dShaderGetRegType( dst.value ),
354 dst.num );
355 }
356
357 static INLINE ubyte svga_tgsi_sampler_type( struct svga_shader_emitter *emit,
358 int idx )
359 {
360 switch (emit->key.fkey.tex[idx].texture_target) {
361 case PIPE_TEXTURE_1D:
362 return SVGA3DSAMP_2D;
363 case PIPE_TEXTURE_2D:
364 case PIPE_TEXTURE_RECT:
365 return SVGA3DSAMP_2D;
366 case PIPE_TEXTURE_3D:
367 return SVGA3DSAMP_VOLUME;
368 case PIPE_TEXTURE_CUBE:
369 return SVGA3DSAMP_CUBE;
370 }
371
372 return SVGA3DSAMP_UNKNOWN;
373 }
374
375 #endif