svga: fix PS output register setup regression
[mesa.git] / src / gallium / drivers / svga / svga_tgsi_emit.h
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25
26 #ifndef SVGA_TGSI_EMIT_H
27 #define SVGA_TGSI_EMIT_H
28
29 #include "tgsi/tgsi_scan.h"
30 #include "svga_hw_reg.h"
31 #include "svga_tgsi.h"
32 #include "svga3d_shaderdefs.h"
33
34 struct src_register
35 {
36 SVGA3dShaderSrcToken base;
37 SVGA3dShaderSrcToken indirect;
38 };
39
40
41 struct svga_arl_consts
42 {
43 int number;
44 int idx;
45 int swizzle;
46 int arl_num;
47 };
48
49
50 /**
51 * This is the context/state used during TGSI->SVGA shader translation.
52 */
53 struct svga_shader_emitter
54 {
55 unsigned size;
56 char *buf;
57 char *ptr;
58
59 struct svga_compile_key key;
60 struct tgsi_shader_info info;
61 int unit;
62
63 int imm_start;
64
65 int nr_hw_float_const;
66 int nr_hw_int_const;
67 int nr_hw_temp;
68
69 int insn_offset;
70
71 int internal_temp_count;
72 int internal_imm_count;
73
74 int internal_color_idx[2]; /* diffuse, specular */
75 int internal_color_count;
76
77 boolean emitted_vface;
78 boolean emit_frontface;
79 int internal_frontface_idx;
80
81 int ps30_input_count;
82 int vs30_output_count;
83
84 int dynamic_branching_level;
85
86 boolean in_main_func;
87
88 boolean created_common_immediate;
89 int common_immediate_idx;
90
91 boolean created_loop_const;
92 int loop_const_idx;
93
94 unsigned inverted_texcoords; /**< bitmask of which texcoords are flipped */
95 struct src_register ps_true_texcoord[PIPE_MAX_ATTRIBS];
96 struct src_register ps_inverted_texcoord[PIPE_MAX_ATTRIBS];
97 unsigned ps_inverted_texcoord_input[PIPE_MAX_ATTRIBS];
98
99 unsigned label[32];
100 unsigned nr_labels;
101
102 /** input/output register mappings, indexed by register number */
103 struct src_register input_map[PIPE_MAX_ATTRIBS];
104 SVGA3dShaderDestToken output_map[PIPE_MAX_ATTRIBS];
105
106 boolean ps_reads_pos;
107 boolean emitted_depth_fog;
108 struct src_register ps_true_pos;
109 struct src_register ps_depth_pos;
110 SVGA3dShaderDestToken ps_temp_pos;
111
112 /* shared input for depth and fog */
113 struct src_register ps_depth_fog;
114
115 struct src_register imm_0055;
116 SVGA3dShaderDestToken temp_pos;
117 SVGA3dShaderDestToken true_pos;
118 SVGA3dShaderDestToken depth_pos;
119
120 /* shared output for depth and fog */
121 SVGA3dShaderDestToken vs_depth_fog;
122
123 /* PS output colors (indexed by color semantic index) */
124 SVGA3dShaderDestToken temp_color_output[PIPE_MAX_COLOR_BUFS];
125 SVGA3dShaderDestToken true_color_output[PIPE_MAX_COLOR_BUFS];
126
127 SVGA3dShaderDestToken temp_psiz;
128 SVGA3dShaderDestToken true_psiz;
129
130 struct svga_arl_consts arl_consts[12];
131 int num_arl_consts;
132 int current_arl;
133 };
134
135
136 boolean
137 svga_shader_emit_dword(struct svga_shader_emitter *emit, unsigned dword);
138
139 boolean
140 svga_shader_emit_dwords(struct svga_shader_emitter *emit,
141 const unsigned *dwords, unsigned nr);
142
143 boolean
144 svga_shader_emit_opcode(struct svga_shader_emitter *emit,
145 unsigned opcode);
146
147 boolean
148 svga_shader_emit_instructions(struct svga_shader_emitter *emit,
149 const struct tgsi_token *tokens);
150
151 boolean
152 svga_translate_decl_sm30(struct svga_shader_emitter *emit,
153 const struct tgsi_full_declaration *decl);
154
155
156 #define TRANSLATE_SWIZZLE(x,y,z,w) ((x) | ((y) << 2) | ((z) << 4) | ((w) << 6))
157 #define SWIZZLE_XYZW \
158 TRANSLATE_SWIZZLE(TGSI_SWIZZLE_X,TGSI_SWIZZLE_Y,TGSI_SWIZZLE_Z,TGSI_SWIZZLE_W)
159 #define SWIZZLE_XXXX \
160 TRANSLATE_SWIZZLE(TGSI_SWIZZLE_X,TGSI_SWIZZLE_X,TGSI_SWIZZLE_X,TGSI_SWIZZLE_X)
161 #define SWIZZLE_YYYY \
162 TRANSLATE_SWIZZLE(TGSI_SWIZZLE_Y,TGSI_SWIZZLE_Y,TGSI_SWIZZLE_Y,TGSI_SWIZZLE_Y)
163 #define SWIZZLE_ZZZZ \
164 TRANSLATE_SWIZZLE(TGSI_SWIZZLE_Z,TGSI_SWIZZLE_Z,TGSI_SWIZZLE_Z,TGSI_SWIZZLE_Z)
165 #define SWIZZLE_WWWW \
166 TRANSLATE_SWIZZLE(TGSI_SWIZZLE_W,TGSI_SWIZZLE_W,TGSI_SWIZZLE_W,TGSI_SWIZZLE_W)
167
168
169 /** Emit the given SVGA3dShaderInstToken opcode */
170 static INLINE boolean
171 emit_instruction(struct svga_shader_emitter *emit,
172 SVGA3dShaderInstToken opcode)
173 {
174 return svga_shader_emit_opcode(emit, opcode.value);
175 }
176
177
178 /** Generate a SVGA3dShaderInstToken for the given SVGA3D shader opcode */
179 static INLINE SVGA3dShaderInstToken
180 inst_token(unsigned opcode)
181 {
182 SVGA3dShaderInstToken inst;
183
184 inst.value = 0;
185 inst.op = opcode;
186
187 return inst;
188 }
189
190
191 /**
192 * Create an instance of a SVGA3dShaderDestToken.
193 * Note that this function is used to create tokens for output registers,
194 * temp registers AND constants (see emit_def_const()).
195 */
196 static INLINE SVGA3dShaderDestToken
197 dst_register(unsigned file, int number)
198 {
199 SVGA3dShaderDestToken dest;
200
201 /* check values against bitfield sizes */
202 assert(number < (1 << 11));
203 assert(file <= SVGA3DREG_PREDICATE);
204
205 dest.value = 0;
206 dest.num = number;
207 dest.type_upper = file >> 3;
208 dest.relAddr = 0;
209 dest.reserved1 = 0;
210 dest.mask = 0xf;
211 dest.dstMod = 0;
212 dest.shfScale = 0;
213 dest.type_lower = file & 0x7;
214 dest.reserved0 = 1; /* is_reg */
215
216 return dest;
217 }
218
219
220 /**
221 * Apply a writemask to the given SVGA3dShaderDestToken, returning a
222 * new SVGA3dShaderDestToken.
223 */
224 static INLINE SVGA3dShaderDestToken
225 writemask(SVGA3dShaderDestToken dest, unsigned mask)
226 {
227 assert(dest.mask & mask);
228 dest.mask &= mask;
229 return dest;
230 }
231
232
233 /** Create a SVGA3dShaderSrcToken given a register file and number */
234 static INLINE SVGA3dShaderSrcToken
235 src_token(unsigned file, int number)
236 {
237 SVGA3dShaderSrcToken src;
238
239 /* check values against bitfield sizes */
240 assert(number < (1 << 11));
241 assert(file <= SVGA3DREG_PREDICATE);
242
243 src.value = 0;
244 src.num = number;
245 src.type_upper = file >> 3;
246 src.relAddr = 0;
247 src.reserved1 = 0;
248 src.swizzle = SWIZZLE_XYZW;
249 src.srcMod = 0;
250 src.type_lower = file & 0x7;
251 src.reserved0 = 1; /* is_reg */
252
253 return src;
254 }
255
256
257 /** Create a src_register given a register file and register number */
258 static INLINE struct src_register
259 src_register(unsigned file, int number)
260 {
261 struct src_register src;
262
263 src.base = src_token(file, number);
264 src.indirect.value = 0;
265
266 return src;
267 }
268
269 /** Translate src_register into SVGA3dShaderDestToken */
270 static INLINE SVGA3dShaderDestToken
271 dst(struct src_register src)
272 {
273 return dst_register(SVGA3dShaderGetRegType(src.base.value), src.base.num);
274 }
275
276
277 /** Translate SVGA3dShaderDestToken to a src_register */
278 static INLINE struct src_register
279 src(SVGA3dShaderDestToken dst)
280 {
281 return src_register(SVGA3dShaderGetRegType(dst.value), dst.num);
282 }
283
284 #endif