Merge branch 'master' of ssh://git.freedesktop.org/git/mesa/mesa into pipe-video
[mesa.git] / src / gallium / drivers / svga / svga_tgsi_emit.h
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #ifndef SVGA_TGSI_EMIT_H
27 #define SVGA_TGSI_EMIT_H
28
29 #include "tgsi/tgsi_scan.h"
30 #include "svga_hw_reg.h"
31 #include "svga_tgsi.h"
32 #include "svga3d_shaderdefs.h"
33
34 struct src_register
35 {
36 SVGA3dShaderSrcToken base;
37 SVGA3dShaderSrcToken indirect;
38 };
39
40
41 struct svga_arl_consts {
42 int number;
43 int idx;
44 int swizzle;
45 int arl_num;
46 };
47
48 /* Internal functions:
49 */
50
51 struct svga_shader_emitter
52 {
53 boolean use_sm30;
54
55 unsigned size;
56 char *buf;
57 char *ptr;
58
59 union svga_compile_key key;
60 struct tgsi_shader_info info;
61 int unit;
62
63 int imm_start;
64
65 int nr_hw_float_const;
66 int nr_hw_int_const;
67 int nr_hw_temp;
68
69 int insn_offset;
70
71 int internal_temp_count;
72 int internal_imm_count;
73
74 int internal_color_idx[2]; /* diffuse, specular */
75 int internal_color_count;
76
77 boolean emitted_vface;
78 boolean emit_frontface;
79 int internal_frontface_idx;
80
81 int ps30_input_count;
82
83 int dynamic_branching_level;
84
85 boolean in_main_func;
86
87 boolean created_zero_immediate;
88 int zero_immediate_idx;
89
90 boolean created_loop_const;
91 int loop_const_idx;
92
93 boolean created_sincos_consts;
94 int sincos_consts_idx;
95
96 unsigned label[32];
97 unsigned nr_labels;
98
99 struct src_register input_map[PIPE_MAX_ATTRIBS];
100 SVGA3dShaderDestToken output_map[PIPE_MAX_ATTRIBS];
101
102 struct src_register imm_0055;
103 SVGA3dShaderDestToken temp_pos;
104 SVGA3dShaderDestToken true_pos;
105
106 SVGA3dShaderDestToken temp_col[PIPE_MAX_COLOR_BUFS];
107 SVGA3dShaderDestToken true_col[PIPE_MAX_COLOR_BUFS];
108
109 SVGA3dShaderDestToken temp_psiz;
110 SVGA3dShaderDestToken true_psiz;
111
112 struct svga_arl_consts arl_consts[12];
113 int num_arl_consts;
114 int current_arl;
115 };
116
117
118 boolean svga_shader_emit_dword( struct svga_shader_emitter *emit,
119 unsigned dword );
120
121 boolean svga_shader_emit_dwords( struct svga_shader_emitter *emit,
122 const unsigned *dwords,
123 unsigned nr );
124
125 boolean svga_shader_emit_opcode( struct svga_shader_emitter *emit,
126 unsigned opcode );
127
128 boolean svga_shader_emit_instructions( struct svga_shader_emitter *emit,
129 const struct tgsi_token *tokens );
130
131 boolean svga_translate_decl_sm20( struct svga_shader_emitter *emit,
132 const struct tgsi_full_declaration *decl );
133
134 boolean svga_translate_decl_sm30( struct svga_shader_emitter *emit,
135 const struct tgsi_full_declaration *decl );
136
137
138 static INLINE boolean emit_dst( struct svga_shader_emitter *emit,
139 SVGA3dShaderDestToken dest )
140 {
141 assert(dest.reserved0);
142 assert(dest.mask);
143 return svga_shader_emit_dword( emit, dest.value );
144 }
145
146 static INLINE boolean emit_src( struct svga_shader_emitter *emit,
147 const struct src_register src )
148 {
149 if (src.base.relAddr) {
150 assert(src.base.reserved0);
151 assert(src.indirect.reserved0);
152 return (svga_shader_emit_dword( emit, src.base.value ) &&
153 svga_shader_emit_dword( emit, src.indirect.value ));
154 }
155 else {
156 assert(src.base.reserved0);
157 return svga_shader_emit_dword( emit, src.base.value );
158 }
159 }
160
161
162 static INLINE boolean emit_instruction( struct svga_shader_emitter *emit,
163 SVGA3dShaderInstToken opcode )
164 {
165 return svga_shader_emit_opcode( emit, opcode.value );
166 }
167
168
169 static INLINE boolean emit_op1( struct svga_shader_emitter *emit,
170 SVGA3dShaderInstToken inst,
171 SVGA3dShaderDestToken dest,
172 struct src_register src0 )
173 {
174 return (emit_instruction( emit, inst ) &&
175 emit_dst( emit, dest ) &&
176 emit_src( emit, src0 ));
177 }
178
179 static INLINE boolean emit_op2( struct svga_shader_emitter *emit,
180 SVGA3dShaderInstToken inst,
181 SVGA3dShaderDestToken dest,
182 struct src_register src0,
183 struct src_register src1 )
184 {
185 return (emit_instruction( emit, inst ) &&
186 emit_dst( emit, dest ) &&
187 emit_src( emit, src0 ) &&
188 emit_src( emit, src1 ));
189 }
190
191 static INLINE boolean emit_op3( struct svga_shader_emitter *emit,
192 SVGA3dShaderInstToken inst,
193 SVGA3dShaderDestToken dest,
194 struct src_register src0,
195 struct src_register src1,
196 struct src_register src2 )
197 {
198 return (emit_instruction( emit, inst ) &&
199 emit_dst( emit, dest ) &&
200 emit_src( emit, src0 ) &&
201 emit_src( emit, src1 ) &&
202 emit_src( emit, src2 ));
203 }
204
205
206 static INLINE boolean emit_op4( struct svga_shader_emitter *emit,
207 SVGA3dShaderInstToken inst,
208 SVGA3dShaderDestToken dest,
209 struct src_register src0,
210 struct src_register src1,
211 struct src_register src2,
212 struct src_register src3)
213 {
214 return (emit_instruction( emit, inst ) &&
215 emit_dst( emit, dest ) &&
216 emit_src( emit, src0 ) &&
217 emit_src( emit, src1 ) &&
218 emit_src( emit, src2 ) &&
219 emit_src( emit, src3 ));
220 }
221
222
223 #define TRANSLATE_SWIZZLE(x,y,z,w) ((x) | ((y) << 2) | ((z) << 4) | ((w) << 6))
224 #define SWIZZLE_XYZW \
225 TRANSLATE_SWIZZLE(TGSI_SWIZZLE_X,TGSI_SWIZZLE_Y,TGSI_SWIZZLE_Z,TGSI_SWIZZLE_W)
226 #define SWIZZLE_XXXX \
227 TRANSLATE_SWIZZLE(TGSI_SWIZZLE_X,TGSI_SWIZZLE_X,TGSI_SWIZZLE_X,TGSI_SWIZZLE_X)
228 #define SWIZZLE_YYYY \
229 TRANSLATE_SWIZZLE(TGSI_SWIZZLE_Y,TGSI_SWIZZLE_Y,TGSI_SWIZZLE_Y,TGSI_SWIZZLE_Y)
230 #define SWIZZLE_ZZZZ \
231 TRANSLATE_SWIZZLE(TGSI_SWIZZLE_Z,TGSI_SWIZZLE_Z,TGSI_SWIZZLE_Z,TGSI_SWIZZLE_Z)
232 #define SWIZZLE_WWWW \
233 TRANSLATE_SWIZZLE(TGSI_SWIZZLE_W,TGSI_SWIZZLE_W,TGSI_SWIZZLE_W,TGSI_SWIZZLE_W)
234
235
236
237 static INLINE SVGA3dShaderInstToken
238 inst_token( unsigned opcode )
239 {
240 SVGA3dShaderInstToken inst;
241
242 inst.value = 0;
243 inst.op = opcode;
244
245 return inst;
246 }
247
248 static INLINE SVGA3dShaderDestToken
249 dst_register( unsigned file,
250 int number )
251 {
252 SVGA3dShaderDestToken dest;
253
254 dest.value = 0;
255 dest.num = number;
256 dest.type_upper = file >> 3;
257 dest.relAddr = 0;
258 dest.reserved1 = 0;
259 dest.mask = 0xf;
260 dest.dstMod = 0;
261 dest.shfScale = 0;
262 dest.type_lower = file & 0x7;
263 dest.reserved0 = 1; /* is_reg */
264
265 return dest;
266 }
267
268 static INLINE SVGA3dShaderDestToken
269 writemask( SVGA3dShaderDestToken dest,
270 unsigned mask )
271 {
272 assert(dest.mask & mask);
273 dest.mask &= mask;
274 return dest;
275 }
276
277
278 static INLINE SVGA3dShaderSrcToken
279 src_token( unsigned file, int number )
280 {
281 SVGA3dShaderSrcToken src;
282
283 src.value = 0;
284 src.num = number;
285 src.type_upper = file >> 3;
286 src.relAddr = 0;
287 src.reserved1 = 0;
288 src.swizzle = SWIZZLE_XYZW;
289 src.srcMod = 0;
290 src.type_lower = file & 0x7;
291 src.reserved0 = 1; /* is_reg */
292
293 return src;
294 }
295
296
297 static INLINE struct src_register
298 absolute( struct src_register src )
299 {
300 src.base.srcMod = SVGA3DSRCMOD_ABS;
301
302 return src;
303 }
304
305
306 static INLINE struct src_register
307 negate( struct src_register src )
308 {
309 switch (src.base.srcMod) {
310 case SVGA3DSRCMOD_ABS:
311 src.base.srcMod = SVGA3DSRCMOD_ABSNEG;
312 break;
313 case SVGA3DSRCMOD_ABSNEG:
314 src.base.srcMod = SVGA3DSRCMOD_ABS;
315 break;
316 case SVGA3DSRCMOD_NEG:
317 src.base.srcMod = SVGA3DSRCMOD_NONE;
318 break;
319 case SVGA3DSRCMOD_NONE:
320 src.base.srcMod = SVGA3DSRCMOD_NEG;
321 break;
322 }
323 return src;
324 }
325
326
327 static INLINE struct src_register
328 src_register( unsigned file, int number )
329 {
330 struct src_register src;
331
332 src.base = src_token( file, number );
333 src.indirect.value = 0;
334
335 return src;
336 }
337
338 static INLINE SVGA3dShaderDestToken dst( struct src_register src )
339 {
340 return dst_register( SVGA3dShaderGetRegType( src.base.value ),
341 src.base.num );
342 }
343
344 static INLINE struct src_register src( SVGA3dShaderDestToken dst )
345 {
346 return src_register( SVGA3dShaderGetRegType( dst.value ),
347 dst.num );
348 }
349
350 static INLINE ubyte svga_tgsi_sampler_type( struct svga_shader_emitter *emit,
351 int idx )
352 {
353 switch (emit->key.fkey.tex[idx].texture_target) {
354 case PIPE_TEXTURE_1D:
355 return SVGA3DSAMP_2D;
356 case PIPE_TEXTURE_2D:
357 case PIPE_TEXTURE_RECT:
358 return SVGA3DSAMP_2D;
359 case PIPE_TEXTURE_3D:
360 return SVGA3DSAMP_VOLUME;
361 case PIPE_TEXTURE_CUBE:
362 return SVGA3DSAMP_CUBE;
363 }
364
365 return SVGA3DSAMP_UNKNOWN;
366 }
367
368 #endif