src/gallium/drivers/svga/svga_tgsi_emit.h

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #ifndef SVGA_TGSI_EMIT_H
  27 #define SVGA_TGSI_EMIT_H
  28
  29 #include "tgsi/tgsi_scan.h"
  30 #include "svga_hw_reg.h"
  31 #include "svga_tgsi.h"
  32 #include "svga3d_shaderdefs.h"
  33
  34 struct src_register
  35 {
  36    SVGA3dShaderSrcToken base;
  37    SVGA3dShaderSrcToken indirect;
  38 };
  39
  40
  41 struct svga_arl_consts {
  42    int number;
  43    int idx;
  44    int swizzle;
  45    int arl_num;
  46 };
  47
  48 /* Internal functions:
  49  */
  50
  51 struct svga_shader_emitter
  52 {
  53    unsigned size;
  54    char *buf;
  55    char *ptr;
  56
  57    union svga_compile_key key;
  58    struct tgsi_shader_info info;
  59    int unit;
  60
  61    int imm_start;
  62
  63    int nr_hw_float_const;
  64    int nr_hw_int_const;
  65    int nr_hw_temp;
  66
  67    int insn_offset;
  68
  69    int internal_temp_count;
  70    int internal_imm_count;
  71
  72    int internal_color_idx[2]; /* diffuse, specular */
  73    int internal_color_count;
  74
  75    boolean emitted_vface;
  76    boolean emit_frontface;
  77    int internal_frontface_idx;
  78
  79    int ps30_input_count;
  80    int vs30_output_count;
  81
  82    int dynamic_branching_level;
  83
  84    boolean in_main_func;
  85
  86    boolean created_zero_immediate;
  87    int zero_immediate_idx;
  88
  89    boolean created_loop_const;
  90    int loop_const_idx;
  91
  92    boolean created_sincos_consts;
  93    int sincos_consts_idx;
  94
  95    unsigned inverted_texcoords;  /**< bitmask of which texcoords are flipped */
  96    struct src_register ps_true_texcoord[PIPE_MAX_ATTRIBS];
  97    struct src_register ps_inverted_texcoord[PIPE_MAX_ATTRIBS];
  98    unsigned ps_inverted_texcoord_input[PIPE_MAX_ATTRIBS];
  99
 100    unsigned label[32];
 101    unsigned nr_labels;
 102
 103    struct src_register input_map[PIPE_MAX_ATTRIBS];
 104    SVGA3dShaderDestToken output_map[PIPE_MAX_ATTRIBS];
 105
 106    boolean ps_reads_pos;
 107    boolean emitted_depth_fog;
 108    struct src_register ps_true_pos;
 109    struct src_register ps_depth_pos;
 110    SVGA3dShaderDestToken ps_temp_pos;
 111
 112    /* shared input for depth and fog */
 113    struct src_register ps_depth_fog;
 114
 115    struct src_register imm_0055;
 116    SVGA3dShaderDestToken temp_pos;
 117    SVGA3dShaderDestToken true_pos;
 118    SVGA3dShaderDestToken depth_pos;
 119
 120    /* shared output for depth and fog */
 121    SVGA3dShaderDestToken vs_depth_fog;
 122
 123    SVGA3dShaderDestToken temp_col[PIPE_MAX_COLOR_BUFS];
 124    SVGA3dShaderDestToken true_col[PIPE_MAX_COLOR_BUFS];
 125
 126    SVGA3dShaderDestToken temp_psiz;
 127    SVGA3dShaderDestToken true_psiz;
 128
 129    struct svga_arl_consts arl_consts[12];
 130    int num_arl_consts;
 131    int current_arl;
 132 };
 133
 134
 135 boolean svga_shader_emit_dword( struct svga_shader_emitter *emit,
 136                                 unsigned dword );
 137
 138 boolean svga_shader_emit_dwords( struct svga_shader_emitter *emit,
 139                                  const unsigned *dwords,
 140                                  unsigned nr );
 141
 142 boolean svga_shader_emit_opcode( struct svga_shader_emitter *emit,
 143                                  unsigned opcode );
 144
 145 boolean svga_shader_emit_instructions( struct svga_shader_emitter *emit,
 146                                        const struct tgsi_token *tokens );
 147
 148 boolean svga_translate_decl_sm30( struct svga_shader_emitter *emit,
 149                                const struct tgsi_full_declaration *decl );
 150
 151
 152 static INLINE boolean emit_dst( struct svga_shader_emitter *emit,
 153                          SVGA3dShaderDestToken dest )
 154 {
 155    assert(dest.reserved0);
 156    assert(dest.mask);
 157    return svga_shader_emit_dword( emit, dest.value );
 158 }
 159
 160 static INLINE boolean emit_src( struct svga_shader_emitter *emit,
 161                          const struct src_register src )
 162 {
 163    if (src.base.relAddr) {
 164       assert(src.base.reserved0);
 165       assert(src.indirect.reserved0);
 166       return (svga_shader_emit_dword( emit, src.base.value ) &&
 167               svga_shader_emit_dword( emit, src.indirect.value ));
 168    }
 169    else {
 170       assert(src.base.reserved0);
 171       return svga_shader_emit_dword( emit, src.base.value );
 172    }
 173 }
 174
 175
 176 static INLINE boolean emit_instruction( struct svga_shader_emitter *emit,
 177                                  SVGA3dShaderInstToken opcode )
 178 {
 179    return svga_shader_emit_opcode( emit, opcode.value );
 180 }
 181
 182
 183 static INLINE boolean emit_op1( struct svga_shader_emitter *emit,
 184                          SVGA3dShaderInstToken inst,
 185                          SVGA3dShaderDestToken dest,
 186                          struct src_register src0 )
 187 {
 188    return (emit_instruction( emit, inst ) &&
 189            emit_dst( emit, dest ) &&
 190            emit_src( emit, src0 ));
 191 }
 192
 193 static INLINE boolean emit_op2( struct svga_shader_emitter *emit,
 194                      SVGA3dShaderInstToken inst,
 195                      SVGA3dShaderDestToken dest,
 196                      struct src_register src0,
 197                      struct src_register src1 )
 198 {
 199    return (emit_instruction( emit, inst ) &&
 200            emit_dst( emit, dest ) &&
 201            emit_src( emit, src0 ) &&
 202            emit_src( emit, src1 ));
 203 }
 204
 205 static INLINE boolean emit_op3( struct svga_shader_emitter *emit,
 206                          SVGA3dShaderInstToken inst,
 207                          SVGA3dShaderDestToken dest,
 208                          struct src_register src0,
 209                          struct src_register src1,
 210                          struct src_register src2 )
 211 {
 212    return (emit_instruction( emit, inst ) &&
 213            emit_dst( emit, dest ) &&
 214            emit_src( emit, src0 ) &&
 215            emit_src( emit, src1 ) &&
 216            emit_src( emit, src2 ));
 217 }
 218
 219
 220 static INLINE boolean emit_op4( struct svga_shader_emitter *emit,
 221                                 SVGA3dShaderInstToken inst,
 222                                 SVGA3dShaderDestToken dest,
 223                                 struct src_register src0,
 224                                 struct src_register src1,
 225                                 struct src_register src2,
 226                                 struct src_register src3)
 227 {
 228    return (emit_instruction( emit, inst ) &&
 229            emit_dst( emit, dest ) &&
 230            emit_src( emit, src0 ) &&
 231            emit_src( emit, src1 ) &&
 232            emit_src( emit, src2 ) &&
 233            emit_src( emit, src3 ));
 234 }
 235
 236
 237 #define TRANSLATE_SWIZZLE(x,y,z,w)  ((x) | ((y) << 2) | ((z) << 4) | ((w) << 6))
 238 #define SWIZZLE_XYZW  \
 239  TRANSLATE_SWIZZLE(TGSI_SWIZZLE_X,TGSI_SWIZZLE_Y,TGSI_SWIZZLE_Z,TGSI_SWIZZLE_W)
 240 #define SWIZZLE_XXXX  \
 241  TRANSLATE_SWIZZLE(TGSI_SWIZZLE_X,TGSI_SWIZZLE_X,TGSI_SWIZZLE_X,TGSI_SWIZZLE_X)
 242 #define SWIZZLE_YYYY  \
 243  TRANSLATE_SWIZZLE(TGSI_SWIZZLE_Y,TGSI_SWIZZLE_Y,TGSI_SWIZZLE_Y,TGSI_SWIZZLE_Y)
 244 #define SWIZZLE_ZZZZ  \
 245  TRANSLATE_SWIZZLE(TGSI_SWIZZLE_Z,TGSI_SWIZZLE_Z,TGSI_SWIZZLE_Z,TGSI_SWIZZLE_Z)
 246 #define SWIZZLE_WWWW  \
 247  TRANSLATE_SWIZZLE(TGSI_SWIZZLE_W,TGSI_SWIZZLE_W,TGSI_SWIZZLE_W,TGSI_SWIZZLE_W)
 248
 249
 250
 251 static INLINE SVGA3dShaderInstToken
 252 inst_token( unsigned opcode )
 253 {
 254    SVGA3dShaderInstToken inst;
 255
 256    inst.value = 0;
 257    inst.op = opcode;
 258
 259    return inst;
 260 }
 261
 262 static INLINE SVGA3dShaderDestToken
 263 dst_register( unsigned file,
 264               int number )
 265 {
 266    SVGA3dShaderDestToken dest;
 267
 268    dest.value = 0;
 269    dest.num = number;
 270    dest.type_upper = file >> 3;
 271    dest.relAddr = 0;
 272    dest.reserved1 = 0;
 273    dest.mask = 0xf;
 274    dest.dstMod = 0;
 275    dest.shfScale = 0;
 276    dest.type_lower = file & 0x7;
 277    dest.reserved0 = 1;          /* is_reg */
 278
 279    return dest;
 280 }
 281
 282 static INLINE SVGA3dShaderDestToken
 283 writemask( SVGA3dShaderDestToken dest,
 284            unsigned mask )
 285 {
 286    assert(dest.mask & mask);
 287    dest.mask &= mask;
 288    return dest;
 289 }
 290
 291
 292 static INLINE SVGA3dShaderSrcToken
 293 src_token( unsigned file, int number )
 294 {
 295    SVGA3dShaderSrcToken src;
 296
 297    src.value = 0;
 298    src.num = number;
 299    src.type_upper = file >> 3;
 300    src.relAddr = 0;
 301    src.reserved1 = 0;
 302    src.swizzle = SWIZZLE_XYZW;
 303    src.srcMod = 0;
 304    src.type_lower = file & 0x7;
 305    src.reserved0 = 1;           /* is_reg */
 306
 307    return src;
 308 }
 309
 310
 311 static INLINE struct src_register
 312 absolute( struct src_register src )
 313 {
 314    src.base.srcMod = SVGA3DSRCMOD_ABS;
 315
 316    return src;
 317 }
 318
 319
 320 static INLINE struct src_register
 321 negate( struct src_register src )
 322 {
 323    switch (src.base.srcMod) {
 324    case SVGA3DSRCMOD_ABS:
 325       src.base.srcMod = SVGA3DSRCMOD_ABSNEG;
 326       break;
 327    case SVGA3DSRCMOD_ABSNEG:
 328       src.base.srcMod = SVGA3DSRCMOD_ABS;
 329       break;
 330    case SVGA3DSRCMOD_NEG:
 331       src.base.srcMod = SVGA3DSRCMOD_NONE;
 332       break;
 333    case SVGA3DSRCMOD_NONE:
 334       src.base.srcMod = SVGA3DSRCMOD_NEG;
 335       break;
 336    }
 337    return src;
 338 }
 339
 340
 341 static INLINE struct src_register
 342 src_register( unsigned file, int number )
 343 {
 344    struct src_register src;
 345
 346    src.base = src_token( file, number );
 347    src.indirect.value = 0;
 348
 349    return src;
 350 }
 351
 352 static INLINE SVGA3dShaderDestToken dst( struct src_register src )
 353 {
 354    return dst_register( SVGA3dShaderGetRegType( src.base.value ),
 355                         src.base.num );
 356 }
 357
 358 static INLINE struct src_register src( SVGA3dShaderDestToken dst )
 359 {
 360    return src_register( SVGA3dShaderGetRegType( dst.value ),
 361                         dst.num );
 362 }
 363
 364 static INLINE ubyte svga_tgsi_sampler_type( struct svga_shader_emitter *emit,
 365                                             int idx )
 366 {
 367    switch (emit->key.fkey.tex[idx].texture_target) {
 368    case PIPE_TEXTURE_1D:
 369       return SVGA3DSAMP_2D;
 370    case PIPE_TEXTURE_2D:
 371    case PIPE_TEXTURE_RECT:
 372       return SVGA3DSAMP_2D;
 373    case PIPE_TEXTURE_3D:
 374       return SVGA3DSAMP_VOLUME;
 375    case PIPE_TEXTURE_CUBE:
 376       return SVGA3DSAMP_CUBE;
 377    }
 378
 379    return SVGA3DSAMP_UNKNOWN;
 380 }
 381
 382 #endif