swr/rast: whitespace changes
[mesa.git] / src / gallium / drivers / swr / rasterizer / core / api.cpp
1 /****************************************************************************
2 * Copyright (C) 2014-2016 Intel Corporation. All Rights Reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * @file api.cpp
24 *
25 * @brief API implementation
26 *
27 ******************************************************************************/
28
29 #include <cfloat>
30 #include <cmath>
31 #include <cstdio>
32 #include <new>
33
34 #include "core/api.h"
35 #include "core/backend.h"
36 #include "core/context.h"
37 #include "core/depthstencil.h"
38 #include "core/frontend.h"
39 #include "core/rasterizer.h"
40 #include "core/rdtsc_core.h"
41 #include "core/threads.h"
42 #include "core/tilemgr.h"
43 #include "core/clip.h"
44 #include "core/utils.h"
45
46 #include "common/os.h"
47
48 static const SWR_RECT g_MaxScissorRect = { 0, 0, KNOB_MAX_SCISSOR_X, KNOB_MAX_SCISSOR_Y };
49
50 void SetupDefaultState(SWR_CONTEXT *pContext);
51
52 static INLINE SWR_CONTEXT* GetContext(HANDLE hContext)
53 {
54 return (SWR_CONTEXT*)hContext;
55 }
56
57 void WakeAllThreads(SWR_CONTEXT *pContext)
58 {
59 pContext->FifosNotEmpty.notify_all();
60 }
61
62 //////////////////////////////////////////////////////////////////////////
63 /// @brief Create SWR Context.
64 /// @param pCreateInfo - pointer to creation info.
65 HANDLE SwrCreateContext(
66 SWR_CREATECONTEXT_INFO* pCreateInfo)
67 {
68 RDTSC_RESET();
69 RDTSC_INIT(0);
70
71 void* pContextMem = AlignedMalloc(sizeof(SWR_CONTEXT), KNOB_SIMD_WIDTH * 4);
72 memset(pContextMem, 0, sizeof(SWR_CONTEXT));
73 SWR_CONTEXT *pContext = new (pContextMem) SWR_CONTEXT();
74
75 pContext->privateStateSize = pCreateInfo->privateStateSize;
76
77 pContext->dcRing.Init(KNOB_MAX_DRAWS_IN_FLIGHT);
78 pContext->dsRing.Init(KNOB_MAX_DRAWS_IN_FLIGHT);
79
80 pContext->pMacroTileManagerArray = (MacroTileMgr*)AlignedMalloc(sizeof(MacroTileMgr) * KNOB_MAX_DRAWS_IN_FLIGHT, 64);
81 pContext->pDispatchQueueArray = (DispatchQueue*)AlignedMalloc(sizeof(DispatchQueue) * KNOB_MAX_DRAWS_IN_FLIGHT, 64);
82
83 for (uint32_t dc = 0; dc < KNOB_MAX_DRAWS_IN_FLIGHT; ++dc)
84 {
85 pContext->dcRing[dc].pArena = new CachingArena(pContext->cachingArenaAllocator);
86 new (&pContext->pMacroTileManagerArray[dc]) MacroTileMgr(*pContext->dcRing[dc].pArena);
87 new (&pContext->pDispatchQueueArray[dc]) DispatchQueue();
88
89 pContext->dsRing[dc].pArena = new CachingArena(pContext->cachingArenaAllocator);
90 }
91
92 pContext->threadInfo.MAX_WORKER_THREADS = KNOB_MAX_WORKER_THREADS;
93 pContext->threadInfo.MAX_NUMA_NODES = KNOB_MAX_NUMA_NODES;
94 pContext->threadInfo.MAX_CORES_PER_NUMA_NODE = KNOB_MAX_CORES_PER_NUMA_NODE;
95 pContext->threadInfo.MAX_THREADS_PER_CORE = KNOB_MAX_THREADS_PER_CORE;
96 pContext->threadInfo.SINGLE_THREADED = KNOB_SINGLE_THREADED;
97
98 if (pCreateInfo->pThreadInfo)
99 {
100 pContext->threadInfo = *pCreateInfo->pThreadInfo;
101 }
102
103 memset(&pContext->WaitLock, 0, sizeof(pContext->WaitLock));
104 memset(&pContext->FifosNotEmpty, 0, sizeof(pContext->FifosNotEmpty));
105 new (&pContext->WaitLock) std::mutex();
106 new (&pContext->FifosNotEmpty) std::condition_variable();
107
108 CreateThreadPool(pContext, &pContext->threadPool);
109
110 pContext->ppScratch = new uint8_t*[pContext->NumWorkerThreads];
111 pContext->pStats = new SWR_STATS[pContext->NumWorkerThreads];
112
113 #if defined(KNOB_ENABLE_AR)
114 // Setup ArchRast thread contexts which includes +1 for API thread.
115 pContext->pArContext = new HANDLE[pContext->NumWorkerThreads+1];
116 pContext->pArContext[pContext->NumWorkerThreads] = ArchRast::CreateThreadContext(ArchRast::AR_THREAD::API);
117 #endif
118
119 // Allocate scratch space for workers.
120 ///@note We could lazily allocate this but its rather small amount of memory.
121 for (uint32_t i = 0; i < pContext->NumWorkerThreads; ++i)
122 {
123 #if defined(_WIN32)
124 uint32_t numaNode = pContext->threadPool.pThreadData ?
125 pContext->threadPool.pThreadData[i].numaId : 0;
126 pContext->ppScratch[i] = (uint8_t*)VirtualAllocExNuma(
127 GetCurrentProcess(), nullptr, 32 * sizeof(KILOBYTE),
128 MEM_RESERVE | MEM_COMMIT, PAGE_READWRITE,
129 numaNode);
130 #else
131 pContext->ppScratch[i] = (uint8_t*)AlignedMalloc(32 * sizeof(KILOBYTE), KNOB_SIMD_WIDTH * 4);
132 #endif
133
134 #if defined(KNOB_ENABLE_AR)
135 // Initialize worker thread context for ArchRast.
136 pContext->pArContext[i] = ArchRast::CreateThreadContext(ArchRast::AR_THREAD::WORKER);
137 #endif
138 }
139
140 // State setup AFTER context is fully initialized
141 SetupDefaultState(pContext);
142
143 // initialize hot tile manager
144 pContext->pHotTileMgr = new HotTileMgr();
145
146 // initialize callback functions
147 pContext->pfnLoadTile = pCreateInfo->pfnLoadTile;
148 pContext->pfnStoreTile = pCreateInfo->pfnStoreTile;
149 pContext->pfnClearTile = pCreateInfo->pfnClearTile;
150 pContext->pfnUpdateSoWriteOffset = pCreateInfo->pfnUpdateSoWriteOffset;
151 pContext->pfnUpdateStats = pCreateInfo->pfnUpdateStats;
152 pContext->pfnUpdateStatsFE = pCreateInfo->pfnUpdateStatsFE;
153
154
155 // pass pointer to bucket manager back to caller
156 #ifdef KNOB_ENABLE_RDTSC
157 pCreateInfo->pBucketMgr = &gBucketMgr;
158 #endif
159
160 pCreateInfo->contextSaveSize = sizeof(API_STATE);
161
162 StartThreadPool(pContext, &pContext->threadPool);
163
164 return (HANDLE)pContext;
165 }
166
167 void CopyState(DRAW_STATE& dst, const DRAW_STATE& src)
168 {
169 memcpy(&dst.state, &src.state, sizeof(API_STATE));
170 }
171
172 template<bool IsDraw>
173 void QueueWork(SWR_CONTEXT *pContext)
174 {
175 DRAW_CONTEXT* pDC = pContext->pCurDrawContext;
176 uint32_t dcIndex = pDC->drawId % KNOB_MAX_DRAWS_IN_FLIGHT;
177
178 if (IsDraw)
179 {
180 pDC->pTileMgr = &pContext->pMacroTileManagerArray[dcIndex];
181 pDC->pTileMgr->initialize();
182 }
183
184 // Each worker thread looks at a DC for both FE and BE work at different times and so we
185 // multiply threadDone by 2. When the threadDone counter has reached 0 then all workers
186 // have moved past this DC. (i.e. Each worker has checked this DC for both FE and BE work and
187 // then moved on if all work is done.)
188 pContext->pCurDrawContext->threadsDone = pContext->NumFEThreads + pContext->NumBEThreads;
189
190 if (IsDraw)
191 {
192 InterlockedIncrement((volatile LONG*)&pContext->drawsOutstandingFE);
193 }
194
195 _ReadWriteBarrier();
196 {
197 std::unique_lock<std::mutex> lock(pContext->WaitLock);
198 pContext->dcRing.Enqueue();
199 }
200
201 if (pContext->threadInfo.SINGLE_THREADED)
202 {
203 // flush denormals to 0
204 uint32_t mxcsr = _mm_getcsr();
205 _mm_setcsr(mxcsr | _MM_FLUSH_ZERO_ON | _MM_DENORMALS_ZERO_ON);
206
207 if (IsDraw)
208 {
209 uint32_t curDraw[2] = { pContext->pCurDrawContext->drawId, pContext->pCurDrawContext->drawId };
210 WorkOnFifoFE(pContext, 0, curDraw[0]);
211 WorkOnFifoBE(pContext, 0, curDraw[1], pContext->singleThreadLockedTiles, 0, 0);
212 }
213 else
214 {
215 uint32_t curDispatch = pContext->pCurDrawContext->drawId;
216 WorkOnCompute(pContext, 0, curDispatch);
217 }
218
219 // Dequeue the work here, if not already done, since we're single threaded (i.e. no workers).
220 while (CompleteDrawContext(pContext, pContext->pCurDrawContext) > 0) {}
221
222 // restore csr
223 _mm_setcsr(mxcsr);
224 }
225 else
226 {
227 AR_API_BEGIN(APIDrawWakeAllThreads, pDC->drawId);
228 WakeAllThreads(pContext);
229 AR_API_END(APIDrawWakeAllThreads, 1);
230 }
231
232 // Set current draw context to NULL so that next state call forces a new draw context to be created and populated.
233 pContext->pPrevDrawContext = pContext->pCurDrawContext;
234 pContext->pCurDrawContext = nullptr;
235 }
236
237 INLINE void QueueDraw(SWR_CONTEXT* pContext)
238 {
239 QueueWork<true>(pContext);
240 }
241
242 INLINE void QueueDispatch(SWR_CONTEXT* pContext)
243 {
244 QueueWork<false>(pContext);
245 }
246
247 DRAW_CONTEXT* GetDrawContext(SWR_CONTEXT *pContext, bool isSplitDraw = false)
248 {
249 AR_API_BEGIN(APIGetDrawContext, 0);
250 // If current draw context is null then need to obtain a new draw context to use from ring.
251 if (pContext->pCurDrawContext == nullptr)
252 {
253 // Need to wait for a free entry.
254 while (pContext->dcRing.IsFull())
255 {
256 _mm_pause();
257 }
258
259 uint64_t curDraw = pContext->dcRing.GetHead();
260 uint32_t dcIndex = curDraw % KNOB_MAX_DRAWS_IN_FLIGHT;
261
262 if ((pContext->frameCount - pContext->lastFrameChecked) > 2 ||
263 (curDraw - pContext->lastDrawChecked) > 0x10000)
264 {
265 // Take this opportunity to clean-up old arena allocations
266 pContext->cachingArenaAllocator.FreeOldBlocks();
267
268 pContext->lastFrameChecked = pContext->frameCount;
269 pContext->lastDrawChecked = curDraw;
270 }
271
272 DRAW_CONTEXT* pCurDrawContext = &pContext->dcRing[dcIndex];
273 pContext->pCurDrawContext = pCurDrawContext;
274
275 // Assign next available entry in DS ring to this DC.
276 uint32_t dsIndex = pContext->curStateId % KNOB_MAX_DRAWS_IN_FLIGHT;
277 pCurDrawContext->pState = &pContext->dsRing[dsIndex];
278
279 // Copy previous state to current state.
280 if (pContext->pPrevDrawContext)
281 {
282 DRAW_CONTEXT* pPrevDrawContext = pContext->pPrevDrawContext;
283
284 // If we're splitting our draw then we can just use the same state from the previous
285 // draw. In this case, we won't increment the DS ring index so the next non-split
286 // draw can receive the state.
287 if (isSplitDraw == false)
288 {
289 CopyState(*pCurDrawContext->pState, *pPrevDrawContext->pState);
290
291 // Should have been cleaned up previously
292 SWR_ASSERT(pCurDrawContext->pState->pArena->IsEmpty() == true);
293
294 pCurDrawContext->pState->pPrivateState = nullptr;
295
296 pContext->curStateId++; // Progress state ring index forward.
297 }
298 else
299 {
300 // If its a split draw then just copy the state pointer over
301 // since its the same draw.
302 pCurDrawContext->pState = pPrevDrawContext->pState;
303 SWR_ASSERT(pPrevDrawContext->cleanupState == false);
304 }
305 }
306 else
307 {
308 SWR_ASSERT(pCurDrawContext->pState->pArena->IsEmpty() == true);
309 pContext->curStateId++; // Progress state ring index forward.
310 }
311
312 SWR_ASSERT(pCurDrawContext->pArena->IsEmpty() == true);
313
314 // Reset dependency
315 pCurDrawContext->dependent = false;
316 pCurDrawContext->dependentFE = false;
317
318 pCurDrawContext->pContext = pContext;
319 pCurDrawContext->isCompute = false; // Dispatch has to set this to true.
320
321 pCurDrawContext->doneFE = false;
322 pCurDrawContext->FeLock = 0;
323 pCurDrawContext->threadsDone = 0;
324 pCurDrawContext->retireCallback.pfnCallbackFunc = nullptr;
325
326 pCurDrawContext->dynState.Reset(pContext->NumWorkerThreads);
327
328 // Assign unique drawId for this DC
329 pCurDrawContext->drawId = pContext->dcRing.GetHead();
330
331 pCurDrawContext->cleanupState = true;
332 }
333 else
334 {
335 SWR_ASSERT(isSplitDraw == false, "Split draw should only be used when obtaining a new DC");
336 }
337
338 AR_API_END(APIGetDrawContext, 0);
339 return pContext->pCurDrawContext;
340 }
341
342 API_STATE* GetDrawState(SWR_CONTEXT *pContext)
343 {
344 DRAW_CONTEXT* pDC = GetDrawContext(pContext);
345 SWR_ASSERT(pDC->pState != nullptr);
346
347 return &pDC->pState->state;
348 }
349
350 void SwrDestroyContext(HANDLE hContext)
351 {
352 SWR_CONTEXT *pContext = GetContext(hContext);
353 DRAW_CONTEXT* pDC = GetDrawContext(pContext);
354
355 pDC->FeWork.type = SHUTDOWN;
356 pDC->FeWork.pfnWork = ProcessShutdown;
357
358 //enqueue
359 QueueDraw(pContext);
360
361 DestroyThreadPool(pContext, &pContext->threadPool);
362
363 // free the fifos
364 for (uint32_t i = 0; i < KNOB_MAX_DRAWS_IN_FLIGHT; ++i)
365 {
366 delete[] pContext->dcRing[i].dynState.pStats;
367 delete pContext->dcRing[i].pArena;
368 delete pContext->dsRing[i].pArena;
369 pContext->pMacroTileManagerArray[i].~MacroTileMgr();
370 pContext->pDispatchQueueArray[i].~DispatchQueue();
371 }
372
373 AlignedFree(pContext->pDispatchQueueArray);
374 AlignedFree(pContext->pMacroTileManagerArray);
375
376 // Free scratch space.
377 for (uint32_t i = 0; i < pContext->NumWorkerThreads; ++i)
378 {
379 #if defined(_WIN32)
380 VirtualFree(pContext->ppScratch[i], 0, MEM_RELEASE);
381 #else
382 AlignedFree(pContext->ppScratch[i]);
383 #endif
384
385 #if defined(KNOB_ENABLE_AR)
386 ArchRast::DestroyThreadContext(pContext->pArContext[i]);
387 #endif
388 }
389
390 delete[] pContext->ppScratch;
391 delete[] pContext->pStats;
392
393 delete(pContext->pHotTileMgr);
394
395 pContext->~SWR_CONTEXT();
396 AlignedFree(GetContext(hContext));
397 }
398
399 void SWR_API SwrSaveState(
400 HANDLE hContext,
401 void* pOutputStateBlock,
402 size_t memSize)
403 {
404 SWR_CONTEXT *pContext = GetContext(hContext);
405 auto pSrc = GetDrawState(pContext);
406 SWR_ASSERT(pOutputStateBlock && memSize >= sizeof(*pSrc));
407
408 memcpy(pOutputStateBlock, pSrc, sizeof(*pSrc));
409 }
410
411 void SWR_API SwrRestoreState(
412 HANDLE hContext,
413 const void* pStateBlock,
414 size_t memSize)
415 {
416 SWR_CONTEXT *pContext = GetContext(hContext);
417 auto pDst = GetDrawState(pContext);
418 SWR_ASSERT(pStateBlock && memSize >= sizeof(*pDst));
419
420 memcpy(pDst, pStateBlock, sizeof(*pDst));
421 }
422
423 void SetupDefaultState(SWR_CONTEXT *pContext)
424 {
425 API_STATE* pState = GetDrawState(pContext);
426
427 pState->rastState.cullMode = SWR_CULLMODE_NONE;
428 pState->rastState.frontWinding = SWR_FRONTWINDING_CCW;
429
430 pState->depthBoundsState.depthBoundsTestEnable = false;
431 pState->depthBoundsState.depthBoundsTestMinValue = 0.0f;
432 pState->depthBoundsState.depthBoundsTestMaxValue = 1.0f;
433 }
434
435 void SwrSync(HANDLE hContext, PFN_CALLBACK_FUNC pfnFunc, uint64_t userData, uint64_t userData2, uint64_t userData3)
436 {
437 SWR_ASSERT(pfnFunc != nullptr);
438
439 SWR_CONTEXT *pContext = GetContext(hContext);
440 DRAW_CONTEXT* pDC = GetDrawContext(pContext);
441
442 AR_API_BEGIN(APISync, 0);
443
444 pDC->FeWork.type = SYNC;
445 pDC->FeWork.pfnWork = ProcessSync;
446
447 // Setup callback function
448 pDC->retireCallback.pfnCallbackFunc = pfnFunc;
449 pDC->retireCallback.userData = userData;
450 pDC->retireCallback.userData2 = userData2;
451 pDC->retireCallback.userData3 = userData3;
452
453 AR_API_EVENT(SwrSyncEvent(pDC->drawId));
454
455 //enqueue
456 QueueDraw(pContext);
457
458 AR_API_END(APISync, 1);
459 }
460
461 void SwrWaitForIdle(HANDLE hContext)
462 {
463 SWR_CONTEXT *pContext = GetContext(hContext);
464
465 AR_API_BEGIN(APIWaitForIdle, 0);
466
467 while (!pContext->dcRing.IsEmpty())
468 {
469 _mm_pause();
470 }
471
472 AR_API_END(APIWaitForIdle, 1);
473 }
474
475 void SwrWaitForIdleFE(HANDLE hContext)
476 {
477 SWR_CONTEXT *pContext = GetContext(hContext);
478
479 AR_API_BEGIN(APIWaitForIdle, 0);
480
481 while (pContext->drawsOutstandingFE > 0)
482 {
483 _mm_pause();
484 }
485
486 AR_API_END(APIWaitForIdle, 1);
487 }
488
489 void SwrSetVertexBuffers(
490 HANDLE hContext,
491 uint32_t numBuffers,
492 const SWR_VERTEX_BUFFER_STATE* pVertexBuffers)
493 {
494 API_STATE* pState = GetDrawState(GetContext(hContext));
495
496 for (uint32_t i = 0; i < numBuffers; ++i)
497 {
498 const SWR_VERTEX_BUFFER_STATE *pVB = &pVertexBuffers[i];
499 pState->vertexBuffers[pVB->index] = *pVB;
500 }
501 }
502
503 void SwrSetIndexBuffer(
504 HANDLE hContext,
505 const SWR_INDEX_BUFFER_STATE* pIndexBuffer)
506 {
507 API_STATE* pState = GetDrawState(GetContext(hContext));
508
509 pState->indexBuffer = *pIndexBuffer;
510 }
511
512 void SwrSetFetchFunc(
513 HANDLE hContext,
514 PFN_FETCH_FUNC pfnFetchFunc)
515 {
516 API_STATE* pState = GetDrawState(GetContext(hContext));
517
518 pState->pfnFetchFunc = pfnFetchFunc;
519 }
520
521 void SwrSetSoFunc(
522 HANDLE hContext,
523 PFN_SO_FUNC pfnSoFunc,
524 uint32_t streamIndex)
525 {
526 API_STATE* pState = GetDrawState(GetContext(hContext));
527
528 SWR_ASSERT(streamIndex < MAX_SO_STREAMS);
529
530 pState->pfnSoFunc[streamIndex] = pfnSoFunc;
531 }
532
533 void SwrSetSoState(
534 HANDLE hContext,
535 SWR_STREAMOUT_STATE* pSoState)
536 {
537 API_STATE* pState = GetDrawState(GetContext(hContext));
538
539 pState->soState = *pSoState;
540 }
541
542 void SwrSetSoBuffers(
543 HANDLE hContext,
544 SWR_STREAMOUT_BUFFER* pSoBuffer,
545 uint32_t slot)
546 {
547 API_STATE* pState = GetDrawState(GetContext(hContext));
548
549 SWR_ASSERT((slot < 4), "There are only 4 SO buffer slots [0, 3]\nSlot requested: %d", slot);
550
551 pState->soBuffer[slot] = *pSoBuffer;
552 }
553
554 void SwrSetVertexFunc(
555 HANDLE hContext,
556 PFN_VERTEX_FUNC pfnVertexFunc)
557 {
558 API_STATE* pState = GetDrawState(GetContext(hContext));
559
560 pState->pfnVertexFunc = pfnVertexFunc;
561 }
562
563 void SwrSetFrontendState(
564 HANDLE hContext,
565 SWR_FRONTEND_STATE *pFEState)
566 {
567 API_STATE* pState = GetDrawState(GetContext(hContext));
568 pState->frontendState = *pFEState;
569 }
570
571 void SwrSetGsState(
572 HANDLE hContext,
573 SWR_GS_STATE *pGSState)
574 {
575 API_STATE* pState = GetDrawState(GetContext(hContext));
576 pState->gsState = *pGSState;
577 }
578
579 void SwrSetGsFunc(
580 HANDLE hContext,
581 PFN_GS_FUNC pfnGsFunc)
582 {
583 API_STATE* pState = GetDrawState(GetContext(hContext));
584 pState->pfnGsFunc = pfnGsFunc;
585 }
586
587 void SwrSetCsFunc(
588 HANDLE hContext,
589 PFN_CS_FUNC pfnCsFunc,
590 uint32_t totalThreadsInGroup,
591 uint32_t totalSpillFillSize,
592 uint32_t scratchSpaceSizePerInstance,
593 uint32_t numInstances)
594 {
595 API_STATE* pState = GetDrawState(GetContext(hContext));
596 pState->pfnCsFunc = pfnCsFunc;
597 pState->totalThreadsInGroup = totalThreadsInGroup;
598 pState->totalSpillFillSize = totalSpillFillSize;
599 pState->scratchSpaceSize = scratchSpaceSizePerInstance;
600 pState->scratchSpaceNumInstances = numInstances;
601 }
602
603 void SwrSetTsState(
604 HANDLE hContext,
605 SWR_TS_STATE *pState)
606 {
607 API_STATE* pApiState = GetDrawState(GetContext(hContext));
608 pApiState->tsState = *pState;
609 }
610
611 void SwrSetHsFunc(
612 HANDLE hContext,
613 PFN_HS_FUNC pfnFunc)
614 {
615 API_STATE* pApiState = GetDrawState(GetContext(hContext));
616 pApiState->pfnHsFunc = pfnFunc;
617 }
618
619 void SwrSetDsFunc(
620 HANDLE hContext,
621 PFN_DS_FUNC pfnFunc)
622 {
623 API_STATE* pApiState = GetDrawState(GetContext(hContext));
624 pApiState->pfnDsFunc = pfnFunc;
625 }
626
627 void SwrSetDepthStencilState(
628 HANDLE hContext,
629 SWR_DEPTH_STENCIL_STATE *pDSState)
630 {
631 API_STATE* pState = GetDrawState(GetContext(hContext));
632
633 pState->depthStencilState = *pDSState;
634 }
635
636 void SwrSetBackendState(
637 HANDLE hContext,
638 SWR_BACKEND_STATE *pBEState)
639 {
640 API_STATE* pState = GetDrawState(GetContext(hContext));
641
642 pState->backendState = *pBEState;
643 }
644
645 void SwrSetDepthBoundsState(
646 HANDLE hContext,
647 SWR_DEPTH_BOUNDS_STATE *pDBState)
648 {
649 API_STATE* pState = GetDrawState(GetContext(hContext));
650
651 pState->depthBoundsState = *pDBState;
652 }
653
654 void SwrSetPixelShaderState(
655 HANDLE hContext,
656 SWR_PS_STATE *pPSState)
657 {
658 API_STATE *pState = GetDrawState(GetContext(hContext));
659 pState->psState = *pPSState;
660 }
661
662 void SwrSetBlendState(
663 HANDLE hContext,
664 SWR_BLEND_STATE *pBlendState)
665 {
666 API_STATE *pState = GetDrawState(GetContext(hContext));
667 memcpy(&pState->blendState, pBlendState, sizeof(SWR_BLEND_STATE));
668 }
669
670 void SwrSetBlendFunc(
671 HANDLE hContext,
672 uint32_t renderTarget,
673 PFN_BLEND_JIT_FUNC pfnBlendFunc)
674 {
675 SWR_ASSERT(renderTarget < SWR_NUM_RENDERTARGETS);
676 API_STATE *pState = GetDrawState(GetContext(hContext));
677 pState->pfnBlendFunc[renderTarget] = pfnBlendFunc;
678 }
679
680 // update guardband multipliers for the viewport
681 void updateGuardbands(API_STATE *pState)
682 {
683 uint32_t numGbs = pState->gsState.emitsRenderTargetArrayIndex ? KNOB_NUM_VIEWPORTS_SCISSORS : 1;
684
685 for(uint32_t i = 0; i < numGbs; ++i)
686 {
687 // guardband center is viewport center
688 pState->gbState.left[i] = KNOB_GUARDBAND_WIDTH / pState->vp[i].width;
689 pState->gbState.right[i] = KNOB_GUARDBAND_WIDTH / pState->vp[i].width;
690 pState->gbState.top[i] = KNOB_GUARDBAND_HEIGHT / pState->vp[i].height;
691 pState->gbState.bottom[i] = KNOB_GUARDBAND_HEIGHT / pState->vp[i].height;
692 }
693 }
694
695 void SwrSetRastState(
696 HANDLE hContext,
697 const SWR_RASTSTATE *pRastState)
698 {
699 SWR_CONTEXT *pContext = GetContext(hContext);
700 API_STATE* pState = GetDrawState(pContext);
701
702 memcpy(&pState->rastState, pRastState, sizeof(SWR_RASTSTATE));
703 }
704
705 void SwrSetViewports(
706 HANDLE hContext,
707 uint32_t numViewports,
708 const SWR_VIEWPORT* pViewports,
709 const SWR_VIEWPORT_MATRICES* pMatrices)
710 {
711 SWR_ASSERT(numViewports <= KNOB_NUM_VIEWPORTS_SCISSORS,
712 "Invalid number of viewports.");
713
714 SWR_CONTEXT *pContext = GetContext(hContext);
715 API_STATE* pState = GetDrawState(pContext);
716
717 memcpy(&pState->vp[0], pViewports, sizeof(SWR_VIEWPORT) * numViewports);
718 // @todo Faster to copy portions of the SOA or just copy all of it?
719 memcpy(&pState->vpMatrices, pMatrices, sizeof(SWR_VIEWPORT_MATRICES));
720
721 updateGuardbands(pState);
722 }
723
724 void SwrSetScissorRects(
725 HANDLE hContext,
726 uint32_t numScissors,
727 const SWR_RECT* pScissors)
728 {
729 SWR_ASSERT(numScissors <= KNOB_NUM_VIEWPORTS_SCISSORS,
730 "Invalid number of scissor rects.");
731
732 API_STATE* pState = GetDrawState(GetContext(hContext));
733 memcpy(&pState->scissorRects[0], pScissors, numScissors * sizeof(pScissors[0]));
734 };
735
736 void SetupMacroTileScissors(DRAW_CONTEXT *pDC)
737 {
738 API_STATE *pState = &pDC->pState->state;
739 uint32_t numScissors = pState->gsState.emitsViewportArrayIndex ? KNOB_NUM_VIEWPORTS_SCISSORS : 1;
740 pState->scissorsTileAligned = true;
741
742 for (uint32_t index = 0; index < numScissors; ++index)
743 {
744 SWR_RECT &scissorInFixedPoint = pState->scissorsInFixedPoint[index];
745
746 // Set up scissor dimensions based on scissor or viewport
747 if (pState->rastState.scissorEnable)
748 {
749 scissorInFixedPoint = pState->scissorRects[index];
750 }
751 else
752 {
753 // the vp width and height must be added to origin un-rounded then the result round to -inf.
754 // The cast to int works for rounding assuming all [left, right, top, bottom] are positive.
755 scissorInFixedPoint.xmin = (int32_t)pState->vp[index].x;
756 scissorInFixedPoint.xmax = (int32_t)(pState->vp[index].x + pState->vp[index].width);
757 scissorInFixedPoint.ymin = (int32_t)pState->vp[index].y;
758 scissorInFixedPoint.ymax = (int32_t)(pState->vp[index].y + pState->vp[index].height);
759 }
760
761 // Clamp to max rect
762 scissorInFixedPoint &= g_MaxScissorRect;
763
764 // Test for tile alignment
765 bool tileAligned;
766 tileAligned = (scissorInFixedPoint.xmin % KNOB_TILE_X_DIM) == 0;
767 tileAligned &= (scissorInFixedPoint.ymin % KNOB_TILE_Y_DIM) == 0;
768 tileAligned &= (scissorInFixedPoint.xmax % KNOB_TILE_X_DIM) == 0;
769 tileAligned &= (scissorInFixedPoint.ymax % KNOB_TILE_Y_DIM) == 0;
770
771 pState->scissorsTileAligned &= tileAligned;
772
773 // Scale to fixed point
774 scissorInFixedPoint.xmin *= FIXED_POINT_SCALE;
775 scissorInFixedPoint.xmax *= FIXED_POINT_SCALE;
776 scissorInFixedPoint.ymin *= FIXED_POINT_SCALE;
777 scissorInFixedPoint.ymax *= FIXED_POINT_SCALE;
778
779 // Make scissor inclusive
780 scissorInFixedPoint.xmax -= 1;
781 scissorInFixedPoint.ymax -= 1;
782 }
783 }
784
785
786 // templated backend function tables
787 extern PFN_BACKEND_FUNC gBackendNullPs[SWR_MULTISAMPLE_TYPE_COUNT];
788 extern PFN_BACKEND_FUNC gBackendSingleSample[SWR_INPUT_COVERAGE_COUNT][2][2];
789 extern PFN_BACKEND_FUNC gBackendSampleRateTable[SWR_MULTISAMPLE_TYPE_COUNT][SWR_INPUT_COVERAGE_COUNT][2][2];
790
791 void SetupPipeline(DRAW_CONTEXT *pDC)
792 {
793 DRAW_STATE* pState = pDC->pState;
794 const SWR_RASTSTATE &rastState = pState->state.rastState;
795 const SWR_PS_STATE &psState = pState->state.psState;
796 BACKEND_FUNCS& backendFuncs = pState->backendFuncs;
797
798 // setup backend
799 if (psState.pfnPixelShader == nullptr)
800 {
801 backendFuncs.pfnBackend = gBackendNullPs[pState->state.rastState.sampleCount];
802 }
803 else
804 {
805 const uint32_t forcedSampleCount = (rastState.forcedSampleCount) ? 1 : 0;
806 const bool bMultisampleEnable = ((rastState.sampleCount > SWR_MULTISAMPLE_1X) || forcedSampleCount) ? 1 : 0;
807 const uint32_t centroid = ((psState.barycentricsMask & SWR_BARYCENTRIC_CENTROID_MASK) > 0) ? 1 : 0;
808 const uint32_t canEarlyZ = (psState.forceEarlyZ || (!psState.writesODepth && !psState.usesUAV)) ? 1 : 0;
809 SWR_BARYCENTRICS_MASK barycentricsMask = (SWR_BARYCENTRICS_MASK)psState.barycentricsMask;
810
811 // select backend function
812 switch(psState.shadingRate)
813 {
814 case SWR_SHADING_RATE_PIXEL:
815 if(bMultisampleEnable)
816 {
817 // always need to generate I & J per sample for Z interpolation
818 barycentricsMask = (SWR_BARYCENTRICS_MASK)(barycentricsMask | SWR_BARYCENTRIC_PER_SAMPLE_MASK);
819 backendFuncs.pfnBackend = gBackendPixelRateTable[rastState.sampleCount][rastState.bIsCenterPattern][psState.inputCoverage]
820 [centroid][forcedSampleCount][canEarlyZ]
821 ;
822 }
823 else
824 {
825 // always need to generate I & J per pixel for Z interpolation
826 barycentricsMask = (SWR_BARYCENTRICS_MASK)(barycentricsMask | SWR_BARYCENTRIC_PER_PIXEL_MASK);
827 backendFuncs.pfnBackend = gBackendSingleSample[psState.inputCoverage][centroid][canEarlyZ];
828 }
829 break;
830 case SWR_SHADING_RATE_SAMPLE:
831 SWR_ASSERT(rastState.bIsCenterPattern != true);
832 // always need to generate I & J per sample for Z interpolation
833 barycentricsMask = (SWR_BARYCENTRICS_MASK)(barycentricsMask | SWR_BARYCENTRIC_PER_SAMPLE_MASK);
834 backendFuncs.pfnBackend = gBackendSampleRateTable[rastState.sampleCount][psState.inputCoverage][centroid][canEarlyZ];
835 break;
836 default:
837 SWR_ASSERT(0 && "Invalid shading rate");
838 break;
839 }
840 }
841
842 PFN_PROCESS_PRIMS pfnBinner;
843 #if USE_SIMD16_FRONTEND
844 PFN_PROCESS_PRIMS_SIMD16 pfnBinner_simd16;
845 #endif
846 switch (pState->state.topology)
847 {
848 case TOP_POINT_LIST:
849 pState->pfnProcessPrims = ClipPoints;
850 pfnBinner = BinPoints;
851 #if USE_SIMD16_FRONTEND
852 pState->pfnProcessPrims_simd16 = ClipPoints_simd16;
853 pfnBinner_simd16 = BinPoints_simd16;
854 #endif
855 break;
856 case TOP_LINE_LIST:
857 case TOP_LINE_STRIP:
858 case TOP_LINE_LOOP:
859 case TOP_LINE_LIST_ADJ:
860 case TOP_LISTSTRIP_ADJ:
861 pState->pfnProcessPrims = ClipLines;
862 pfnBinner = BinLines;
863 #if USE_SIMD16_FRONTEND
864 pState->pfnProcessPrims_simd16 = ClipLines_simd16;
865 pfnBinner_simd16 = BinLines_simd16;
866 #endif
867 break;
868 default:
869 pState->pfnProcessPrims = ClipTriangles;
870 pfnBinner = GetBinTrianglesFunc((rastState.conservativeRast > 0));
871 #if USE_SIMD16_FRONTEND
872 pState->pfnProcessPrims_simd16 = ClipTriangles_simd16;
873 pfnBinner_simd16 = GetBinTrianglesFunc_simd16((rastState.conservativeRast > 0));
874 #endif
875 break;
876 };
877
878
879 // disable clipper if viewport transform is disabled
880 if (pState->state.frontendState.vpTransformDisable)
881 {
882 pState->pfnProcessPrims = pfnBinner;
883 #if USE_SIMD16_FRONTEND
884 pState->pfnProcessPrims_simd16 = pfnBinner_simd16;
885 #endif
886 }
887
888 if ((pState->state.psState.pfnPixelShader == nullptr) &&
889 (pState->state.depthStencilState.depthTestEnable == FALSE) &&
890 (pState->state.depthStencilState.depthWriteEnable == FALSE) &&
891 (pState->state.depthStencilState.stencilTestEnable == FALSE) &&
892 (pState->state.depthStencilState.stencilWriteEnable == FALSE) &&
893 (pState->state.backendState.numAttributes == 0))
894 {
895 pState->pfnProcessPrims = nullptr;
896 #if USE_SIMD16_FRONTEND
897 pState->pfnProcessPrims_simd16 = nullptr;
898 #endif
899 }
900
901 if (pState->state.soState.rasterizerDisable == true)
902 {
903 pState->pfnProcessPrims = nullptr;
904 #if USE_SIMD16_FRONTEND
905 pState->pfnProcessPrims_simd16 = nullptr;
906 #endif
907 }
908
909
910 // set up the frontend attribute count
911 pState->state.feNumAttributes = 0;
912 const SWR_BACKEND_STATE& backendState = pState->state.backendState;
913 if (backendState.swizzleEnable)
914 {
915 // attribute swizzling is enabled, iterate over the map and record the max attribute used
916 for (uint32_t i = 0; i < backendState.numAttributes; ++i)
917 {
918 pState->state.feNumAttributes = std::max(pState->state.feNumAttributes, (uint32_t)backendState.swizzleMap[i].sourceAttrib + 1);
919 }
920 }
921 else
922 {
923 pState->state.feNumAttributes = pState->state.backendState.numAttributes;
924 }
925
926 if (pState->state.soState.soEnable)
927 {
928 uint32_t streamMasks = 0;
929 for (uint32_t i = 0; i < 4; ++i)
930 {
931 streamMasks |= pState->state.soState.streamMasks[i];
932 }
933
934 DWORD maxAttrib;
935 if (_BitScanReverse(&maxAttrib, streamMasks))
936 {
937 pState->state.feNumAttributes = std::max(pState->state.feNumAttributes, (uint32_t)(maxAttrib + 1));
938 }
939 }
940
941 // complicated logic to test for cases where we don't need backing hottile memory for a draw
942 // have to check for the special case where depth/stencil test is enabled but depthwrite is disabled.
943 pState->state.depthHottileEnable = ((!(pState->state.depthStencilState.depthTestEnable &&
944 !pState->state.depthStencilState.depthWriteEnable &&
945 !pState->state.depthBoundsState.depthBoundsTestEnable &&
946 pState->state.depthStencilState.depthTestFunc == ZFUNC_ALWAYS)) &&
947 (pState->state.depthStencilState.depthTestEnable ||
948 pState->state.depthStencilState.depthWriteEnable ||
949 pState->state.depthBoundsState.depthBoundsTestEnable)) ? true : false;
950
951 pState->state.stencilHottileEnable = (((!(pState->state.depthStencilState.stencilTestEnable &&
952 !pState->state.depthStencilState.stencilWriteEnable &&
953 pState->state.depthStencilState.stencilTestFunc == ZFUNC_ALWAYS)) ||
954 // for stencil we have to check the double sided state as well
955 (!(pState->state.depthStencilState.doubleSidedStencilTestEnable &&
956 !pState->state.depthStencilState.stencilWriteEnable &&
957 pState->state.depthStencilState.backfaceStencilTestFunc == ZFUNC_ALWAYS))) &&
958 (pState->state.depthStencilState.stencilTestEnable ||
959 pState->state.depthStencilState.stencilWriteEnable)) ? true : false;
960
961 uint32_t numRTs = pState->state.psState.numRenderTargets;
962 pState->state.colorHottileEnable = 0;
963 if (psState.pfnPixelShader != nullptr)
964 {
965 for (uint32_t rt = 0; rt < numRTs; ++rt)
966 {
967 pState->state.colorHottileEnable |=
968 (!pState->state.blendState.renderTarget[rt].writeDisableAlpha ||
969 !pState->state.blendState.renderTarget[rt].writeDisableRed ||
970 !pState->state.blendState.renderTarget[rt].writeDisableGreen ||
971 !pState->state.blendState.renderTarget[rt].writeDisableBlue) ? (1 << rt) : 0;
972 }
973 }
974
975 // Setup depth quantization function
976 if (pState->state.depthHottileEnable)
977 {
978 switch (pState->state.rastState.depthFormat)
979 {
980 case R32_FLOAT_X8X24_TYPELESS: pState->state.pfnQuantizeDepth = QuantizeDepth < R32_FLOAT_X8X24_TYPELESS > ; break;
981 case R32_FLOAT: pState->state.pfnQuantizeDepth = QuantizeDepth < R32_FLOAT > ; break;
982 case R24_UNORM_X8_TYPELESS: pState->state.pfnQuantizeDepth = QuantizeDepth < R24_UNORM_X8_TYPELESS > ; break;
983 case R16_UNORM: pState->state.pfnQuantizeDepth = QuantizeDepth < R16_UNORM > ; break;
984 default: SWR_INVALID("Unsupported depth format for depth quantiztion.");
985 pState->state.pfnQuantizeDepth = QuantizeDepth < R32_FLOAT > ;
986 }
987 }
988 else
989 {
990 // set up pass-through quantize if depth isn't enabled
991 pState->state.pfnQuantizeDepth = QuantizeDepth < R32_FLOAT > ;
992 }
993 }
994
995 //////////////////////////////////////////////////////////////////////////
996 /// @brief InitDraw
997 /// @param pDC - Draw context to initialize for this draw.
998 void InitDraw(
999 DRAW_CONTEXT *pDC,
1000 bool isSplitDraw)
1001 {
1002 // We don't need to re-setup the scissors/pipeline state again for split draw.
1003 if (isSplitDraw == false)
1004 {
1005 SetupMacroTileScissors(pDC);
1006 SetupPipeline(pDC);
1007 }
1008
1009
1010 }
1011
1012 //////////////////////////////////////////////////////////////////////////
1013 /// @brief We can split the draw for certain topologies for better performance.
1014 /// @param totalVerts - Total vertices for draw
1015 /// @param topology - Topology used for draw
1016 uint32_t MaxVertsPerDraw(
1017 DRAW_CONTEXT* pDC,
1018 uint32_t totalVerts,
1019 PRIMITIVE_TOPOLOGY topology)
1020 {
1021 API_STATE& state = pDC->pState->state;
1022
1023 uint32_t vertsPerDraw = totalVerts;
1024
1025 if (state.soState.soEnable)
1026 {
1027 return totalVerts;
1028 }
1029
1030 switch (topology)
1031 {
1032 case TOP_POINT_LIST:
1033 case TOP_TRIANGLE_LIST:
1034 vertsPerDraw = KNOB_MAX_PRIMS_PER_DRAW;
1035 break;
1036
1037 case TOP_PATCHLIST_1:
1038 case TOP_PATCHLIST_2:
1039 case TOP_PATCHLIST_3:
1040 case TOP_PATCHLIST_4:
1041 case TOP_PATCHLIST_5:
1042 case TOP_PATCHLIST_6:
1043 case TOP_PATCHLIST_7:
1044 case TOP_PATCHLIST_8:
1045 case TOP_PATCHLIST_9:
1046 case TOP_PATCHLIST_10:
1047 case TOP_PATCHLIST_11:
1048 case TOP_PATCHLIST_12:
1049 case TOP_PATCHLIST_13:
1050 case TOP_PATCHLIST_14:
1051 case TOP_PATCHLIST_15:
1052 case TOP_PATCHLIST_16:
1053 case TOP_PATCHLIST_17:
1054 case TOP_PATCHLIST_18:
1055 case TOP_PATCHLIST_19:
1056 case TOP_PATCHLIST_20:
1057 case TOP_PATCHLIST_21:
1058 case TOP_PATCHLIST_22:
1059 case TOP_PATCHLIST_23:
1060 case TOP_PATCHLIST_24:
1061 case TOP_PATCHLIST_25:
1062 case TOP_PATCHLIST_26:
1063 case TOP_PATCHLIST_27:
1064 case TOP_PATCHLIST_28:
1065 case TOP_PATCHLIST_29:
1066 case TOP_PATCHLIST_30:
1067 case TOP_PATCHLIST_31:
1068 case TOP_PATCHLIST_32:
1069 if (pDC->pState->state.tsState.tsEnable)
1070 {
1071 uint32_t vertsPerPrim = topology - TOP_PATCHLIST_BASE;
1072 vertsPerDraw = vertsPerPrim * KNOB_MAX_TESS_PRIMS_PER_DRAW;
1073 }
1074 break;
1075
1076 // The Primitive Assembly code can only handle 1 RECT at a time.
1077 case TOP_RECT_LIST:
1078 vertsPerDraw = 3;
1079 break;
1080
1081 default:
1082 // We are not splitting up draws for other topologies.
1083 break;
1084 }
1085
1086 return vertsPerDraw;
1087 }
1088
1089
1090 //////////////////////////////////////////////////////////////////////////
1091 /// @brief DrawInstanced
1092 /// @param hContext - Handle passed back from SwrCreateContext
1093 /// @param topology - Specifies topology for draw.
1094 /// @param numVerts - How many vertices to read sequentially from vertex data (per instance).
1095 /// @param startVertex - Specifies start vertex for draw. (vertex data)
1096 /// @param numInstances - How many instances to render.
1097 /// @param startInstance - Which instance to start sequentially fetching from in each buffer (instanced data)
1098 void DrawInstanced(
1099 HANDLE hContext,
1100 PRIMITIVE_TOPOLOGY topology,
1101 uint32_t numVertices,
1102 uint32_t startVertex,
1103 uint32_t numInstances = 1,
1104 uint32_t startInstance = 0)
1105 {
1106 if (KNOB_TOSS_DRAW)
1107 {
1108 return;
1109 }
1110
1111 SWR_CONTEXT *pContext = GetContext(hContext);
1112 DRAW_CONTEXT* pDC = GetDrawContext(pContext);
1113
1114 AR_API_BEGIN(APIDraw, pDC->drawId);
1115 AR_API_EVENT(DrawInstancedEvent(pDC->drawId, topology, numVertices, startVertex, numInstances, startInstance));
1116
1117 uint32_t maxVertsPerDraw = MaxVertsPerDraw(pDC, numVertices, topology);
1118 uint32_t primsPerDraw = GetNumPrims(topology, maxVertsPerDraw);
1119 uint32_t remainingVerts = numVertices;
1120
1121 API_STATE *pState = &pDC->pState->state;
1122 pState->topology = topology;
1123 pState->forceFront = false;
1124
1125 // disable culling for points/lines
1126 uint32_t oldCullMode = pState->rastState.cullMode;
1127 if (topology == TOP_POINT_LIST)
1128 {
1129 pState->rastState.cullMode = SWR_CULLMODE_NONE;
1130 pState->forceFront = true;
1131 }
1132 else if (topology == TOP_RECT_LIST)
1133 {
1134 pState->rastState.cullMode = SWR_CULLMODE_NONE;
1135 }
1136
1137 int draw = 0;
1138 while (remainingVerts)
1139 {
1140 uint32_t numVertsForDraw = (remainingVerts < maxVertsPerDraw) ?
1141 remainingVerts : maxVertsPerDraw;
1142
1143 bool isSplitDraw = (draw > 0) ? true : false;
1144 DRAW_CONTEXT* pDC = GetDrawContext(pContext, isSplitDraw);
1145 InitDraw(pDC, isSplitDraw);
1146
1147 pDC->FeWork.type = DRAW;
1148 pDC->FeWork.pfnWork = GetProcessDrawFunc(
1149 false, // IsIndexed
1150 false, // bEnableCutIndex
1151 pState->tsState.tsEnable,
1152 pState->gsState.gsEnable,
1153 pState->soState.soEnable,
1154 pDC->pState->pfnProcessPrims != nullptr);
1155 pDC->FeWork.desc.draw.numVerts = numVertsForDraw;
1156 pDC->FeWork.desc.draw.startVertex = startVertex;
1157 pDC->FeWork.desc.draw.numInstances = numInstances;
1158 pDC->FeWork.desc.draw.startInstance = startInstance;
1159 pDC->FeWork.desc.draw.startPrimID = draw * primsPerDraw;
1160 pDC->FeWork.desc.draw.startVertexID = draw * maxVertsPerDraw;
1161
1162 pDC->cleanupState = (remainingVerts == numVertsForDraw);
1163
1164 //enqueue DC
1165 QueueDraw(pContext);
1166
1167 AR_API_EVENT(DrawInstancedSplitEvent(pDC->drawId));
1168
1169 remainingVerts -= numVertsForDraw;
1170 draw++;
1171 }
1172
1173 // restore culling state
1174 pDC = GetDrawContext(pContext);
1175 pDC->pState->state.rastState.cullMode = oldCullMode;
1176
1177 AR_API_END(APIDraw, numVertices * numInstances);
1178 }
1179
1180 //////////////////////////////////////////////////////////////////////////
1181 /// @brief SwrDraw
1182 /// @param hContext - Handle passed back from SwrCreateContext
1183 /// @param topology - Specifies topology for draw.
1184 /// @param startVertex - Specifies start vertex in vertex buffer for draw.
1185 /// @param primCount - Number of vertices.
1186 void SwrDraw(
1187 HANDLE hContext,
1188 PRIMITIVE_TOPOLOGY topology,
1189 uint32_t startVertex,
1190 uint32_t numVertices)
1191 {
1192 DrawInstanced(hContext, topology, numVertices, startVertex);
1193 }
1194
1195 //////////////////////////////////////////////////////////////////////////
1196 /// @brief SwrDrawInstanced
1197 /// @param hContext - Handle passed back from SwrCreateContext
1198 /// @param topology - Specifies topology for draw.
1199 /// @param numVertsPerInstance - How many vertices to read sequentially from vertex data.
1200 /// @param numInstances - How many instances to render.
1201 /// @param startVertex - Specifies start vertex for draw. (vertex data)
1202 /// @param startInstance - Which instance to start sequentially fetching from in each buffer (instanced data)
1203 void SwrDrawInstanced(
1204 HANDLE hContext,
1205 PRIMITIVE_TOPOLOGY topology,
1206 uint32_t numVertsPerInstance,
1207 uint32_t numInstances,
1208 uint32_t startVertex,
1209 uint32_t startInstance
1210 )
1211 {
1212 DrawInstanced(hContext, topology, numVertsPerInstance, startVertex, numInstances, startInstance);
1213 }
1214
1215 //////////////////////////////////////////////////////////////////////////
1216 /// @brief DrawIndexedInstanced
1217 /// @param hContext - Handle passed back from SwrCreateContext
1218 /// @param topology - Specifies topology for draw.
1219 /// @param numIndices - Number of indices to read sequentially from index buffer.
1220 /// @param indexOffset - Starting index into index buffer.
1221 /// @param baseVertex - Vertex in vertex buffer to consider as index "0". Note value is signed.
1222 /// @param numInstances - Number of instances to render.
1223 /// @param startInstance - Which instance to start sequentially fetching from in each buffer (instanced data)
1224 void DrawIndexedInstance(
1225 HANDLE hContext,
1226 PRIMITIVE_TOPOLOGY topology,
1227 uint32_t numIndices,
1228 uint32_t indexOffset,
1229 int32_t baseVertex,
1230 uint32_t numInstances = 1,
1231 uint32_t startInstance = 0)
1232 {
1233 if (KNOB_TOSS_DRAW)
1234 {
1235 return;
1236 }
1237
1238 SWR_CONTEXT *pContext = GetContext(hContext);
1239 DRAW_CONTEXT* pDC = GetDrawContext(pContext);
1240 API_STATE* pState = &pDC->pState->state;
1241
1242 AR_API_BEGIN(APIDrawIndexed, pDC->drawId);
1243 AR_API_EVENT(DrawIndexedInstancedEvent(pDC->drawId, topology, numIndices, indexOffset, baseVertex, numInstances, startInstance));
1244
1245 uint32_t maxIndicesPerDraw = MaxVertsPerDraw(pDC, numIndices, topology);
1246 uint32_t primsPerDraw = GetNumPrims(topology, maxIndicesPerDraw);
1247 uint32_t remainingIndices = numIndices;
1248
1249 uint32_t indexSize = 0;
1250 switch (pState->indexBuffer.format)
1251 {
1252 case R32_UINT: indexSize = sizeof(uint32_t); break;
1253 case R16_UINT: indexSize = sizeof(uint16_t); break;
1254 case R8_UINT: indexSize = sizeof(uint8_t); break;
1255 default:
1256 SWR_INVALID("Invalid index buffer format: %d", pState->indexBuffer.format);
1257 }
1258
1259 int draw = 0;
1260 uint8_t *pIB = (uint8_t*)pState->indexBuffer.pIndices;
1261 pIB += (uint64_t)indexOffset * (uint64_t)indexSize;
1262
1263 pState->topology = topology;
1264 pState->forceFront = false;
1265
1266 // disable culling for points/lines
1267 uint32_t oldCullMode = pState->rastState.cullMode;
1268 if (topology == TOP_POINT_LIST)
1269 {
1270 pState->rastState.cullMode = SWR_CULLMODE_NONE;
1271 pState->forceFront = true;
1272 }
1273 else if (topology == TOP_RECT_LIST)
1274 {
1275 pState->rastState.cullMode = SWR_CULLMODE_NONE;
1276 }
1277
1278 while (remainingIndices)
1279 {
1280 uint32_t numIndicesForDraw = (remainingIndices < maxIndicesPerDraw) ?
1281 remainingIndices : maxIndicesPerDraw;
1282
1283 // When breaking up draw, we need to obtain new draw context for each iteration.
1284 bool isSplitDraw = (draw > 0) ? true : false;
1285
1286 pDC = GetDrawContext(pContext, isSplitDraw);
1287 InitDraw(pDC, isSplitDraw);
1288
1289 pDC->FeWork.type = DRAW;
1290 pDC->FeWork.pfnWork = GetProcessDrawFunc(
1291 true, // IsIndexed
1292 pState->frontendState.bEnableCutIndex,
1293 pState->tsState.tsEnable,
1294 pState->gsState.gsEnable,
1295 pState->soState.soEnable,
1296 pDC->pState->pfnProcessPrims != nullptr);
1297 pDC->FeWork.desc.draw.pDC = pDC;
1298 pDC->FeWork.desc.draw.numIndices = numIndicesForDraw;
1299 pDC->FeWork.desc.draw.pIB = (int*)pIB;
1300 pDC->FeWork.desc.draw.type = pDC->pState->state.indexBuffer.format;
1301
1302 pDC->FeWork.desc.draw.numInstances = numInstances;
1303 pDC->FeWork.desc.draw.startInstance = startInstance;
1304 pDC->FeWork.desc.draw.baseVertex = baseVertex;
1305 pDC->FeWork.desc.draw.startPrimID = draw * primsPerDraw;
1306
1307 pDC->cleanupState = (remainingIndices == numIndicesForDraw);
1308
1309 //enqueue DC
1310 QueueDraw(pContext);
1311
1312 AR_API_EVENT(DrawIndexedInstancedSplitEvent(pDC->drawId));
1313
1314 pIB += maxIndicesPerDraw * indexSize;
1315 remainingIndices -= numIndicesForDraw;
1316 draw++;
1317 }
1318
1319 // Restore culling state
1320 pDC = GetDrawContext(pContext);
1321 pDC->pState->state.rastState.cullMode = oldCullMode;
1322
1323 AR_API_END(APIDrawIndexed, numIndices * numInstances);
1324 }
1325
1326
1327 //////////////////////////////////////////////////////////////////////////
1328 /// @brief DrawIndexed
1329 /// @param hContext - Handle passed back from SwrCreateContext
1330 /// @param topology - Specifies topology for draw.
1331 /// @param numIndices - Number of indices to read sequentially from index buffer.
1332 /// @param indexOffset - Starting index into index buffer.
1333 /// @param baseVertex - Vertex in vertex buffer to consider as index "0". Note value is signed.
1334 void SwrDrawIndexed(
1335 HANDLE hContext,
1336 PRIMITIVE_TOPOLOGY topology,
1337 uint32_t numIndices,
1338 uint32_t indexOffset,
1339 int32_t baseVertex
1340 )
1341 {
1342 DrawIndexedInstance(hContext, topology, numIndices, indexOffset, baseVertex);
1343 }
1344
1345 //////////////////////////////////////////////////////////////////////////
1346 /// @brief SwrDrawIndexedInstanced
1347 /// @param hContext - Handle passed back from SwrCreateContext
1348 /// @param topology - Specifies topology for draw.
1349 /// @param numIndices - Number of indices to read sequentially from index buffer.
1350 /// @param numInstances - Number of instances to render.
1351 /// @param indexOffset - Starting index into index buffer.
1352 /// @param baseVertex - Vertex in vertex buffer to consider as index "0". Note value is signed.
1353 /// @param startInstance - Which instance to start sequentially fetching from in each buffer (instanced data)
1354 void SwrDrawIndexedInstanced(
1355 HANDLE hContext,
1356 PRIMITIVE_TOPOLOGY topology,
1357 uint32_t numIndices,
1358 uint32_t numInstances,
1359 uint32_t indexOffset,
1360 int32_t baseVertex,
1361 uint32_t startInstance)
1362 {
1363 DrawIndexedInstance(hContext, topology, numIndices, indexOffset, baseVertex, numInstances, startInstance);
1364 }
1365
1366 //////////////////////////////////////////////////////////////////////////
1367 /// @brief SwrInvalidateTiles
1368 /// @param hContext - Handle passed back from SwrCreateContext
1369 /// @param attachmentMask - The mask specifies which surfaces attached to the hottiles to invalidate.
1370 /// @param invalidateRect - The pixel-coordinate rectangle to invalidate. This will be expanded to
1371 /// be hottile size-aligned.
1372 void SWR_API SwrInvalidateTiles(
1373 HANDLE hContext,
1374 uint32_t attachmentMask,
1375 const SWR_RECT& invalidateRect)
1376 {
1377 if (KNOB_TOSS_DRAW)
1378 {
1379 return;
1380 }
1381
1382 SWR_CONTEXT *pContext = GetContext(hContext);
1383 DRAW_CONTEXT* pDC = GetDrawContext(pContext);
1384
1385 pDC->FeWork.type = DISCARDINVALIDATETILES;
1386 pDC->FeWork.pfnWork = ProcessDiscardInvalidateTiles;
1387 pDC->FeWork.desc.discardInvalidateTiles.attachmentMask = attachmentMask;
1388 pDC->FeWork.desc.discardInvalidateTiles.rect = invalidateRect;
1389 pDC->FeWork.desc.discardInvalidateTiles.rect &= g_MaxScissorRect;
1390 pDC->FeWork.desc.discardInvalidateTiles.newTileState = SWR_TILE_INVALID;
1391 pDC->FeWork.desc.discardInvalidateTiles.createNewTiles = false;
1392 pDC->FeWork.desc.discardInvalidateTiles.fullTilesOnly = false;
1393
1394 //enqueue
1395 QueueDraw(pContext);
1396
1397 AR_API_EVENT(SwrInvalidateTilesEvent(pDC->drawId));
1398 }
1399
1400 //////////////////////////////////////////////////////////////////////////
1401 /// @brief SwrDiscardRect
1402 /// @param hContext - Handle passed back from SwrCreateContext
1403 /// @param attachmentMask - The mask specifies which surfaces attached to the hottiles to discard.
1404 /// @param rect - The pixel-coordinate rectangle to discard. Only fully-covered hottiles will be
1405 /// discarded.
1406 void SWR_API SwrDiscardRect(
1407 HANDLE hContext,
1408 uint32_t attachmentMask,
1409 const SWR_RECT& rect)
1410 {
1411 if (KNOB_TOSS_DRAW)
1412 {
1413 return;
1414 }
1415
1416 SWR_CONTEXT *pContext = GetContext(hContext);
1417 DRAW_CONTEXT* pDC = GetDrawContext(pContext);
1418
1419 // Queue a load to the hottile
1420 pDC->FeWork.type = DISCARDINVALIDATETILES;
1421 pDC->FeWork.pfnWork = ProcessDiscardInvalidateTiles;
1422 pDC->FeWork.desc.discardInvalidateTiles.attachmentMask = attachmentMask;
1423 pDC->FeWork.desc.discardInvalidateTiles.rect = rect;
1424 pDC->FeWork.desc.discardInvalidateTiles.rect &= g_MaxScissorRect;
1425 pDC->FeWork.desc.discardInvalidateTiles.newTileState = SWR_TILE_RESOLVED;
1426 pDC->FeWork.desc.discardInvalidateTiles.createNewTiles = true;
1427 pDC->FeWork.desc.discardInvalidateTiles.fullTilesOnly = true;
1428
1429 //enqueue
1430 QueueDraw(pContext);
1431
1432 AR_API_EVENT(SwrDiscardRectEvent(pDC->drawId));
1433 }
1434
1435 //////////////////////////////////////////////////////////////////////////
1436 /// @brief SwrDispatch
1437 /// @param hContext - Handle passed back from SwrCreateContext
1438 /// @param threadGroupCountX - Number of thread groups dispatched in X direction
1439 /// @param threadGroupCountY - Number of thread groups dispatched in Y direction
1440 /// @param threadGroupCountZ - Number of thread groups dispatched in Z direction
1441 void SwrDispatch(
1442 HANDLE hContext,
1443 uint32_t threadGroupCountX,
1444 uint32_t threadGroupCountY,
1445 uint32_t threadGroupCountZ)
1446 {
1447 if (KNOB_TOSS_DRAW)
1448 {
1449 return;
1450 }
1451
1452 SWR_CONTEXT *pContext = GetContext(hContext);
1453 DRAW_CONTEXT* pDC = GetDrawContext(pContext);
1454
1455 AR_API_BEGIN(APIDispatch, pDC->drawId);
1456 AR_API_EVENT(DispatchEvent(pDC->drawId, threadGroupCountX, threadGroupCountY, threadGroupCountZ));
1457 pDC->isCompute = true; // This is a compute context.
1458
1459 COMPUTE_DESC* pTaskData = (COMPUTE_DESC*)pDC->pArena->AllocAligned(sizeof(COMPUTE_DESC), 64);
1460
1461 pTaskData->threadGroupCountX = threadGroupCountX;
1462 pTaskData->threadGroupCountY = threadGroupCountY;
1463 pTaskData->threadGroupCountZ = threadGroupCountZ;
1464
1465 uint32_t totalThreadGroups = threadGroupCountX * threadGroupCountY * threadGroupCountZ;
1466 uint32_t dcIndex = pDC->drawId % KNOB_MAX_DRAWS_IN_FLIGHT;
1467 pDC->pDispatch = &pContext->pDispatchQueueArray[dcIndex];
1468 pDC->pDispatch->initialize(totalThreadGroups, pTaskData, &ProcessComputeBE);
1469
1470 QueueDispatch(pContext);
1471 AR_API_END(APIDispatch, threadGroupCountX * threadGroupCountY * threadGroupCountZ);
1472 }
1473
1474 // Deswizzles, converts and stores current contents of the hot tiles to surface
1475 // described by pState
1476 void SWR_API SwrStoreTiles(
1477 HANDLE hContext,
1478 uint32_t attachmentMask,
1479 SWR_TILE_STATE postStoreTileState,
1480 const SWR_RECT& storeRect)
1481 {
1482 if (KNOB_TOSS_DRAW)
1483 {
1484 return;
1485 }
1486
1487 SWR_CONTEXT *pContext = GetContext(hContext);
1488 DRAW_CONTEXT* pDC = GetDrawContext(pContext);
1489
1490 AR_API_BEGIN(APIStoreTiles, pDC->drawId);
1491
1492 pDC->FeWork.type = STORETILES;
1493 pDC->FeWork.pfnWork = ProcessStoreTiles;
1494 pDC->FeWork.desc.storeTiles.attachmentMask = attachmentMask;
1495 pDC->FeWork.desc.storeTiles.postStoreTileState = postStoreTileState;
1496 pDC->FeWork.desc.storeTiles.rect = storeRect;
1497 pDC->FeWork.desc.storeTiles.rect &= g_MaxScissorRect;
1498
1499 //enqueue
1500 QueueDraw(pContext);
1501
1502 AR_API_EVENT(SwrStoreTilesEvent(pDC->drawId));
1503
1504 AR_API_END(APIStoreTiles, 1);
1505 }
1506
1507 //////////////////////////////////////////////////////////////////////////
1508 /// @brief SwrClearRenderTarget - Clear attached render targets / depth / stencil
1509 /// @param hContext - Handle passed back from SwrCreateContext
1510 /// @param attachmentMask - combination of SWR_ATTACHMENT_*_BIT attachments to clear
1511 /// @param renderTargetArrayIndex - the RT array index to clear
1512 /// @param clearColor - color use for clearing render targets
1513 /// @param z - depth value use for clearing depth buffer
1514 /// @param stencil - stencil value used for clearing stencil buffer
1515 /// @param clearRect - The pixel-coordinate rectangle to clear in all cleared buffers
1516 void SWR_API SwrClearRenderTarget(
1517 HANDLE hContext,
1518 uint32_t attachmentMask,
1519 uint32_t renderTargetArrayIndex,
1520 const float clearColor[4],
1521 float z,
1522 uint8_t stencil,
1523 const SWR_RECT& clearRect)
1524 {
1525 if (KNOB_TOSS_DRAW)
1526 {
1527 return;
1528 }
1529
1530 SWR_CONTEXT *pContext = GetContext(hContext);
1531 DRAW_CONTEXT* pDC = GetDrawContext(pContext);
1532
1533 AR_API_BEGIN(APIClearRenderTarget, pDC->drawId);
1534
1535 pDC->FeWork.type = CLEAR;
1536 pDC->FeWork.pfnWork = ProcessClear;
1537 pDC->FeWork.desc.clear.rect = clearRect;
1538 pDC->FeWork.desc.clear.rect &= g_MaxScissorRect;
1539 pDC->FeWork.desc.clear.attachmentMask = attachmentMask;
1540 pDC->FeWork.desc.clear.renderTargetArrayIndex = renderTargetArrayIndex;
1541 pDC->FeWork.desc.clear.clearDepth = z;
1542 pDC->FeWork.desc.clear.clearRTColor[0] = clearColor[0];
1543 pDC->FeWork.desc.clear.clearRTColor[1] = clearColor[1];
1544 pDC->FeWork.desc.clear.clearRTColor[2] = clearColor[2];
1545 pDC->FeWork.desc.clear.clearRTColor[3] = clearColor[3];
1546 pDC->FeWork.desc.clear.clearStencil = stencil;
1547
1548 // enqueue draw
1549 QueueDraw(pContext);
1550
1551 AR_API_END(APIClearRenderTarget, 1);
1552 }
1553
1554 //////////////////////////////////////////////////////////////////////////
1555 /// @brief Returns a pointer to the private context state for the current
1556 /// draw operation. This is used for external componets such as the
1557 /// sampler.
1558 /// SWR is responsible for the allocation of the private context state.
1559 /// @param hContext - Handle passed back from SwrCreateContext
1560 VOID* SwrGetPrivateContextState(
1561 HANDLE hContext)
1562 {
1563 SWR_CONTEXT* pContext = GetContext(hContext);
1564 DRAW_CONTEXT* pDC = GetDrawContext(pContext);
1565 DRAW_STATE* pState = pDC->pState;
1566
1567 if (pState->pPrivateState == nullptr)
1568 {
1569 pState->pPrivateState = pState->pArena->AllocAligned(pContext->privateStateSize, KNOB_SIMD_WIDTH*sizeof(float));
1570 }
1571
1572 return pState->pPrivateState;
1573 }
1574
1575 //////////////////////////////////////////////////////////////////////////
1576 /// @brief Clients can use this to allocate memory for draw/dispatch
1577 /// operations. The memory will automatically be freed once operation
1578 /// has completed. Client can use this to allocate binding tables,
1579 /// etc. needed for shader execution.
1580 /// @param hContext - Handle passed back from SwrCreateContext
1581 /// @param size - Size of allocation
1582 /// @param align - Alignment needed for allocation.
1583 VOID* SwrAllocDrawContextMemory(
1584 HANDLE hContext,
1585 uint32_t size,
1586 uint32_t align)
1587 {
1588 SWR_CONTEXT* pContext = GetContext(hContext);
1589 DRAW_CONTEXT* pDC = GetDrawContext(pContext);
1590
1591 return pDC->pState->pArena->AllocAligned(size, align);
1592 }
1593
1594 //////////////////////////////////////////////////////////////////////////
1595 /// @brief Enables stats counting
1596 /// @param hContext - Handle passed back from SwrCreateContext
1597 /// @param enable - If true then counts are incremented.
1598 void SwrEnableStatsFE(
1599 HANDLE hContext,
1600 bool enable)
1601 {
1602 SWR_CONTEXT *pContext = GetContext(hContext);
1603 DRAW_CONTEXT* pDC = GetDrawContext(pContext);
1604
1605 pDC->pState->state.enableStatsFE = enable;
1606 }
1607
1608 //////////////////////////////////////////////////////////////////////////
1609 /// @brief Enables stats counting
1610 /// @param hContext - Handle passed back from SwrCreateContext
1611 /// @param enable - If true then counts are incremented.
1612 void SwrEnableStatsBE(
1613 HANDLE hContext,
1614 bool enable)
1615 {
1616 SWR_CONTEXT *pContext = GetContext(hContext);
1617 DRAW_CONTEXT* pDC = GetDrawContext(pContext);
1618
1619 pDC->pState->state.enableStatsBE = enable;
1620 }
1621
1622 //////////////////////////////////////////////////////////////////////////
1623 /// @brief Mark end of frame - used for performance profiling
1624 /// @param hContext - Handle passed back from SwrCreateContext
1625 void SWR_API SwrEndFrame(
1626 HANDLE hContext)
1627 {
1628 SWR_CONTEXT *pContext = GetContext(hContext);
1629 DRAW_CONTEXT* pDC = GetDrawContext(pContext);
1630 (void)pDC; // var used
1631
1632 RDTSC_ENDFRAME();
1633 AR_API_EVENT(FrameEndEvent(pContext->frameCount, pDC->drawId));
1634
1635 pContext->frameCount++;
1636 }
1637
1638 void InitSimLoadTilesTable();
1639 void InitSimStoreTilesTable();
1640 void InitSimClearTilesTable();
1641
1642 void InitClearTilesTable();
1643 void InitBackendFuncTables();
1644
1645 //////////////////////////////////////////////////////////////////////////
1646 /// @brief Initialize swr backend and memory internal tables
1647 void SwrInit()
1648 {
1649 InitSimLoadTilesTable();
1650 InitSimStoreTilesTable();
1651 InitSimClearTilesTable();
1652
1653 InitClearTilesTable();
1654 InitBackendFuncTables();
1655 }
1656
1657 void SwrGetInterface(SWR_INTERFACE &out_funcs)
1658 {
1659 out_funcs.pfnSwrCreateContext = SwrCreateContext;
1660 out_funcs.pfnSwrDestroyContext = SwrDestroyContext;
1661 out_funcs.pfnSwrSaveState = SwrSaveState;
1662 out_funcs.pfnSwrRestoreState = SwrRestoreState;
1663 out_funcs.pfnSwrSync = SwrSync;
1664 out_funcs.pfnSwrWaitForIdle = SwrWaitForIdle;
1665 out_funcs.pfnSwrWaitForIdleFE = SwrWaitForIdleFE;
1666 out_funcs.pfnSwrSetVertexBuffers = SwrSetVertexBuffers;
1667 out_funcs.pfnSwrSetIndexBuffer = SwrSetIndexBuffer;
1668 out_funcs.pfnSwrSetFetchFunc = SwrSetFetchFunc;
1669 out_funcs.pfnSwrSetSoFunc = SwrSetSoFunc;
1670 out_funcs.pfnSwrSetSoState = SwrSetSoState;
1671 out_funcs.pfnSwrSetSoBuffers = SwrSetSoBuffers;
1672 out_funcs.pfnSwrSetVertexFunc = SwrSetVertexFunc;
1673 out_funcs.pfnSwrSetFrontendState = SwrSetFrontendState;
1674 out_funcs.pfnSwrSetGsState = SwrSetGsState;
1675 out_funcs.pfnSwrSetGsFunc = SwrSetGsFunc;
1676 out_funcs.pfnSwrSetCsFunc = SwrSetCsFunc;
1677 out_funcs.pfnSwrSetTsState = SwrSetTsState;
1678 out_funcs.pfnSwrSetHsFunc = SwrSetHsFunc;
1679 out_funcs.pfnSwrSetDsFunc = SwrSetDsFunc;
1680 out_funcs.pfnSwrSetDepthStencilState = SwrSetDepthStencilState;
1681 out_funcs.pfnSwrSetBackendState = SwrSetBackendState;
1682 out_funcs.pfnSwrSetDepthBoundsState = SwrSetDepthBoundsState;
1683 out_funcs.pfnSwrSetPixelShaderState = SwrSetPixelShaderState;
1684 out_funcs.pfnSwrSetBlendState = SwrSetBlendState;
1685 out_funcs.pfnSwrSetBlendFunc = SwrSetBlendFunc;
1686 out_funcs.pfnSwrDraw = SwrDraw;
1687 out_funcs.pfnSwrDrawInstanced = SwrDrawInstanced;
1688 out_funcs.pfnSwrDrawIndexed = SwrDrawIndexed;
1689 out_funcs.pfnSwrDrawIndexedInstanced = SwrDrawIndexedInstanced;
1690 out_funcs.pfnSwrInvalidateTiles = SwrInvalidateTiles;
1691 out_funcs.pfnSwrDiscardRect = SwrDiscardRect;
1692 out_funcs.pfnSwrDispatch = SwrDispatch;
1693 out_funcs.pfnSwrStoreTiles = SwrStoreTiles;
1694 out_funcs.pfnSwrClearRenderTarget = SwrClearRenderTarget;
1695 out_funcs.pfnSwrSetRastState = SwrSetRastState;
1696 out_funcs.pfnSwrSetViewports = SwrSetViewports;
1697 out_funcs.pfnSwrSetScissorRects = SwrSetScissorRects;
1698 out_funcs.pfnSwrGetPrivateContextState = SwrGetPrivateContextState;
1699 out_funcs.pfnSwrAllocDrawContextMemory = SwrAllocDrawContextMemory;
1700 out_funcs.pfnSwrEnableStatsFE = SwrEnableStatsFE;
1701 out_funcs.pfnSwrEnableStatsBE = SwrEnableStatsBE;
1702 out_funcs.pfnSwrEndFrame = SwrEndFrame;
1703 out_funcs.pfnSwrInit = SwrInit;
1704 out_funcs.pfnSwrLoadHotTile = SwrLoadHotTile;
1705 out_funcs.pfnSwrStoreHotTileToSurface = SwrStoreHotTileToSurface;
1706 out_funcs.pfnSwrStoreHotTileClear = SwrStoreHotTileClear;
1707 }