swr: remove unneeded extern "C"
[mesa.git] / src / gallium / drivers / swr / swr_context.cpp
1 /****************************************************************************
2 * Copyright (C) 2015 Intel Corporation. All Rights Reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 ***************************************************************************/
23
24 #include "swr_context.h"
25 #include "swr_memory.h"
26 #include "swr_screen.h"
27 #include "swr_resource.h"
28 #include "swr_scratch.h"
29 #include "swr_query.h"
30 #include "swr_fence.h"
31
32 #include "util/u_memory.h"
33 #include "util/u_inlines.h"
34 #include "util/u_format.h"
35 #include "util/u_atomic.h"
36 #include "util/u_upload_mgr.h"
37 #include "util/u_transfer.h"
38 #include "util/u_surface.h"
39
40 #include "api.h"
41 #include "backend.h"
42
43 static struct pipe_surface *
44 swr_create_surface(struct pipe_context *pipe,
45 struct pipe_resource *pt,
46 const struct pipe_surface *surf_tmpl)
47 {
48 struct pipe_surface *ps;
49
50 ps = CALLOC_STRUCT(pipe_surface);
51 if (ps) {
52 pipe_reference_init(&ps->reference, 1);
53 pipe_resource_reference(&ps->texture, pt);
54 ps->context = pipe;
55 ps->format = surf_tmpl->format;
56 if (pt->target != PIPE_BUFFER) {
57 assert(surf_tmpl->u.tex.level <= pt->last_level);
58 ps->width = u_minify(pt->width0, surf_tmpl->u.tex.level);
59 ps->height = u_minify(pt->height0, surf_tmpl->u.tex.level);
60 ps->u.tex.level = surf_tmpl->u.tex.level;
61 ps->u.tex.first_layer = surf_tmpl->u.tex.first_layer;
62 ps->u.tex.last_layer = surf_tmpl->u.tex.last_layer;
63 } else {
64 /* setting width as number of elements should get us correct
65 * renderbuffer width */
66 ps->width = surf_tmpl->u.buf.last_element
67 - surf_tmpl->u.buf.first_element + 1;
68 ps->height = pt->height0;
69 ps->u.buf.first_element = surf_tmpl->u.buf.first_element;
70 ps->u.buf.last_element = surf_tmpl->u.buf.last_element;
71 assert(ps->u.buf.first_element <= ps->u.buf.last_element);
72 assert(ps->u.buf.last_element < ps->width);
73 }
74 }
75 return ps;
76 }
77
78 static void
79 swr_surface_destroy(struct pipe_context *pipe, struct pipe_surface *surf)
80 {
81 assert(surf->texture);
82 struct pipe_resource *resource = surf->texture;
83
84 /* If the resource has been drawn to, store tiles. */
85 swr_store_dirty_resource(pipe, resource, SWR_TILE_RESOLVED);
86
87 pipe_resource_reference(&resource, NULL);
88 FREE(surf);
89 }
90
91
92 static void *
93 swr_transfer_map(struct pipe_context *pipe,
94 struct pipe_resource *resource,
95 unsigned level,
96 unsigned usage,
97 const struct pipe_box *box,
98 struct pipe_transfer **transfer)
99 {
100 struct swr_screen *screen = swr_screen(pipe->screen);
101 struct swr_resource *spr = swr_resource(resource);
102 struct pipe_transfer *pt;
103 enum pipe_format format = resource->format;
104
105 assert(resource);
106 assert(level <= resource->last_level);
107
108 /* If mapping an attached rendertarget, store tiles to surface and set
109 * postStoreTileState to SWR_TILE_INVALID so tiles get reloaded on next use
110 * and nothing needs to be done at unmap. */
111 swr_store_dirty_resource(pipe, resource, SWR_TILE_INVALID);
112
113 if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
114 /* If resource is in use, finish fence before mapping.
115 * Unless requested not to block, then if not done return NULL map */
116 if (usage & PIPE_TRANSFER_DONTBLOCK) {
117 if (swr_is_fence_pending(screen->flush_fence))
118 return NULL;
119 } else {
120 if (spr->status) {
121 /* But, if there's no fence pending, submit one.
122 * XXX: Remove once draw timestamps are finished. */
123 if (!swr_is_fence_pending(screen->flush_fence))
124 swr_fence_submit(swr_context(pipe), screen->flush_fence);
125
126 swr_fence_finish(pipe->screen, NULL, screen->flush_fence, 0);
127 swr_resource_unused(resource);
128 }
129 }
130 }
131
132 pt = CALLOC_STRUCT(pipe_transfer);
133 if (!pt)
134 return NULL;
135 pipe_resource_reference(&pt->resource, resource);
136 pt->usage = (pipe_transfer_usage)usage;
137 pt->level = level;
138 pt->box = *box;
139 pt->stride = spr->swr.pitch;
140 pt->layer_stride = spr->swr.qpitch * spr->swr.pitch;
141
142 /* if we're mapping the depth/stencil, copy in stencil for the section
143 * being read in
144 */
145 if (usage & PIPE_TRANSFER_READ && spr->has_depth && spr->has_stencil) {
146 size_t zbase, sbase;
147 for (int z = box->z; z < box->z + box->depth; z++) {
148 zbase = (z * spr->swr.qpitch + box->y) * spr->swr.pitch +
149 spr->mip_offsets[level];
150 sbase = (z * spr->secondary.qpitch + box->y) * spr->secondary.pitch +
151 spr->secondary_mip_offsets[level];
152 for (int y = box->y; y < box->y + box->height; y++) {
153 if (spr->base.format == PIPE_FORMAT_Z24_UNORM_S8_UINT) {
154 for (int x = box->x; x < box->x + box->width; x++)
155 spr->swr.pBaseAddress[zbase + 4 * x + 3] =
156 spr->secondary.pBaseAddress[sbase + x];
157 } else if (spr->base.format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT) {
158 for (int x = box->x; x < box->x + box->width; x++)
159 spr->swr.pBaseAddress[zbase + 8 * x + 4] =
160 spr->secondary.pBaseAddress[sbase + x];
161 }
162 zbase += spr->swr.pitch;
163 sbase += spr->secondary.pitch;
164 }
165 }
166 }
167
168 unsigned offset = box->z * pt->layer_stride +
169 util_format_get_nblocksy(format, box->y) * pt->stride +
170 util_format_get_stride(format, box->x);
171
172 *transfer = pt;
173
174 return spr->swr.pBaseAddress + offset + spr->mip_offsets[level];
175 }
176
177 static void
178 swr_transfer_flush_region(struct pipe_context *pipe,
179 struct pipe_transfer *transfer,
180 const struct pipe_box *flush_box)
181 {
182 assert(transfer->resource);
183 assert(transfer->usage & PIPE_TRANSFER_WRITE);
184
185 struct swr_resource *spr = swr_resource(transfer->resource);
186 if (!spr->has_depth || !spr->has_stencil)
187 return;
188
189 size_t zbase, sbase;
190 struct pipe_box box = *flush_box;
191 box.x += transfer->box.x;
192 box.y += transfer->box.y;
193 box.z += transfer->box.z;
194 for (int z = box.z; z < box.z + box.depth; z++) {
195 zbase = (z * spr->swr.qpitch + box.y) * spr->swr.pitch +
196 spr->mip_offsets[transfer->level];
197 sbase = (z * spr->secondary.qpitch + box.y) * spr->secondary.pitch +
198 spr->secondary_mip_offsets[transfer->level];
199 for (int y = box.y; y < box.y + box.height; y++) {
200 if (spr->base.format == PIPE_FORMAT_Z24_UNORM_S8_UINT) {
201 for (int x = box.x; x < box.x + box.width; x++)
202 spr->secondary.pBaseAddress[sbase + x] =
203 spr->swr.pBaseAddress[zbase + 4 * x + 3];
204 } else if (spr->base.format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT) {
205 for (int x = box.x; x < box.x + box.width; x++)
206 spr->secondary.pBaseAddress[sbase + x] =
207 spr->swr.pBaseAddress[zbase + 8 * x + 4];
208 }
209 zbase += spr->swr.pitch;
210 sbase += spr->secondary.pitch;
211 }
212 }
213 }
214
215 static void
216 swr_transfer_unmap(struct pipe_context *pipe, struct pipe_transfer *transfer)
217 {
218 assert(transfer->resource);
219
220 struct swr_resource *spr = swr_resource(transfer->resource);
221 /* if we're mapping the depth/stencil, copy in stencil for the section
222 * being written out
223 */
224 if (transfer->usage & PIPE_TRANSFER_WRITE &&
225 !(transfer->usage & PIPE_TRANSFER_FLUSH_EXPLICIT) &&
226 spr->has_depth && spr->has_stencil) {
227 struct pipe_box box;
228 u_box_3d(0, 0, 0, transfer->box.width, transfer->box.height,
229 transfer->box.depth, &box);
230 swr_transfer_flush_region(pipe, transfer, &box);
231 }
232
233 pipe_resource_reference(&transfer->resource, NULL);
234 FREE(transfer);
235 }
236
237
238 static void
239 swr_resource_copy(struct pipe_context *pipe,
240 struct pipe_resource *dst,
241 unsigned dst_level,
242 unsigned dstx,
243 unsigned dsty,
244 unsigned dstz,
245 struct pipe_resource *src,
246 unsigned src_level,
247 const struct pipe_box *src_box)
248 {
249 struct swr_screen *screen = swr_screen(pipe->screen);
250
251 /* If either the src or dst is a renderTarget, store tiles before copy */
252 swr_store_dirty_resource(pipe, src, SWR_TILE_RESOLVED);
253 swr_store_dirty_resource(pipe, dst, SWR_TILE_RESOLVED);
254
255 swr_fence_finish(pipe->screen, NULL, screen->flush_fence, 0);
256 swr_resource_unused(src);
257 swr_resource_unused(dst);
258
259 if ((dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER)
260 || (dst->target != PIPE_BUFFER && src->target != PIPE_BUFFER)) {
261 util_resource_copy_region(
262 pipe, dst, dst_level, dstx, dsty, dstz, src, src_level, src_box);
263 return;
264 }
265
266 debug_printf("unhandled swr_resource_copy\n");
267 }
268
269
270 static void
271 swr_blit(struct pipe_context *pipe, const struct pipe_blit_info *blit_info)
272 {
273 struct swr_context *ctx = swr_context(pipe);
274 struct pipe_blit_info info = *blit_info;
275
276 if (blit_info->render_condition_enable && !swr_check_render_cond(pipe))
277 return;
278
279 if (info.src.resource->nr_samples > 1 && info.dst.resource->nr_samples <= 1
280 && !util_format_is_depth_or_stencil(info.src.resource->format)
281 && !util_format_is_pure_integer(info.src.resource->format)) {
282 debug_printf("swr: color resolve unimplemented\n");
283 return;
284 }
285
286 if (util_try_blit_via_copy_region(pipe, &info)) {
287 return; /* done */
288 }
289
290 if (info.mask & PIPE_MASK_S) {
291 debug_printf("swr: cannot blit stencil, skipping\n");
292 info.mask &= ~PIPE_MASK_S;
293 }
294
295 if (!util_blitter_is_blit_supported(ctx->blitter, &info)) {
296 debug_printf("swr: blit unsupported %s -> %s\n",
297 util_format_short_name(info.src.resource->format),
298 util_format_short_name(info.dst.resource->format));
299 return;
300 }
301
302 if (ctx->active_queries) {
303 SwrEnableStatsFE(ctx->swrContext, FALSE);
304 SwrEnableStatsBE(ctx->swrContext, FALSE);
305 }
306
307 util_blitter_save_vertex_buffer_slot(ctx->blitter, ctx->vertex_buffer);
308 util_blitter_save_vertex_elements(ctx->blitter, (void *)ctx->velems);
309 util_blitter_save_vertex_shader(ctx->blitter, (void *)ctx->vs);
310 /*util_blitter_save_geometry_shader(ctx->blitter, (void*)ctx->gs);*/
311 util_blitter_save_so_targets(
312 ctx->blitter,
313 ctx->num_so_targets,
314 (struct pipe_stream_output_target **)ctx->so_targets);
315 util_blitter_save_rasterizer(ctx->blitter, (void *)ctx->rasterizer);
316 util_blitter_save_viewport(ctx->blitter, &ctx->viewport);
317 util_blitter_save_scissor(ctx->blitter, &ctx->scissor);
318 util_blitter_save_fragment_shader(ctx->blitter, ctx->fs);
319 util_blitter_save_blend(ctx->blitter, (void *)ctx->blend);
320 util_blitter_save_depth_stencil_alpha(ctx->blitter,
321 (void *)ctx->depth_stencil);
322 util_blitter_save_stencil_ref(ctx->blitter, &ctx->stencil_ref);
323 util_blitter_save_sample_mask(ctx->blitter, ctx->sample_mask);
324 util_blitter_save_framebuffer(ctx->blitter, &ctx->framebuffer);
325 util_blitter_save_fragment_sampler_states(
326 ctx->blitter,
327 ctx->num_samplers[PIPE_SHADER_FRAGMENT],
328 (void **)ctx->samplers[PIPE_SHADER_FRAGMENT]);
329 util_blitter_save_fragment_sampler_views(
330 ctx->blitter,
331 ctx->num_sampler_views[PIPE_SHADER_FRAGMENT],
332 ctx->sampler_views[PIPE_SHADER_FRAGMENT]);
333 util_blitter_save_render_condition(ctx->blitter,
334 ctx->render_cond_query,
335 ctx->render_cond_cond,
336 ctx->render_cond_mode);
337
338 util_blitter_blit(ctx->blitter, &info);
339
340 if (ctx->active_queries) {
341 SwrEnableStatsFE(ctx->swrContext, TRUE);
342 SwrEnableStatsBE(ctx->swrContext, TRUE);
343 }
344 }
345
346
347 static void
348 swr_destroy(struct pipe_context *pipe)
349 {
350 struct swr_context *ctx = swr_context(pipe);
351 struct swr_screen *screen = swr_screen(pipe->screen);
352
353 if (ctx->blitter)
354 util_blitter_destroy(ctx->blitter);
355
356 for (unsigned i = 0; i < PIPE_MAX_COLOR_BUFS; i++) {
357 pipe_surface_reference(&ctx->framebuffer.cbufs[i], NULL);
358 }
359
360 pipe_surface_reference(&ctx->framebuffer.zsbuf, NULL);
361
362 for (unsigned i = 0; i < ARRAY_SIZE(ctx->sampler_views[0]); i++) {
363 pipe_sampler_view_reference(&ctx->sampler_views[PIPE_SHADER_FRAGMENT][i], NULL);
364 }
365
366 for (unsigned i = 0; i < ARRAY_SIZE(ctx->sampler_views[0]); i++) {
367 pipe_sampler_view_reference(&ctx->sampler_views[PIPE_SHADER_VERTEX][i], NULL);
368 }
369
370 if (ctx->pipe.stream_uploader)
371 u_upload_destroy(ctx->pipe.stream_uploader);
372
373 /* Idle core after destroying buffer resources, but before deleting
374 * context. Destroying resources has potentially called StoreTiles.*/
375 SwrWaitForIdle(ctx->swrContext);
376
377 if (ctx->swrContext)
378 SwrDestroyContext(ctx->swrContext);
379
380 delete ctx->blendJIT;
381
382 swr_destroy_scratch_buffers(ctx);
383
384 /* Only update screen->pipe if current context is being destroyed */
385 assert(screen);
386 if (screen->pipe == pipe)
387 screen->pipe = NULL;
388
389 FREE(ctx);
390 }
391
392
393 static void
394 swr_render_condition(struct pipe_context *pipe,
395 struct pipe_query *query,
396 boolean condition,
397 uint mode)
398 {
399 struct swr_context *ctx = swr_context(pipe);
400
401 ctx->render_cond_query = query;
402 ctx->render_cond_mode = mode;
403 ctx->render_cond_cond = condition;
404 }
405
406 static void
407 swr_UpdateStats(HANDLE hPrivateContext, const SWR_STATS *pStats)
408 {
409 swr_draw_context *pDC = (swr_draw_context*)hPrivateContext;
410
411 if (!pDC)
412 return;
413
414 struct swr_query_result *pqr = (struct swr_query_result *)pDC->pStats;
415
416 SWR_STATS *pSwrStats = &pqr->core;
417
418 pSwrStats->DepthPassCount += pStats->DepthPassCount;
419 pSwrStats->PsInvocations += pStats->PsInvocations;
420 pSwrStats->CsInvocations += pStats->CsInvocations;
421 }
422
423 static void
424 swr_UpdateStatsFE(HANDLE hPrivateContext, const SWR_STATS_FE *pStats)
425 {
426 swr_draw_context *pDC = (swr_draw_context*)hPrivateContext;
427
428 if (!pDC)
429 return;
430
431 struct swr_query_result *pqr = (struct swr_query_result *)pDC->pStats;
432
433 SWR_STATS_FE *pSwrStats = &pqr->coreFE;
434 p_atomic_add(&pSwrStats->IaVertices, pStats->IaVertices);
435 p_atomic_add(&pSwrStats->IaPrimitives, pStats->IaPrimitives);
436 p_atomic_add(&pSwrStats->VsInvocations, pStats->VsInvocations);
437 p_atomic_add(&pSwrStats->HsInvocations, pStats->HsInvocations);
438 p_atomic_add(&pSwrStats->DsInvocations, pStats->DsInvocations);
439 p_atomic_add(&pSwrStats->GsInvocations, pStats->GsInvocations);
440 p_atomic_add(&pSwrStats->CInvocations, pStats->CInvocations);
441 p_atomic_add(&pSwrStats->CPrimitives, pStats->CPrimitives);
442 p_atomic_add(&pSwrStats->GsPrimitives, pStats->GsPrimitives);
443
444 for (unsigned i = 0; i < 4; i++) {
445 p_atomic_add(&pSwrStats->SoPrimStorageNeeded[i],
446 pStats->SoPrimStorageNeeded[i]);
447 p_atomic_add(&pSwrStats->SoNumPrimsWritten[i],
448 pStats->SoNumPrimsWritten[i]);
449 }
450 }
451
452 struct pipe_context *
453 swr_create_context(struct pipe_screen *p_screen, void *priv, unsigned flags)
454 {
455 struct swr_context *ctx = CALLOC_STRUCT(swr_context);
456 ctx->blendJIT =
457 new std::unordered_map<BLEND_COMPILE_STATE, PFN_BLEND_JIT_FUNC>;
458
459 SWR_CREATECONTEXT_INFO createInfo;
460 memset(&createInfo, 0, sizeof(createInfo));
461 createInfo.privateStateSize = sizeof(swr_draw_context);
462 createInfo.pfnLoadTile = swr_LoadHotTile;
463 createInfo.pfnStoreTile = swr_StoreHotTile;
464 createInfo.pfnClearTile = swr_StoreHotTileClear;
465 createInfo.pfnUpdateStats = swr_UpdateStats;
466 createInfo.pfnUpdateStatsFE = swr_UpdateStatsFE;
467 ctx->swrContext = SwrCreateContext(&createInfo);
468
469 /* Init Load/Store/ClearTiles Tables */
470 swr_InitMemoryModule();
471
472 InitBackendFuncTables();
473
474 if (ctx->swrContext == NULL)
475 goto fail;
476
477 ctx->pipe.screen = p_screen;
478 ctx->pipe.destroy = swr_destroy;
479 ctx->pipe.priv = priv;
480 ctx->pipe.create_surface = swr_create_surface;
481 ctx->pipe.surface_destroy = swr_surface_destroy;
482 ctx->pipe.transfer_map = swr_transfer_map;
483 ctx->pipe.transfer_unmap = swr_transfer_unmap;
484 ctx->pipe.transfer_flush_region = swr_transfer_flush_region;
485
486 ctx->pipe.buffer_subdata = u_default_buffer_subdata;
487 ctx->pipe.texture_subdata = u_default_texture_subdata;
488
489 ctx->pipe.resource_copy_region = swr_resource_copy;
490 ctx->pipe.render_condition = swr_render_condition;
491
492 swr_state_init(&ctx->pipe);
493 swr_clear_init(&ctx->pipe);
494 swr_draw_init(&ctx->pipe);
495 swr_query_init(&ctx->pipe);
496
497 ctx->pipe.stream_uploader = u_upload_create_default(&ctx->pipe);
498 if (!ctx->pipe.stream_uploader)
499 goto fail;
500 ctx->pipe.const_uploader = ctx->pipe.stream_uploader;
501
502 ctx->pipe.blit = swr_blit;
503 ctx->blitter = util_blitter_create(&ctx->pipe);
504 if (!ctx->blitter)
505 goto fail;
506
507 swr_init_scratch_buffers(ctx);
508
509 return &ctx->pipe;
510
511 fail:
512 /* Should really validate the init steps and fail gracefully */
513 swr_destroy(&ctx->pipe);
514 return NULL;
515 }