src/gallium/drivers/swr/swr_context.cpp

   1 /****************************************************************************
   2  * Copyright (C) 2015 Intel Corporation.   All Rights Reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  ***************************************************************************/
  23
  24 #include "swr_context.h"
  25 #include "swr_memory.h"
  26 #include "swr_screen.h"
  27 #include "swr_resource.h"
  28 #include "swr_scratch.h"
  29 #include "swr_query.h"
  30 #include "swr_fence.h"
  31
  32 #include "util/u_memory.h"
  33 #include "util/u_inlines.h"
  34 #include "util/u_format.h"
  35 #include "util/u_atomic.h"
  36 #include "util/u_upload_mgr.h"
  37
  38 extern "C" {
  39 #include "util/u_transfer.h"
  40 #include "util/u_surface.h"
  41 }
  42
  43 #include "api.h"
  44 #include "backend.h"
  45
  46 static struct pipe_surface *
  47 swr_create_surface(struct pipe_context *pipe,
  48                    struct pipe_resource *pt,
  49                    const struct pipe_surface *surf_tmpl)
  50 {
  51    struct pipe_surface *ps;
  52
  53    ps = CALLOC_STRUCT(pipe_surface);
  54    if (ps) {
  55       pipe_reference_init(&ps->reference, 1);
  56       pipe_resource_reference(&ps->texture, pt);
  57       ps->context = pipe;
  58       ps->format = surf_tmpl->format;
  59       if (pt->target != PIPE_BUFFER) {
  60          assert(surf_tmpl->u.tex.level <= pt->last_level);
  61          ps->width = u_minify(pt->width0, surf_tmpl->u.tex.level);
  62          ps->height = u_minify(pt->height0, surf_tmpl->u.tex.level);
  63          ps->u.tex.level = surf_tmpl->u.tex.level;
  64          ps->u.tex.first_layer = surf_tmpl->u.tex.first_layer;
  65          ps->u.tex.last_layer = surf_tmpl->u.tex.last_layer;
  66       } else {
  67          /* setting width as number of elements should get us correct
  68           * renderbuffer width */
  69          ps->width = surf_tmpl->u.buf.last_element
  70             - surf_tmpl->u.buf.first_element + 1;
  71          ps->height = pt->height0;
  72          ps->u.buf.first_element = surf_tmpl->u.buf.first_element;
  73          ps->u.buf.last_element = surf_tmpl->u.buf.last_element;
  74          assert(ps->u.buf.first_element <= ps->u.buf.last_element);
  75          assert(ps->u.buf.last_element < ps->width);
  76       }
  77    }
  78    return ps;
  79 }
  80
  81 static void
  82 swr_surface_destroy(struct pipe_context *pipe, struct pipe_surface *surf)
  83 {
  84    assert(surf->texture);
  85    struct pipe_resource *resource = surf->texture;
  86
  87    /* If the resource has been drawn to, store tiles. */
  88    swr_store_dirty_resource(pipe, resource, SWR_TILE_RESOLVED);
  89
  90    pipe_resource_reference(&resource, NULL);
  91    FREE(surf);
  92 }
  93
  94
  95 static void *
  96 swr_transfer_map(struct pipe_context *pipe,
  97                  struct pipe_resource *resource,
  98                  unsigned level,
  99                  unsigned usage,
 100                  const struct pipe_box *box,
 101                  struct pipe_transfer **transfer)
 102 {
 103    struct swr_screen *screen = swr_screen(pipe->screen);
 104    struct swr_resource *spr = swr_resource(resource);
 105    struct pipe_transfer *pt;
 106    enum pipe_format format = resource->format;
 107
 108    assert(resource);
 109    assert(level <= resource->last_level);
 110
 111    /* If mapping an attached rendertarget, store tiles to surface and set
 112     * postStoreTileState to SWR_TILE_INVALID so tiles get reloaded on next use
 113     * and nothing needs to be done at unmap. */
 114    swr_store_dirty_resource(pipe, resource, SWR_TILE_INVALID);
 115
 116    if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
 117       /* If resource is in use, finish fence before mapping.
 118        * Unless requested not to block, then if not done return NULL map */
 119       if (usage & PIPE_TRANSFER_DONTBLOCK) {
 120          if (swr_is_fence_pending(screen->flush_fence))
 121             return NULL;
 122       } else {
 123          if (spr->status) {
 124             /* But, if there's no fence pending, submit one.
 125              * XXX: Remove once draw timestamps are finished. */
 126             if (!swr_is_fence_pending(screen->flush_fence))
 127                swr_fence_submit(swr_context(pipe), screen->flush_fence);
 128
 129             swr_fence_finish(pipe->screen, NULL, screen->flush_fence, 0);
 130             swr_resource_unused(resource);
 131          }
 132       }
 133    }
 134
 135    pt = CALLOC_STRUCT(pipe_transfer);
 136    if (!pt)
 137       return NULL;
 138    pipe_resource_reference(&pt->resource, resource);
 139    pt->usage = (pipe_transfer_usage)usage;
 140    pt->level = level;
 141    pt->box = *box;
 142    pt->stride = spr->swr.pitch;
 143    pt->layer_stride = spr->swr.qpitch * spr->swr.pitch;
 144
 145    /* if we're mapping the depth/stencil, copy in stencil for the section
 146     * being read in
 147     */
 148    if (usage & PIPE_TRANSFER_READ && spr->has_depth && spr->has_stencil) {
 149       size_t zbase, sbase;
 150       for (int z = box->z; z < box->z + box->depth; z++) {
 151          zbase = (z * spr->swr.qpitch + box->y) * spr->swr.pitch +
 152             spr->mip_offsets[level];
 153          sbase = (z * spr->secondary.qpitch + box->y) * spr->secondary.pitch +
 154             spr->secondary_mip_offsets[level];
 155          for (int y = box->y; y < box->y + box->height; y++) {
 156             if (spr->base.format == PIPE_FORMAT_Z24_UNORM_S8_UINT) {
 157                for (int x = box->x; x < box->x + box->width; x++)
 158                   spr->swr.pBaseAddress[zbase + 4 * x + 3] =
 159                      spr->secondary.pBaseAddress[sbase + x];
 160             } else if (spr->base.format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT) {
 161                for (int x = box->x; x < box->x + box->width; x++)
 162                   spr->swr.pBaseAddress[zbase + 8 * x + 4] =
 163                      spr->secondary.pBaseAddress[sbase + x];
 164             }
 165             zbase += spr->swr.pitch;
 166             sbase += spr->secondary.pitch;
 167          }
 168       }
 169    }
 170
 171    unsigned offset = box->z * pt->layer_stride +
 172       util_format_get_nblocksy(format, box->y) * pt->stride +
 173       util_format_get_stride(format, box->x);
 174
 175    *transfer = pt;
 176
 177    return spr->swr.pBaseAddress + offset + spr->mip_offsets[level];
 178 }
 179
 180 static void
 181 swr_transfer_flush_region(struct pipe_context *pipe,
 182                           struct pipe_transfer *transfer,
 183                           const struct pipe_box *flush_box)
 184 {
 185    assert(transfer->resource);
 186    assert(transfer->usage & PIPE_TRANSFER_WRITE);
 187
 188    struct swr_resource *spr = swr_resource(transfer->resource);
 189    if (!spr->has_depth || !spr->has_stencil)
 190       return;
 191
 192    size_t zbase, sbase;
 193    struct pipe_box box = *flush_box;
 194    box.x += transfer->box.x;
 195    box.y += transfer->box.y;
 196    box.z += transfer->box.z;
 197    for (int z = box.z; z < box.z + box.depth; z++) {
 198       zbase = (z * spr->swr.qpitch + box.y) * spr->swr.pitch +
 199          spr->mip_offsets[transfer->level];
 200       sbase = (z * spr->secondary.qpitch + box.y) * spr->secondary.pitch +
 201          spr->secondary_mip_offsets[transfer->level];
 202       for (int y = box.y; y < box.y + box.height; y++) {
 203          if (spr->base.format == PIPE_FORMAT_Z24_UNORM_S8_UINT) {
 204             for (int x = box.x; x < box.x + box.width; x++)
 205                spr->secondary.pBaseAddress[sbase + x] =
 206                   spr->swr.pBaseAddress[zbase + 4 * x + 3];
 207          } else if (spr->base.format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT) {
 208             for (int x = box.x; x < box.x + box.width; x++)
 209                spr->secondary.pBaseAddress[sbase + x] =
 210                   spr->swr.pBaseAddress[zbase + 8 * x + 4];
 211          }
 212          zbase += spr->swr.pitch;
 213          sbase += spr->secondary.pitch;
 214       }
 215    }
 216 }
 217
 218 static void
 219 swr_transfer_unmap(struct pipe_context *pipe, struct pipe_transfer *transfer)
 220 {
 221    assert(transfer->resource);
 222
 223    struct swr_resource *spr = swr_resource(transfer->resource);
 224    /* if we're mapping the depth/stencil, copy in stencil for the section
 225     * being written out
 226     */
 227    if (transfer->usage & PIPE_TRANSFER_WRITE &&
 228        !(transfer->usage & PIPE_TRANSFER_FLUSH_EXPLICIT) &&
 229        spr->has_depth && spr->has_stencil) {
 230       struct pipe_box box;
 231       u_box_3d(0, 0, 0, transfer->box.width, transfer->box.height,
 232                transfer->box.depth, &box);
 233       swr_transfer_flush_region(pipe, transfer, &box);
 234    }
 235
 236    pipe_resource_reference(&transfer->resource, NULL);
 237    FREE(transfer);
 238 }
 239
 240
 241 static void
 242 swr_resource_copy(struct pipe_context *pipe,
 243                   struct pipe_resource *dst,
 244                   unsigned dst_level,
 245                   unsigned dstx,
 246                   unsigned dsty,
 247                   unsigned dstz,
 248                   struct pipe_resource *src,
 249                   unsigned src_level,
 250                   const struct pipe_box *src_box)
 251 {
 252    struct swr_screen *screen = swr_screen(pipe->screen);
 253
 254    /* If either the src or dst is a renderTarget, store tiles before copy */
 255    swr_store_dirty_resource(pipe, src, SWR_TILE_RESOLVED);
 256    swr_store_dirty_resource(pipe, dst, SWR_TILE_RESOLVED);
 257
 258    swr_fence_finish(pipe->screen, NULL, screen->flush_fence, 0);
 259    swr_resource_unused(src);
 260    swr_resource_unused(dst);
 261
 262    if ((dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER)
 263        || (dst->target != PIPE_BUFFER && src->target != PIPE_BUFFER)) {
 264       util_resource_copy_region(
 265          pipe, dst, dst_level, dstx, dsty, dstz, src, src_level, src_box);
 266       return;
 267    }
 268
 269    debug_printf("unhandled swr_resource_copy\n");
 270 }
 271
 272
 273 static void
 274 swr_blit(struct pipe_context *pipe, const struct pipe_blit_info *blit_info)
 275 {
 276    struct swr_context *ctx = swr_context(pipe);
 277    struct pipe_blit_info info = *blit_info;
 278
 279    if (blit_info->render_condition_enable && !swr_check_render_cond(pipe))
 280       return;
 281
 282    if (info.src.resource->nr_samples > 1 && info.dst.resource->nr_samples <= 1
 283        && !util_format_is_depth_or_stencil(info.src.resource->format)
 284        && !util_format_is_pure_integer(info.src.resource->format)) {
 285       debug_printf("swr: color resolve unimplemented\n");
 286       return;
 287    }
 288
 289    if (util_try_blit_via_copy_region(pipe, &info)) {
 290       return; /* done */
 291    }
 292
 293    if (info.mask & PIPE_MASK_S) {
 294       debug_printf("swr: cannot blit stencil, skipping\n");
 295       info.mask &= ~PIPE_MASK_S;
 296    }
 297
 298    if (!util_blitter_is_blit_supported(ctx->blitter, &info)) {
 299       debug_printf("swr: blit unsupported %s -> %s\n",
 300                    util_format_short_name(info.src.resource->format),
 301                    util_format_short_name(info.dst.resource->format));
 302       return;
 303    }
 304
 305    if (ctx->active_queries) {
 306       SwrEnableStatsFE(ctx->swrContext, FALSE);
 307       SwrEnableStatsBE(ctx->swrContext, FALSE);
 308    }
 309
 310    util_blitter_save_vertex_buffer_slot(ctx->blitter, ctx->vertex_buffer);
 311    util_blitter_save_vertex_elements(ctx->blitter, (void *)ctx->velems);
 312    util_blitter_save_vertex_shader(ctx->blitter, (void *)ctx->vs);
 313    /*util_blitter_save_geometry_shader(ctx->blitter, (void*)ctx->gs);*/
 314    util_blitter_save_so_targets(
 315       ctx->blitter,
 316       ctx->num_so_targets,
 317       (struct pipe_stream_output_target **)ctx->so_targets);
 318    util_blitter_save_rasterizer(ctx->blitter, (void *)ctx->rasterizer);
 319    util_blitter_save_viewport(ctx->blitter, &ctx->viewport);
 320    util_blitter_save_scissor(ctx->blitter, &ctx->scissor);
 321    util_blitter_save_fragment_shader(ctx->blitter, ctx->fs);
 322    util_blitter_save_blend(ctx->blitter, (void *)ctx->blend);
 323    util_blitter_save_depth_stencil_alpha(ctx->blitter,
 324                                          (void *)ctx->depth_stencil);
 325    util_blitter_save_stencil_ref(ctx->blitter, &ctx->stencil_ref);
 326    util_blitter_save_sample_mask(ctx->blitter, ctx->sample_mask);
 327    util_blitter_save_framebuffer(ctx->blitter, &ctx->framebuffer);
 328    util_blitter_save_fragment_sampler_states(
 329       ctx->blitter,
 330       ctx->num_samplers[PIPE_SHADER_FRAGMENT],
 331       (void **)ctx->samplers[PIPE_SHADER_FRAGMENT]);
 332    util_blitter_save_fragment_sampler_views(
 333       ctx->blitter,
 334       ctx->num_sampler_views[PIPE_SHADER_FRAGMENT],
 335       ctx->sampler_views[PIPE_SHADER_FRAGMENT]);
 336    util_blitter_save_render_condition(ctx->blitter,
 337                                       ctx->render_cond_query,
 338                                       ctx->render_cond_cond,
 339                                       ctx->render_cond_mode);
 340
 341    util_blitter_blit(ctx->blitter, &info);
 342
 343    if (ctx->active_queries) {
 344       SwrEnableStatsFE(ctx->swrContext, TRUE);
 345       SwrEnableStatsBE(ctx->swrContext, TRUE);
 346    }
 347 }
 348
 349
 350 static void
 351 swr_destroy(struct pipe_context *pipe)
 352 {
 353    struct swr_context *ctx = swr_context(pipe);
 354    struct swr_screen *screen = swr_screen(pipe->screen);
 355
 356    if (ctx->blitter)
 357       util_blitter_destroy(ctx->blitter);
 358
 359    for (unsigned i = 0; i < PIPE_MAX_COLOR_BUFS; i++) {
 360       pipe_surface_reference(&ctx->framebuffer.cbufs[i], NULL);
 361    }
 362
 363    pipe_surface_reference(&ctx->framebuffer.zsbuf, NULL);
 364
 365    for (unsigned i = 0; i < ARRAY_SIZE(ctx->sampler_views[0]); i++) {
 366       pipe_sampler_view_reference(&ctx->sampler_views[PIPE_SHADER_FRAGMENT][i], NULL);
 367    }
 368
 369    for (unsigned i = 0; i < ARRAY_SIZE(ctx->sampler_views[0]); i++) {
 370       pipe_sampler_view_reference(&ctx->sampler_views[PIPE_SHADER_VERTEX][i], NULL);
 371    }
 372
 373    if (ctx->pipe.stream_uploader)
 374       u_upload_destroy(ctx->pipe.stream_uploader);
 375
 376    /* Idle core after destroying buffer resources, but before deleting
 377     * context.  Destroying resources has potentially called StoreTiles.*/
 378    SwrWaitForIdle(ctx->swrContext);
 379
 380    if (ctx->swrContext)
 381       SwrDestroyContext(ctx->swrContext);
 382
 383    delete ctx->blendJIT;
 384
 385    swr_destroy_scratch_buffers(ctx);
 386
 387    /* Only update screen->pipe if current context is being destroyed */
 388    assert(screen);
 389    if (screen->pipe == pipe)
 390       screen->pipe = NULL;
 391
 392    FREE(ctx);
 393 }
 394
 395
 396 static void
 397 swr_render_condition(struct pipe_context *pipe,
 398                      struct pipe_query *query,
 399                      boolean condition,
 400                      uint mode)
 401 {
 402    struct swr_context *ctx = swr_context(pipe);
 403
 404    ctx->render_cond_query = query;
 405    ctx->render_cond_mode = mode;
 406    ctx->render_cond_cond = condition;
 407 }
 408
 409 static void
 410 swr_UpdateStats(HANDLE hPrivateContext, const SWR_STATS *pStats)
 411 {
 412    swr_draw_context *pDC = (swr_draw_context*)hPrivateContext;
 413
 414    if (!pDC)
 415       return;
 416
 417    struct swr_query_result *pqr = (struct swr_query_result *)pDC->pStats;
 418
 419    SWR_STATS *pSwrStats = &pqr->core;
 420
 421    pSwrStats->DepthPassCount += pStats->DepthPassCount;
 422    pSwrStats->PsInvocations += pStats->PsInvocations;
 423    pSwrStats->CsInvocations += pStats->CsInvocations;
 424 }
 425
 426 static void
 427 swr_UpdateStatsFE(HANDLE hPrivateContext, const SWR_STATS_FE *pStats)
 428 {
 429    swr_draw_context *pDC = (swr_draw_context*)hPrivateContext;
 430
 431    if (!pDC)
 432       return;
 433
 434    struct swr_query_result *pqr = (struct swr_query_result *)pDC->pStats;
 435
 436    SWR_STATS_FE *pSwrStats = &pqr->coreFE;
 437    p_atomic_add(&pSwrStats->IaVertices, pStats->IaVertices);
 438    p_atomic_add(&pSwrStats->IaPrimitives, pStats->IaPrimitives);
 439    p_atomic_add(&pSwrStats->VsInvocations, pStats->VsInvocations);
 440    p_atomic_add(&pSwrStats->HsInvocations, pStats->HsInvocations);
 441    p_atomic_add(&pSwrStats->DsInvocations, pStats->DsInvocations);
 442    p_atomic_add(&pSwrStats->GsInvocations, pStats->GsInvocations);
 443    p_atomic_add(&pSwrStats->CInvocations, pStats->CInvocations);
 444    p_atomic_add(&pSwrStats->CPrimitives, pStats->CPrimitives);
 445    p_atomic_add(&pSwrStats->GsPrimitives, pStats->GsPrimitives);
 446
 447    for (unsigned i = 0; i < 4; i++) {
 448       p_atomic_add(&pSwrStats->SoPrimStorageNeeded[i],
 449             pStats->SoPrimStorageNeeded[i]);
 450       p_atomic_add(&pSwrStats->SoNumPrimsWritten[i],
 451             pStats->SoNumPrimsWritten[i]);
 452    }
 453 }
 454
 455 struct pipe_context *
 456 swr_create_context(struct pipe_screen *p_screen, void *priv, unsigned flags)
 457 {
 458    struct swr_context *ctx = CALLOC_STRUCT(swr_context);
 459    ctx->blendJIT =
 460       new std::unordered_map<BLEND_COMPILE_STATE, PFN_BLEND_JIT_FUNC>;
 461
 462    SWR_CREATECONTEXT_INFO createInfo;
 463    memset(&createInfo, 0, sizeof(createInfo));
 464    createInfo.privateStateSize = sizeof(swr_draw_context);
 465    createInfo.pfnLoadTile = swr_LoadHotTile;
 466    createInfo.pfnStoreTile = swr_StoreHotTile;
 467    createInfo.pfnClearTile = swr_StoreHotTileClear;
 468    createInfo.pfnUpdateStats = swr_UpdateStats;
 469    createInfo.pfnUpdateStatsFE = swr_UpdateStatsFE;
 470    ctx->swrContext = SwrCreateContext(&createInfo);
 471
 472    /* Init Load/Store/ClearTiles Tables */
 473    swr_InitMemoryModule();
 474
 475    InitBackendFuncTables();
 476
 477    if (ctx->swrContext == NULL)
 478       goto fail;
 479
 480    ctx->pipe.screen = p_screen;
 481    ctx->pipe.destroy = swr_destroy;
 482    ctx->pipe.priv = priv;
 483    ctx->pipe.create_surface = swr_create_surface;
 484    ctx->pipe.surface_destroy = swr_surface_destroy;
 485    ctx->pipe.transfer_map = swr_transfer_map;
 486    ctx->pipe.transfer_unmap = swr_transfer_unmap;
 487    ctx->pipe.transfer_flush_region = swr_transfer_flush_region;
 488
 489    ctx->pipe.buffer_subdata = u_default_buffer_subdata;
 490    ctx->pipe.texture_subdata = u_default_texture_subdata;
 491
 492    ctx->pipe.resource_copy_region = swr_resource_copy;
 493    ctx->pipe.render_condition = swr_render_condition;
 494
 495    swr_state_init(&ctx->pipe);
 496    swr_clear_init(&ctx->pipe);
 497    swr_draw_init(&ctx->pipe);
 498    swr_query_init(&ctx->pipe);
 499
 500    ctx->pipe.stream_uploader = u_upload_create_default(&ctx->pipe);
 501    if (!ctx->pipe.stream_uploader)
 502       goto fail;
 503    ctx->pipe.const_uploader = ctx->pipe.stream_uploader;
 504
 505    ctx->pipe.blit = swr_blit;
 506    ctx->blitter = util_blitter_create(&ctx->pipe);
 507    if (!ctx->blitter)
 508       goto fail;
 509
 510    swr_init_scratch_buffers(ctx);
 511
 512    return &ctx->pipe;
 513
 514 fail:
 515    /* Should really validate the init steps and fail gracefully */
 516    swr_destroy(&ctx->pipe);
 517    return NULL;
 518 }