swr: handle pci cap requests
[mesa.git] / src / gallium / drivers / swr / swr_screen.cpp
1 /****************************************************************************
2 * Copyright (C) 2015 Intel Corporation. All Rights Reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 ***************************************************************************/
23
24 #include "pipe/p_screen.h"
25 #include "pipe/p_defines.h"
26 #include "util/u_memory.h"
27 #include "util/u_format.h"
28 #include "util/u_inlines.h"
29 #include "util/u_cpu_detect.h"
30
31 #include "state_tracker/sw_winsys.h"
32
33 extern "C" {
34 #include "gallivm/lp_bld_limits.h"
35 }
36
37 #include "swr_public.h"
38 #include "swr_screen.h"
39 #include "swr_context.h"
40 #include "swr_resource.h"
41 #include "swr_fence.h"
42 #include "gen_knobs.h"
43
44 #include "jit_api.h"
45
46 #include <stdio.h>
47
48 /* MSVC case instensitive compare */
49 #if defined(PIPE_CC_MSVC)
50 #define strcasecmp lstrcmpiA
51 #endif
52
53 /*
54 * Max texture sizes
55 * XXX Check max texture size values against core and sampler.
56 */
57 #define SWR_MAX_TEXTURE_SIZE (4 * 1048 * 1048 * 1024ULL) /* 4GB */
58 #define SWR_MAX_TEXTURE_2D_LEVELS 14 /* 8K x 8K for now */
59 #define SWR_MAX_TEXTURE_3D_LEVELS 12 /* 2K x 2K x 2K for now */
60 #define SWR_MAX_TEXTURE_CUBE_LEVELS 14 /* 8K x 8K for now */
61 #define SWR_MAX_TEXTURE_ARRAY_LAYERS 512 /* 8K x 512 / 8K x 8K x 512 */
62
63 static const char *
64 swr_get_name(struct pipe_screen *screen)
65 {
66 return "SWR";
67 }
68
69 static const char *
70 swr_get_vendor(struct pipe_screen *screen)
71 {
72 return "Intel Corporation";
73 }
74
75 static boolean
76 swr_is_format_supported(struct pipe_screen *screen,
77 enum pipe_format format,
78 enum pipe_texture_target target,
79 unsigned sample_count,
80 unsigned bind)
81 {
82 struct sw_winsys *winsys = swr_screen(screen)->winsys;
83 const struct util_format_description *format_desc;
84
85 assert(target == PIPE_BUFFER || target == PIPE_TEXTURE_1D
86 || target == PIPE_TEXTURE_1D_ARRAY
87 || target == PIPE_TEXTURE_2D
88 || target == PIPE_TEXTURE_2D_ARRAY
89 || target == PIPE_TEXTURE_RECT
90 || target == PIPE_TEXTURE_3D
91 || target == PIPE_TEXTURE_CUBE
92 || target == PIPE_TEXTURE_CUBE_ARRAY);
93
94 format_desc = util_format_description(format);
95 if (!format_desc)
96 return FALSE;
97
98 if (sample_count > 1)
99 return FALSE;
100
101 if (bind
102 & (PIPE_BIND_DISPLAY_TARGET | PIPE_BIND_SCANOUT | PIPE_BIND_SHARED)) {
103 if (!winsys->is_displaytarget_format_supported(winsys, bind, format))
104 return FALSE;
105 }
106
107 if (bind & PIPE_BIND_RENDER_TARGET) {
108 if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)
109 return FALSE;
110
111 if (mesa_to_swr_format(format) == (SWR_FORMAT)-1)
112 return FALSE;
113
114 /*
115 * Although possible, it is unnatural to render into compressed or YUV
116 * surfaces. So disable these here to avoid going into weird paths
117 * inside the state trackers.
118 */
119 if (format_desc->block.width != 1 || format_desc->block.height != 1)
120 return FALSE;
121 }
122
123 if (bind & PIPE_BIND_DEPTH_STENCIL) {
124 if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
125 return FALSE;
126
127 if (mesa_to_swr_format(format) == (SWR_FORMAT)-1)
128 return FALSE;
129 }
130
131 return TRUE;
132 }
133
134 static int
135 swr_get_param(struct pipe_screen *screen, enum pipe_cap param)
136 {
137 switch (param) {
138 case PIPE_CAP_NPOT_TEXTURES:
139 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
140 return 1;
141 case PIPE_CAP_TWO_SIDED_STENCIL:
142 return 1;
143 case PIPE_CAP_SM3:
144 return 1;
145 case PIPE_CAP_ANISOTROPIC_FILTER:
146 return 0;
147 case PIPE_CAP_POINT_SPRITE:
148 return 1;
149 case PIPE_CAP_MAX_RENDER_TARGETS:
150 return PIPE_MAX_COLOR_BUFS;
151 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
152 return 1;
153 case PIPE_CAP_OCCLUSION_QUERY:
154 case PIPE_CAP_QUERY_TIME_ELAPSED:
155 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
156 return 1;
157 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
158 return 1;
159 case PIPE_CAP_TEXTURE_SHADOW_MAP:
160 return 1;
161 case PIPE_CAP_TEXTURE_SWIZZLE:
162 return 1;
163 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
164 return 0;
165 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
166 return SWR_MAX_TEXTURE_2D_LEVELS;
167 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
168 return SWR_MAX_TEXTURE_3D_LEVELS;
169 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
170 return SWR_MAX_TEXTURE_CUBE_LEVELS;
171 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
172 return 1;
173 case PIPE_CAP_INDEP_BLEND_ENABLE:
174 return 1;
175 case PIPE_CAP_INDEP_BLEND_FUNC:
176 return 1;
177 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
178 return 0; // Don't support lower left frag coord.
179 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
180 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
181 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
182 return 1;
183 case PIPE_CAP_DEPTH_CLIP_DISABLE:
184 return 1;
185 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
186 return MAX_SO_STREAMS;
187 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
188 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
189 return MAX_ATTRIBUTES;
190 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
191 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
192 return 1024;
193 case PIPE_CAP_MAX_VERTEX_STREAMS:
194 return 1;
195 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
196 return 2048;
197 case PIPE_CAP_PRIMITIVE_RESTART:
198 return 1;
199 case PIPE_CAP_SHADER_STENCIL_EXPORT:
200 return 1;
201 case PIPE_CAP_TGSI_INSTANCEID:
202 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
203 case PIPE_CAP_START_INSTANCE:
204 return 1;
205 case PIPE_CAP_SEAMLESS_CUBE_MAP:
206 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
207 return 1;
208 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
209 return SWR_MAX_TEXTURE_ARRAY_LAYERS;
210 case PIPE_CAP_MIN_TEXEL_OFFSET:
211 return -8;
212 case PIPE_CAP_MAX_TEXEL_OFFSET:
213 return 7;
214 case PIPE_CAP_CONDITIONAL_RENDER:
215 return 1;
216 case PIPE_CAP_TEXTURE_BARRIER:
217 return 0;
218 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
219 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED: /* draw module */
220 case PIPE_CAP_VERTEX_COLOR_CLAMPED: /* draw module */
221 return 1;
222 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
223 return 1;
224 case PIPE_CAP_GLSL_FEATURE_LEVEL:
225 return 330;
226 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
227 return 0;
228 case PIPE_CAP_COMPUTE:
229 return 0;
230 case PIPE_CAP_USER_VERTEX_BUFFERS:
231 case PIPE_CAP_USER_INDEX_BUFFERS:
232 case PIPE_CAP_USER_CONSTANT_BUFFERS:
233 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
234 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
235 return 1;
236 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
237 return 16;
238 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
239 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
240 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
241 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
242 case PIPE_CAP_TEXTURE_MULTISAMPLE:
243 return 0;
244 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
245 return 64;
246 case PIPE_CAP_QUERY_TIMESTAMP:
247 return 1;
248 case PIPE_CAP_CUBE_MAP_ARRAY:
249 return 0;
250 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
251 return 1;
252 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
253 return 65536;
254 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
255 return 0;
256 case PIPE_CAP_TGSI_TEXCOORD:
257 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
258 return 0;
259 case PIPE_CAP_MAX_VIEWPORTS:
260 return 1;
261 case PIPE_CAP_ENDIANNESS:
262 return PIPE_ENDIAN_NATIVE;
263 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
264 case PIPE_CAP_TEXTURE_GATHER_SM5:
265 return 0;
266 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
267 return 1;
268 case PIPE_CAP_TEXTURE_QUERY_LOD:
269 case PIPE_CAP_SAMPLE_SHADING:
270 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
271 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
272 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
273 case PIPE_CAP_SAMPLER_VIEW_TARGET:
274 return 0;
275 case PIPE_CAP_FAKE_SW_MSAA:
276 return 1;
277 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
278 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
279 return 0;
280 case PIPE_CAP_DRAW_INDIRECT:
281 return 1;
282
283 case PIPE_CAP_VENDOR_ID:
284 return 0xFFFFFFFF;
285 case PIPE_CAP_DEVICE_ID:
286 return 0xFFFFFFFF;
287 case PIPE_CAP_ACCELERATED:
288 return 0;
289 case PIPE_CAP_VIDEO_MEMORY: {
290 /* XXX: Do we want to return the full amount of system memory ? */
291 uint64_t system_memory;
292
293 if (!os_get_total_physical_memory(&system_memory))
294 return 0;
295
296 return (int)(system_memory >> 20);
297 }
298 case PIPE_CAP_UMA:
299 return 1;
300 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
301 return 1;
302 case PIPE_CAP_CLIP_HALFZ:
303 return 1;
304 case PIPE_CAP_VERTEXID_NOBASE:
305 return 0;
306 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
307 return 1;
308 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
309 return 0;
310 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
311 return 0; // xxx
312 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
313 return 0;
314 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
315 return 0;
316 case PIPE_CAP_DEPTH_BOUNDS_TEST:
317 return 0; // xxx
318 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
319 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
320 return 1;
321 case PIPE_CAP_TGSI_TXQS:
322 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
323 case PIPE_CAP_SHAREABLE_SHADERS:
324 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
325 case PIPE_CAP_CLEAR_TEXTURE:
326 case PIPE_CAP_DRAW_PARAMETERS:
327 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
328 case PIPE_CAP_MULTI_DRAW_INDIRECT:
329 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
330 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
331 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
332 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
333 case PIPE_CAP_INVALIDATE_BUFFER:
334 case PIPE_CAP_GENERATE_MIPMAP:
335 case PIPE_CAP_STRING_MARKER:
336 case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
337 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
338 case PIPE_CAP_QUERY_BUFFER_OBJECT:
339 case PIPE_CAP_QUERY_MEMORY_INFO:
340 case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
341 case PIPE_CAP_PCI_GROUP:
342 case PIPE_CAP_PCI_BUS:
343 case PIPE_CAP_PCI_DEVICE:
344 case PIPE_CAP_PCI_FUNCTION:
345 return 0;
346 }
347
348 /* should only get here on unhandled cases */
349 debug_printf("Unexpected PIPE_CAP %d query\n", param);
350 return 0;
351 }
352
353 static int
354 swr_get_shader_param(struct pipe_screen *screen,
355 unsigned shader,
356 enum pipe_shader_cap param)
357 {
358 if (shader == PIPE_SHADER_VERTEX || shader == PIPE_SHADER_FRAGMENT)
359 return gallivm_get_shader_param(param);
360
361 // Todo: geometry, tesselation, compute
362 return 0;
363 }
364
365
366 static float
367 swr_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
368 {
369 switch (param) {
370 case PIPE_CAPF_MAX_LINE_WIDTH:
371 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
372 case PIPE_CAPF_MAX_POINT_WIDTH:
373 return 255.0; /* arbitrary */
374 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
375 return 0.0;
376 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
377 return 0.0;
378 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
379 return 0.0;
380 case PIPE_CAPF_GUARD_BAND_LEFT:
381 case PIPE_CAPF_GUARD_BAND_TOP:
382 case PIPE_CAPF_GUARD_BAND_RIGHT:
383 case PIPE_CAPF_GUARD_BAND_BOTTOM:
384 return 0.0;
385 }
386 /* should only get here on unhandled cases */
387 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
388 return 0.0;
389 }
390
391 SWR_FORMAT
392 mesa_to_swr_format(enum pipe_format format)
393 {
394 const struct util_format_description *format_desc =
395 util_format_description(format);
396 if (!format_desc)
397 return (SWR_FORMAT)-1;
398
399 // more robust check would be comparing all attributes of the formats
400 // luckily format names are mostly standardized
401 for (int i = 0; i < NUM_SWR_FORMATS; i++) {
402 const SWR_FORMAT_INFO &swr_desc = GetFormatInfo((SWR_FORMAT)i);
403
404 if (!strcasecmp(format_desc->short_name, swr_desc.name))
405 return (SWR_FORMAT)i;
406 }
407
408 // ... with some exceptions
409 switch (format) {
410 case PIPE_FORMAT_R8G8B8A8_SRGB:
411 return R8G8B8A8_UNORM_SRGB;
412 case PIPE_FORMAT_B8G8R8A8_SRGB:
413 return B8G8R8A8_UNORM_SRGB;
414 case PIPE_FORMAT_I8_UNORM:
415 return R8_UNORM;
416 case PIPE_FORMAT_Z16_UNORM:
417 return R16_UNORM;
418 case PIPE_FORMAT_Z24X8_UNORM:
419 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
420 return R24_UNORM_X8_TYPELESS;
421 case PIPE_FORMAT_Z32_FLOAT:
422 return R32_FLOAT;
423 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
424 return R32_FLOAT_X8X24_TYPELESS;
425 case PIPE_FORMAT_L8A8_UNORM:
426 return R8G8_UNORM;
427 default:
428 break;
429 }
430
431 debug_printf("asked to convert unsupported format %s\n",
432 format_desc->name);
433 return (SWR_FORMAT)-1;
434 }
435
436 static boolean
437 swr_displaytarget_layout(struct swr_screen *screen, struct swr_resource *res)
438 {
439 struct sw_winsys *winsys = screen->winsys;
440 struct sw_displaytarget *dt;
441
442 UINT stride;
443 dt = winsys->displaytarget_create(winsys,
444 res->base.bind,
445 res->base.format,
446 res->alignedWidth,
447 res->alignedHeight,
448 64, NULL,
449 &stride);
450
451 if (dt == NULL)
452 return FALSE;
453
454 void *map = winsys->displaytarget_map(winsys, dt, 0);
455
456 res->display_target = dt;
457 res->swr.pBaseAddress = (uint8_t*) map;
458
459 /* Clear the display target surface */
460 if (map)
461 memset(map, 0, res->alignedHeight * stride);
462
463 winsys->displaytarget_unmap(winsys, dt);
464
465 return TRUE;
466 }
467
468 static boolean
469 swr_texture_layout(struct swr_screen *screen,
470 struct swr_resource *res,
471 boolean allocate)
472 {
473 struct pipe_resource *pt = &res->base;
474
475 pipe_format fmt = pt->format;
476 const struct util_format_description *desc = util_format_description(fmt);
477
478 res->has_depth = util_format_has_depth(desc);
479 res->has_stencil = util_format_has_stencil(desc);
480
481 if (res->has_stencil && !res->has_depth)
482 fmt = PIPE_FORMAT_R8_UINT;
483
484 res->swr.width = pt->width0;
485 res->swr.height = pt->height0;
486 res->swr.depth = pt->depth0;
487 res->swr.type = swr_convert_target_type(pt->target);
488 res->swr.tileMode = SWR_TILE_NONE;
489 res->swr.format = mesa_to_swr_format(fmt);
490 res->swr.numSamples = (1 << pt->nr_samples);
491
492 SWR_FORMAT_INFO finfo = GetFormatInfo(res->swr.format);
493
494 unsigned total_size = 0;
495 unsigned width = pt->width0;
496 unsigned height = pt->height0;
497 unsigned depth = pt->depth0;
498 unsigned layers = pt->array_size;
499
500 for (int level = 0; level <= pt->last_level; level++) {
501 unsigned alignedWidth, alignedHeight;
502 unsigned num_slices;
503
504 if (pt->bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) {
505 alignedWidth = align(width, KNOB_MACROTILE_X_DIM);
506 alignedHeight = align(height, KNOB_MACROTILE_Y_DIM);
507 } else {
508 alignedWidth = width;
509 alignedHeight = height;
510 }
511
512 if (level == 0) {
513 res->alignedWidth = alignedWidth;
514 res->alignedHeight = alignedHeight;
515 }
516
517 res->row_stride[level] = alignedWidth * finfo.Bpp;
518 res->img_stride[level] = res->row_stride[level] * alignedHeight;
519 res->mip_offsets[level] = total_size;
520
521 if (pt->target == PIPE_TEXTURE_3D)
522 num_slices = depth;
523 else if (pt->target == PIPE_TEXTURE_1D_ARRAY
524 || pt->target == PIPE_TEXTURE_2D_ARRAY
525 || pt->target == PIPE_TEXTURE_CUBE
526 || pt->target == PIPE_TEXTURE_CUBE_ARRAY)
527 num_slices = layers;
528 else
529 num_slices = 1;
530
531 total_size += res->img_stride[level] * num_slices;
532 if (total_size > SWR_MAX_TEXTURE_SIZE)
533 return FALSE;
534
535 width = u_minify(width, 1);
536 height = u_minify(height, 1);
537 depth = u_minify(depth, 1);
538 }
539
540 res->swr.halign = res->alignedWidth;
541 res->swr.valign = res->alignedHeight;
542 res->swr.pitch = res->row_stride[0];
543
544 if (allocate) {
545 res->swr.pBaseAddress = (uint8_t *)_aligned_malloc(total_size, 64);
546
547 if (res->has_depth && res->has_stencil) {
548 SWR_FORMAT_INFO finfo = GetFormatInfo(res->secondary.format);
549 res->secondary.width = pt->width0;
550 res->secondary.height = pt->height0;
551 res->secondary.depth = pt->depth0;
552 res->secondary.type = SURFACE_2D;
553 res->secondary.tileMode = SWR_TILE_NONE;
554 res->secondary.format = R8_UINT;
555 res->secondary.numSamples = (1 << pt->nr_samples);
556 res->secondary.pitch = res->alignedWidth * finfo.Bpp;
557
558 res->secondary.pBaseAddress = (uint8_t *)_aligned_malloc(
559 res->alignedHeight * res->secondary.pitch, 64);
560 }
561 }
562
563 return TRUE;
564 }
565
566 static boolean
567 swr_can_create_resource(struct pipe_screen *screen,
568 const struct pipe_resource *templat)
569 {
570 struct swr_resource res;
571 memset(&res, 0, sizeof(res));
572 res.base = *templat;
573 return swr_texture_layout(swr_screen(screen), &res, false);
574 }
575
576 static struct pipe_resource *
577 swr_resource_create(struct pipe_screen *_screen,
578 const struct pipe_resource *templat)
579 {
580 struct swr_screen *screen = swr_screen(_screen);
581 struct swr_resource *res = CALLOC_STRUCT(swr_resource);
582 if (!res)
583 return NULL;
584
585 res->base = *templat;
586 pipe_reference_init(&res->base.reference, 1);
587 res->base.screen = &screen->base;
588
589 if (swr_resource_is_texture(&res->base)) {
590 if (res->base.bind & (PIPE_BIND_DISPLAY_TARGET | PIPE_BIND_SCANOUT
591 | PIPE_BIND_SHARED)) {
592 /* displayable surface
593 * first call swr_texture_layout without allocating to finish
594 * filling out the SWR_SURFAE_STATE in res */
595 swr_texture_layout(screen, res, false);
596 if (!swr_displaytarget_layout(screen, res))
597 goto fail;
598 } else {
599 /* texture map */
600 if (!swr_texture_layout(screen, res, true))
601 goto fail;
602 }
603 } else {
604 /* other data (vertex buffer, const buffer, etc) */
605 assert(util_format_get_blocksize(templat->format) == 1);
606 assert(templat->height0 == 1);
607 assert(templat->depth0 == 1);
608 assert(templat->last_level == 0);
609
610 /* Easiest to just call swr_texture_layout, as it sets up
611 * SWR_SURFAE_STATE in res */
612 if (!swr_texture_layout(screen, res, true))
613 goto fail;
614 }
615
616 return &res->base;
617
618 fail:
619 FREE(res);
620 return NULL;
621 }
622
623 static void
624 swr_resource_destroy(struct pipe_screen *p_screen, struct pipe_resource *pt)
625 {
626 struct swr_screen *screen = swr_screen(p_screen);
627 struct swr_resource *spr = swr_resource(pt);
628 struct pipe_context *pipe = screen->pipe;
629
630 /* Only wait on fence if the resource is being used */
631 if (pipe && spr->status) {
632 /* But, if there's no fence pending, submit one.
633 * XXX: Remove once draw timestamps are implmented. */
634 if (!swr_is_fence_pending(screen->flush_fence))
635 swr_fence_submit(swr_context(pipe), screen->flush_fence);
636
637 swr_fence_finish(p_screen, screen->flush_fence, 0);
638 swr_resource_unused(pt);
639 }
640
641 /*
642 * Free resource primary surface. If resource is display target, winsys
643 * manages the buffer and will free it on displaytarget_destroy.
644 */
645 if (spr->display_target) {
646 /* display target */
647 struct sw_winsys *winsys = screen->winsys;
648 winsys->displaytarget_destroy(winsys, spr->display_target);
649 } else
650 _aligned_free(spr->swr.pBaseAddress);
651
652 _aligned_free(spr->secondary.pBaseAddress);
653
654 FREE(spr);
655 }
656
657
658 static void
659 swr_flush_frontbuffer(struct pipe_screen *p_screen,
660 struct pipe_resource *resource,
661 unsigned level,
662 unsigned layer,
663 void *context_private,
664 struct pipe_box *sub_box)
665 {
666 struct swr_screen *screen = swr_screen(p_screen);
667 struct sw_winsys *winsys = screen->winsys;
668 struct swr_resource *spr = swr_resource(resource);
669 struct pipe_context *pipe = screen->pipe;
670
671 if (pipe) {
672 swr_fence_finish(p_screen, screen->flush_fence, 0);
673 swr_resource_unused(resource);
674 SwrEndFrame(swr_context(pipe)->swrContext);
675 }
676
677 debug_assert(spr->display_target);
678 if (spr->display_target)
679 winsys->displaytarget_display(
680 winsys, spr->display_target, context_private, sub_box);
681 }
682
683
684 static void
685 swr_destroy_screen(struct pipe_screen *p_screen)
686 {
687 struct swr_screen *screen = swr_screen(p_screen);
688 struct sw_winsys *winsys = screen->winsys;
689
690 fprintf(stderr, "SWR destroy screen!\n");
691
692 swr_fence_finish(p_screen, screen->flush_fence, 0);
693 swr_fence_reference(p_screen, &screen->flush_fence, NULL);
694
695 JitDestroyContext(screen->hJitMgr);
696
697 if (winsys->destroy)
698 winsys->destroy(winsys);
699
700 FREE(screen);
701 }
702
703 PUBLIC
704 struct pipe_screen *
705 swr_create_screen(struct sw_winsys *winsys)
706 {
707 struct swr_screen *screen = CALLOC_STRUCT(swr_screen);
708
709 if (!screen)
710 return NULL;
711
712 if (!getenv("KNOB_MAX_PRIMS_PER_DRAW")) {
713 g_GlobalKnobs.MAX_PRIMS_PER_DRAW.Value(49152);
714 }
715
716 screen->winsys = winsys;
717 screen->base.get_name = swr_get_name;
718 screen->base.get_vendor = swr_get_vendor;
719 screen->base.is_format_supported = swr_is_format_supported;
720 screen->base.context_create = swr_create_context;
721 screen->base.can_create_resource = swr_can_create_resource;
722
723 screen->base.destroy = swr_destroy_screen;
724 screen->base.get_param = swr_get_param;
725 screen->base.get_shader_param = swr_get_shader_param;
726 screen->base.get_paramf = swr_get_paramf;
727
728 screen->base.resource_create = swr_resource_create;
729 screen->base.resource_destroy = swr_resource_destroy;
730
731 screen->base.flush_frontbuffer = swr_flush_frontbuffer;
732
733 screen->hJitMgr = JitCreateContext(KNOB_SIMD_WIDTH, KNOB_ARCH_STR);
734
735 swr_fence_init(&screen->base);
736
737 return &screen->base;
738 }
739
740 struct sw_winsys *
741 swr_get_winsys(struct pipe_screen *pipe)
742 {
743 return ((struct swr_screen *)pipe)->winsys;
744 }
745
746 struct sw_displaytarget *
747 swr_get_displaytarget(struct pipe_resource *resource)
748 {
749 return ((struct swr_resource *)resource)->display_target;
750 }