src/gallium/drivers/swr/swr_screen.cpp

   1 /****************************************************************************
   2  * Copyright (C) 2015 Intel Corporation.   All Rights Reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  ***************************************************************************/
  23
  24 #include "pipe/p_screen.h"
  25 #include "pipe/p_defines.h"
  26 #include "util/u_memory.h"
  27 #include "util/u_format.h"
  28 #include "util/u_inlines.h"
  29 #include "util/u_cpu_detect.h"
  30
  31 #include "state_tracker/sw_winsys.h"
  32
  33 extern "C" {
  34 #include "gallivm/lp_bld_limits.h"
  35 }
  36
  37 #include "swr_public.h"
  38 #include "swr_screen.h"
  39 #include "swr_context.h"
  40 #include "swr_resource.h"
  41 #include "swr_fence.h"
  42 #include "gen_knobs.h"
  43
  44 #include "jit_api.h"
  45
  46 #include <stdio.h>
  47
  48 /* MSVC case instensitive compare */
  49 #if defined(PIPE_CC_MSVC)
  50    #define strcasecmp lstrcmpiA
  51 #endif
  52
  53 /*
  54  * Max texture sizes
  55  * XXX Check max texture size values against core and sampler.
  56  */
  57 #define SWR_MAX_TEXTURE_SIZE (4 * 1048 * 1048 * 1024ULL) /* 4GB */
  58 #define SWR_MAX_TEXTURE_2D_LEVELS 14  /* 8K x 8K for now */
  59 #define SWR_MAX_TEXTURE_3D_LEVELS 12  /* 2K x 2K x 2K for now */
  60 #define SWR_MAX_TEXTURE_CUBE_LEVELS 14  /* 8K x 8K for now */
  61 #define SWR_MAX_TEXTURE_ARRAY_LAYERS 512 /* 8K x 512 / 8K x 8K x 512 */
  62
  63 static const char *
  64 swr_get_name(struct pipe_screen *screen)
  65 {
  66    return "SWR";
  67 }
  68
  69 static const char *
  70 swr_get_vendor(struct pipe_screen *screen)
  71 {
  72    return "Intel Corporation";
  73 }
  74
  75 static boolean
  76 swr_is_format_supported(struct pipe_screen *screen,
  77                         enum pipe_format format,
  78                         enum pipe_texture_target target,
  79                         unsigned sample_count,
  80                         unsigned bind)
  81 {
  82    struct sw_winsys *winsys = swr_screen(screen)->winsys;
  83    const struct util_format_description *format_desc;
  84
  85    assert(target == PIPE_BUFFER || target == PIPE_TEXTURE_1D
  86           || target == PIPE_TEXTURE_1D_ARRAY
  87           || target == PIPE_TEXTURE_2D
  88           || target == PIPE_TEXTURE_2D_ARRAY
  89           || target == PIPE_TEXTURE_RECT
  90           || target == PIPE_TEXTURE_3D
  91           || target == PIPE_TEXTURE_CUBE
  92           || target == PIPE_TEXTURE_CUBE_ARRAY);
  93
  94    format_desc = util_format_description(format);
  95    if (!format_desc)
  96       return FALSE;
  97
  98    if (sample_count > 1)
  99       return FALSE;
 100
 101    if (bind
 102        & (PIPE_BIND_DISPLAY_TARGET | PIPE_BIND_SCANOUT | PIPE_BIND_SHARED)) {
 103       if (!winsys->is_displaytarget_format_supported(winsys, bind, format))
 104          return FALSE;
 105    }
 106
 107    if (bind & PIPE_BIND_RENDER_TARGET) {
 108       if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)
 109          return FALSE;
 110
 111       if (mesa_to_swr_format(format) == (SWR_FORMAT)-1)
 112          return FALSE;
 113
 114       /*
 115        * Although possible, it is unnatural to render into compressed or YUV
 116        * surfaces. So disable these here to avoid going into weird paths
 117        * inside the state trackers.
 118        */
 119       if (format_desc->block.width != 1 || format_desc->block.height != 1)
 120          return FALSE;
 121    }
 122
 123    if (bind & PIPE_BIND_DEPTH_STENCIL) {
 124       if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
 125          return FALSE;
 126
 127       if (mesa_to_swr_format(format) == (SWR_FORMAT)-1)
 128          return FALSE;
 129    }
 130
 131    return TRUE;
 132 }
 133
 134 static int
 135 swr_get_param(struct pipe_screen *screen, enum pipe_cap param)
 136 {
 137    switch (param) {
 138    case PIPE_CAP_NPOT_TEXTURES:
 139    case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 140       return 1;
 141    case PIPE_CAP_TWO_SIDED_STENCIL:
 142       return 1;
 143    case PIPE_CAP_SM3:
 144       return 1;
 145    case PIPE_CAP_ANISOTROPIC_FILTER:
 146       return 0;
 147    case PIPE_CAP_POINT_SPRITE:
 148       return 1;
 149    case PIPE_CAP_MAX_RENDER_TARGETS:
 150       return PIPE_MAX_COLOR_BUFS;
 151    case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 152       return 1;
 153    case PIPE_CAP_OCCLUSION_QUERY:
 154    case PIPE_CAP_QUERY_TIME_ELAPSED:
 155    case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 156       return 1;
 157    case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 158       return 1;
 159    case PIPE_CAP_TEXTURE_SHADOW_MAP:
 160       return 1;
 161    case PIPE_CAP_TEXTURE_SWIZZLE:
 162       return 1;
 163    case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 164       return 0;
 165    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 166       return SWR_MAX_TEXTURE_2D_LEVELS;
 167    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 168       return SWR_MAX_TEXTURE_3D_LEVELS;
 169    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 170       return SWR_MAX_TEXTURE_CUBE_LEVELS;
 171    case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 172       return 1;
 173    case PIPE_CAP_INDEP_BLEND_ENABLE:
 174       return 1;
 175    case PIPE_CAP_INDEP_BLEND_FUNC:
 176       return 1;
 177    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 178       return 0; // Don't support lower left frag coord.
 179    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 180    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 181    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 182       return 1;
 183    case PIPE_CAP_DEPTH_CLIP_DISABLE:
 184       return 1;
 185    case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 186       return MAX_SO_STREAMS;
 187    case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 188    case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 189       return MAX_ATTRIBUTES;
 190    case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 191    case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 192       return 1024;
 193    case PIPE_CAP_MAX_VERTEX_STREAMS:
 194       return 1;
 195    case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 196       return 2048;
 197    case PIPE_CAP_PRIMITIVE_RESTART:
 198       return 1;
 199    case PIPE_CAP_SHADER_STENCIL_EXPORT:
 200       return 1;
 201    case PIPE_CAP_TGSI_INSTANCEID:
 202    case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 203    case PIPE_CAP_START_INSTANCE:
 204       return 1;
 205    case PIPE_CAP_SEAMLESS_CUBE_MAP:
 206    case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 207       return 1;
 208    case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 209       return SWR_MAX_TEXTURE_ARRAY_LAYERS;
 210    case PIPE_CAP_MIN_TEXEL_OFFSET:
 211       return -8;
 212    case PIPE_CAP_MAX_TEXEL_OFFSET:
 213       return 7;
 214    case PIPE_CAP_CONDITIONAL_RENDER:
 215       return 1;
 216    case PIPE_CAP_TEXTURE_BARRIER:
 217       return 0;
 218    case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 219    case PIPE_CAP_VERTEX_COLOR_UNCLAMPED: /* draw module */
 220    case PIPE_CAP_VERTEX_COLOR_CLAMPED: /* draw module */
 221       return 1;
 222    case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 223       return 1;
 224    case PIPE_CAP_GLSL_FEATURE_LEVEL:
 225       return 330;
 226    case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 227       return 0;
 228    case PIPE_CAP_COMPUTE:
 229       return 0;
 230    case PIPE_CAP_USER_VERTEX_BUFFERS:
 231    case PIPE_CAP_USER_INDEX_BUFFERS:
 232    case PIPE_CAP_USER_CONSTANT_BUFFERS:
 233    case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 234    case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 235       return 1;
 236    case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 237       return 16;
 238    case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 239    case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 240    case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 241    case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 242    case PIPE_CAP_TEXTURE_MULTISAMPLE:
 243       return 0;
 244    case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 245       return 64;
 246    case PIPE_CAP_QUERY_TIMESTAMP:
 247       return 1;
 248    case PIPE_CAP_CUBE_MAP_ARRAY:
 249       return 0;
 250    case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 251       return 1;
 252    case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 253       return 65536;
 254    case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 255       return 0;
 256    case PIPE_CAP_TGSI_TEXCOORD:
 257    case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 258       return 0;
 259    case PIPE_CAP_MAX_VIEWPORTS:
 260       return 1;
 261    case PIPE_CAP_ENDIANNESS:
 262       return PIPE_ENDIAN_NATIVE;
 263    case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 264    case PIPE_CAP_TEXTURE_GATHER_SM5:
 265       return 0;
 266    case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 267       return 1;
 268    case PIPE_CAP_TEXTURE_QUERY_LOD:
 269    case PIPE_CAP_SAMPLE_SHADING:
 270    case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 271    case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 272    case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 273    case PIPE_CAP_SAMPLER_VIEW_TARGET:
 274       return 0;
 275    case PIPE_CAP_FAKE_SW_MSAA:
 276       return 1;
 277    case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 278    case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 279       return 0;
 280    case PIPE_CAP_DRAW_INDIRECT:
 281       return 1;
 282
 283    case PIPE_CAP_VENDOR_ID:
 284       return 0xFFFFFFFF;
 285    case PIPE_CAP_DEVICE_ID:
 286       return 0xFFFFFFFF;
 287    case PIPE_CAP_ACCELERATED:
 288       return 0;
 289    case PIPE_CAP_VIDEO_MEMORY: {
 290       /* XXX: Do we want to return the full amount of system memory ? */
 291       uint64_t system_memory;
 292
 293       if (!os_get_total_physical_memory(&system_memory))
 294          return 0;
 295
 296       return (int)(system_memory >> 20);
 297    }
 298    case PIPE_CAP_UMA:
 299       return 1;
 300    case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 301       return 1;
 302    case PIPE_CAP_CLIP_HALFZ:
 303       return 1;
 304    case PIPE_CAP_VERTEXID_NOBASE:
 305       return 0;
 306    case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 307       return 1;
 308    case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 309       return 0;
 310    case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 311       return 0; // xxx
 312    case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 313       return 0;
 314    case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 315       return 0;
 316    case PIPE_CAP_DEPTH_BOUNDS_TEST:
 317       return 0; // xxx
 318    case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 319    case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 320       return 1;
 321    case PIPE_CAP_TGSI_TXQS:
 322    case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 323    case PIPE_CAP_SHAREABLE_SHADERS:
 324    case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 325    case PIPE_CAP_CLEAR_TEXTURE:
 326    case PIPE_CAP_DRAW_PARAMETERS:
 327    case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 328    case PIPE_CAP_MULTI_DRAW_INDIRECT:
 329    case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 330    case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 331    case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 332    case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 333    case PIPE_CAP_INVALIDATE_BUFFER:
 334    case PIPE_CAP_GENERATE_MIPMAP:
 335    case PIPE_CAP_STRING_MARKER:
 336    case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 337    case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 338    case PIPE_CAP_QUERY_BUFFER_OBJECT:
 339    case PIPE_CAP_QUERY_MEMORY_INFO:
 340       return 0;
 341    }
 342
 343    /* should only get here on unhandled cases */
 344    debug_printf("Unexpected PIPE_CAP %d query\n", param);
 345    return 0;
 346 }
 347
 348 static int
 349 swr_get_shader_param(struct pipe_screen *screen,
 350                      unsigned shader,
 351                      enum pipe_shader_cap param)
 352 {
 353    if (shader == PIPE_SHADER_VERTEX || shader == PIPE_SHADER_FRAGMENT)
 354       return gallivm_get_shader_param(param);
 355
 356    // Todo: geometry, tesselation, compute
 357    return 0;
 358 }
 359
 360
 361 static float
 362 swr_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
 363 {
 364    switch (param) {
 365    case PIPE_CAPF_MAX_LINE_WIDTH:
 366    case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 367    case PIPE_CAPF_MAX_POINT_WIDTH:
 368       return 255.0; /* arbitrary */
 369    case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 370       return 0.0;
 371    case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 372       return 0.0;
 373    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 374       return 0.0;
 375    case PIPE_CAPF_GUARD_BAND_LEFT:
 376    case PIPE_CAPF_GUARD_BAND_TOP:
 377    case PIPE_CAPF_GUARD_BAND_RIGHT:
 378    case PIPE_CAPF_GUARD_BAND_BOTTOM:
 379       return 0.0;
 380    }
 381    /* should only get here on unhandled cases */
 382    debug_printf("Unexpected PIPE_CAPF %d query\n", param);
 383    return 0.0;
 384 }
 385
 386 SWR_FORMAT
 387 mesa_to_swr_format(enum pipe_format format)
 388 {
 389    const struct util_format_description *format_desc =
 390       util_format_description(format);
 391    if (!format_desc)
 392       return (SWR_FORMAT)-1;
 393
 394    // more robust check would be comparing all attributes of the formats
 395    // luckily format names are mostly standardized
 396    for (int i = 0; i < NUM_SWR_FORMATS; i++) {
 397       const SWR_FORMAT_INFO &swr_desc = GetFormatInfo((SWR_FORMAT)i);
 398
 399       if (!strcasecmp(format_desc->short_name, swr_desc.name))
 400          return (SWR_FORMAT)i;
 401    }
 402
 403    // ... with some exceptions
 404    switch (format) {
 405    case PIPE_FORMAT_R8G8B8A8_SRGB:
 406       return R8G8B8A8_UNORM_SRGB;
 407    case PIPE_FORMAT_B8G8R8A8_SRGB:
 408       return B8G8R8A8_UNORM_SRGB;
 409    case PIPE_FORMAT_I8_UNORM:
 410       return R8_UNORM;
 411    case PIPE_FORMAT_Z16_UNORM:
 412       return R16_UNORM;
 413    case PIPE_FORMAT_Z24X8_UNORM:
 414    case PIPE_FORMAT_Z24_UNORM_S8_UINT:
 415       return R24_UNORM_X8_TYPELESS;
 416    case PIPE_FORMAT_Z32_FLOAT:
 417       return R32_FLOAT;
 418    case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
 419       return R32_FLOAT_X8X24_TYPELESS;
 420    case PIPE_FORMAT_L8A8_UNORM:
 421       return R8G8_UNORM;
 422    default:
 423       break;
 424    }
 425
 426    debug_printf("asked to convert unsupported format %s\n",
 427                 format_desc->name);
 428    return (SWR_FORMAT)-1;
 429 }
 430
 431 static boolean
 432 swr_displaytarget_layout(struct swr_screen *screen, struct swr_resource *res)
 433 {
 434    struct sw_winsys *winsys = screen->winsys;
 435    struct sw_displaytarget *dt;
 436
 437    UINT stride;
 438    dt = winsys->displaytarget_create(winsys,
 439                                      res->base.bind,
 440                                      res->base.format,
 441                                      res->alignedWidth,
 442                                      res->alignedHeight,
 443                                      64, NULL,
 444                                      &stride);
 445
 446    if (dt == NULL)
 447       return FALSE;
 448
 449    void *map = winsys->displaytarget_map(winsys, dt, 0);
 450
 451    res->display_target = dt;
 452    res->swr.pBaseAddress = (uint8_t*) map;
 453
 454    /* Clear the display target surface */
 455    if (map)
 456       memset(map, 0, res->alignedHeight * stride);
 457
 458    winsys->displaytarget_unmap(winsys, dt);
 459
 460    return TRUE;
 461 }
 462
 463 static boolean
 464 swr_texture_layout(struct swr_screen *screen,
 465                    struct swr_resource *res,
 466                    boolean allocate)
 467 {
 468    struct pipe_resource *pt = &res->base;
 469
 470    pipe_format fmt = pt->format;
 471    const struct util_format_description *desc = util_format_description(fmt);
 472
 473    res->has_depth = util_format_has_depth(desc);
 474    res->has_stencil = util_format_has_stencil(desc);
 475
 476    if (res->has_stencil && !res->has_depth)
 477       fmt = PIPE_FORMAT_R8_UINT;
 478
 479    res->swr.width = pt->width0;
 480    res->swr.height = pt->height0;
 481    res->swr.depth = pt->depth0;
 482    res->swr.type = swr_convert_target_type(pt->target);
 483    res->swr.tileMode = SWR_TILE_NONE;
 484    res->swr.format = mesa_to_swr_format(fmt);
 485    res->swr.numSamples = (1 << pt->nr_samples);
 486
 487    SWR_FORMAT_INFO finfo = GetFormatInfo(res->swr.format);
 488
 489    unsigned total_size = 0;
 490    unsigned width = pt->width0;
 491    unsigned height = pt->height0;
 492    unsigned depth = pt->depth0;
 493    unsigned layers = pt->array_size;
 494
 495    for (int level = 0; level <= pt->last_level; level++) {
 496       unsigned alignedWidth, alignedHeight;
 497       unsigned num_slices;
 498
 499       if (pt->bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) {
 500          alignedWidth = align(width, KNOB_MACROTILE_X_DIM);
 501          alignedHeight = align(height, KNOB_MACROTILE_Y_DIM);
 502       } else {
 503          alignedWidth = width;
 504          alignedHeight = height;
 505       }
 506
 507       if (level == 0) {
 508          res->alignedWidth = alignedWidth;
 509          res->alignedHeight = alignedHeight;
 510       }
 511
 512       res->row_stride[level] = alignedWidth * finfo.Bpp;
 513       res->img_stride[level] = res->row_stride[level] * alignedHeight;
 514       res->mip_offsets[level] = total_size;
 515
 516       if (pt->target == PIPE_TEXTURE_3D)
 517          num_slices = depth;
 518       else if (pt->target == PIPE_TEXTURE_1D_ARRAY
 519                || pt->target == PIPE_TEXTURE_2D_ARRAY
 520                || pt->target == PIPE_TEXTURE_CUBE
 521                || pt->target == PIPE_TEXTURE_CUBE_ARRAY)
 522          num_slices = layers;
 523       else
 524          num_slices = 1;
 525
 526       total_size += res->img_stride[level] * num_slices;
 527       if (total_size > SWR_MAX_TEXTURE_SIZE)
 528          return FALSE;
 529
 530       width = u_minify(width, 1);
 531       height = u_minify(height, 1);
 532       depth = u_minify(depth, 1);
 533    }
 534
 535    res->swr.halign = res->alignedWidth;
 536    res->swr.valign = res->alignedHeight;
 537    res->swr.pitch = res->row_stride[0];
 538
 539    if (allocate) {
 540       res->swr.pBaseAddress = (uint8_t *)_aligned_malloc(total_size, 64);
 541
 542       if (res->has_depth && res->has_stencil) {
 543          SWR_FORMAT_INFO finfo = GetFormatInfo(res->secondary.format);
 544          res->secondary.width = pt->width0;
 545          res->secondary.height = pt->height0;
 546          res->secondary.depth = pt->depth0;
 547          res->secondary.type = SURFACE_2D;
 548          res->secondary.tileMode = SWR_TILE_NONE;
 549          res->secondary.format = R8_UINT;
 550          res->secondary.numSamples = (1 << pt->nr_samples);
 551          res->secondary.pitch = res->alignedWidth * finfo.Bpp;
 552
 553          res->secondary.pBaseAddress = (uint8_t *)_aligned_malloc(
 554             res->alignedHeight * res->secondary.pitch, 64);
 555       }
 556    }
 557
 558    return TRUE;
 559 }
 560
 561 static boolean
 562 swr_can_create_resource(struct pipe_screen *screen,
 563                         const struct pipe_resource *templat)
 564 {
 565    struct swr_resource res;
 566    memset(&res, 0, sizeof(res));
 567    res.base = *templat;
 568    return swr_texture_layout(swr_screen(screen), &res, false);
 569 }
 570
 571 static struct pipe_resource *
 572 swr_resource_create(struct pipe_screen *_screen,
 573                     const struct pipe_resource *templat)
 574 {
 575    struct swr_screen *screen = swr_screen(_screen);
 576    struct swr_resource *res = CALLOC_STRUCT(swr_resource);
 577    if (!res)
 578       return NULL;
 579
 580    res->base = *templat;
 581    pipe_reference_init(&res->base.reference, 1);
 582    res->base.screen = &screen->base;
 583
 584    if (swr_resource_is_texture(&res->base)) {
 585       if (res->base.bind & (PIPE_BIND_DISPLAY_TARGET | PIPE_BIND_SCANOUT
 586                             | PIPE_BIND_SHARED)) {
 587          /* displayable surface
 588           * first call swr_texture_layout without allocating to finish
 589           * filling out the SWR_SURFAE_STATE in res */
 590          swr_texture_layout(screen, res, false);
 591          if (!swr_displaytarget_layout(screen, res))
 592             goto fail;
 593       } else {
 594          /* texture map */
 595          if (!swr_texture_layout(screen, res, true))
 596             goto fail;
 597       }
 598    } else {
 599       /* other data (vertex buffer, const buffer, etc) */
 600       assert(util_format_get_blocksize(templat->format) == 1);
 601       assert(templat->height0 == 1);
 602       assert(templat->depth0 == 1);
 603       assert(templat->last_level == 0);
 604
 605       /* Easiest to just call swr_texture_layout, as it sets up
 606        * SWR_SURFAE_STATE in res */
 607       if (!swr_texture_layout(screen, res, true))
 608          goto fail;
 609    }
 610
 611    return &res->base;
 612
 613 fail:
 614    FREE(res);
 615    return NULL;
 616 }
 617
 618 static void
 619 swr_resource_destroy(struct pipe_screen *p_screen, struct pipe_resource *pt)
 620 {
 621    struct swr_screen *screen = swr_screen(p_screen);
 622    struct swr_resource *spr = swr_resource(pt);
 623    struct pipe_context *pipe = spr->bound_to_context;
 624
 625    /* Only wait on fence if the resource is being used */
 626    if (pipe && spr->status) {
 627       /* But, if there's no fence pending, submit one.
 628        * XXX: Remove once draw timestamps are implmented. */
 629       if (!swr_is_fence_pending(screen->flush_fence))
 630          swr_fence_submit(swr_context(pipe), screen->flush_fence);
 631
 632       swr_fence_finish(p_screen, screen->flush_fence, 0);
 633       swr_resource_unused(pipe, spr);
 634    }
 635
 636    /*
 637     * Free resource primary surface.  If resource is display target, winsys
 638     * manages the buffer and will free it on displaytarget_destroy.
 639     */
 640    if (spr->display_target) {
 641       /* display target */
 642       struct sw_winsys *winsys = screen->winsys;
 643       winsys->displaytarget_destroy(winsys, spr->display_target);
 644    } else
 645       _aligned_free(spr->swr.pBaseAddress);
 646
 647    _aligned_free(spr->secondary.pBaseAddress);
 648
 649    FREE(spr);
 650 }
 651
 652
 653 static void
 654 swr_flush_frontbuffer(struct pipe_screen *p_screen,
 655                       struct pipe_resource *resource,
 656                       unsigned level,
 657                       unsigned layer,
 658                       void *context_private,
 659                       struct pipe_box *sub_box)
 660 {
 661    struct swr_screen *screen = swr_screen(p_screen);
 662    struct sw_winsys *winsys = screen->winsys;
 663    struct swr_resource *spr = swr_resource(resource);
 664    struct pipe_context *pipe = spr->bound_to_context;
 665
 666    if (pipe) {
 667       swr_fence_finish(p_screen, screen->flush_fence, 0);
 668       swr_resource_unused(pipe, spr);
 669       SwrEndFrame(swr_context(pipe)->swrContext);
 670    }
 671
 672    debug_assert(spr->display_target);
 673    if (spr->display_target)
 674       winsys->displaytarget_display(
 675          winsys, spr->display_target, context_private, sub_box);
 676 }
 677
 678
 679 static void
 680 swr_destroy_screen(struct pipe_screen *p_screen)
 681 {
 682    struct swr_screen *screen = swr_screen(p_screen);
 683    struct sw_winsys *winsys = screen->winsys;
 684
 685    fprintf(stderr, "SWR destroy screen!\n");
 686
 687    swr_fence_finish(p_screen, screen->flush_fence, 0);
 688    swr_fence_reference(p_screen, &screen->flush_fence, NULL);
 689
 690    JitDestroyContext(screen->hJitMgr);
 691
 692    if (winsys->destroy)
 693       winsys->destroy(winsys);
 694
 695    FREE(screen);
 696 }
 697
 698 PUBLIC
 699 struct pipe_screen *
 700 swr_create_screen(struct sw_winsys *winsys)
 701 {
 702    struct swr_screen *screen = CALLOC_STRUCT(swr_screen);
 703
 704    if (!screen)
 705       return NULL;
 706
 707    if (!getenv("KNOB_MAX_PRIMS_PER_DRAW")) {
 708       g_GlobalKnobs.MAX_PRIMS_PER_DRAW.Value(49152);
 709    }
 710
 711    screen->winsys = winsys;
 712    screen->base.get_name = swr_get_name;
 713    screen->base.get_vendor = swr_get_vendor;
 714    screen->base.is_format_supported = swr_is_format_supported;
 715    screen->base.context_create = swr_create_context;
 716    screen->base.can_create_resource = swr_can_create_resource;
 717
 718    screen->base.destroy = swr_destroy_screen;
 719    screen->base.get_param = swr_get_param;
 720    screen->base.get_shader_param = swr_get_shader_param;
 721    screen->base.get_paramf = swr_get_paramf;
 722
 723    screen->base.resource_create = swr_resource_create;
 724    screen->base.resource_destroy = swr_resource_destroy;
 725
 726    screen->base.flush_frontbuffer = swr_flush_frontbuffer;
 727
 728    screen->hJitMgr = JitCreateContext(KNOB_SIMD_WIDTH, KNOB_ARCH_STR);
 729
 730    swr_fence_init(&screen->base);
 731
 732    return &screen->base;
 733 }
 734
 735 struct sw_winsys *
 736 swr_get_winsys(struct pipe_screen *pipe)
 737 {
 738    return ((struct swr_screen *)pipe)->winsys;
 739 }
 740
 741 struct sw_displaytarget *
 742 swr_get_displaytarget(struct pipe_resource *resource)
 743 {
 744    return ((struct swr_resource *)resource)->display_target;
 745 }