swr: properly expose compressed format support
[mesa.git] / src / gallium / drivers / swr / swr_screen.cpp
1 /****************************************************************************
2 * Copyright (C) 2015 Intel Corporation. All Rights Reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 ***************************************************************************/
23
24 #include "pipe/p_screen.h"
25 #include "pipe/p_defines.h"
26 #include "util/u_memory.h"
27 #include "util/u_format.h"
28 #include "util/u_inlines.h"
29 #include "util/u_cpu_detect.h"
30 #include "util/u_format_s3tc.h"
31
32 #include "state_tracker/sw_winsys.h"
33
34 extern "C" {
35 #include "gallivm/lp_bld_limits.h"
36 }
37
38 #include "swr_public.h"
39 #include "swr_screen.h"
40 #include "swr_context.h"
41 #include "swr_resource.h"
42 #include "swr_fence.h"
43 #include "gen_knobs.h"
44
45 #include "jit_api.h"
46
47 #include <stdio.h>
48
49 /* MSVC case instensitive compare */
50 #if defined(PIPE_CC_MSVC)
51 #define strcasecmp lstrcmpiA
52 #endif
53
54 /*
55 * Max texture sizes
56 * XXX Check max texture size values against core and sampler.
57 */
58 #define SWR_MAX_TEXTURE_SIZE (4 * 1048 * 1048 * 1024ULL) /* 4GB */
59 #define SWR_MAX_TEXTURE_2D_LEVELS 14 /* 8K x 8K for now */
60 #define SWR_MAX_TEXTURE_3D_LEVELS 12 /* 2K x 2K x 2K for now */
61 #define SWR_MAX_TEXTURE_CUBE_LEVELS 14 /* 8K x 8K for now */
62 #define SWR_MAX_TEXTURE_ARRAY_LAYERS 512 /* 8K x 512 / 8K x 8K x 512 */
63
64 static const char *
65 swr_get_name(struct pipe_screen *screen)
66 {
67 return "SWR";
68 }
69
70 static const char *
71 swr_get_vendor(struct pipe_screen *screen)
72 {
73 return "Intel Corporation";
74 }
75
76 static boolean
77 swr_is_format_supported(struct pipe_screen *screen,
78 enum pipe_format format,
79 enum pipe_texture_target target,
80 unsigned sample_count,
81 unsigned bind)
82 {
83 struct sw_winsys *winsys = swr_screen(screen)->winsys;
84 const struct util_format_description *format_desc;
85
86 assert(target == PIPE_BUFFER || target == PIPE_TEXTURE_1D
87 || target == PIPE_TEXTURE_1D_ARRAY
88 || target == PIPE_TEXTURE_2D
89 || target == PIPE_TEXTURE_2D_ARRAY
90 || target == PIPE_TEXTURE_RECT
91 || target == PIPE_TEXTURE_3D
92 || target == PIPE_TEXTURE_CUBE
93 || target == PIPE_TEXTURE_CUBE_ARRAY);
94
95 format_desc = util_format_description(format);
96 if (!format_desc)
97 return FALSE;
98
99 if (sample_count > 1)
100 return FALSE;
101
102 if (bind
103 & (PIPE_BIND_DISPLAY_TARGET | PIPE_BIND_SCANOUT | PIPE_BIND_SHARED)) {
104 if (!winsys->is_displaytarget_format_supported(winsys, bind, format))
105 return FALSE;
106 }
107
108 if (bind & PIPE_BIND_RENDER_TARGET) {
109 if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)
110 return FALSE;
111
112 if (mesa_to_swr_format(format) == (SWR_FORMAT)-1)
113 return FALSE;
114
115 /*
116 * Although possible, it is unnatural to render into compressed or YUV
117 * surfaces. So disable these here to avoid going into weird paths
118 * inside the state trackers.
119 */
120 if (format_desc->block.width != 1 || format_desc->block.height != 1)
121 return FALSE;
122 }
123
124 if (bind & PIPE_BIND_DEPTH_STENCIL) {
125 if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
126 return FALSE;
127
128 if (mesa_to_swr_format(format) == (SWR_FORMAT)-1)
129 return FALSE;
130 }
131
132 if (format_desc->layout == UTIL_FORMAT_LAYOUT_BPTC ||
133 format_desc->layout == UTIL_FORMAT_LAYOUT_ASTC) {
134 return FALSE;
135 }
136
137 if (format_desc->layout == UTIL_FORMAT_LAYOUT_ETC &&
138 format != PIPE_FORMAT_ETC1_RGB8) {
139 return FALSE;
140 }
141
142 if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
143 return util_format_s3tc_enabled;
144 }
145
146 return TRUE;
147 }
148
149 static int
150 swr_get_param(struct pipe_screen *screen, enum pipe_cap param)
151 {
152 switch (param) {
153 case PIPE_CAP_NPOT_TEXTURES:
154 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
155 return 1;
156 case PIPE_CAP_TWO_SIDED_STENCIL:
157 return 1;
158 case PIPE_CAP_SM3:
159 return 1;
160 case PIPE_CAP_ANISOTROPIC_FILTER:
161 return 0;
162 case PIPE_CAP_POINT_SPRITE:
163 return 1;
164 case PIPE_CAP_MAX_RENDER_TARGETS:
165 return PIPE_MAX_COLOR_BUFS;
166 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
167 return 1;
168 case PIPE_CAP_OCCLUSION_QUERY:
169 case PIPE_CAP_QUERY_TIME_ELAPSED:
170 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
171 return 1;
172 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
173 return 1;
174 case PIPE_CAP_TEXTURE_SHADOW_MAP:
175 return 1;
176 case PIPE_CAP_TEXTURE_SWIZZLE:
177 return 1;
178 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
179 return 0;
180 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
181 return SWR_MAX_TEXTURE_2D_LEVELS;
182 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
183 return SWR_MAX_TEXTURE_3D_LEVELS;
184 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
185 return SWR_MAX_TEXTURE_CUBE_LEVELS;
186 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
187 return 1;
188 case PIPE_CAP_INDEP_BLEND_ENABLE:
189 return 1;
190 case PIPE_CAP_INDEP_BLEND_FUNC:
191 return 1;
192 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
193 return 0; // Don't support lower left frag coord.
194 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
195 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
196 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
197 return 1;
198 case PIPE_CAP_DEPTH_CLIP_DISABLE:
199 return 1;
200 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
201 return MAX_SO_STREAMS;
202 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
203 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
204 return MAX_ATTRIBUTES;
205 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
206 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
207 return 1024;
208 case PIPE_CAP_MAX_VERTEX_STREAMS:
209 return 1;
210 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
211 return 2048;
212 case PIPE_CAP_PRIMITIVE_RESTART:
213 return 1;
214 case PIPE_CAP_SHADER_STENCIL_EXPORT:
215 return 1;
216 case PIPE_CAP_TGSI_INSTANCEID:
217 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
218 case PIPE_CAP_START_INSTANCE:
219 return 1;
220 case PIPE_CAP_SEAMLESS_CUBE_MAP:
221 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
222 return 1;
223 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
224 return SWR_MAX_TEXTURE_ARRAY_LAYERS;
225 case PIPE_CAP_MIN_TEXEL_OFFSET:
226 return -8;
227 case PIPE_CAP_MAX_TEXEL_OFFSET:
228 return 7;
229 case PIPE_CAP_CONDITIONAL_RENDER:
230 return 1;
231 case PIPE_CAP_TEXTURE_BARRIER:
232 return 0;
233 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
234 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED: /* draw module */
235 case PIPE_CAP_VERTEX_COLOR_CLAMPED: /* draw module */
236 return 1;
237 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
238 return 1;
239 case PIPE_CAP_GLSL_FEATURE_LEVEL:
240 return 330;
241 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
242 return 0;
243 case PIPE_CAP_COMPUTE:
244 return 0;
245 case PIPE_CAP_USER_VERTEX_BUFFERS:
246 case PIPE_CAP_USER_INDEX_BUFFERS:
247 case PIPE_CAP_USER_CONSTANT_BUFFERS:
248 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
249 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
250 return 1;
251 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
252 return 16;
253 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
254 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
255 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
256 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
257 case PIPE_CAP_TEXTURE_MULTISAMPLE:
258 return 0;
259 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
260 return 64;
261 case PIPE_CAP_QUERY_TIMESTAMP:
262 return 1;
263 case PIPE_CAP_CUBE_MAP_ARRAY:
264 return 0;
265 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
266 return 1;
267 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
268 return 65536;
269 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
270 return 0;
271 case PIPE_CAP_TGSI_TEXCOORD:
272 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
273 return 0;
274 case PIPE_CAP_MAX_VIEWPORTS:
275 return 1;
276 case PIPE_CAP_ENDIANNESS:
277 return PIPE_ENDIAN_NATIVE;
278 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
279 case PIPE_CAP_TEXTURE_GATHER_SM5:
280 return 0;
281 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
282 return 1;
283 case PIPE_CAP_TEXTURE_QUERY_LOD:
284 case PIPE_CAP_SAMPLE_SHADING:
285 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
286 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
287 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
288 case PIPE_CAP_SAMPLER_VIEW_TARGET:
289 return 0;
290 case PIPE_CAP_FAKE_SW_MSAA:
291 return 1;
292 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
293 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
294 return 0;
295 case PIPE_CAP_DRAW_INDIRECT:
296 return 1;
297
298 case PIPE_CAP_VENDOR_ID:
299 return 0xFFFFFFFF;
300 case PIPE_CAP_DEVICE_ID:
301 return 0xFFFFFFFF;
302 case PIPE_CAP_ACCELERATED:
303 return 0;
304 case PIPE_CAP_VIDEO_MEMORY: {
305 /* XXX: Do we want to return the full amount of system memory ? */
306 uint64_t system_memory;
307
308 if (!os_get_total_physical_memory(&system_memory))
309 return 0;
310
311 return (int)(system_memory >> 20);
312 }
313 case PIPE_CAP_UMA:
314 return 1;
315 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
316 return 1;
317 case PIPE_CAP_CLIP_HALFZ:
318 return 1;
319 case PIPE_CAP_VERTEXID_NOBASE:
320 return 0;
321 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
322 return 1;
323 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
324 return 0;
325 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
326 return 0; // xxx
327 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
328 return 0;
329 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
330 return 0;
331 case PIPE_CAP_DEPTH_BOUNDS_TEST:
332 return 0; // xxx
333 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
334 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
335 return 1;
336 case PIPE_CAP_TGSI_TXQS:
337 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
338 case PIPE_CAP_SHAREABLE_SHADERS:
339 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
340 case PIPE_CAP_CLEAR_TEXTURE:
341 case PIPE_CAP_DRAW_PARAMETERS:
342 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
343 case PIPE_CAP_MULTI_DRAW_INDIRECT:
344 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
345 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
346 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
347 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
348 case PIPE_CAP_INVALIDATE_BUFFER:
349 case PIPE_CAP_GENERATE_MIPMAP:
350 case PIPE_CAP_STRING_MARKER:
351 case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
352 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
353 case PIPE_CAP_QUERY_BUFFER_OBJECT:
354 case PIPE_CAP_QUERY_MEMORY_INFO:
355 case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
356 case PIPE_CAP_PCI_GROUP:
357 case PIPE_CAP_PCI_BUS:
358 case PIPE_CAP_PCI_DEVICE:
359 case PIPE_CAP_PCI_FUNCTION:
360 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
361 return 0;
362 }
363
364 /* should only get here on unhandled cases */
365 debug_printf("Unexpected PIPE_CAP %d query\n", param);
366 return 0;
367 }
368
369 static int
370 swr_get_shader_param(struct pipe_screen *screen,
371 unsigned shader,
372 enum pipe_shader_cap param)
373 {
374 if (shader == PIPE_SHADER_VERTEX || shader == PIPE_SHADER_FRAGMENT)
375 return gallivm_get_shader_param(param);
376
377 // Todo: geometry, tesselation, compute
378 return 0;
379 }
380
381
382 static float
383 swr_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
384 {
385 switch (param) {
386 case PIPE_CAPF_MAX_LINE_WIDTH:
387 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
388 case PIPE_CAPF_MAX_POINT_WIDTH:
389 return 255.0; /* arbitrary */
390 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
391 return 0.0;
392 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
393 return 0.0;
394 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
395 return 0.0;
396 case PIPE_CAPF_GUARD_BAND_LEFT:
397 case PIPE_CAPF_GUARD_BAND_TOP:
398 case PIPE_CAPF_GUARD_BAND_RIGHT:
399 case PIPE_CAPF_GUARD_BAND_BOTTOM:
400 return 0.0;
401 }
402 /* should only get here on unhandled cases */
403 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
404 return 0.0;
405 }
406
407 SWR_FORMAT
408 mesa_to_swr_format(enum pipe_format format)
409 {
410 const struct util_format_description *format_desc =
411 util_format_description(format);
412 if (!format_desc)
413 return (SWR_FORMAT)-1;
414
415 // more robust check would be comparing all attributes of the formats
416 // luckily format names are mostly standardized
417 for (int i = 0; i < NUM_SWR_FORMATS; i++) {
418 const SWR_FORMAT_INFO &swr_desc = GetFormatInfo((SWR_FORMAT)i);
419
420 if (!strcasecmp(format_desc->short_name, swr_desc.name))
421 return (SWR_FORMAT)i;
422 }
423
424 // ... with some exceptions
425 switch (format) {
426 case PIPE_FORMAT_R8G8B8A8_SRGB:
427 return R8G8B8A8_UNORM_SRGB;
428 case PIPE_FORMAT_B8G8R8A8_SRGB:
429 return B8G8R8A8_UNORM_SRGB;
430 case PIPE_FORMAT_I8_UNORM:
431 return R8_UNORM;
432 case PIPE_FORMAT_Z16_UNORM:
433 return R16_UNORM;
434 case PIPE_FORMAT_Z24X8_UNORM:
435 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
436 return R24_UNORM_X8_TYPELESS;
437 case PIPE_FORMAT_Z32_FLOAT:
438 return R32_FLOAT;
439 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
440 return R32_FLOAT_X8X24_TYPELESS;
441 case PIPE_FORMAT_L8A8_UNORM:
442 return R8G8_UNORM;
443 default:
444 break;
445 }
446
447 debug_printf("asked to convert unsupported format %s\n",
448 format_desc->name);
449 return (SWR_FORMAT)-1;
450 }
451
452 static boolean
453 swr_displaytarget_layout(struct swr_screen *screen, struct swr_resource *res)
454 {
455 struct sw_winsys *winsys = screen->winsys;
456 struct sw_displaytarget *dt;
457
458 UINT stride;
459 dt = winsys->displaytarget_create(winsys,
460 res->base.bind,
461 res->base.format,
462 res->alignedWidth,
463 res->alignedHeight,
464 64, NULL,
465 &stride);
466
467 if (dt == NULL)
468 return FALSE;
469
470 void *map = winsys->displaytarget_map(winsys, dt, 0);
471
472 res->display_target = dt;
473 res->swr.pBaseAddress = (uint8_t*) map;
474
475 /* Clear the display target surface */
476 if (map)
477 memset(map, 0, res->alignedHeight * stride);
478
479 winsys->displaytarget_unmap(winsys, dt);
480
481 return TRUE;
482 }
483
484 static boolean
485 swr_texture_layout(struct swr_screen *screen,
486 struct swr_resource *res,
487 boolean allocate)
488 {
489 struct pipe_resource *pt = &res->base;
490
491 pipe_format fmt = pt->format;
492 const struct util_format_description *desc = util_format_description(fmt);
493
494 res->has_depth = util_format_has_depth(desc);
495 res->has_stencil = util_format_has_stencil(desc);
496
497 if (res->has_stencil && !res->has_depth)
498 fmt = PIPE_FORMAT_R8_UINT;
499
500 res->swr.width = pt->width0;
501 res->swr.height = pt->height0;
502 res->swr.depth = pt->depth0;
503 res->swr.type = swr_convert_target_type(pt->target);
504 res->swr.tileMode = SWR_TILE_NONE;
505 res->swr.format = mesa_to_swr_format(fmt);
506 res->swr.numSamples = (1 << pt->nr_samples);
507
508 SWR_FORMAT_INFO finfo = GetFormatInfo(res->swr.format);
509
510 unsigned total_size = 0;
511 unsigned width = pt->width0;
512 unsigned height = pt->height0;
513 unsigned depth = pt->depth0;
514 unsigned layers = pt->array_size;
515
516 for (int level = 0; level <= pt->last_level; level++) {
517 unsigned alignedWidth, alignedHeight;
518 unsigned num_slices;
519
520 if (pt->bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) {
521 alignedWidth = align(width, KNOB_MACROTILE_X_DIM);
522 alignedHeight = align(height, KNOB_MACROTILE_Y_DIM);
523 } else {
524 alignedWidth = width;
525 alignedHeight = height;
526 }
527
528 if (level == 0) {
529 res->alignedWidth = alignedWidth;
530 res->alignedHeight = alignedHeight;
531 }
532
533 res->row_stride[level] = alignedWidth * finfo.Bpp;
534 res->img_stride[level] = res->row_stride[level] * alignedHeight;
535 res->mip_offsets[level] = total_size;
536
537 if (pt->target == PIPE_TEXTURE_3D)
538 num_slices = depth;
539 else if (pt->target == PIPE_TEXTURE_1D_ARRAY
540 || pt->target == PIPE_TEXTURE_2D_ARRAY
541 || pt->target == PIPE_TEXTURE_CUBE
542 || pt->target == PIPE_TEXTURE_CUBE_ARRAY)
543 num_slices = layers;
544 else
545 num_slices = 1;
546
547 total_size += res->img_stride[level] * num_slices;
548 if (total_size > SWR_MAX_TEXTURE_SIZE)
549 return FALSE;
550
551 width = u_minify(width, 1);
552 height = u_minify(height, 1);
553 depth = u_minify(depth, 1);
554 }
555
556 res->swr.halign = res->alignedWidth;
557 res->swr.valign = res->alignedHeight;
558 res->swr.pitch = res->row_stride[0];
559
560 if (allocate) {
561 res->swr.pBaseAddress = (uint8_t *)_aligned_malloc(total_size, 64);
562
563 if (res->has_depth && res->has_stencil) {
564 SWR_FORMAT_INFO finfo = GetFormatInfo(res->secondary.format);
565 res->secondary.width = pt->width0;
566 res->secondary.height = pt->height0;
567 res->secondary.depth = pt->depth0;
568 res->secondary.type = SURFACE_2D;
569 res->secondary.tileMode = SWR_TILE_NONE;
570 res->secondary.format = R8_UINT;
571 res->secondary.numSamples = (1 << pt->nr_samples);
572 res->secondary.pitch = res->alignedWidth * finfo.Bpp;
573
574 res->secondary.pBaseAddress = (uint8_t *)_aligned_malloc(
575 res->alignedHeight * res->secondary.pitch, 64);
576 }
577 }
578
579 return TRUE;
580 }
581
582 static boolean
583 swr_can_create_resource(struct pipe_screen *screen,
584 const struct pipe_resource *templat)
585 {
586 struct swr_resource res;
587 memset(&res, 0, sizeof(res));
588 res.base = *templat;
589 return swr_texture_layout(swr_screen(screen), &res, false);
590 }
591
592 static struct pipe_resource *
593 swr_resource_create(struct pipe_screen *_screen,
594 const struct pipe_resource *templat)
595 {
596 struct swr_screen *screen = swr_screen(_screen);
597 struct swr_resource *res = CALLOC_STRUCT(swr_resource);
598 if (!res)
599 return NULL;
600
601 res->base = *templat;
602 pipe_reference_init(&res->base.reference, 1);
603 res->base.screen = &screen->base;
604
605 if (swr_resource_is_texture(&res->base)) {
606 if (res->base.bind & (PIPE_BIND_DISPLAY_TARGET | PIPE_BIND_SCANOUT
607 | PIPE_BIND_SHARED)) {
608 /* displayable surface
609 * first call swr_texture_layout without allocating to finish
610 * filling out the SWR_SURFAE_STATE in res */
611 swr_texture_layout(screen, res, false);
612 if (!swr_displaytarget_layout(screen, res))
613 goto fail;
614 } else {
615 /* texture map */
616 if (!swr_texture_layout(screen, res, true))
617 goto fail;
618 }
619 } else {
620 /* other data (vertex buffer, const buffer, etc) */
621 assert(util_format_get_blocksize(templat->format) == 1);
622 assert(templat->height0 == 1);
623 assert(templat->depth0 == 1);
624 assert(templat->last_level == 0);
625
626 /* Easiest to just call swr_texture_layout, as it sets up
627 * SWR_SURFAE_STATE in res */
628 if (!swr_texture_layout(screen, res, true))
629 goto fail;
630 }
631
632 return &res->base;
633
634 fail:
635 FREE(res);
636 return NULL;
637 }
638
639 static void
640 swr_resource_destroy(struct pipe_screen *p_screen, struct pipe_resource *pt)
641 {
642 struct swr_screen *screen = swr_screen(p_screen);
643 struct swr_resource *spr = swr_resource(pt);
644 struct pipe_context *pipe = screen->pipe;
645
646 /* Only wait on fence if the resource is being used */
647 if (pipe && spr->status) {
648 /* But, if there's no fence pending, submit one.
649 * XXX: Remove once draw timestamps are implmented. */
650 if (!swr_is_fence_pending(screen->flush_fence))
651 swr_fence_submit(swr_context(pipe), screen->flush_fence);
652
653 swr_fence_finish(p_screen, screen->flush_fence, 0);
654 swr_resource_unused(pt);
655 }
656
657 /*
658 * Free resource primary surface. If resource is display target, winsys
659 * manages the buffer and will free it on displaytarget_destroy.
660 */
661 if (spr->display_target) {
662 /* display target */
663 struct sw_winsys *winsys = screen->winsys;
664 winsys->displaytarget_destroy(winsys, spr->display_target);
665 } else
666 _aligned_free(spr->swr.pBaseAddress);
667
668 _aligned_free(spr->secondary.pBaseAddress);
669
670 FREE(spr);
671 }
672
673
674 static void
675 swr_flush_frontbuffer(struct pipe_screen *p_screen,
676 struct pipe_resource *resource,
677 unsigned level,
678 unsigned layer,
679 void *context_private,
680 struct pipe_box *sub_box)
681 {
682 struct swr_screen *screen = swr_screen(p_screen);
683 struct sw_winsys *winsys = screen->winsys;
684 struct swr_resource *spr = swr_resource(resource);
685 struct pipe_context *pipe = screen->pipe;
686
687 if (pipe) {
688 swr_fence_finish(p_screen, screen->flush_fence, 0);
689 swr_resource_unused(resource);
690 SwrEndFrame(swr_context(pipe)->swrContext);
691 }
692
693 debug_assert(spr->display_target);
694 if (spr->display_target)
695 winsys->displaytarget_display(
696 winsys, spr->display_target, context_private, sub_box);
697 }
698
699
700 static void
701 swr_destroy_screen(struct pipe_screen *p_screen)
702 {
703 struct swr_screen *screen = swr_screen(p_screen);
704 struct sw_winsys *winsys = screen->winsys;
705
706 fprintf(stderr, "SWR destroy screen!\n");
707
708 swr_fence_finish(p_screen, screen->flush_fence, 0);
709 swr_fence_reference(p_screen, &screen->flush_fence, NULL);
710
711 JitDestroyContext(screen->hJitMgr);
712
713 if (winsys->destroy)
714 winsys->destroy(winsys);
715
716 FREE(screen);
717 }
718
719 PUBLIC
720 struct pipe_screen *
721 swr_create_screen(struct sw_winsys *winsys)
722 {
723 struct swr_screen *screen = CALLOC_STRUCT(swr_screen);
724
725 if (!screen)
726 return NULL;
727
728 if (!getenv("KNOB_MAX_PRIMS_PER_DRAW")) {
729 g_GlobalKnobs.MAX_PRIMS_PER_DRAW.Value(49152);
730 }
731
732 screen->winsys = winsys;
733 screen->base.get_name = swr_get_name;
734 screen->base.get_vendor = swr_get_vendor;
735 screen->base.is_format_supported = swr_is_format_supported;
736 screen->base.context_create = swr_create_context;
737 screen->base.can_create_resource = swr_can_create_resource;
738
739 screen->base.destroy = swr_destroy_screen;
740 screen->base.get_param = swr_get_param;
741 screen->base.get_shader_param = swr_get_shader_param;
742 screen->base.get_paramf = swr_get_paramf;
743
744 screen->base.resource_create = swr_resource_create;
745 screen->base.resource_destroy = swr_resource_destroy;
746
747 screen->base.flush_frontbuffer = swr_flush_frontbuffer;
748
749 screen->hJitMgr = JitCreateContext(KNOB_SIMD_WIDTH, KNOB_ARCH_STR);
750
751 swr_fence_init(&screen->base);
752
753 util_format_s3tc_init();
754
755 return &screen->base;
756 }
757
758 struct sw_winsys *
759 swr_get_winsys(struct pipe_screen *pipe)
760 {
761 return ((struct swr_screen *)pipe)->winsys;
762 }
763
764 struct sw_displaytarget *
765 swr_get_displaytarget(struct pipe_resource *resource)
766 {
767 return ((struct swr_resource *)resource)->display_target;
768 }