projects / mesa.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
gallium/swr: fix corruptions in Unigine Heaven
[mesa.git] / src / gallium / drivers / swr / swr_state.cpp
1 /****************************************************************************
2 * Copyright (C) 2015 Intel Corporation. All Rights Reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 ***************************************************************************/
23
24 #include <llvm/Config/llvm-config.h>
25
26 #if LLVM_VERSION_MAJOR < 7
27 // llvm redefines DEBUG
28 #pragma push_macro("DEBUG")
29 #undef DEBUG
30 #endif
31
32 #include <rasterizer/core/state.h>
33 #include "JitManager.h"
34
35 #if LLVM_VERSION_MAJOR < 7
36 #pragma pop_macro("DEBUG")
37 #endif
38
39 #include "common/os.h"
40 #include "jit_api.h"
41 #include "gen_state_llvm.h"
42 #include "core/multisample.h"
43 #include "core/state_funcs.h"
44
45 #include "gallivm/lp_bld_tgsi.h"
46 #include "util/format/u_format.h"
47
48 #include "util/u_memory.h"
49 #include "util/u_inlines.h"
50 #include "util/u_helpers.h"
51 #include "util/u_framebuffer.h"
52 #include "util/u_viewport.h"
53 #include "util/u_prim.h"
54 #include "util/u_vbuf.h"
55
56 #include "swr_state.h"
57 #include "swr_context.h"
58 #include "gen_surf_state_llvm.h"
59 #include "gen_swr_context_llvm.h"
60 #include "swr_screen.h"
61 #include "swr_resource.h"
62 #include "swr_tex_sample.h"
63 #include "swr_scratch.h"
64 #include "swr_shader.h"
65 #include "swr_fence.h"
66
67 /* These should be pulled out into separate files as necessary
68 * Just initializing everything here to get going. */
69
70 static void *
71 swr_create_blend_state(struct pipe_context *pipe,
72 const struct pipe_blend_state *blend)
73 {
74 struct swr_blend_state *state = CALLOC_STRUCT(swr_blend_state);
75 assert(state != nullptr);
76
77 memcpy(&state->pipe, blend, sizeof(*blend));
78
79 struct pipe_blend_state *pipe_blend = &state->pipe;
80
81 for (int target = 0;
82 target < std::min(SWR_NUM_RENDERTARGETS, PIPE_MAX_COLOR_BUFS);
83 target++) {
84
85 struct pipe_rt_blend_state *rt_blend = &pipe_blend->rt[target];
86 SWR_RENDER_TARGET_BLEND_STATE &blendState =
87 state->blendState.renderTarget[target];
88 RENDER_TARGET_BLEND_COMPILE_STATE &compileState =
89 state->compileState[target];
90
91 if (target != 0 && !pipe_blend->independent_blend_enable) {
92 memcpy(&compileState,
93 &state->compileState[0],
94 sizeof(RENDER_TARGET_BLEND_COMPILE_STATE));
95 continue;
96 }
97
98 compileState.blendEnable = rt_blend->blend_enable;
99 if (compileState.blendEnable) {
100 compileState.sourceAlphaBlendFactor =
101 swr_convert_blend_factor(rt_blend->alpha_src_factor);
102 compileState.destAlphaBlendFactor =
103 swr_convert_blend_factor(rt_blend->alpha_dst_factor);
104 compileState.sourceBlendFactor =
105 swr_convert_blend_factor(rt_blend->rgb_src_factor);
106 compileState.destBlendFactor =
107 swr_convert_blend_factor(rt_blend->rgb_dst_factor);
108
109 compileState.colorBlendFunc =
110 swr_convert_blend_func(rt_blend->rgb_func);
111 compileState.alphaBlendFunc =
112 swr_convert_blend_func(rt_blend->alpha_func);
113 }
114 compileState.logicOpEnable = state->pipe.logicop_enable;
115 if (compileState.logicOpEnable) {
116 compileState.logicOpFunc =
117 swr_convert_logic_op(state->pipe.logicop_func);
118 }
119
120 blendState.writeDisableRed =
121 (rt_blend->colormask & PIPE_MASK_R) ? 0 : 1;
122 blendState.writeDisableGreen =
123 (rt_blend->colormask & PIPE_MASK_G) ? 0 : 1;
124 blendState.writeDisableBlue =
125 (rt_blend->colormask & PIPE_MASK_B) ? 0 : 1;
126 blendState.writeDisableAlpha =
127 (rt_blend->colormask & PIPE_MASK_A) ? 0 : 1;
128
129 if (rt_blend->colormask == 0)
130 compileState.blendEnable = false;
131 }
132
133 return state;
134 }
135
136 static void
137 swr_bind_blend_state(struct pipe_context *pipe, void *blend)
138 {
139 struct swr_context *ctx = swr_context(pipe);
140
141 if (ctx->blend == blend)
142 return;
143
144 ctx->blend = (swr_blend_state *)blend;
145
146 ctx->dirty |= SWR_NEW_BLEND;
147 }
148
149 static void
150 swr_delete_blend_state(struct pipe_context *pipe, void *blend)
151 {
152 FREE(blend);
153 }
154
155 static void
156 swr_set_blend_color(struct pipe_context *pipe,
157 const struct pipe_blend_color *color)
158 {
159 struct swr_context *ctx = swr_context(pipe);
160
161 ctx->blend_color = *color;
162
163 ctx->dirty |= SWR_NEW_BLEND;
164 }
165
166 static void
167 swr_set_stencil_ref(struct pipe_context *pipe,
168 const struct pipe_stencil_ref *ref)
169 {
170 struct swr_context *ctx = swr_context(pipe);
171
172 ctx->stencil_ref = *ref;
173
174 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
175 }
176
177 static void *
178 swr_create_depth_stencil_state(
179 struct pipe_context *pipe,
180 const struct pipe_depth_stencil_alpha_state *depth_stencil)
181 {
182 struct pipe_depth_stencil_alpha_state *state;
183
184 state = (pipe_depth_stencil_alpha_state *)mem_dup(depth_stencil,
185 sizeof *depth_stencil);
186
187 return state;
188 }
189
190 static void
191 swr_bind_depth_stencil_state(struct pipe_context *pipe, void *depth_stencil)
192 {
193 struct swr_context *ctx = swr_context(pipe);
194
195 if (ctx->depth_stencil == (pipe_depth_stencil_alpha_state *)depth_stencil)
196 return;
197
198 ctx->depth_stencil = (pipe_depth_stencil_alpha_state *)depth_stencil;
199
200 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
201 }
202
203 static void
204 swr_delete_depth_stencil_state(struct pipe_context *pipe, void *depth)
205 {
206 FREE(depth);
207 }
208
209
210 static void *
211 swr_create_rasterizer_state(struct pipe_context *pipe,
212 const struct pipe_rasterizer_state *rast)
213 {
214 struct pipe_rasterizer_state *state;
215 state = (pipe_rasterizer_state *)mem_dup(rast, sizeof *rast);
216
217 return state;
218 }
219
220 static void
221 swr_bind_rasterizer_state(struct pipe_context *pipe, void *handle)
222 {
223 struct swr_context *ctx = swr_context(pipe);
224 const struct pipe_rasterizer_state *rasterizer =
225 (const struct pipe_rasterizer_state *)handle;
226
227 if (ctx->rasterizer == (pipe_rasterizer_state *)rasterizer)
228 return;
229
230 ctx->rasterizer = (pipe_rasterizer_state *)rasterizer;
231
232 ctx->dirty |= SWR_NEW_RASTERIZER;
233 }
234
235 static void
236 swr_delete_rasterizer_state(struct pipe_context *pipe, void *rasterizer)
237 {
238 FREE(rasterizer);
239 }
240
241
242 static void *
243 swr_create_sampler_state(struct pipe_context *pipe,
244 const struct pipe_sampler_state *sampler)
245 {
246 struct pipe_sampler_state *state =
247 (pipe_sampler_state *)mem_dup(sampler, sizeof *sampler);
248
249 return state;
250 }
251
252 static void
253 swr_bind_sampler_states(struct pipe_context *pipe,
254 enum pipe_shader_type shader,
255 unsigned start,
256 unsigned num,
257 void **samplers)
258 {
259 struct swr_context *ctx = swr_context(pipe);
260 unsigned i;
261
262 assert(shader < PIPE_SHADER_TYPES);
263 assert(start + num <= ARRAY_SIZE(ctx->samplers[shader]));
264
265 /* set the new samplers */
266 ctx->num_samplers[shader] = num;
267 for (i = 0; i < num; i++) {
268 ctx->samplers[shader][start + i] = (pipe_sampler_state *)samplers[i];
269 }
270
271 ctx->dirty |= SWR_NEW_SAMPLER;
272 }
273
274 static void
275 swr_delete_sampler_state(struct pipe_context *pipe, void *sampler)
276 {
277 FREE(sampler);
278 }
279
280
281 static struct pipe_sampler_view *
282 swr_create_sampler_view(struct pipe_context *pipe,
283 struct pipe_resource *texture,
284 const struct pipe_sampler_view *templ)
285 {
286 struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view);
287
288 if (view) {
289 *view = *templ;
290 view->reference.count = 1;
291 view->texture = NULL;
292 pipe_resource_reference(&view->texture, texture);
293 view->context = pipe;
294 }
295
296 return view;
297 }
298
299 static void
300 swr_set_sampler_views(struct pipe_context *pipe,
301 enum pipe_shader_type shader,
302 unsigned start,
303 unsigned num,
304 struct pipe_sampler_view **views)
305 {
306 struct swr_context *ctx = swr_context(pipe);
307 uint i;
308
309 assert(num <= PIPE_MAX_SHADER_SAMPLER_VIEWS);
310
311 assert(shader < PIPE_SHADER_TYPES);
312 assert(start + num <= ARRAY_SIZE(ctx->sampler_views[shader]));
313
314 /* set the new sampler views */
315 ctx->num_sampler_views[shader] = num;
316 for (i = 0; i < num; i++) {
317 pipe_sampler_view_reference(&ctx->sampler_views[shader][start + i],
318 views[i]);
319 }
320
321 ctx->dirty |= SWR_NEW_SAMPLER_VIEW;
322 }
323
324 static void
325 swr_sampler_view_destroy(struct pipe_context *pipe,
326 struct pipe_sampler_view *view)
327 {
328 pipe_resource_reference(&view->texture, NULL);
329 FREE(view);
330 }
331
332 static void *
333 swr_create_vs_state(struct pipe_context *pipe,
334 const struct pipe_shader_state *vs)
335 {
336 struct swr_vertex_shader *swr_vs = new swr_vertex_shader;
337 if (!swr_vs)
338 return NULL;
339
340 swr_vs->pipe.tokens = tgsi_dup_tokens(vs->tokens);
341 swr_vs->pipe.stream_output = vs->stream_output;
342
343 lp_build_tgsi_info(vs->tokens, &swr_vs->info);
344
345 swr_vs->soState = {0};
346
347 if (swr_vs->pipe.stream_output.num_outputs) {
348 pipe_stream_output_info *stream_output = &swr_vs->pipe.stream_output;
349
350 swr_vs->soState.soEnable = true;
351 // soState.rasterizerDisable set on state dirty
352 // soState.streamToRasterizer not used
353
354 for (uint32_t i = 0; i < stream_output->num_outputs; i++) {
355 unsigned attrib_slot = stream_output->output[i].register_index;
356 attrib_slot = swr_so_adjust_attrib(attrib_slot, swr_vs);
357 swr_vs->soState.streamMasks[stream_output->output[i].stream] |=
358 (1 << attrib_slot);
359 }
360 for (uint32_t i = 0; i < MAX_SO_STREAMS; i++) {
361 swr_vs->soState.streamNumEntries[i] =
362 _mm_popcnt_u32(swr_vs->soState.streamMasks[i]);
363 }
364 }
365
366 return swr_vs;
367 }
368
369 static void
370 swr_bind_vs_state(struct pipe_context *pipe, void *vs)
371 {
372 struct swr_context *ctx = swr_context(pipe);
373
374 if (ctx->vs == vs)
375 return;
376
377 ctx->vs = (swr_vertex_shader *)vs;
378 ctx->dirty |= SWR_NEW_VS;
379 }
380
381 static void
382 swr_delete_vs_state(struct pipe_context *pipe, void *vs)
383 {
384 struct swr_vertex_shader *swr_vs = (swr_vertex_shader *)vs;
385 FREE((void *)swr_vs->pipe.tokens);
386 struct swr_screen *screen = swr_screen(pipe->screen);
387
388 /* Defer deletion of vs state */
389 swr_fence_work_delete_vs(screen->flush_fence, swr_vs);
390 }
391
392 static void *
393 swr_create_fs_state(struct pipe_context *pipe,
394 const struct pipe_shader_state *fs)
395 {
396 struct swr_fragment_shader *swr_fs = new swr_fragment_shader;
397 if (!swr_fs)
398 return NULL;
399
400 swr_fs->pipe.tokens = tgsi_dup_tokens(fs->tokens);
401
402 lp_build_tgsi_info(fs->tokens, &swr_fs->info);
403
404 return swr_fs;
405 }
406
407
408 static void
409 swr_bind_fs_state(struct pipe_context *pipe, void *fs)
410 {
411 struct swr_context *ctx = swr_context(pipe);
412
413 if (ctx->fs == fs)
414 return;
415
416 ctx->fs = (swr_fragment_shader *)fs;
417 ctx->dirty |= SWR_NEW_FS;
418 }
419
420 static void
421 swr_delete_fs_state(struct pipe_context *pipe, void *fs)
422 {
423 struct swr_fragment_shader *swr_fs = (swr_fragment_shader *)fs;
424 FREE((void *)swr_fs->pipe.tokens);
425 struct swr_screen *screen = swr_screen(pipe->screen);
426
427 /* Defer deleton of fs state */
428 swr_fence_work_delete_fs(screen->flush_fence, swr_fs);
429 }
430
431 static void *
432 swr_create_gs_state(struct pipe_context *pipe,
433 const struct pipe_shader_state *gs)
434 {
435 struct swr_geometry_shader *swr_gs = new swr_geometry_shader;
436 if (!swr_gs)
437 return NULL;
438
439 swr_gs->pipe.tokens = tgsi_dup_tokens(gs->tokens);
440 lp_build_tgsi_info(gs->tokens, &swr_gs->info);
441 return swr_gs;
442 }
443
444 static void
445 swr_bind_gs_state(struct pipe_context *pipe, void *gs)
446 {
447 struct swr_context *ctx = swr_context(pipe);
448
449 if (ctx->gs == gs)
450 return;
451
452 ctx->gs = (swr_geometry_shader *)gs;
453 ctx->dirty |= SWR_NEW_GS;
454 }
455
456 static void
457 swr_delete_gs_state(struct pipe_context *pipe, void *gs)
458 {
459 struct swr_geometry_shader *swr_gs = (swr_geometry_shader *)gs;
460 FREE((void *)swr_gs->pipe.tokens);
461 struct swr_screen *screen = swr_screen(pipe->screen);
462
463 /* Defer deleton of fs state */
464 swr_fence_work_delete_gs(screen->flush_fence, swr_gs);
465 }
466
467 static void *
468 swr_create_tcs_state(struct pipe_context *pipe,
469 const struct pipe_shader_state *tcs)
470 {
471 struct swr_tess_control_shader *swr_tcs = new swr_tess_control_shader;
472 if (!swr_tcs)
473 return NULL;
474
475 swr_tcs->pipe.tokens = tgsi_dup_tokens(tcs->tokens);
476 lp_build_tgsi_info(tcs->tokens, &swr_tcs->info);
477 return swr_tcs;
478 }
479
480 static void
481 swr_bind_tcs_state(struct pipe_context *pipe, void *tcs)
482 {
483 struct swr_context *ctx = swr_context(pipe);
484
485 if (ctx->tcs == tcs)
486 return;
487
488 ctx->tcs = (swr_tess_control_shader *)tcs;
489 ctx->dirty |= SWR_NEW_TCS;
490 ctx->dirty |= SWR_NEW_TS;
491 }
492
493 static void
494 swr_delete_tcs_state(struct pipe_context *pipe, void *tcs)
495 {
496 struct swr_tess_control_shader *swr_tcs = (swr_tess_control_shader *)tcs;
497 FREE((void *)swr_tcs->pipe.tokens);
498 struct swr_screen *screen = swr_screen(pipe->screen);
499
500 /* Defer deleton of tcs state */
501 swr_fence_work_delete_tcs(screen->flush_fence, swr_tcs);
502 }
503
504 static void *
505 swr_create_tes_state(struct pipe_context *pipe,
506 const struct pipe_shader_state *tes)
507 {
508 struct swr_tess_evaluation_shader *swr_tes = new swr_tess_evaluation_shader;
509 if (!swr_tes)
510 return NULL;
511
512 swr_tes->pipe.tokens = tgsi_dup_tokens(tes->tokens);
513 lp_build_tgsi_info(tes->tokens, &swr_tes->info);
514 return swr_tes;
515 }
516
517 static void
518 swr_bind_tes_state(struct pipe_context *pipe, void *tes)
519 {
520 struct swr_context *ctx = swr_context(pipe);
521
522 if (ctx->tes == tes)
523 return;
524
525 // Save current tessellator state first
526 if (ctx->tes != nullptr) {
527 ctx->tes->ts_state = ctx->tsState;
528 }
529
530 ctx->tes = (swr_tess_evaluation_shader *)tes;
531
532 ctx->dirty |= SWR_NEW_TES;
533 ctx->dirty |= SWR_NEW_TS;
534 }
535
536 static void
537 swr_delete_tes_state(struct pipe_context *pipe, void *tes)
538 {
539 struct swr_tess_evaluation_shader *swr_tes = (swr_tess_evaluation_shader *)tes;
540 FREE((void *)swr_tes->pipe.tokens);
541 struct swr_screen *screen = swr_screen(pipe->screen);
542
543 /* Defer deleton of tes state */
544 swr_fence_work_delete_tes(screen->flush_fence, swr_tes);
545 }
546
547 static void
548 swr_set_constant_buffer(struct pipe_context *pipe,
549 enum pipe_shader_type shader,
550 uint index,
551 const struct pipe_constant_buffer *cb)
552 {
553 struct swr_context *ctx = swr_context(pipe);
554 struct pipe_resource *constants = cb ? cb->buffer : NULL;
555
556 assert(shader < PIPE_SHADER_TYPES);
557 assert(index < ARRAY_SIZE(ctx->constants[shader]));
558
559 /* note: reference counting */
560 util_copy_constant_buffer(&ctx->constants[shader][index], cb);
561
562 if (shader == PIPE_SHADER_VERTEX) {
563 ctx->dirty |= SWR_NEW_VSCONSTANTS;
564 } else if (shader == PIPE_SHADER_FRAGMENT) {
565 ctx->dirty |= SWR_NEW_FSCONSTANTS;
566 } else if (shader == PIPE_SHADER_GEOMETRY) {
567 ctx->dirty |= SWR_NEW_GSCONSTANTS;
568 } else if (shader == PIPE_SHADER_TESS_CTRL) {
569 ctx->dirty |= SWR_NEW_TCSCONSTANTS;
570 } else if (shader == PIPE_SHADER_TESS_EVAL) {
571 ctx->dirty |= SWR_NEW_TESCONSTANTS;
572 }
573 if (cb && cb->user_buffer) {
574 pipe_resource_reference(&constants, NULL);
575 }
576 }
577
578
579 static void *
580 swr_create_vertex_elements_state(struct pipe_context *pipe,
581 unsigned num_elements,
582 const struct pipe_vertex_element *attribs)
583 {
584 struct swr_vertex_element_state *velems;
585 assert(num_elements <= PIPE_MAX_ATTRIBS);
586 velems = new swr_vertex_element_state;
587 if (velems) {
588 memset(&velems->fsState, 0, sizeof(velems->fsState));
589 velems->fsState.bVertexIDOffsetEnable = true;
590 velems->fsState.numAttribs = num_elements;
591 for (unsigned i = 0; i < num_elements; i++) {
592 // XXX: we should do this keyed on the VS usage info
593
594 const struct util_format_description *desc =
595 util_format_description(attribs[i].src_format);
596
597 velems->fsState.layout[i].AlignedByteOffset = attribs[i].src_offset;
598 velems->fsState.layout[i].Format =
599 mesa_to_swr_format(attribs[i].src_format);
600 velems->fsState.layout[i].StreamIndex =
601 attribs[i].vertex_buffer_index;
602 velems->fsState.layout[i].InstanceEnable =
603 attribs[i].instance_divisor != 0;
604 velems->fsState.layout[i].ComponentControl0 =
605 desc->channel[0].type != UTIL_FORMAT_TYPE_VOID
606 ? ComponentControl::StoreSrc
607 : ComponentControl::Store0;
608 velems->fsState.layout[i].ComponentControl1 =
609 desc->channel[1].type != UTIL_FORMAT_TYPE_VOID
610 ? ComponentControl::StoreSrc
611 : ComponentControl::Store0;
612 velems->fsState.layout[i].ComponentControl2 =
613 desc->channel[2].type != UTIL_FORMAT_TYPE_VOID
614 ? ComponentControl::StoreSrc
615 : ComponentControl::Store0;
616 velems->fsState.layout[i].ComponentControl3 =
617 desc->channel[3].type != UTIL_FORMAT_TYPE_VOID
618 ? ComponentControl::StoreSrc
619 : ComponentControl::Store1Fp;
620 velems->fsState.layout[i].ComponentPacking = ComponentEnable::XYZW;
621 velems->fsState.layout[i].InstanceAdvancementState =
622 attribs[i].instance_divisor;
623
624 /* Calculate the pitch of each stream */
625 const SWR_FORMAT_INFO &swr_desc = GetFormatInfo(
626 mesa_to_swr_format(attribs[i].src_format));
627 velems->stream_pitch[attribs[i].vertex_buffer_index] += swr_desc.Bpp;
628
629 if (attribs[i].instance_divisor != 0) {
630 velems->instanced_bufs |= 1U << attribs[i].vertex_buffer_index;
631 uint32_t *min_instance_div =
632 &velems->min_instance_div[attribs[i].vertex_buffer_index];
633 if (!*min_instance_div ||
634 attribs[i].instance_divisor < *min_instance_div)
635 *min_instance_div = attribs[i].instance_divisor;
636 }
637 }
638 }
639
640 return velems;
641 }
642
643 static void
644 swr_bind_vertex_elements_state(struct pipe_context *pipe, void *velems)
645 {
646 struct swr_context *ctx = swr_context(pipe);
647 struct swr_vertex_element_state *swr_velems =
648 (struct swr_vertex_element_state *)velems;
649
650 ctx->velems = swr_velems;
651 ctx->dirty |= SWR_NEW_VERTEX;
652 }
653
654 static void
655 swr_delete_vertex_elements_state(struct pipe_context *pipe, void *velems)
656 {
657 struct swr_vertex_element_state *swr_velems =
658 (struct swr_vertex_element_state *) velems;
659 /* XXX Need to destroy fetch shader? */
660 delete swr_velems;
661 }
662
663
664 static void
665 swr_set_vertex_buffers(struct pipe_context *pipe,
666 unsigned start_slot,
667 unsigned num_elements,
668 const struct pipe_vertex_buffer *buffers)
669 {
670 struct swr_context *ctx = swr_context(pipe);
671
672 assert(num_elements <= PIPE_MAX_ATTRIBS);
673
674 util_set_vertex_buffers_count(ctx->vertex_buffer,
675 &ctx->num_vertex_buffers,
676 buffers,
677 start_slot,
678 num_elements);
679
680 ctx->dirty |= SWR_NEW_VERTEX;
681 }
682
683
684 static void
685 swr_set_polygon_stipple(struct pipe_context *pipe,
686 const struct pipe_poly_stipple *stipple)
687 {
688 struct swr_context *ctx = swr_context(pipe);
689
690 ctx->poly_stipple.pipe = *stipple; /* struct copy */
691 ctx->dirty |= SWR_NEW_STIPPLE;
692 }
693
694 static void
695 swr_set_clip_state(struct pipe_context *pipe,
696 const struct pipe_clip_state *clip)
697 {
698 struct swr_context *ctx = swr_context(pipe);
699
700 ctx->clip = *clip;
701 /* XXX Unimplemented, but prevents crash */
702
703 ctx->dirty |= SWR_NEW_CLIP;
704 }
705
706
707 static void
708 swr_set_scissor_states(struct pipe_context *pipe,
709 unsigned start_slot,
710 unsigned num_scissors,
711 const struct pipe_scissor_state *scissors)
712 {
713 struct swr_context *ctx = swr_context(pipe);
714
715 memcpy(ctx->scissors + start_slot, scissors,
716 sizeof(struct pipe_scissor_state) * num_scissors);
717
718 for (unsigned i = 0; i < num_scissors; i++) {
719 auto idx = start_slot + i;
720 ctx->swr_scissors[idx].xmin = scissors[idx].minx;
721 ctx->swr_scissors[idx].xmax = scissors[idx].maxx;
722 ctx->swr_scissors[idx].ymin = scissors[idx].miny;
723 ctx->swr_scissors[idx].ymax = scissors[idx].maxy;
724 }
725 ctx->dirty |= SWR_NEW_SCISSOR;
726 }
727
728 static void
729 swr_set_viewport_states(struct pipe_context *pipe,
730 unsigned start_slot,
731 unsigned num_viewports,
732 const struct pipe_viewport_state *vpt)
733 {
734 struct swr_context *ctx = swr_context(pipe);
735
736 memcpy(ctx->viewports + start_slot, vpt, sizeof(struct pipe_viewport_state) * num_viewports);
737 ctx->dirty |= SWR_NEW_VIEWPORT;
738 }
739
740
741 static void
742 swr_set_framebuffer_state(struct pipe_context *pipe,
743 const struct pipe_framebuffer_state *fb)
744 {
745 struct swr_context *ctx = swr_context(pipe);
746
747 bool changed = !util_framebuffer_state_equal(&ctx->framebuffer, fb);
748
749 assert(fb->width <= KNOB_GUARDBAND_WIDTH);
750 assert(fb->height <= KNOB_GUARDBAND_HEIGHT);
751
752 if (changed) {
753 util_copy_framebuffer_state(&ctx->framebuffer, fb);
754
755 /* 0 and 1 both indicate no msaa. Core doesn't understand 0 samples */
756 ctx->framebuffer.samples = std::max((ubyte)1, ctx->framebuffer.samples);
757
758 ctx->dirty |= SWR_NEW_FRAMEBUFFER;
759 }
760 }
761
762
763 static void
764 swr_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
765 {
766 struct swr_context *ctx = swr_context(pipe);
767
768 if (sample_mask != ctx->sample_mask) {
769 ctx->sample_mask = sample_mask;
770 ctx->dirty |= SWR_NEW_RASTERIZER;
771 }
772 }
773
774 /*
775 * MSAA fixed sample position table
776 * used by update_derived and get_sample_position
777 * (integer locations on a 16x16 grid)
778 */
779 static const uint8_t swr_sample_positions[][2] =
780 { /* 1x*/ { 8, 8},
781 /* 2x*/ {12,12},{ 4, 4},
782 /* 4x*/ { 6, 2},{14, 6},{ 2,10},{10,14},
783 /* 8x*/ { 9, 5},{ 7,11},{13, 9},{ 5, 3},
784 { 3,13},{ 1, 7},{11,15},{15, 1},
785 /*16x*/ { 9, 9},{ 7, 5},{ 5,10},{12, 7},
786 { 3, 6},{10,13},{13,11},{11, 3},
787 { 6,14},{ 8, 1},{ 4, 2},{ 2,12},
788 { 0, 8},{15, 4},{14,15},{ 1, 0} };
789
790 static void
791 swr_get_sample_position(struct pipe_context *pipe,
792 unsigned sample_count, unsigned sample_index,
793 float *out_value)
794 {
795 /* validate sample_count */
796 sample_count = GetNumSamples(GetSampleCount(sample_count));
797
798 const uint8_t *sample = swr_sample_positions[sample_count-1 + sample_index];
799 out_value[0] = sample[0] / 16.0f;
800 out_value[1] = sample[1] / 16.0f;
801 }
802
803
804 /*
805 * Update resource in-use status
806 * All resources bound to color or depth targets marked as WRITE resources.
807 * VBO Vertex/index buffers and texture views marked as READ resources.
808 */
809 void
810 swr_update_resource_status(struct pipe_context *pipe,
811 const struct pipe_draw_info *p_draw_info)
812 {
813 struct swr_context *ctx = swr_context(pipe);
814 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
815
816 /* colorbuffer targets */
817 if (fb->nr_cbufs)
818 for (uint32_t i = 0; i < fb->nr_cbufs; ++i)
819 if (fb->cbufs[i])
820 swr_resource_write(fb->cbufs[i]->texture);
821
822 /* depth/stencil target */
823 if (fb->zsbuf)
824 swr_resource_write(fb->zsbuf->texture);
825
826 /* VBO vertex buffers */
827 for (uint32_t i = 0; i < ctx->num_vertex_buffers; i++) {
828 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
829 if (!vb->is_user_buffer && vb->buffer.resource)
830 swr_resource_read(vb->buffer.resource);
831 }
832
833 /* VBO index buffer */
834 if (p_draw_info && p_draw_info->index_size) {
835 if (!p_draw_info->has_user_indices)
836 swr_resource_read(p_draw_info->index.resource);
837 }
838
839 /* transform feedback buffers */
840 for (uint32_t i = 0; i < ctx->num_so_targets; i++) {
841 struct pipe_stream_output_target *target = ctx->so_targets[i];
842 if (target && target->buffer)
843 swr_resource_write(target->buffer);
844 }
845
846 /* texture sampler views */
847 for (uint32_t j : {PIPE_SHADER_VERTEX, PIPE_SHADER_FRAGMENT}) {
848 for (uint32_t i = 0; i < ctx->num_sampler_views[j]; i++) {
849 struct pipe_sampler_view *view = ctx->sampler_views[j][i];
850 if (view)
851 swr_resource_read(view->texture);
852 }
853 }
854
855 /* constant buffers */
856 for (uint32_t j : {PIPE_SHADER_VERTEX, PIPE_SHADER_FRAGMENT}) {
857 for (uint32_t i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
858 struct pipe_constant_buffer *cb = &ctx->constants[j][i];
859 if (cb->buffer)
860 swr_resource_read(cb->buffer);
861 }
862 }
863 }
864
865 static void
866 swr_update_texture_state(struct swr_context *ctx,
867 enum pipe_shader_type shader_type,
868 unsigned num_sampler_views,
869 swr_jit_texture *textures)
870 {
871 for (unsigned i = 0; i < num_sampler_views; i++) {
872 struct pipe_sampler_view *view =
873 ctx->sampler_views[shader_type][i];
874 struct swr_jit_texture *jit_tex = &textures[i];
875
876 memset(jit_tex, 0, sizeof(*jit_tex));
877 if (view) {
878 struct pipe_resource *res = view->texture;
879 struct swr_resource *swr_res = swr_resource(res);
880 SWR_SURFACE_STATE *swr = &swr_res->swr;
881 size_t *mip_offsets = swr_res->mip_offsets;
882 if (swr_res->has_depth && swr_res->has_stencil &&
883 !util_format_has_depth(util_format_description(view->format))) {
884 swr = &swr_res->secondary;
885 mip_offsets = swr_res->secondary_mip_offsets;
886 }
887
888 jit_tex->width = res->width0;
889 jit_tex->height = res->height0;
890 jit_tex->base_ptr = (uint8_t*)swr->xpBaseAddress;
891 if (view->target != PIPE_BUFFER) {
892 jit_tex->first_level = view->u.tex.first_level;
893 jit_tex->last_level = view->u.tex.last_level;
894 if (view->target == PIPE_TEXTURE_3D)
895 jit_tex->depth = res->depth0;
896 else
897 jit_tex->depth =
898 view->u.tex.last_layer - view->u.tex.first_layer + 1;
899 jit_tex->base_ptr += view->u.tex.first_layer *
900 swr->qpitch * swr->pitch;
901 } else {
902 unsigned view_blocksize = util_format_get_blocksize(view->format);
903 jit_tex->base_ptr += view->u.buf.offset;
904 jit_tex->width = view->u.buf.size / view_blocksize;
905 jit_tex->depth = 1;
906 }
907
908 for (unsigned level = jit_tex->first_level;
909 level <= jit_tex->last_level;
910 level++) {
911 jit_tex->row_stride[level] = swr->pitch;
912 jit_tex->img_stride[level] = swr->qpitch * swr->pitch;
913 jit_tex->mip_offsets[level] = mip_offsets[level];
914 }
915 }
916 }
917 }
918
919 static void
920 swr_update_sampler_state(struct swr_context *ctx,
921 enum pipe_shader_type shader_type,
922 unsigned num_samplers,
923 swr_jit_sampler *samplers)
924 {
925 for (unsigned i = 0; i < num_samplers; i++) {
926 const struct pipe_sampler_state *sampler =
927 ctx->samplers[shader_type][i];
928
929 if (sampler) {
930 samplers[i].min_lod = sampler->min_lod;
931 samplers[i].max_lod = sampler->max_lod;
932 samplers[i].lod_bias = sampler->lod_bias;
933 COPY_4V(samplers[i].border_color, sampler->border_color.f);
934 }
935 }
936 }
937
938 static void
939 swr_update_constants(struct swr_context *ctx, enum pipe_shader_type shaderType)
940 {
941 swr_draw_context *pDC = &ctx->swrDC;
942
943 const float **constant;
944 uint32_t *num_constants;
945 struct swr_scratch_space *scratch;
946
947 switch (shaderType) {
948 case PIPE_SHADER_VERTEX:
949 constant = pDC->constantVS;
950 num_constants = pDC->num_constantsVS;
951 scratch = &ctx->scratch->vs_constants;
952 break;
953 case PIPE_SHADER_FRAGMENT:
954 constant = pDC->constantFS;
955 num_constants = pDC->num_constantsFS;
956 scratch = &ctx->scratch->fs_constants;
957 break;
958 case PIPE_SHADER_GEOMETRY:
959 constant = pDC->constantGS;
960 num_constants = pDC->num_constantsGS;
961 scratch = &ctx->scratch->gs_constants;
962 break;
963 case PIPE_SHADER_TESS_CTRL:
964 constant = pDC->constantTCS;
965 num_constants = pDC->num_constantsTCS;
966 scratch = &ctx->scratch->tcs_constants;
967 break;
968 case PIPE_SHADER_TESS_EVAL:
969 constant = pDC->constantTES;
970 num_constants = pDC->num_constantsTES;
971 scratch = &ctx->scratch->tes_constants;
972 break;
973 default:
974 assert(0 && "Unsupported shader type constants");
975 return;
976 }
977
978 for (UINT i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
979 const pipe_constant_buffer *cb = &ctx->constants[shaderType][i];
980 num_constants[i] = cb->buffer_size;
981 if (cb->buffer) {
982 constant[i] =
983 (const float *)(swr_resource_data(cb->buffer) +
984 cb->buffer_offset);
985 } else {
986 /* Need to copy these constants to scratch space */
987 if (cb->user_buffer && cb->buffer_size) {
988 const void *ptr =
989 ((const uint8_t *)cb->user_buffer + cb->buffer_offset);
990 uint32_t size = AlignUp(cb->buffer_size, 4);
991 ptr = swr_copy_to_scratch_space(ctx, scratch, ptr, size);
992 constant[i] = (const float *)ptr;
993 }
994 }
995 }
996 }
997
998 static bool
999 swr_change_rt(struct swr_context *ctx,
1000 unsigned attachment,
1001 const struct pipe_surface *sf)
1002 {
1003 swr_draw_context *pDC = &ctx->swrDC;
1004 struct SWR_SURFACE_STATE *rt = &pDC->renderTargets[attachment];
1005
1006 /* Do nothing if the render target hasn't changed */
1007 if ((!sf || !sf->texture) && (void*)(rt->xpBaseAddress) == nullptr)
1008 return false;
1009
1010 /* Deal with disabling RT up front */
1011 if (!sf || !sf->texture) {
1012 /* If detaching attachment, mark tiles as RESOLVED so core
1013 * won't try to load from non-existent target. */
1014 swr_store_render_target(&ctx->pipe, attachment, SWR_TILE_RESOLVED);
1015 *rt = {0};
1016 return true;
1017 }
1018
1019 const struct swr_resource *swr = swr_resource(sf->texture);
1020 const SWR_SURFACE_STATE *swr_surface = &swr->swr;
1021 SWR_FORMAT fmt = mesa_to_swr_format(sf->format);
1022
1023 if (attachment == SWR_ATTACHMENT_STENCIL && swr->secondary.xpBaseAddress) {
1024 swr_surface = &swr->secondary;
1025 fmt = swr_surface->format;
1026 }
1027
1028 if (rt->xpBaseAddress == swr_surface->xpBaseAddress &&
1029 rt->format == fmt &&
1030 rt->lod == sf->u.tex.level &&
1031 rt->arrayIndex == sf->u.tex.first_layer)
1032 return false;
1033
1034 bool need_fence = false;
1035
1036 /* StoreTile for changed target */
1037 if (rt->xpBaseAddress) {
1038 /* If changing attachment to a new target, mark tiles as
1039 * INVALID so they are reloaded from surface. */
1040 swr_store_render_target(&ctx->pipe, attachment, SWR_TILE_INVALID);
1041 need_fence = true;
1042 } else {
1043 /* if no previous attachment, invalidate tiles that may be marked
1044 * RESOLVED because of an old attachment */
1045 swr_invalidate_render_target(&ctx->pipe, attachment, sf->width, sf->height);
1046 /* no need to set fence here */
1047 }
1048
1049 /* Make new attachment */
1050 *rt = *swr_surface;
1051 rt->format = fmt;
1052 rt->lod = sf->u.tex.level;
1053 rt->arrayIndex = sf->u.tex.first_layer;
1054
1055 return need_fence;
1056 }
1057
1058 /*
1059 * for cases where resources are shared between contexts, invalidate
1060 * this ctx's resource. so it can be fetched fresh. Old ctx's resource
1061 * is already stored during a flush
1062 */
1063 static inline void
1064 swr_invalidate_buffers_after_ctx_change(struct pipe_context *pipe)
1065 {
1066 struct swr_context *ctx = swr_context(pipe);
1067
1068 for (uint32_t i = 0; i < ctx->framebuffer.nr_cbufs; i++) {
1069 struct pipe_surface *cb = ctx->framebuffer.cbufs[i];
1070 if (cb) {
1071 struct swr_resource *res = swr_resource(cb->texture);
1072 if (res->curr_pipe != pipe) {
1073 /* if curr_pipe is NULL (first use), status should not be WRITE */
1074 assert(res->curr_pipe || !(res->status & SWR_RESOURCE_WRITE));
1075 if (res->status & SWR_RESOURCE_WRITE) {
1076 swr_invalidate_render_target(pipe, i, cb->width, cb->height);
1077 }
1078 }
1079 res->curr_pipe = pipe;
1080 }
1081 }
1082 if (ctx->framebuffer.zsbuf) {
1083 struct pipe_surface *zb = ctx->framebuffer.zsbuf;
1084 if (zb) {
1085 struct swr_resource *res = swr_resource(zb->texture);
1086 if (res->curr_pipe != pipe) {
1087 /* if curr_pipe is NULL (first use), status should not be WRITE */
1088 assert(res->curr_pipe || !(res->status & SWR_RESOURCE_WRITE));
1089 if (res->status & SWR_RESOURCE_WRITE) {
1090 swr_invalidate_render_target(pipe, SWR_ATTACHMENT_DEPTH, zb->width, zb->height);
1091 swr_invalidate_render_target(pipe, SWR_ATTACHMENT_STENCIL, zb->width, zb->height);
1092 }
1093 }
1094 res->curr_pipe = pipe;
1095 }
1096 }
1097 }
1098
1099 static inline void
1100 swr_user_vbuf_range(const struct pipe_draw_info *info,
1101 const struct swr_vertex_element_state *velems,
1102 const struct pipe_vertex_buffer *vb,
1103 uint32_t i,
1104 uint32_t *totelems,
1105 uint32_t *base,
1106 uint32_t *size)
1107 {
1108 /* FIXME: The size is too large - we don't access the full extra stride. */
1109 unsigned elems;
1110 if (velems->instanced_bufs & (1U << i)) {
1111 elems = info->instance_count / velems->min_instance_div[i] + 1;
1112 *totelems = info->start_instance + elems;
1113 *base = info->start_instance * vb->stride;
1114 *size = elems * vb->stride;
1115 } else if (vb->stride) {
1116 elems = info->max_index - info->min_index + 1;
1117 *totelems = (info->max_index + info->index_bias) + 1;
1118 *base = (info->min_index + info->index_bias) * vb->stride;
1119 *size = elems * vb->stride;
1120 } else {
1121 *totelems = 1;
1122 *base = 0;
1123 *size = velems->stream_pitch[i];
1124 }
1125 }
1126
1127 static void
1128 swr_update_poly_stipple(struct swr_context *ctx)
1129 {
1130 struct swr_draw_context *pDC = &ctx->swrDC;
1131
1132 assert(sizeof(ctx->poly_stipple.pipe.stipple) == sizeof(pDC->polyStipple));
1133 memcpy(pDC->polyStipple,
1134 ctx->poly_stipple.pipe.stipple,
1135 sizeof(ctx->poly_stipple.pipe.stipple));
1136 }
1137
1138
1139 static struct tgsi_shader_info *
1140 swr_get_last_fe(const struct swr_context *ctx)
1141 {
1142 tgsi_shader_info *pLastFE = &ctx->vs->info.base;
1143
1144 if (ctx->gs) {
1145 pLastFE = &ctx->gs->info.base;
1146 }
1147 else if (ctx->tes) {
1148 pLastFE = &ctx->tes->info.base;
1149 }
1150 else if (ctx->tcs) {
1151 pLastFE = &ctx->tcs->info.base;
1152 }
1153 return pLastFE;
1154 }
1155
1156
1157 void
1158 swr_update_derived(struct pipe_context *pipe,
1159 const struct pipe_draw_info *p_draw_info)
1160 {
1161 struct swr_context *ctx = swr_context(pipe);
1162 struct swr_screen *screen = swr_screen(pipe->screen);
1163
1164 /* When called from swr_clear (p_draw_info = null), set any null
1165 * state-objects to the dummy state objects to prevent nullptr dereference
1166 * in validation below.
1167 *
1168 * Important that this remains static for zero initialization. These
1169 * aren't meant to be proper state objects, just empty structs. They will
1170 * not be written to.
1171 *
1172 * Shaders can't be part of the union since they contain std::unordered_map
1173 */
1174 static struct {
1175 union {
1176 struct pipe_rasterizer_state rasterizer;
1177 struct pipe_depth_stencil_alpha_state depth_stencil;
1178 struct swr_blend_state blend;
1179 } state;
1180 struct swr_vertex_shader vs;
1181 struct swr_fragment_shader fs;
1182 } swr_dummy;
1183
1184 if (!p_draw_info) {
1185 if (!ctx->rasterizer)
1186 ctx->rasterizer = &swr_dummy.state.rasterizer;
1187 if (!ctx->depth_stencil)
1188 ctx->depth_stencil = &swr_dummy.state.depth_stencil;
1189 if (!ctx->blend)
1190 ctx->blend = &swr_dummy.state.blend;
1191 if (!ctx->vs)
1192 ctx->vs = &swr_dummy.vs;
1193 if (!ctx->fs)
1194 ctx->fs = &swr_dummy.fs;
1195 }
1196
1197 /* Update screen->pipe to current pipe context. */
1198 screen->pipe = pipe;
1199
1200 /* Any state that requires dirty flags to be re-triggered sets this mask */
1201 /* For example, user_buffer vertex and index buffers. */
1202 unsigned post_update_dirty_flags = 0;
1203
1204 /* bring resources that changed context up-to-date */
1205 swr_invalidate_buffers_after_ctx_change(pipe);
1206
1207 /* Render Targets */
1208 if (ctx->dirty & SWR_NEW_FRAMEBUFFER) {
1209 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
1210 const struct util_format_description *desc = NULL;
1211 bool need_fence = false;
1212
1213 /* colorbuffer targets */
1214 if (fb->nr_cbufs) {
1215 for (unsigned i = 0; i < fb->nr_cbufs; ++i)
1216 need_fence |= swr_change_rt(
1217 ctx, SWR_ATTACHMENT_COLOR0 + i, fb->cbufs[i]);
1218 }
1219 for (unsigned i = fb->nr_cbufs; i < SWR_NUM_RENDERTARGETS; ++i)
1220 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_COLOR0 + i, NULL);
1221
1222 /* depth/stencil target */
1223 if (fb->zsbuf)
1224 desc = util_format_description(fb->zsbuf->format);
1225 if (fb->zsbuf && util_format_has_depth(desc))
1226 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_DEPTH, fb->zsbuf);
1227 else
1228 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_DEPTH, NULL);
1229
1230 if (fb->zsbuf && util_format_has_stencil(desc))
1231 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_STENCIL, fb->zsbuf);
1232 else
1233 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_STENCIL, NULL);
1234
1235 /* This fence ensures any attachment changes are resolved before the
1236 * next draw */
1237 if (need_fence)
1238 swr_fence_submit(ctx, screen->flush_fence);
1239 }
1240
1241 /* Raster state */
1242 if (ctx->dirty & (SWR_NEW_RASTERIZER |
1243 SWR_NEW_VS | // clipping
1244 SWR_NEW_TES |
1245 SWR_NEW_TCS |
1246 SWR_NEW_FRAMEBUFFER)) {
1247 pipe_rasterizer_state *rasterizer = ctx->rasterizer;
1248 pipe_framebuffer_state *fb = &ctx->framebuffer;
1249
1250 SWR_RASTSTATE *rastState = &ctx->derived.rastState;
1251 rastState->cullMode = swr_convert_cull_mode(rasterizer->cull_face);
1252 rastState->frontWinding = rasterizer->front_ccw
1253 ? SWR_FRONTWINDING_CCW
1254 : SWR_FRONTWINDING_CW;
1255 rastState->scissorEnable = rasterizer->scissor;
1256 rastState->pointSize = rasterizer->point_size > 0.0f
1257 ? rasterizer->point_size
1258 : 1.0f;
1259 rastState->lineWidth = rasterizer->line_width > 0.0f
1260 ? rasterizer->line_width
1261 : 1.0f;
1262
1263 rastState->pointParam = rasterizer->point_size_per_vertex;
1264
1265 rastState->pointSpriteEnable = rasterizer->sprite_coord_enable;
1266 rastState->pointSpriteTopOrigin =
1267 rasterizer->sprite_coord_mode == PIPE_SPRITE_COORD_UPPER_LEFT;
1268
1269 /* If SWR_MSAA_FORCE_ENABLE is set, turn msaa on */
1270 if (screen->msaa_force_enable && !rasterizer->multisample) {
1271 /* Force enable and use the value the surface was created with */
1272 rasterizer->multisample = true;
1273 fb->samples = swr_resource(fb->cbufs[0]->texture)->swr.numSamples;
1274 fprintf(stderr,"msaa force enable: %d samples\n", fb->samples);
1275 }
1276
1277 rastState->sampleCount = GetSampleCount(fb->samples);
1278 rastState->forcedSampleCount = false;
1279 rastState->bIsCenterPattern = !rasterizer->multisample;
1280 rastState->pixelLocation = SWR_PIXEL_LOCATION_CENTER;
1281
1282 /* Only initialize sample positions if msaa is enabled */
1283 if (rasterizer->multisample) {
1284 for (uint32_t i = 0; i < fb->samples; i++) {
1285 const uint8_t *sample = swr_sample_positions[fb->samples-1 + i];
1286 rastState->samplePositions.SetXi(i, sample[0] << 4);
1287 rastState->samplePositions.SetYi(i, sample[1] << 4);
1288 rastState->samplePositions.SetX (i, sample[0] / 16.0f);
1289 rastState->samplePositions.SetY (i, sample[1] / 16.0f);
1290 }
1291 rastState->samplePositions.PrecalcSampleData(fb->samples);
1292 }
1293
1294 bool do_offset = false;
1295 switch (rasterizer->fill_front) {
1296 case PIPE_POLYGON_MODE_FILL:
1297 do_offset = rasterizer->offset_tri;
1298 break;
1299 case PIPE_POLYGON_MODE_LINE:
1300 do_offset = rasterizer->offset_line;
1301 break;
1302 case PIPE_POLYGON_MODE_POINT:
1303 do_offset = rasterizer->offset_point;
1304 break;
1305 }
1306
1307 if (do_offset) {
1308 rastState->depthBias = rasterizer->offset_units;
1309 rastState->slopeScaledDepthBias = rasterizer->offset_scale;
1310 rastState->depthBiasClamp = rasterizer->offset_clamp;
1311 } else {
1312 rastState->depthBias = 0;
1313 rastState->slopeScaledDepthBias = 0;
1314 rastState->depthBiasClamp = 0;
1315 }
1316
1317 /* translate polygon mode, at least for the front==back case */
1318 rastState->fillMode = swr_convert_fill_mode(rasterizer->fill_front);
1319
1320 struct pipe_surface *zb = fb->zsbuf;
1321 if (zb && swr_resource(zb->texture)->has_depth)
1322 rastState->depthFormat = swr_resource(zb->texture)->swr.format;
1323
1324 rastState->depthClipEnable = rasterizer->depth_clip_near;
1325 rastState->clipEnable = rasterizer->depth_clip_near | rasterizer->depth_clip_far;
1326 rastState->clipHalfZ = rasterizer->clip_halfz;
1327
1328 ctx->api.pfnSwrSetRastState(ctx->swrContext, rastState);
1329 }
1330
1331 /* Viewport */
1332 if (ctx->dirty & (SWR_NEW_VIEWPORT | SWR_NEW_FRAMEBUFFER
1333 | SWR_NEW_RASTERIZER)) {
1334 pipe_viewport_state *state = &ctx->viewports[0];
1335 pipe_framebuffer_state *fb = &ctx->framebuffer;
1336 pipe_rasterizer_state *rasterizer = ctx->rasterizer;
1337
1338 SWR_VIEWPORT *vp = &ctx->derived.vp[0];
1339 SWR_VIEWPORT_MATRICES *vpm = &ctx->derived.vpm;
1340
1341 for (unsigned i = 0; i < KNOB_NUM_VIEWPORTS_SCISSORS; i++) {
1342 vp->x = state->translate[0] - state->scale[0];
1343 vp->width = 2 * state->scale[0];
1344 vp->y = state->translate[1] - fabs(state->scale[1]);
1345 vp->height = 2 * fabs(state->scale[1]);
1346 util_viewport_zmin_zmax(state, rasterizer->clip_halfz,
1347 &vp->minZ, &vp->maxZ);
1348
1349 if (rasterizer->depth_clip_near) {
1350 vp->minZ = 0.0f;
1351 }
1352
1353 if (rasterizer->depth_clip_far) {
1354 vp->maxZ = 1.0f;
1355 }
1356
1357 vpm->m00[i] = state->scale[0];
1358 vpm->m11[i] = state->scale[1];
1359 vpm->m22[i] = state->scale[2];
1360 vpm->m30[i] = state->translate[0];
1361 vpm->m31[i] = state->translate[1];
1362 vpm->m32[i] = state->translate[2];
1363
1364 /* Now that the matrix is calculated, clip the view coords to screen
1365 * size. OpenGL allows for -ve x,y in the viewport. */
1366 if (vp->x < 0.0f) {
1367 vp->width += vp->x;
1368 vp->x = 0.0f;
1369 }
1370 if (vp->y < 0.0f) {
1371 vp->height += vp->y;
1372 vp->y = 0.0f;
1373 }
1374 vp->width = std::min(vp->width, (float) fb->width - vp->x);
1375 vp->height = std::min(vp->height, (float) fb->height - vp->y);
1376
1377 vp++;
1378 state++;
1379 }
1380 ctx->api.pfnSwrSetViewports(ctx->swrContext, KNOB_NUM_VIEWPORTS_SCISSORS,
1381 &ctx->derived.vp[0], &ctx->derived.vpm);
1382 }
1383
1384 /* When called from swr_clear (p_draw_info = null), render targets,
1385 * rasterState and viewports (dependent on render targets) are the only
1386 * necessary validation. Defer remaining validation by setting
1387 * post_update_dirty_flags and clear all dirty flags. BackendState is
1388 * still unconditionally validated below */
1389 if (!p_draw_info) {
1390 post_update_dirty_flags = ctx->dirty & ~(SWR_NEW_FRAMEBUFFER |
1391 SWR_NEW_RASTERIZER |
1392 SWR_NEW_VIEWPORT);
1393 ctx->dirty = 0;
1394 }
1395
1396 /* Scissor */
1397 if (ctx->dirty & SWR_NEW_SCISSOR) {
1398 ctx->api.pfnSwrSetScissorRects(ctx->swrContext, KNOB_NUM_VIEWPORTS_SCISSORS, ctx->swr_scissors);
1399 }
1400
1401 /* Set vertex & index buffers */
1402 if (ctx->dirty & SWR_NEW_VERTEX) {
1403 struct pipe_draw_info info = *p_draw_info;
1404 /* SWR always need min/max index info for index draw,
1405 * compute it if upper layer does not do for us */
1406 if (info.index_size > 0 && info.max_index == ~0u) {
1407 u_vbuf_get_minmax_index(pipe, &info, &(info.min_index), &(info.max_index));
1408 }
1409 /* vertex buffers */
1410 SWR_VERTEX_BUFFER_STATE swrVertexBuffers[PIPE_MAX_ATTRIBS];
1411 for (UINT i = 0; i < ctx->num_vertex_buffers; i++) {
1412 uint32_t size = 0, pitch = 0, elems = 0, partial_inbounds = 0;
1413 uint32_t min_vertex_index = 0;
1414 const uint8_t *p_data;
1415 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
1416
1417 pitch = vb->stride;
1418 if (vb->is_user_buffer) {
1419 /* Client buffer
1420 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
1421 * revalidate on each draw */
1422 post_update_dirty_flags |= SWR_NEW_VERTEX;
1423
1424 uint32_t base;
1425 swr_user_vbuf_range(&info, ctx->velems, vb, i, &elems, &base, &size);
1426 partial_inbounds = 0;
1427 min_vertex_index = info.min_index + info.index_bias;
1428
1429 /* Use user memory directly. The draw will access user-buffer
1430 * directly and then block. It's easier and usually
1431 * faster than copying.
1432 */
1433 post_update_dirty_flags |= SWR_BLOCK_CLIENT_DRAW;
1434 p_data = (const uint8_t *) vb->buffer.user;
1435 } else if (vb->buffer.resource) {
1436 /* VBO */
1437 if (!pitch) {
1438 /* If pitch=0 (ie vb->stride), buffer contains a single
1439 * constant attribute. Use the stream_pitch which was
1440 * calculated during creation of vertex_elements_state for the
1441 * size of the attribute. */
1442 size = ctx->velems->stream_pitch[i];
1443 elems = 1;
1444 partial_inbounds = 0;
1445 min_vertex_index = 0;
1446 } else {
1447 /* size is based on buffer->width0 rather than info.max_index
1448 * to prevent having to validate VBO on each draw. */
1449 size = vb->buffer.resource->width0;
1450 elems = size / pitch;
1451 partial_inbounds = size % pitch;
1452 min_vertex_index = 0;
1453 }
1454
1455 p_data = swr_resource_data(vb->buffer.resource) + vb->buffer_offset;
1456 } else
1457 p_data = NULL;
1458
1459 swrVertexBuffers[i] = {0};
1460 swrVertexBuffers[i].index = i;
1461 swrVertexBuffers[i].pitch = pitch;
1462 swrVertexBuffers[i].xpData = (gfxptr_t) p_data;
1463 swrVertexBuffers[i].size = size;
1464 swrVertexBuffers[i].minVertex = min_vertex_index;
1465 swrVertexBuffers[i].maxVertex = elems;
1466 swrVertexBuffers[i].partialInboundsSize = partial_inbounds;
1467 }
1468
1469 ctx->api.pfnSwrSetVertexBuffers(
1470 ctx->swrContext, ctx->num_vertex_buffers, swrVertexBuffers);
1471
1472 /* index buffer, if required (info passed in by swr_draw_vbo) */
1473 SWR_FORMAT index_type = R32_UINT; /* Default for non-indexed draws */
1474 if (info.index_size) {
1475 const uint8_t *p_data;
1476 uint32_t size, pitch;
1477
1478 pitch = info.index_size ? info.index_size : sizeof(uint32_t);
1479 index_type = swr_convert_index_type(pitch);
1480
1481 if (!info.has_user_indices) {
1482 /* VBO
1483 * size is based on buffer->width0 rather than info.count
1484 * to prevent having to validate VBO on each draw */
1485 size = info.index.resource->width0;
1486 p_data = swr_resource_data(info.index.resource);
1487 } else {
1488 /* Client buffer
1489 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
1490 * revalidate on each draw */
1491 post_update_dirty_flags |= SWR_NEW_VERTEX;
1492
1493 size = info.count * pitch;
1494
1495 /* Use user memory directly. The draw will access user-buffer
1496 * directly and then block. It's easier and usually
1497 * faster than copying.
1498 */
1499 post_update_dirty_flags |= SWR_BLOCK_CLIENT_DRAW;
1500 p_data = (const uint8_t *) info.index.user;
1501 }
1502
1503 SWR_INDEX_BUFFER_STATE swrIndexBuffer;
1504 swrIndexBuffer.format = swr_convert_index_type(info.index_size);
1505 swrIndexBuffer.xpIndices = (gfxptr_t) p_data;
1506 swrIndexBuffer.size = size;
1507
1508 ctx->api.pfnSwrSetIndexBuffer(ctx->swrContext, &swrIndexBuffer);
1509 }
1510
1511 struct swr_vertex_element_state *velems = ctx->velems;
1512 if (velems && velems->fsState.indexType != index_type) {
1513 velems->fsFunc = NULL;
1514 velems->fsState.indexType = index_type;
1515 }
1516 }
1517
1518 /* GeometryShader */
1519 if (ctx->dirty & (SWR_NEW_GS |
1520 SWR_NEW_VS |
1521 SWR_NEW_TCS |
1522 SWR_NEW_TES |
1523 SWR_NEW_SAMPLER |
1524 SWR_NEW_SAMPLER_VIEW)) {
1525 if (ctx->gs) {
1526 swr_jit_gs_key key;
1527 swr_generate_gs_key(key, ctx, ctx->gs);
1528 auto search = ctx->gs->map.find(key);
1529 PFN_GS_FUNC func;
1530 if (search != ctx->gs->map.end()) {
1531 func = search->second->shader;
1532 } else {
1533 func = swr_compile_gs(ctx, key);
1534 }
1535 ctx->api.pfnSwrSetGsFunc(ctx->swrContext, func);
1536
1537 /* JIT sampler state */
1538 if (ctx->dirty & SWR_NEW_SAMPLER) {
1539 swr_update_sampler_state(ctx,
1540 PIPE_SHADER_GEOMETRY,
1541 key.nr_samplers,
1542 ctx->swrDC.samplersGS);
1543 }
1544
1545 /* JIT sampler view state */
1546 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1547 swr_update_texture_state(ctx,
1548 PIPE_SHADER_GEOMETRY,
1549 key.nr_sampler_views,
1550 ctx->swrDC.texturesGS);
1551 }
1552
1553 ctx->api.pfnSwrSetGsState(ctx->swrContext, &ctx->gs->gsState);
1554 } else {
1555 SWR_GS_STATE state = { 0 };
1556 ctx->api.pfnSwrSetGsState(ctx->swrContext, &state);
1557 ctx->api.pfnSwrSetGsFunc(ctx->swrContext, NULL);
1558 }
1559 }
1560
1561 // We may need to restore tessellation state
1562 // This restored state may be however overwritten
1563 // during shader compilation
1564 if (ctx->dirty & SWR_NEW_TS) {
1565 if (ctx->tes != nullptr) {
1566 ctx->tsState = ctx->tes->ts_state;
1567 ctx->api.pfnSwrSetTsState(ctx->swrContext, &ctx->tsState);
1568 } else {
1569 SWR_TS_STATE state = { 0 };
1570 ctx->api.pfnSwrSetTsState(ctx->swrContext, &state);
1571 }
1572 }
1573
1574 // Tessellation Evaluation Shader
1575 // Compile TES first, because TCS is optional
1576 if (ctx->dirty & (SWR_NEW_GS |
1577 SWR_NEW_VS |
1578 SWR_NEW_TCS |
1579 SWR_NEW_TES |
1580 SWR_NEW_SAMPLER |
1581 SWR_NEW_SAMPLER_VIEW)) {
1582 if (ctx->tes) {
1583 swr_jit_tes_key key;
1584 swr_generate_tes_key(key, ctx, ctx->tes);
1585
1586 auto search = ctx->tes->map.find(key);
1587 PFN_TES_FUNC func;
1588 if (search != ctx->tes->map.end()) {
1589 func = search->second->shader;
1590 } else {
1591 func = swr_compile_tes(ctx, key);
1592 }
1593
1594 ctx->api.pfnSwrSetDsFunc(ctx->swrContext, func);
1595
1596 /* JIT sampler state */
1597 if (ctx->dirty & SWR_NEW_SAMPLER) {
1598 swr_update_sampler_state(ctx,
1599 PIPE_SHADER_TESS_EVAL,
1600 key.nr_samplers,
1601 ctx->swrDC.samplersTES);
1602 }
1603
1604 /* JIT sampler view state */
1605 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1606 swr_update_texture_state(ctx,
1607 PIPE_SHADER_TESS_EVAL,
1608 key.nr_sampler_views,
1609 ctx->swrDC.texturesTES);
1610 }
1611
1612 // Update tessellation state in case it's been updated
1613 ctx->api.pfnSwrSetTsState(ctx->swrContext, &ctx->tsState);
1614 } else {
1615 ctx->api.pfnSwrSetDsFunc(ctx->swrContext, NULL);
1616 }
1617 }
1618
1619 /* Tessellation Control Shader */
1620 if (ctx->dirty & (SWR_NEW_GS |
1621 SWR_NEW_VS |
1622 SWR_NEW_TCS |
1623 SWR_NEW_TES |
1624 SWR_NEW_SAMPLER |
1625 SWR_NEW_SAMPLER_VIEW)) {
1626 if (ctx->tcs) {
1627 ctx->tcs->vertices_per_patch = p_draw_info->vertices_per_patch;
1628
1629 swr_jit_tcs_key key;
1630 swr_generate_tcs_key(key, ctx, ctx->tcs);
1631
1632 auto search = ctx->tcs->map.find(key);
1633 PFN_TCS_FUNC func;
1634 if (search != ctx->tcs->map.end()) {
1635 func = search->second->shader;
1636 } else {
1637 func = swr_compile_tcs(ctx, key);
1638 }
1639
1640 ctx->api.pfnSwrSetHsFunc(ctx->swrContext, func);
1641
1642 /* JIT sampler state */
1643 if (ctx->dirty & SWR_NEW_SAMPLER) {
1644 swr_update_sampler_state(ctx,
1645 PIPE_SHADER_TESS_CTRL,
1646 key.nr_samplers,
1647 ctx->swrDC.samplersTCS);
1648 }
1649
1650 /* JIT sampler view state */
1651 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1652 swr_update_texture_state(ctx,
1653 PIPE_SHADER_TESS_CTRL,
1654 key.nr_sampler_views,
1655 ctx->swrDC.texturesTCS);
1656 }
1657
1658 // Update tessellation state in case it's been updated
1659 ctx->api.pfnSwrSetTsState(ctx->swrContext, &ctx->tsState);
1660 } else {
1661 ctx->api.pfnSwrSetHsFunc(ctx->swrContext, NULL);
1662 }
1663 }
1664
1665 /* VertexShader */
1666 if (ctx->dirty
1667 & (SWR_NEW_VS | SWR_NEW_RASTERIZER | // for clip planes
1668 SWR_NEW_SAMPLER | SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1669 swr_jit_vs_key key;
1670 swr_generate_vs_key(key, ctx, ctx->vs);
1671 auto search = ctx->vs->map.find(key);
1672 PFN_VERTEX_FUNC func;
1673 if (search != ctx->vs->map.end()) {
1674 func = search->second->shader;
1675 } else {
1676 func = swr_compile_vs(ctx, key);
1677 }
1678 ctx->api.pfnSwrSetVertexFunc(ctx->swrContext, func);
1679
1680 /* JIT sampler state */
1681 if (ctx->dirty & SWR_NEW_SAMPLER) {
1682 swr_update_sampler_state(
1683 ctx, PIPE_SHADER_VERTEX, key.nr_samplers, ctx->swrDC.samplersVS);
1684 }
1685
1686 /* JIT sampler view state */
1687 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1688 swr_update_texture_state(ctx,
1689 PIPE_SHADER_VERTEX,
1690 key.nr_sampler_views,
1691 ctx->swrDC.texturesVS);
1692 }
1693 }
1694
1695 /* work around the fact that poly stipple also affects lines */
1696 /* and points, since we rasterize them as triangles, too */
1697 /* Has to be before fragment shader, since it sets SWR_NEW_FS */
1698 if (p_draw_info) {
1699 bool new_prim_is_poly =
1700 (u_reduced_prim(p_draw_info->mode) == PIPE_PRIM_TRIANGLES) &&
1701 (ctx->derived.rastState.fillMode == SWR_FILLMODE_SOLID);
1702 if (new_prim_is_poly != ctx->poly_stipple.prim_is_poly) {
1703 ctx->dirty |= SWR_NEW_FS;
1704 ctx->poly_stipple.prim_is_poly = new_prim_is_poly;
1705 }
1706 }
1707
1708 /* FragmentShader */
1709 if (ctx->dirty & (SWR_NEW_FS |
1710 SWR_NEW_VS |
1711 SWR_NEW_GS |
1712 SWR_NEW_TES |
1713 SWR_NEW_TCS |
1714 SWR_NEW_RASTERIZER |
1715 SWR_NEW_SAMPLER |
1716 SWR_NEW_SAMPLER_VIEW |
1717 SWR_NEW_FRAMEBUFFER)) {
1718 swr_jit_fs_key key;
1719 swr_generate_fs_key(key, ctx, ctx->fs);
1720 auto search = ctx->fs->map.find(key);
1721 PFN_PIXEL_KERNEL func;
1722 if (search != ctx->fs->map.end()) {
1723 func = search->second->shader;
1724 } else {
1725 func = swr_compile_fs(ctx, key);
1726 }
1727 SWR_PS_STATE psState = {0};
1728 psState.pfnPixelShader = func;
1729 psState.killsPixel = ctx->fs->info.base.uses_kill;
1730 psState.inputCoverage = SWR_INPUT_COVERAGE_NORMAL;
1731 psState.writesODepth = ctx->fs->info.base.writes_z;
1732 psState.usesSourceDepth = ctx->fs->info.base.reads_z;
1733 psState.shadingRate = SWR_SHADING_RATE_PIXEL;
1734 psState.renderTargetMask = (1 << ctx->framebuffer.nr_cbufs) - 1;
1735 psState.posOffset = SWR_PS_POSITION_SAMPLE_NONE;
1736 uint32_t barycentricsMask = 0;
1737 #if 0
1738 // when we switch to mesa-master
1739 if (ctx->fs->info.base.uses_persp_center ||
1740 ctx->fs->info.base.uses_linear_center)
1741 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1742 if (ctx->fs->info.base.uses_persp_centroid ||
1743 ctx->fs->info.base.uses_linear_centroid)
1744 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1745 if (ctx->fs->info.base.uses_persp_sample ||
1746 ctx->fs->info.base.uses_linear_sample)
1747 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1748 #else
1749 for (unsigned i = 0; i < ctx->fs->info.base.num_inputs; i++) {
1750 switch (ctx->fs->info.base.input_interpolate_loc[i]) {
1751 case TGSI_INTERPOLATE_LOC_CENTER:
1752 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1753 break;
1754 case TGSI_INTERPOLATE_LOC_CENTROID:
1755 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1756 break;
1757 case TGSI_INTERPOLATE_LOC_SAMPLE:
1758 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1759 break;
1760 }
1761 }
1762 #endif
1763 psState.barycentricsMask = barycentricsMask;
1764 psState.usesUAV = false; // XXX
1765 psState.forceEarlyZ = false;
1766 ctx->api.pfnSwrSetPixelShaderState(ctx->swrContext, &psState);
1767
1768 /* JIT sampler state */
1769 if (ctx->dirty & (SWR_NEW_SAMPLER |
1770 SWR_NEW_FS)) {
1771 swr_update_sampler_state(ctx,
1772 PIPE_SHADER_FRAGMENT,
1773 key.nr_samplers,
1774 ctx->swrDC.samplersFS);
1775 }
1776
1777 /* JIT sampler view state */
1778 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW |
1779 SWR_NEW_FRAMEBUFFER |
1780 SWR_NEW_FS)) {
1781 swr_update_texture_state(ctx,
1782 PIPE_SHADER_FRAGMENT,
1783 key.nr_sampler_views,
1784 ctx->swrDC.texturesFS);
1785 }
1786 }
1787
1788
1789 /* VertexShader Constants */
1790 if (ctx->dirty & SWR_NEW_VSCONSTANTS) {
1791 swr_update_constants(ctx, PIPE_SHADER_VERTEX);
1792 }
1793
1794 /* FragmentShader Constants */
1795 if (ctx->dirty & SWR_NEW_FSCONSTANTS) {
1796 swr_update_constants(ctx, PIPE_SHADER_FRAGMENT);
1797 }
1798
1799 /* GeometryShader Constants */
1800 if (ctx->dirty & SWR_NEW_GSCONSTANTS) {
1801 swr_update_constants(ctx, PIPE_SHADER_GEOMETRY);
1802 }
1803
1804 /* Tessellation Control Shader Constants */
1805 if (ctx->dirty & SWR_NEW_TCSCONSTANTS) {
1806 swr_update_constants(ctx, PIPE_SHADER_TESS_CTRL);
1807 }
1808
1809 /* Tessellation Evaluation Shader Constants */
1810 if (ctx->dirty & SWR_NEW_TESCONSTANTS) {
1811 swr_update_constants(ctx, PIPE_SHADER_TESS_EVAL);
1812 }
1813
1814 /* Depth/stencil state */
1815 if (ctx->dirty & (SWR_NEW_DEPTH_STENCIL_ALPHA | SWR_NEW_FRAMEBUFFER)) {
1816 struct pipe_depth_state *depth = &(ctx->depth_stencil->depth);
1817 struct pipe_stencil_state *stencil = ctx->depth_stencil->stencil;
1818 SWR_DEPTH_STENCIL_STATE depthStencilState = {{0}};
1819 SWR_DEPTH_BOUNDS_STATE depthBoundsState = {0};
1820
1821 /* XXX, incomplete. Need to flesh out stencil & alpha test state
1822 struct pipe_stencil_state *front_stencil =
1823 ctx->depth_stencil.stencil[0];
1824 struct pipe_stencil_state *back_stencil = ctx->depth_stencil.stencil[1];
1825 struct pipe_alpha_state alpha;
1826 */
1827 if (stencil[0].enabled) {
1828 depthStencilState.stencilWriteEnable = 1;
1829 depthStencilState.stencilTestEnable = 1;
1830 depthStencilState.stencilTestFunc =
1831 swr_convert_depth_func(stencil[0].func);
1832
1833 depthStencilState.stencilPassDepthPassOp =
1834 swr_convert_stencil_op(stencil[0].zpass_op);
1835 depthStencilState.stencilPassDepthFailOp =
1836 swr_convert_stencil_op(stencil[0].zfail_op);
1837 depthStencilState.stencilFailOp =
1838 swr_convert_stencil_op(stencil[0].fail_op);
1839 depthStencilState.stencilWriteMask = stencil[0].writemask;
1840 depthStencilState.stencilTestMask = stencil[0].valuemask;
1841 depthStencilState.stencilRefValue = ctx->stencil_ref.ref_value[0];
1842 }
1843 if (stencil[1].enabled) {
1844 depthStencilState.doubleSidedStencilTestEnable = 1;
1845
1846 depthStencilState.backfaceStencilTestFunc =
1847 swr_convert_depth_func(stencil[1].func);
1848
1849 depthStencilState.backfaceStencilPassDepthPassOp =
1850 swr_convert_stencil_op(stencil[1].zpass_op);
1851 depthStencilState.backfaceStencilPassDepthFailOp =
1852 swr_convert_stencil_op(stencil[1].zfail_op);
1853 depthStencilState.backfaceStencilFailOp =
1854 swr_convert_stencil_op(stencil[1].fail_op);
1855 depthStencilState.backfaceStencilWriteMask = stencil[1].writemask;
1856 depthStencilState.backfaceStencilTestMask = stencil[1].valuemask;
1857
1858 depthStencilState.backfaceStencilRefValue =
1859 ctx->stencil_ref.ref_value[1];
1860 }
1861
1862 depthStencilState.depthTestEnable = depth->enabled;
1863 depthStencilState.depthTestFunc = swr_convert_depth_func(depth->func);
1864 depthStencilState.depthWriteEnable = depth->writemask;
1865 ctx->api.pfnSwrSetDepthStencilState(ctx->swrContext, &depthStencilState);
1866
1867 depthBoundsState.depthBoundsTestEnable = depth->bounds_test;
1868 depthBoundsState.depthBoundsTestMinValue = depth->bounds_min;
1869 depthBoundsState.depthBoundsTestMaxValue = depth->bounds_max;
1870 ctx->api.pfnSwrSetDepthBoundsState(ctx->swrContext, &depthBoundsState);
1871 }
1872
1873 /* Blend State */
1874 if (ctx->dirty & (SWR_NEW_BLEND |
1875 SWR_NEW_RASTERIZER |
1876 SWR_NEW_FRAMEBUFFER |
1877 SWR_NEW_DEPTH_STENCIL_ALPHA)) {
1878 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
1879
1880 SWR_BLEND_STATE blendState;
1881 memcpy(&blendState, &ctx->blend->blendState, sizeof(blendState));
1882 blendState.constantColor[0] = ctx->blend_color.color[0];
1883 blendState.constantColor[1] = ctx->blend_color.color[1];
1884 blendState.constantColor[2] = ctx->blend_color.color[2];
1885 blendState.constantColor[3] = ctx->blend_color.color[3];
1886 blendState.alphaTestReference =
1887 *((uint32_t*)&ctx->depth_stencil->alpha.ref_value);
1888
1889 blendState.sampleMask = ctx->sample_mask;
1890 blendState.sampleCount = GetSampleCount(fb->samples);
1891
1892 /* If there are no color buffers bound, disable writes on RT0
1893 * and skip loop */
1894 if (fb->nr_cbufs == 0) {
1895 blendState.renderTarget[0].writeDisableRed = 1;
1896 blendState.renderTarget[0].writeDisableGreen = 1;
1897 blendState.renderTarget[0].writeDisableBlue = 1;
1898 blendState.renderTarget[0].writeDisableAlpha = 1;
1899 ctx->api.pfnSwrSetBlendFunc(ctx->swrContext, 0, NULL);
1900 }
1901 else
1902 for (int target = 0;
1903 target < std::min(SWR_NUM_RENDERTARGETS,
1904 PIPE_MAX_COLOR_BUFS);
1905 target++) {
1906 if (!fb->cbufs[target])
1907 continue;
1908
1909 struct swr_resource *colorBuffer =
1910 swr_resource(fb->cbufs[target]->texture);
1911
1912 BLEND_COMPILE_STATE compileState;
1913 memset(&compileState, 0, sizeof(compileState));
1914 compileState.format = colorBuffer->swr.format;
1915 memcpy(&compileState.blendState,
1916 &ctx->blend->compileState[target],
1917 sizeof(compileState.blendState));
1918
1919 const SWR_FORMAT_INFO& info = GetFormatInfo(compileState.format);
1920 if (compileState.blendState.logicOpEnable &&
1921 ((info.type[0] == SWR_TYPE_FLOAT) || info.isSRGB)) {
1922 compileState.blendState.logicOpEnable = false;
1923 }
1924
1925 if (info.type[0] == SWR_TYPE_SINT || info.type[0] == SWR_TYPE_UINT)
1926 compileState.blendState.blendEnable = false;
1927
1928 if (compileState.blendState.blendEnable == false &&
1929 compileState.blendState.logicOpEnable == false &&
1930 ctx->depth_stencil->alpha.enabled == 0) {
1931 ctx->api.pfnSwrSetBlendFunc(ctx->swrContext, target, NULL);
1932 continue;
1933 }
1934
1935 compileState.desc.alphaTestEnable =
1936 ctx->depth_stencil->alpha.enabled;
1937 compileState.desc.independentAlphaBlendEnable =
1938 (compileState.blendState.sourceBlendFactor !=
1939 compileState.blendState.sourceAlphaBlendFactor) ||
1940 (compileState.blendState.destBlendFactor !=
1941 compileState.blendState.destAlphaBlendFactor) ||
1942 (compileState.blendState.colorBlendFunc !=
1943 compileState.blendState.alphaBlendFunc);
1944 compileState.desc.alphaToCoverageEnable =
1945 ctx->blend->pipe.alpha_to_coverage;
1946 compileState.desc.sampleMaskEnable = (blendState.sampleMask != 0);
1947 compileState.desc.numSamples = fb->samples;
1948
1949 compileState.alphaTestFunction =
1950 swr_convert_depth_func(ctx->depth_stencil->alpha.func);
1951 compileState.alphaTestFormat = ALPHA_TEST_FLOAT32; // xxx
1952
1953 compileState.Canonicalize();
1954
1955 PFN_BLEND_JIT_FUNC func = NULL;
1956 auto search = ctx->blendJIT->find(compileState);
1957 if (search != ctx->blendJIT->end()) {
1958 func = search->second;
1959 } else {
1960 HANDLE hJitMgr = screen->hJitMgr;
1961 func = JitCompileBlend(hJitMgr, compileState);
1962 debug_printf("BLEND shader %p\n", func);
1963 assert(func && "Error: BlendShader = NULL");
1964
1965 ctx->blendJIT->insert(std::make_pair(compileState, func));
1966 }
1967 ctx->api.pfnSwrSetBlendFunc(ctx->swrContext, target, func);
1968 }
1969
1970 ctx->api.pfnSwrSetBlendState(ctx->swrContext, &blendState);
1971 }
1972
1973 if (ctx->dirty & SWR_NEW_STIPPLE) {
1974 swr_update_poly_stipple(ctx);
1975 }
1976
1977 if (ctx->dirty & (SWR_NEW_VS | SWR_NEW_TCS | SWR_NEW_TES | SWR_NEW_SO | SWR_NEW_RASTERIZER)) {
1978 ctx->vs->soState.rasterizerDisable =
1979 ctx->rasterizer->rasterizer_discard;
1980 ctx->api.pfnSwrSetSoState(ctx->swrContext, &ctx->vs->soState);
1981
1982 pipe_stream_output_info *stream_output = &ctx->vs->pipe.stream_output;
1983
1984 for (uint32_t i = 0; i < MAX_SO_STREAMS; i++) {
1985 SWR_STREAMOUT_BUFFER buffer = {0};
1986 if (ctx->so_targets[i]) {
1987 buffer.enable = true;
1988 buffer.pBuffer =
1989 (gfxptr_t)(swr_resource_data(ctx->so_targets[i]->buffer) +
1990 ctx->so_targets[i]->buffer_offset);
1991 buffer.bufferSize = ctx->so_targets[i]->buffer_size >> 2;
1992 buffer.pitch = stream_output->stride[i];
1993 buffer.streamOffset = 0;
1994 }
1995
1996 ctx->api.pfnSwrSetSoBuffers(ctx->swrContext, &buffer, i);
1997 }
1998 }
1999
2000
2001 if (ctx->dirty & (SWR_NEW_CLIP | SWR_NEW_RASTERIZER | SWR_NEW_VS)) {
2002 // shader exporting clip distances overrides all user clip planes
2003 if (ctx->rasterizer->clip_plane_enable &&
2004 !swr_get_last_fe(ctx)->num_written_clipdistance)
2005 {
2006 swr_draw_context *pDC = &ctx->swrDC;
2007 memcpy(pDC->userClipPlanes,
2008 ctx->clip.ucp,
2009 sizeof(pDC->userClipPlanes));
2010 }
2011 }
2012
2013 // set up backend state
2014 SWR_BACKEND_STATE backendState = {0};
2015 if (ctx->gs) {
2016 backendState.numAttributes = ctx->gs->info.base.num_outputs - 1;
2017 } else
2018 if (ctx->tes) {
2019 backendState.numAttributes = ctx->tes->info.base.num_outputs - 1;
2020 // no case for TCS, because if TCS is active, TES must be active
2021 // as well - pipeline stages after tessellation does not support patches
2022 } else {
2023 backendState.numAttributes = ctx->vs->info.base.num_outputs - 1;
2024 if (ctx->fs->info.base.uses_primid) {
2025 backendState.numAttributes++;
2026 backendState.swizzleEnable = true;
2027 for (unsigned i = 0; i < sizeof(backendState.numComponents); i++) {
2028 backendState.swizzleMap[i].sourceAttrib = i;
2029 }
2030 backendState.swizzleMap[ctx->vs->info.base.num_outputs - 1].constantSource =
2031 SWR_CONSTANT_SOURCE_PRIM_ID;
2032 backendState.swizzleMap[ctx->vs->info.base.num_outputs - 1].componentOverrideMask = 1;
2033 }
2034 }
2035 if (ctx->rasterizer->sprite_coord_enable)
2036 backendState.numAttributes++;
2037
2038 backendState.numAttributes = std::min((size_t)backendState.numAttributes,
2039 sizeof(backendState.numComponents));
2040 for (unsigned i = 0; i < backendState.numAttributes; i++)
2041 backendState.numComponents[i] = 4;
2042 backendState.constantInterpolationMask = ctx->fs->constantMask |
2043 (ctx->rasterizer->flatshade ? ctx->fs->flatConstantMask : 0);
2044 backendState.pointSpriteTexCoordMask = ctx->fs->pointSpriteMask;
2045
2046 struct tgsi_shader_info *pLastFE = swr_get_last_fe(ctx);
2047
2048 backendState.readRenderTargetArrayIndex = pLastFE->writes_layer;
2049 backendState.readViewportArrayIndex = pLastFE->writes_viewport_index;
2050 backendState.vertexAttribOffset = VERTEX_ATTRIB_START_SLOT; // TODO: optimize
2051
2052 backendState.clipDistanceMask =
2053 pLastFE->num_written_clipdistance ?
2054 pLastFE->clipdist_writemask & ctx->rasterizer->clip_plane_enable :
2055 ctx->rasterizer->clip_plane_enable;
2056
2057 backendState.cullDistanceMask =
2058 pLastFE->culldist_writemask << pLastFE->num_written_clipdistance;
2059
2060 // Assume old layout of SGV, POSITION, CLIPCULL, ATTRIB
2061 backendState.vertexClipCullOffset = backendState.vertexAttribOffset - 2;
2062
2063 ctx->api.pfnSwrSetBackendState(ctx->swrContext, &backendState);
2064
2065 /* Ensure that any in-progress attachment change StoreTiles finish */
2066 if (swr_is_fence_pending(screen->flush_fence))
2067 swr_fence_finish(pipe->screen, NULL, screen->flush_fence, 0);
2068
2069 /* Finally, update the in-use status of all resources involved in draw */
2070 swr_update_resource_status(pipe, p_draw_info);
2071
2072 ctx->dirty = post_update_dirty_flags;
2073 }
2074
2075
2076 static struct pipe_stream_output_target *
2077 swr_create_so_target(struct pipe_context *pipe,
2078 struct pipe_resource *buffer,
2079 unsigned buffer_offset,
2080 unsigned buffer_size)
2081 {
2082 struct pipe_stream_output_target *target;
2083
2084 target = CALLOC_STRUCT(pipe_stream_output_target);
2085 if (!target)
2086 return NULL;
2087
2088 target->context = pipe;
2089 target->reference.count = 1;
2090 pipe_resource_reference(&target->buffer, buffer);
2091 target->buffer_offset = buffer_offset;
2092 target->buffer_size = buffer_size;
2093 return target;
2094 }
2095
2096 static void
2097 swr_destroy_so_target(struct pipe_context *pipe,
2098 struct pipe_stream_output_target *target)
2099 {
2100 pipe_resource_reference(&target->buffer, NULL);
2101 FREE(target);
2102 }
2103
2104 static void
2105 swr_set_so_targets(struct pipe_context *pipe,
2106 unsigned num_targets,
2107 struct pipe_stream_output_target **targets,
2108 const unsigned *offsets)
2109 {
2110 struct swr_context *swr = swr_context(pipe);
2111 uint32_t i;
2112
2113 assert(num_targets <= MAX_SO_STREAMS);
2114
2115 for (i = 0; i < num_targets; i++) {
2116 pipe_so_target_reference(
2117 (struct pipe_stream_output_target **)&swr->so_targets[i],
2118 targets[i]);
2119 }
2120
2121 for (/* fall-through */; i < swr->num_so_targets; i++) {
2122 pipe_so_target_reference(
2123 (struct pipe_stream_output_target **)&swr->so_targets[i], NULL);
2124 }
2125
2126 swr->num_so_targets = num_targets;
2127 swr->swrDC.soPrims = &swr->so_primCounter;
2128
2129 swr->dirty |= SWR_NEW_SO;
2130 }
2131
2132
2133 void
2134 swr_state_init(struct pipe_context *pipe)
2135 {
2136 pipe->create_blend_state = swr_create_blend_state;
2137 pipe->bind_blend_state = swr_bind_blend_state;
2138 pipe->delete_blend_state = swr_delete_blend_state;
2139
2140 pipe->create_depth_stencil_alpha_state = swr_create_depth_stencil_state;
2141 pipe->bind_depth_stencil_alpha_state = swr_bind_depth_stencil_state;
2142 pipe->delete_depth_stencil_alpha_state = swr_delete_depth_stencil_state;
2143
2144 pipe->create_rasterizer_state = swr_create_rasterizer_state;
2145 pipe->bind_rasterizer_state = swr_bind_rasterizer_state;
2146 pipe->delete_rasterizer_state = swr_delete_rasterizer_state;
2147
2148 pipe->create_sampler_state = swr_create_sampler_state;
2149 pipe->bind_sampler_states = swr_bind_sampler_states;
2150 pipe->delete_sampler_state = swr_delete_sampler_state;
2151
2152 pipe->create_sampler_view = swr_create_sampler_view;
2153 pipe->set_sampler_views = swr_set_sampler_views;
2154 pipe->sampler_view_destroy = swr_sampler_view_destroy;
2155
2156 pipe->create_vs_state = swr_create_vs_state;
2157 pipe->bind_vs_state = swr_bind_vs_state;
2158 pipe->delete_vs_state = swr_delete_vs_state;
2159
2160 pipe->create_fs_state = swr_create_fs_state;
2161 pipe->bind_fs_state = swr_bind_fs_state;
2162 pipe->delete_fs_state = swr_delete_fs_state;
2163
2164 pipe->create_gs_state = swr_create_gs_state;
2165 pipe->bind_gs_state = swr_bind_gs_state;
2166 pipe->delete_gs_state = swr_delete_gs_state;
2167
2168 pipe->create_tcs_state = swr_create_tcs_state;
2169 pipe->bind_tcs_state = swr_bind_tcs_state;
2170 pipe->delete_tcs_state = swr_delete_tcs_state;
2171
2172 pipe->create_tes_state = swr_create_tes_state;
2173 pipe->bind_tes_state = swr_bind_tes_state;
2174 pipe->delete_tes_state = swr_delete_tes_state;
2175
2176 pipe->set_constant_buffer = swr_set_constant_buffer;
2177
2178 pipe->create_vertex_elements_state = swr_create_vertex_elements_state;
2179 pipe->bind_vertex_elements_state = swr_bind_vertex_elements_state;
2180 pipe->delete_vertex_elements_state = swr_delete_vertex_elements_state;
2181
2182 pipe->set_vertex_buffers = swr_set_vertex_buffers;
2183
2184 pipe->set_polygon_stipple = swr_set_polygon_stipple;
2185 pipe->set_clip_state = swr_set_clip_state;
2186 pipe->set_scissor_states = swr_set_scissor_states;
2187 pipe->set_viewport_states = swr_set_viewport_states;
2188
2189 pipe->set_framebuffer_state = swr_set_framebuffer_state;
2190
2191 pipe->set_blend_color = swr_set_blend_color;
2192 pipe->set_stencil_ref = swr_set_stencil_ref;
2193
2194 pipe->set_sample_mask = swr_set_sample_mask;
2195 pipe->get_sample_position = swr_get_sample_position;
2196
2197 pipe->create_stream_output_target = swr_create_so_target;
2198 pipe->stream_output_target_destroy = swr_destroy_so_target;
2199 pipe->set_stream_output_targets = swr_set_so_targets;
2200 }