316872581db71b69529ebb32eb200413f50ac416
[mesa.git] / src / gallium / drivers / swr / swr_state.cpp
1 /****************************************************************************
2 * Copyright (C) 2015 Intel Corporation. All Rights Reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 ***************************************************************************/
23
24 // llvm redefines DEBUG
25 #pragma push_macro("DEBUG")
26 #undef DEBUG
27 #include "JitManager.h"
28 #pragma pop_macro("DEBUG")
29
30 #include "common/os.h"
31 #include "jit_api.h"
32 #include "gen_state_llvm.h"
33 #include "core/multisample.h"
34
35 #include "gallivm/lp_bld_tgsi.h"
36 #include "util/u_format.h"
37
38 #include "util/u_memory.h"
39 #include "util/u_inlines.h"
40 #include "util/u_helpers.h"
41 #include "util/u_framebuffer.h"
42 #include "util/u_viewport.h"
43 #include "util/u_prim.h"
44
45 #include "swr_state.h"
46 #include "swr_context.h"
47 #include "gen_swr_context_llvm.h"
48 #include "swr_screen.h"
49 #include "swr_resource.h"
50 #include "swr_tex_sample.h"
51 #include "swr_scratch.h"
52 #include "swr_shader.h"
53 #include "swr_fence.h"
54
55 /* These should be pulled out into separate files as necessary
56 * Just initializing everything here to get going. */
57
58 static void *
59 swr_create_blend_state(struct pipe_context *pipe,
60 const struct pipe_blend_state *blend)
61 {
62 struct swr_blend_state *state = CALLOC_STRUCT(swr_blend_state);
63
64 memcpy(&state->pipe, blend, sizeof(*blend));
65
66 struct pipe_blend_state *pipe_blend = &state->pipe;
67
68 for (int target = 0;
69 target < std::min(SWR_NUM_RENDERTARGETS, PIPE_MAX_COLOR_BUFS);
70 target++) {
71
72 struct pipe_rt_blend_state *rt_blend = &pipe_blend->rt[target];
73 SWR_RENDER_TARGET_BLEND_STATE &blendState =
74 state->blendState.renderTarget[target];
75 RENDER_TARGET_BLEND_COMPILE_STATE &compileState =
76 state->compileState[target];
77
78 if (target != 0 && !pipe_blend->independent_blend_enable) {
79 memcpy(&compileState,
80 &state->compileState[0],
81 sizeof(RENDER_TARGET_BLEND_COMPILE_STATE));
82 continue;
83 }
84
85 compileState.blendEnable = rt_blend->blend_enable;
86 if (compileState.blendEnable) {
87 compileState.sourceAlphaBlendFactor =
88 swr_convert_blend_factor(rt_blend->alpha_src_factor);
89 compileState.destAlphaBlendFactor =
90 swr_convert_blend_factor(rt_blend->alpha_dst_factor);
91 compileState.sourceBlendFactor =
92 swr_convert_blend_factor(rt_blend->rgb_src_factor);
93 compileState.destBlendFactor =
94 swr_convert_blend_factor(rt_blend->rgb_dst_factor);
95
96 compileState.colorBlendFunc =
97 swr_convert_blend_func(rt_blend->rgb_func);
98 compileState.alphaBlendFunc =
99 swr_convert_blend_func(rt_blend->alpha_func);
100 }
101 compileState.logicOpEnable = state->pipe.logicop_enable;
102 if (compileState.logicOpEnable) {
103 compileState.logicOpFunc =
104 swr_convert_logic_op(state->pipe.logicop_func);
105 }
106
107 blendState.writeDisableRed =
108 (rt_blend->colormask & PIPE_MASK_R) ? 0 : 1;
109 blendState.writeDisableGreen =
110 (rt_blend->colormask & PIPE_MASK_G) ? 0 : 1;
111 blendState.writeDisableBlue =
112 (rt_blend->colormask & PIPE_MASK_B) ? 0 : 1;
113 blendState.writeDisableAlpha =
114 (rt_blend->colormask & PIPE_MASK_A) ? 0 : 1;
115
116 if (rt_blend->colormask == 0)
117 compileState.blendEnable = false;
118 }
119
120 return state;
121 }
122
123 static void
124 swr_bind_blend_state(struct pipe_context *pipe, void *blend)
125 {
126 struct swr_context *ctx = swr_context(pipe);
127
128 if (ctx->blend == blend)
129 return;
130
131 ctx->blend = (swr_blend_state *)blend;
132
133 ctx->dirty |= SWR_NEW_BLEND;
134 }
135
136 static void
137 swr_delete_blend_state(struct pipe_context *pipe, void *blend)
138 {
139 FREE(blend);
140 }
141
142 static void
143 swr_set_blend_color(struct pipe_context *pipe,
144 const struct pipe_blend_color *color)
145 {
146 struct swr_context *ctx = swr_context(pipe);
147
148 ctx->blend_color = *color;
149
150 ctx->dirty |= SWR_NEW_BLEND;
151 }
152
153 static void
154 swr_set_stencil_ref(struct pipe_context *pipe,
155 const struct pipe_stencil_ref *ref)
156 {
157 struct swr_context *ctx = swr_context(pipe);
158
159 ctx->stencil_ref = *ref;
160
161 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
162 }
163
164 static void *
165 swr_create_depth_stencil_state(
166 struct pipe_context *pipe,
167 const struct pipe_depth_stencil_alpha_state *depth_stencil)
168 {
169 struct pipe_depth_stencil_alpha_state *state;
170
171 state = (pipe_depth_stencil_alpha_state *)mem_dup(depth_stencil,
172 sizeof *depth_stencil);
173
174 return state;
175 }
176
177 static void
178 swr_bind_depth_stencil_state(struct pipe_context *pipe, void *depth_stencil)
179 {
180 struct swr_context *ctx = swr_context(pipe);
181
182 if (ctx->depth_stencil == (pipe_depth_stencil_alpha_state *)depth_stencil)
183 return;
184
185 ctx->depth_stencil = (pipe_depth_stencil_alpha_state *)depth_stencil;
186
187 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
188 }
189
190 static void
191 swr_delete_depth_stencil_state(struct pipe_context *pipe, void *depth)
192 {
193 FREE(depth);
194 }
195
196
197 static void *
198 swr_create_rasterizer_state(struct pipe_context *pipe,
199 const struct pipe_rasterizer_state *rast)
200 {
201 struct pipe_rasterizer_state *state;
202 state = (pipe_rasterizer_state *)mem_dup(rast, sizeof *rast);
203
204 return state;
205 }
206
207 static void
208 swr_bind_rasterizer_state(struct pipe_context *pipe, void *handle)
209 {
210 struct swr_context *ctx = swr_context(pipe);
211 const struct pipe_rasterizer_state *rasterizer =
212 (const struct pipe_rasterizer_state *)handle;
213
214 if (ctx->rasterizer == (pipe_rasterizer_state *)rasterizer)
215 return;
216
217 ctx->rasterizer = (pipe_rasterizer_state *)rasterizer;
218
219 ctx->dirty |= SWR_NEW_RASTERIZER;
220 }
221
222 static void
223 swr_delete_rasterizer_state(struct pipe_context *pipe, void *rasterizer)
224 {
225 FREE(rasterizer);
226 }
227
228
229 static void *
230 swr_create_sampler_state(struct pipe_context *pipe,
231 const struct pipe_sampler_state *sampler)
232 {
233 struct pipe_sampler_state *state =
234 (pipe_sampler_state *)mem_dup(sampler, sizeof *sampler);
235
236 return state;
237 }
238
239 static void
240 swr_bind_sampler_states(struct pipe_context *pipe,
241 enum pipe_shader_type shader,
242 unsigned start,
243 unsigned num,
244 void **samplers)
245 {
246 struct swr_context *ctx = swr_context(pipe);
247 unsigned i;
248
249 assert(shader < PIPE_SHADER_TYPES);
250 assert(start + num <= ARRAY_SIZE(ctx->samplers[shader]));
251
252 /* set the new samplers */
253 ctx->num_samplers[shader] = num;
254 for (i = 0; i < num; i++) {
255 ctx->samplers[shader][start + i] = (pipe_sampler_state *)samplers[i];
256 }
257
258 ctx->dirty |= SWR_NEW_SAMPLER;
259 }
260
261 static void
262 swr_delete_sampler_state(struct pipe_context *pipe, void *sampler)
263 {
264 FREE(sampler);
265 }
266
267
268 static struct pipe_sampler_view *
269 swr_create_sampler_view(struct pipe_context *pipe,
270 struct pipe_resource *texture,
271 const struct pipe_sampler_view *templ)
272 {
273 struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view);
274
275 if (view) {
276 *view = *templ;
277 view->reference.count = 1;
278 view->texture = NULL;
279 pipe_resource_reference(&view->texture, texture);
280 view->context = pipe;
281 }
282
283 return view;
284 }
285
286 static void
287 swr_set_sampler_views(struct pipe_context *pipe,
288 enum pipe_shader_type shader,
289 unsigned start,
290 unsigned num,
291 struct pipe_sampler_view **views)
292 {
293 struct swr_context *ctx = swr_context(pipe);
294 uint i;
295
296 assert(num <= PIPE_MAX_SHADER_SAMPLER_VIEWS);
297
298 assert(shader < PIPE_SHADER_TYPES);
299 assert(start + num <= ARRAY_SIZE(ctx->sampler_views[shader]));
300
301 /* set the new sampler views */
302 ctx->num_sampler_views[shader] = num;
303 for (i = 0; i < num; i++) {
304 /* Note: we're using pipe_sampler_view_release() here to work around
305 * a possible crash when the old view belongs to another context that
306 * was already destroyed.
307 */
308 pipe_sampler_view_release(pipe, &ctx->sampler_views[shader][start + i]);
309 pipe_sampler_view_reference(&ctx->sampler_views[shader][start + i],
310 views[i]);
311 }
312
313 ctx->dirty |= SWR_NEW_SAMPLER_VIEW;
314 }
315
316 static void
317 swr_sampler_view_destroy(struct pipe_context *pipe,
318 struct pipe_sampler_view *view)
319 {
320 pipe_resource_reference(&view->texture, NULL);
321 FREE(view);
322 }
323
324 static void *
325 swr_create_vs_state(struct pipe_context *pipe,
326 const struct pipe_shader_state *vs)
327 {
328 struct swr_vertex_shader *swr_vs = new swr_vertex_shader;
329 if (!swr_vs)
330 return NULL;
331
332 swr_vs->pipe.tokens = tgsi_dup_tokens(vs->tokens);
333 swr_vs->pipe.stream_output = vs->stream_output;
334
335 lp_build_tgsi_info(vs->tokens, &swr_vs->info);
336
337 swr_vs->soState = {0};
338
339 if (swr_vs->pipe.stream_output.num_outputs) {
340 pipe_stream_output_info *stream_output = &swr_vs->pipe.stream_output;
341
342 swr_vs->soState.soEnable = true;
343 // soState.rasterizerDisable set on state dirty
344 // soState.streamToRasterizer not used
345
346 for (uint32_t i = 0; i < stream_output->num_outputs; i++) {
347 swr_vs->soState.streamMasks[stream_output->output[i].stream] |=
348 1 << (stream_output->output[i].register_index - 1);
349 }
350 for (uint32_t i = 0; i < MAX_SO_STREAMS; i++) {
351 swr_vs->soState.streamNumEntries[i] =
352 _mm_popcnt_u32(swr_vs->soState.streamMasks[i]);
353 }
354 }
355
356 return swr_vs;
357 }
358
359 static void
360 swr_bind_vs_state(struct pipe_context *pipe, void *vs)
361 {
362 struct swr_context *ctx = swr_context(pipe);
363
364 if (ctx->vs == vs)
365 return;
366
367 ctx->vs = (swr_vertex_shader *)vs;
368 ctx->dirty |= SWR_NEW_VS;
369 }
370
371 static void
372 swr_delete_vs_state(struct pipe_context *pipe, void *vs)
373 {
374 struct swr_vertex_shader *swr_vs = (swr_vertex_shader *)vs;
375 FREE((void *)swr_vs->pipe.tokens);
376 struct swr_screen *screen = swr_screen(pipe->screen);
377
378 /* Defer deletion of vs state */
379 swr_fence_work_delete_vs(screen->flush_fence, swr_vs);
380 }
381
382 static void *
383 swr_create_fs_state(struct pipe_context *pipe,
384 const struct pipe_shader_state *fs)
385 {
386 struct swr_fragment_shader *swr_fs = new swr_fragment_shader;
387 if (!swr_fs)
388 return NULL;
389
390 swr_fs->pipe.tokens = tgsi_dup_tokens(fs->tokens);
391
392 lp_build_tgsi_info(fs->tokens, &swr_fs->info);
393
394 return swr_fs;
395 }
396
397
398 static void
399 swr_bind_fs_state(struct pipe_context *pipe, void *fs)
400 {
401 struct swr_context *ctx = swr_context(pipe);
402
403 if (ctx->fs == fs)
404 return;
405
406 ctx->fs = (swr_fragment_shader *)fs;
407 ctx->dirty |= SWR_NEW_FS;
408 }
409
410 static void
411 swr_delete_fs_state(struct pipe_context *pipe, void *fs)
412 {
413 struct swr_fragment_shader *swr_fs = (swr_fragment_shader *)fs;
414 FREE((void *)swr_fs->pipe.tokens);
415 struct swr_screen *screen = swr_screen(pipe->screen);
416
417 /* Defer deleton of fs state */
418 swr_fence_work_delete_fs(screen->flush_fence, swr_fs);
419 }
420
421 static void *
422 swr_create_gs_state(struct pipe_context *pipe,
423 const struct pipe_shader_state *gs)
424 {
425 struct swr_geometry_shader *swr_gs = new swr_geometry_shader;
426 if (!swr_gs)
427 return NULL;
428
429 swr_gs->pipe.tokens = tgsi_dup_tokens(gs->tokens);
430
431 lp_build_tgsi_info(gs->tokens, &swr_gs->info);
432
433 return swr_gs;
434 }
435
436
437 static void
438 swr_bind_gs_state(struct pipe_context *pipe, void *gs)
439 {
440 struct swr_context *ctx = swr_context(pipe);
441
442 if (ctx->gs == gs)
443 return;
444
445 ctx->gs = (swr_geometry_shader *)gs;
446 ctx->dirty |= SWR_NEW_GS;
447 }
448
449 static void
450 swr_delete_gs_state(struct pipe_context *pipe, void *gs)
451 {
452 struct swr_geometry_shader *swr_gs = (swr_geometry_shader *)gs;
453 FREE((void *)swr_gs->pipe.tokens);
454 struct swr_screen *screen = swr_screen(pipe->screen);
455
456 /* Defer deleton of fs state */
457 swr_fence_work_delete_gs(screen->flush_fence, swr_gs);
458 }
459
460 static void
461 swr_set_constant_buffer(struct pipe_context *pipe,
462 enum pipe_shader_type shader,
463 uint index,
464 const struct pipe_constant_buffer *cb)
465 {
466 struct swr_context *ctx = swr_context(pipe);
467 struct pipe_resource *constants = cb ? cb->buffer : NULL;
468
469 assert(shader < PIPE_SHADER_TYPES);
470 assert(index < ARRAY_SIZE(ctx->constants[shader]));
471
472 /* note: reference counting */
473 util_copy_constant_buffer(&ctx->constants[shader][index], cb);
474
475 if (shader == PIPE_SHADER_VERTEX) {
476 ctx->dirty |= SWR_NEW_VSCONSTANTS;
477 } else if (shader == PIPE_SHADER_FRAGMENT) {
478 ctx->dirty |= SWR_NEW_FSCONSTANTS;
479 } else if (shader == PIPE_SHADER_GEOMETRY) {
480 ctx->dirty |= SWR_NEW_GSCONSTANTS;
481 }
482
483 if (cb && cb->user_buffer) {
484 pipe_resource_reference(&constants, NULL);
485 }
486 }
487
488
489 static void *
490 swr_create_vertex_elements_state(struct pipe_context *pipe,
491 unsigned num_elements,
492 const struct pipe_vertex_element *attribs)
493 {
494 struct swr_vertex_element_state *velems;
495 assert(num_elements <= PIPE_MAX_ATTRIBS);
496 velems = new swr_vertex_element_state;
497 if (velems) {
498 velems->fsState.bVertexIDOffsetEnable = true;
499 velems->fsState.numAttribs = num_elements;
500 for (unsigned i = 0; i < num_elements; i++) {
501 // XXX: we should do this keyed on the VS usage info
502
503 const struct util_format_description *desc =
504 util_format_description(attribs[i].src_format);
505
506 velems->fsState.layout[i].AlignedByteOffset = attribs[i].src_offset;
507 velems->fsState.layout[i].Format =
508 mesa_to_swr_format(attribs[i].src_format);
509 velems->fsState.layout[i].StreamIndex =
510 attribs[i].vertex_buffer_index;
511 velems->fsState.layout[i].InstanceEnable =
512 attribs[i].instance_divisor != 0;
513 velems->fsState.layout[i].ComponentControl0 =
514 desc->channel[0].type != UTIL_FORMAT_TYPE_VOID
515 ? ComponentControl::StoreSrc
516 : ComponentControl::Store0;
517 velems->fsState.layout[i].ComponentControl1 =
518 desc->channel[1].type != UTIL_FORMAT_TYPE_VOID
519 ? ComponentControl::StoreSrc
520 : ComponentControl::Store0;
521 velems->fsState.layout[i].ComponentControl2 =
522 desc->channel[2].type != UTIL_FORMAT_TYPE_VOID
523 ? ComponentControl::StoreSrc
524 : ComponentControl::Store0;
525 velems->fsState.layout[i].ComponentControl3 =
526 desc->channel[3].type != UTIL_FORMAT_TYPE_VOID
527 ? ComponentControl::StoreSrc
528 : ComponentControl::Store1Fp;
529 velems->fsState.layout[i].ComponentPacking = ComponentEnable::XYZW;
530 velems->fsState.layout[i].InstanceDataStepRate =
531 attribs[i].instance_divisor;
532
533 /* Calculate the pitch of each stream */
534 const SWR_FORMAT_INFO &swr_desc = GetFormatInfo(
535 mesa_to_swr_format(attribs[i].src_format));
536 velems->stream_pitch[attribs[i].vertex_buffer_index] += swr_desc.Bpp;
537
538 if (attribs[i].instance_divisor != 0) {
539 velems->instanced_bufs |= 1U << attribs[i].vertex_buffer_index;
540 uint32_t *min_instance_div =
541 &velems->min_instance_div[attribs[i].vertex_buffer_index];
542 if (!*min_instance_div ||
543 attribs[i].instance_divisor < *min_instance_div)
544 *min_instance_div = attribs[i].instance_divisor;
545 }
546 }
547 }
548
549 return velems;
550 }
551
552 static void
553 swr_bind_vertex_elements_state(struct pipe_context *pipe, void *velems)
554 {
555 struct swr_context *ctx = swr_context(pipe);
556 struct swr_vertex_element_state *swr_velems =
557 (struct swr_vertex_element_state *)velems;
558
559 ctx->velems = swr_velems;
560 ctx->dirty |= SWR_NEW_VERTEX;
561 }
562
563 static void
564 swr_delete_vertex_elements_state(struct pipe_context *pipe, void *velems)
565 {
566 struct swr_vertex_element_state *swr_velems =
567 (struct swr_vertex_element_state *) velems;
568 /* XXX Need to destroy fetch shader? */
569 delete swr_velems;
570 }
571
572
573 static void
574 swr_set_vertex_buffers(struct pipe_context *pipe,
575 unsigned start_slot,
576 unsigned num_elements,
577 const struct pipe_vertex_buffer *buffers)
578 {
579 struct swr_context *ctx = swr_context(pipe);
580
581 assert(num_elements <= PIPE_MAX_ATTRIBS);
582
583 util_set_vertex_buffers_count(ctx->vertex_buffer,
584 &ctx->num_vertex_buffers,
585 buffers,
586 start_slot,
587 num_elements);
588
589 ctx->dirty |= SWR_NEW_VERTEX;
590 }
591
592
593 static void
594 swr_set_polygon_stipple(struct pipe_context *pipe,
595 const struct pipe_poly_stipple *stipple)
596 {
597 struct swr_context *ctx = swr_context(pipe);
598
599 ctx->poly_stipple.pipe = *stipple; /* struct copy */
600 ctx->dirty |= SWR_NEW_STIPPLE;
601 }
602
603 static void
604 swr_set_clip_state(struct pipe_context *pipe,
605 const struct pipe_clip_state *clip)
606 {
607 struct swr_context *ctx = swr_context(pipe);
608
609 ctx->clip = *clip;
610 /* XXX Unimplemented, but prevents crash */
611
612 ctx->dirty |= SWR_NEW_CLIP;
613 }
614
615
616 static void
617 swr_set_scissor_states(struct pipe_context *pipe,
618 unsigned start_slot,
619 unsigned num_viewports,
620 const struct pipe_scissor_state *scissor)
621 {
622 struct swr_context *ctx = swr_context(pipe);
623
624 ctx->scissor = *scissor;
625 ctx->swr_scissor.xmin = scissor->minx;
626 ctx->swr_scissor.xmax = scissor->maxx;
627 ctx->swr_scissor.ymin = scissor->miny;
628 ctx->swr_scissor.ymax = scissor->maxy;
629 ctx->dirty |= SWR_NEW_SCISSOR;
630 }
631
632 static void
633 swr_set_viewport_states(struct pipe_context *pipe,
634 unsigned start_slot,
635 unsigned num_viewports,
636 const struct pipe_viewport_state *vpt)
637 {
638 struct swr_context *ctx = swr_context(pipe);
639
640 ctx->viewport = *vpt;
641 ctx->dirty |= SWR_NEW_VIEWPORT;
642 }
643
644
645 static void
646 swr_set_framebuffer_state(struct pipe_context *pipe,
647 const struct pipe_framebuffer_state *fb)
648 {
649 struct swr_context *ctx = swr_context(pipe);
650
651 boolean changed = !util_framebuffer_state_equal(&ctx->framebuffer, fb);
652
653 assert(fb->width <= KNOB_GUARDBAND_WIDTH);
654 assert(fb->height <= KNOB_GUARDBAND_HEIGHT);
655
656 if (changed) {
657 util_copy_framebuffer_state(&ctx->framebuffer, fb);
658
659 /* 0 and 1 both indicate no msaa. Core doesn't understand 0 samples */
660 ctx->framebuffer.samples = std::max((ubyte)1, ctx->framebuffer.samples);
661
662 ctx->dirty |= SWR_NEW_FRAMEBUFFER;
663 }
664 }
665
666
667 static void
668 swr_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
669 {
670 struct swr_context *ctx = swr_context(pipe);
671
672 if (sample_mask != ctx->sample_mask) {
673 ctx->sample_mask = sample_mask;
674 ctx->dirty |= SWR_NEW_RASTERIZER;
675 }
676 }
677
678 /*
679 * MSAA fixed sample position table
680 * used by update_derived and get_sample_position
681 * (integer locations on a 16x16 grid)
682 */
683 static const uint8_t swr_sample_positions[][2] =
684 { /* 1x*/ { 8, 8},
685 /* 2x*/ {12,12},{ 4, 4},
686 /* 4x*/ { 6, 2},{14, 6},{ 2,10},{10,14},
687 /* 8x*/ { 9, 5},{ 7,11},{13, 9},{ 5, 3},
688 { 3,13},{ 1, 7},{11,15},{15, 1},
689 /*16x*/ { 9, 9},{ 7, 5},{ 5,10},{12, 7},
690 { 3, 6},{10,13},{13,11},{11, 3},
691 { 6,14},{ 8, 1},{ 4, 2},{ 2,12},
692 { 0, 8},{15, 4},{14,15},{ 1, 0} };
693
694 static void
695 swr_get_sample_position(struct pipe_context *pipe,
696 unsigned sample_count, unsigned sample_index,
697 float *out_value)
698 {
699 /* validate sample_count */
700 sample_count = GetNumSamples(GetSampleCount(sample_count));
701
702 const uint8_t *sample = swr_sample_positions[sample_count-1 + sample_index];
703 out_value[0] = sample[0] / 16.0f;
704 out_value[1] = sample[1] / 16.0f;
705 }
706
707
708 /*
709 * Update resource in-use status
710 * All resources bound to color or depth targets marked as WRITE resources.
711 * VBO Vertex/index buffers and texture views marked as READ resources.
712 */
713 void
714 swr_update_resource_status(struct pipe_context *pipe,
715 const struct pipe_draw_info *p_draw_info)
716 {
717 struct swr_context *ctx = swr_context(pipe);
718 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
719
720 /* colorbuffer targets */
721 if (fb->nr_cbufs)
722 for (uint32_t i = 0; i < fb->nr_cbufs; ++i)
723 if (fb->cbufs[i])
724 swr_resource_write(fb->cbufs[i]->texture);
725
726 /* depth/stencil target */
727 if (fb->zsbuf)
728 swr_resource_write(fb->zsbuf->texture);
729
730 /* VBO vertex buffers */
731 for (uint32_t i = 0; i < ctx->num_vertex_buffers; i++) {
732 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
733 if (!vb->is_user_buffer)
734 swr_resource_read(vb->buffer.resource);
735 }
736
737 /* VBO index buffer */
738 if (p_draw_info && p_draw_info->index_size) {
739 if (!p_draw_info->has_user_indices)
740 swr_resource_read(p_draw_info->index.resource);
741 }
742
743 /* transform feedback buffers */
744 for (uint32_t i = 0; i < ctx->num_so_targets; i++) {
745 struct pipe_stream_output_target *target = ctx->so_targets[i];
746 if (target && target->buffer)
747 swr_resource_write(target->buffer);
748 }
749
750 /* texture sampler views */
751 for (uint32_t j : {PIPE_SHADER_VERTEX, PIPE_SHADER_FRAGMENT}) {
752 for (uint32_t i = 0; i < ctx->num_sampler_views[j]; i++) {
753 struct pipe_sampler_view *view = ctx->sampler_views[j][i];
754 if (view)
755 swr_resource_read(view->texture);
756 }
757 }
758
759 /* constant buffers */
760 for (uint32_t j : {PIPE_SHADER_VERTEX, PIPE_SHADER_FRAGMENT}) {
761 for (uint32_t i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
762 struct pipe_constant_buffer *cb = &ctx->constants[j][i];
763 if (cb->buffer)
764 swr_resource_read(cb->buffer);
765 }
766 }
767 }
768
769 static void
770 swr_update_texture_state(struct swr_context *ctx,
771 enum pipe_shader_type shader_type,
772 unsigned num_sampler_views,
773 swr_jit_texture *textures)
774 {
775 for (unsigned i = 0; i < num_sampler_views; i++) {
776 struct pipe_sampler_view *view =
777 ctx->sampler_views[shader_type][i];
778 struct swr_jit_texture *jit_tex = &textures[i];
779
780 memset(jit_tex, 0, sizeof(*jit_tex));
781 if (view) {
782 struct pipe_resource *res = view->texture;
783 struct swr_resource *swr_res = swr_resource(res);
784 SWR_SURFACE_STATE *swr = &swr_res->swr;
785 size_t *mip_offsets = swr_res->mip_offsets;
786 if (swr_res->has_depth && swr_res->has_stencil &&
787 !util_format_has_depth(util_format_description(view->format))) {
788 swr = &swr_res->secondary;
789 mip_offsets = swr_res->secondary_mip_offsets;
790 }
791
792 jit_tex->width = res->width0;
793 jit_tex->height = res->height0;
794 jit_tex->base_ptr = swr->pBaseAddress;
795 if (view->target != PIPE_BUFFER) {
796 jit_tex->first_level = view->u.tex.first_level;
797 jit_tex->last_level = view->u.tex.last_level;
798 if (view->target == PIPE_TEXTURE_3D)
799 jit_tex->depth = res->depth0;
800 else
801 jit_tex->depth =
802 view->u.tex.last_layer - view->u.tex.first_layer + 1;
803 jit_tex->base_ptr += view->u.tex.first_layer *
804 swr->qpitch * swr->pitch;
805 } else {
806 unsigned view_blocksize = util_format_get_blocksize(view->format);
807 jit_tex->base_ptr += view->u.buf.offset;
808 jit_tex->width = view->u.buf.size / view_blocksize;
809 jit_tex->depth = 1;
810 }
811
812 for (unsigned level = jit_tex->first_level;
813 level <= jit_tex->last_level;
814 level++) {
815 jit_tex->row_stride[level] = swr->pitch;
816 jit_tex->img_stride[level] = swr->qpitch * swr->pitch;
817 jit_tex->mip_offsets[level] = mip_offsets[level];
818 }
819 }
820 }
821 }
822
823 static void
824 swr_update_sampler_state(struct swr_context *ctx,
825 enum pipe_shader_type shader_type,
826 unsigned num_samplers,
827 swr_jit_sampler *samplers)
828 {
829 for (unsigned i = 0; i < num_samplers; i++) {
830 const struct pipe_sampler_state *sampler =
831 ctx->samplers[shader_type][i];
832
833 if (sampler) {
834 samplers[i].min_lod = sampler->min_lod;
835 samplers[i].max_lod = sampler->max_lod;
836 samplers[i].lod_bias = sampler->lod_bias;
837 COPY_4V(samplers[i].border_color, sampler->border_color.f);
838 }
839 }
840 }
841
842 static void
843 swr_update_constants(struct swr_context *ctx, enum pipe_shader_type shaderType)
844 {
845 swr_draw_context *pDC = &ctx->swrDC;
846
847 const float **constant;
848 uint32_t *num_constants;
849 struct swr_scratch_space *scratch;
850
851 switch (shaderType) {
852 case PIPE_SHADER_VERTEX:
853 constant = pDC->constantVS;
854 num_constants = pDC->num_constantsVS;
855 scratch = &ctx->scratch->vs_constants;
856 break;
857 case PIPE_SHADER_FRAGMENT:
858 constant = pDC->constantFS;
859 num_constants = pDC->num_constantsFS;
860 scratch = &ctx->scratch->fs_constants;
861 break;
862 case PIPE_SHADER_GEOMETRY:
863 constant = pDC->constantGS;
864 num_constants = pDC->num_constantsGS;
865 scratch = &ctx->scratch->gs_constants;
866 break;
867 default:
868 debug_printf("Unsupported shader type constants\n");
869 return;
870 }
871
872 for (UINT i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
873 const pipe_constant_buffer *cb = &ctx->constants[shaderType][i];
874 num_constants[i] = cb->buffer_size;
875 if (cb->buffer) {
876 constant[i] =
877 (const float *)(swr_resource_data(cb->buffer) +
878 cb->buffer_offset);
879 } else {
880 /* Need to copy these constants to scratch space */
881 if (cb->user_buffer && cb->buffer_size) {
882 const void *ptr =
883 ((const uint8_t *)cb->user_buffer + cb->buffer_offset);
884 uint32_t size = AlignUp(cb->buffer_size, 4);
885 ptr = swr_copy_to_scratch_space(ctx, scratch, ptr, size);
886 constant[i] = (const float *)ptr;
887 }
888 }
889 }
890 }
891
892 static bool
893 swr_change_rt(struct swr_context *ctx,
894 unsigned attachment,
895 const struct pipe_surface *sf)
896 {
897 swr_draw_context *pDC = &ctx->swrDC;
898 struct SWR_SURFACE_STATE *rt = &pDC->renderTargets[attachment];
899
900 /* Do nothing if the render target hasn't changed */
901 if ((!sf || !sf->texture) && rt->pBaseAddress == nullptr)
902 return false;
903
904 /* Deal with disabling RT up front */
905 if (!sf || !sf->texture) {
906 /* If detaching attachment, mark tiles as RESOLVED so core
907 * won't try to load from non-existent target. */
908 swr_store_render_target(&ctx->pipe, attachment, SWR_TILE_RESOLVED);
909 *rt = {0};
910 return true;
911 }
912
913 const struct swr_resource *swr = swr_resource(sf->texture);
914 const SWR_SURFACE_STATE *swr_surface = &swr->swr;
915 SWR_FORMAT fmt = mesa_to_swr_format(sf->format);
916
917 if (attachment == SWR_ATTACHMENT_STENCIL && swr->secondary.pBaseAddress) {
918 swr_surface = &swr->secondary;
919 fmt = swr_surface->format;
920 }
921
922 if (rt->pBaseAddress == swr_surface->pBaseAddress &&
923 rt->format == fmt &&
924 rt->lod == sf->u.tex.level &&
925 rt->arrayIndex == sf->u.tex.first_layer)
926 return false;
927
928 bool need_fence = false;
929
930 /* StoreTile for changed target */
931 if (rt->pBaseAddress) {
932 /* If changing attachment to a new target, mark tiles as
933 * INVALID so they are reloaded from surface. */
934 swr_store_render_target(&ctx->pipe, attachment, SWR_TILE_INVALID);
935 need_fence = true;
936 }
937
938 /* Make new attachment */
939 *rt = *swr_surface;
940 rt->format = fmt;
941 rt->lod = sf->u.tex.level;
942 rt->arrayIndex = sf->u.tex.first_layer;
943
944 return need_fence;
945 }
946
947 static inline void
948 swr_user_vbuf_range(const struct pipe_draw_info *info,
949 const struct swr_vertex_element_state *velems,
950 const struct pipe_vertex_buffer *vb,
951 uint32_t i,
952 uint32_t *totelems,
953 uint32_t *base,
954 uint32_t *size)
955 {
956 /* FIXME: The size is too large - we don't access the full extra stride. */
957 unsigned elems;
958 if (velems->instanced_bufs & (1U << i)) {
959 elems = info->instance_count / velems->min_instance_div[i] + 1;
960 *totelems = info->start_instance + elems;
961 *base = info->start_instance * vb->stride;
962 *size = elems * vb->stride;
963 } else if (vb->stride) {
964 elems = info->max_index - info->min_index + 1;
965 *totelems = info->max_index + 1;
966 *base = info->min_index * vb->stride;
967 *size = elems * vb->stride;
968 } else {
969 *totelems = 1;
970 *base = 0;
971 *size = velems->stream_pitch[i];
972 }
973 }
974
975 static void
976 swr_update_poly_stipple(struct swr_context *ctx)
977 {
978 struct swr_draw_context *pDC = &ctx->swrDC;
979
980 assert(sizeof(ctx->poly_stipple.pipe.stipple) == sizeof(pDC->polyStipple));
981 memcpy(pDC->polyStipple,
982 ctx->poly_stipple.pipe.stipple,
983 sizeof(ctx->poly_stipple.pipe.stipple));
984 }
985
986 void
987 swr_update_derived(struct pipe_context *pipe,
988 const struct pipe_draw_info *p_draw_info)
989 {
990 struct swr_context *ctx = swr_context(pipe);
991 struct swr_screen *screen = swr_screen(pipe->screen);
992
993 /* When called from swr_clear (p_draw_info = null), set any null
994 * state-objects to the dummy state objects to prevent nullptr dereference
995 * in validation below.
996 *
997 * Important that this remains static for zero initialization. These
998 * aren't meant to be proper state objects, just empty structs. They will
999 * not be written to.
1000 *
1001 * Shaders can't be part of the union since they contain std::unordered_map
1002 */
1003 static struct {
1004 union {
1005 struct pipe_rasterizer_state rasterizer;
1006 struct pipe_depth_stencil_alpha_state depth_stencil;
1007 struct swr_blend_state blend;
1008 } state;
1009 struct swr_vertex_shader vs;
1010 struct swr_fragment_shader fs;
1011 } swr_dummy;
1012
1013 if (!p_draw_info) {
1014 if (!ctx->rasterizer)
1015 ctx->rasterizer = &swr_dummy.state.rasterizer;
1016 if (!ctx->depth_stencil)
1017 ctx->depth_stencil = &swr_dummy.state.depth_stencil;
1018 if (!ctx->blend)
1019 ctx->blend = &swr_dummy.state.blend;
1020 if (!ctx->vs)
1021 ctx->vs = &swr_dummy.vs;
1022 if (!ctx->fs)
1023 ctx->fs = &swr_dummy.fs;
1024 }
1025
1026 /* Update screen->pipe to current pipe context. */
1027 if (screen->pipe != pipe)
1028 screen->pipe = pipe;
1029
1030 /* Any state that requires dirty flags to be re-triggered sets this mask */
1031 /* For example, user_buffer vertex and index buffers. */
1032 unsigned post_update_dirty_flags = 0;
1033
1034 /* Render Targets */
1035 if (ctx->dirty & SWR_NEW_FRAMEBUFFER) {
1036 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
1037 const struct util_format_description *desc = NULL;
1038 bool need_fence = false;
1039
1040 /* colorbuffer targets */
1041 if (fb->nr_cbufs) {
1042 for (unsigned i = 0; i < fb->nr_cbufs; ++i)
1043 need_fence |= swr_change_rt(
1044 ctx, SWR_ATTACHMENT_COLOR0 + i, fb->cbufs[i]);
1045 }
1046 for (unsigned i = fb->nr_cbufs; i < SWR_NUM_RENDERTARGETS; ++i)
1047 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_COLOR0 + i, NULL);
1048
1049 /* depth/stencil target */
1050 if (fb->zsbuf)
1051 desc = util_format_description(fb->zsbuf->format);
1052 if (fb->zsbuf && util_format_has_depth(desc))
1053 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_DEPTH, fb->zsbuf);
1054 else
1055 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_DEPTH, NULL);
1056
1057 if (fb->zsbuf && util_format_has_stencil(desc))
1058 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_STENCIL, fb->zsbuf);
1059 else
1060 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_STENCIL, NULL);
1061
1062 /* This fence ensures any attachment changes are resolved before the
1063 * next draw */
1064 if (need_fence)
1065 swr_fence_submit(ctx, screen->flush_fence);
1066 }
1067
1068 /* Raster state */
1069 if (ctx->dirty & (SWR_NEW_RASTERIZER |
1070 SWR_NEW_VS | // clipping
1071 SWR_NEW_FRAMEBUFFER)) {
1072 pipe_rasterizer_state *rasterizer = ctx->rasterizer;
1073 pipe_framebuffer_state *fb = &ctx->framebuffer;
1074
1075 SWR_RASTSTATE *rastState = &ctx->derived.rastState;
1076 rastState->cullMode = swr_convert_cull_mode(rasterizer->cull_face);
1077 rastState->frontWinding = rasterizer->front_ccw
1078 ? SWR_FRONTWINDING_CCW
1079 : SWR_FRONTWINDING_CW;
1080 rastState->scissorEnable = rasterizer->scissor;
1081 rastState->pointSize = rasterizer->point_size > 0.0f
1082 ? rasterizer->point_size
1083 : 1.0f;
1084 rastState->lineWidth = rasterizer->line_width > 0.0f
1085 ? rasterizer->line_width
1086 : 1.0f;
1087
1088 rastState->pointParam = rasterizer->point_size_per_vertex;
1089
1090 rastState->pointSpriteEnable = rasterizer->sprite_coord_enable;
1091 rastState->pointSpriteTopOrigin =
1092 rasterizer->sprite_coord_mode == PIPE_SPRITE_COORD_UPPER_LEFT;
1093
1094 /* If SWR_MSAA_FORCE_ENABLE is set, turn msaa on */
1095 if (screen->msaa_force_enable && !rasterizer->multisample) {
1096 /* Force enable and use the value the surface was created with */
1097 rasterizer->multisample = true;
1098 fb->samples = swr_resource(fb->cbufs[0]->texture)->swr.numSamples;
1099 fprintf(stderr,"msaa force enable: %d samples\n", fb->samples);
1100 }
1101
1102 rastState->sampleCount = GetSampleCount(fb->samples);
1103 rastState->forcedSampleCount = false;
1104 rastState->bIsCenterPattern = !rasterizer->multisample;
1105 rastState->pixelLocation = SWR_PIXEL_LOCATION_CENTER;
1106
1107 /* Only initialize sample positions if msaa is enabled */
1108 if (rasterizer->multisample) {
1109 for (uint32_t i = 0; i < fb->samples; i++) {
1110 const uint8_t *sample = swr_sample_positions[fb->samples-1 + i];
1111 rastState->samplePositions.SetXi(i, sample[0] << 4);
1112 rastState->samplePositions.SetYi(i, sample[1] << 4);
1113 rastState->samplePositions.SetX (i, sample[0] / 16.0f);
1114 rastState->samplePositions.SetY (i, sample[1] / 16.0f);
1115 }
1116 rastState->samplePositions.PrecalcSampleData(fb->samples);
1117 }
1118
1119 bool do_offset = false;
1120 switch (rasterizer->fill_front) {
1121 case PIPE_POLYGON_MODE_FILL:
1122 do_offset = rasterizer->offset_tri;
1123 break;
1124 case PIPE_POLYGON_MODE_LINE:
1125 do_offset = rasterizer->offset_line;
1126 break;
1127 case PIPE_POLYGON_MODE_POINT:
1128 do_offset = rasterizer->offset_point;
1129 break;
1130 }
1131
1132 if (do_offset) {
1133 rastState->depthBias = rasterizer->offset_units;
1134 rastState->slopeScaledDepthBias = rasterizer->offset_scale;
1135 rastState->depthBiasClamp = rasterizer->offset_clamp;
1136 } else {
1137 rastState->depthBias = 0;
1138 rastState->slopeScaledDepthBias = 0;
1139 rastState->depthBiasClamp = 0;
1140 }
1141
1142 /* translate polygon mode, at least for the front==back case */
1143 rastState->fillMode = swr_convert_fill_mode(rasterizer->fill_front);
1144
1145 struct pipe_surface *zb = fb->zsbuf;
1146 if (zb && swr_resource(zb->texture)->has_depth)
1147 rastState->depthFormat = swr_resource(zb->texture)->swr.format;
1148
1149 rastState->depthClipEnable = rasterizer->depth_clip;
1150 rastState->clipHalfZ = rasterizer->clip_halfz;
1151
1152 rastState->clipDistanceMask =
1153 ctx->vs->info.base.num_written_clipdistance ?
1154 ctx->vs->info.base.clipdist_writemask & rasterizer->clip_plane_enable :
1155 rasterizer->clip_plane_enable;
1156
1157 rastState->cullDistanceMask =
1158 ctx->vs->info.base.culldist_writemask << ctx->vs->info.base.num_written_clipdistance;
1159
1160 SwrSetRastState(ctx->swrContext, rastState);
1161 }
1162
1163 /* Scissor */
1164 if (ctx->dirty & SWR_NEW_SCISSOR) {
1165 SwrSetScissorRects(ctx->swrContext, 1, &ctx->swr_scissor);
1166 }
1167
1168 /* Viewport */
1169 if (ctx->dirty & (SWR_NEW_VIEWPORT | SWR_NEW_FRAMEBUFFER
1170 | SWR_NEW_RASTERIZER)) {
1171 pipe_viewport_state *state = &ctx->viewport;
1172 pipe_framebuffer_state *fb = &ctx->framebuffer;
1173 pipe_rasterizer_state *rasterizer = ctx->rasterizer;
1174
1175 SWR_VIEWPORT *vp = &ctx->derived.vp;
1176 SWR_VIEWPORT_MATRICES *vpm = &ctx->derived.vpm;
1177
1178 vp->x = state->translate[0] - state->scale[0];
1179 vp->width = 2 * state->scale[0];
1180 vp->y = state->translate[1] - fabs(state->scale[1]);
1181 vp->height = 2 * fabs(state->scale[1]);
1182 util_viewport_zmin_zmax(state, rasterizer->clip_halfz,
1183 &vp->minZ, &vp->maxZ);
1184
1185 vpm->m00[0] = state->scale[0];
1186 vpm->m11[0] = state->scale[1];
1187 vpm->m22[0] = state->scale[2];
1188 vpm->m30[0] = state->translate[0];
1189 vpm->m31[0] = state->translate[1];
1190 vpm->m32[0] = state->translate[2];
1191
1192 /* Now that the matrix is calculated, clip the view coords to screen
1193 * size. OpenGL allows for -ve x,y in the viewport. */
1194 if (vp->x < 0.0f) {
1195 vp->width += vp->x;
1196 vp->x = 0.0f;
1197 }
1198 if (vp->y < 0.0f) {
1199 vp->height += vp->y;
1200 vp->y = 0.0f;
1201 }
1202 vp->width = std::min(vp->width, (float)fb->width - vp->x);
1203 vp->height = std::min(vp->height, (float)fb->height - vp->y);
1204
1205 SwrSetViewports(ctx->swrContext, 1, vp, vpm);
1206 }
1207
1208 /* Set vertex & index buffers */
1209 /* (using draw info if called by swr_draw_vbo) */
1210 /* TODO: This is always true, because the index buffer comes from
1211 * pipe_draw_info.
1212 */
1213 if (1 || ctx->dirty & SWR_NEW_VERTEX) {
1214 uint32_t scratch_total;
1215 uint8_t *scratch = NULL;
1216
1217 /* If being called by swr_draw_vbo, copy draw details */
1218 struct pipe_draw_info info = {0};
1219 if (p_draw_info)
1220 info = *p_draw_info;
1221
1222 /* We must get all the scratch space in one go */
1223 scratch_total = 0;
1224 for (UINT i = 0; i < ctx->num_vertex_buffers; i++) {
1225 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
1226
1227 if (!vb->is_user_buffer)
1228 continue;
1229
1230 uint32_t elems, base, size;
1231 swr_user_vbuf_range(&info, ctx->velems, vb, i, &elems, &base, &size);
1232 scratch_total += AlignUp(size, 4);
1233 }
1234
1235 if (scratch_total) {
1236 scratch = (uint8_t *)swr_copy_to_scratch_space(
1237 ctx, &ctx->scratch->vertex_buffer, NULL, scratch_total);
1238 }
1239
1240 /* vertex buffers */
1241 SWR_VERTEX_BUFFER_STATE swrVertexBuffers[PIPE_MAX_ATTRIBS];
1242 for (UINT i = 0; i < ctx->num_vertex_buffers; i++) {
1243 uint32_t size, pitch, elems, partial_inbounds;
1244 uint32_t min_vertex_index;
1245 const uint8_t *p_data;
1246 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
1247
1248 pitch = vb->stride;
1249 if (!vb->is_user_buffer) {
1250 /* VBO */
1251 if (!pitch) {
1252 /* If pitch=0 (ie vb->stride), buffer contains a single
1253 * constant attribute. Use the stream_pitch which was
1254 * calculated during creation of vertex_elements_state for the
1255 * size of the attribute. */
1256 size = ctx->velems->stream_pitch[i];
1257 elems = 1;
1258 partial_inbounds = 0;
1259 min_vertex_index = 0;
1260 } else {
1261 /* size is based on buffer->width0 rather than info.max_index
1262 * to prevent having to validate VBO on each draw. */
1263 size = vb->buffer.resource->width0;
1264 elems = size / pitch;
1265 partial_inbounds = size % pitch;
1266 min_vertex_index = 0;
1267 }
1268
1269 p_data = swr_resource_data(vb->buffer.resource) + vb->buffer_offset;
1270 } else {
1271 /* Client buffer
1272 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
1273 * revalidate on each draw */
1274 post_update_dirty_flags |= SWR_NEW_VERTEX;
1275
1276 uint32_t base;
1277 swr_user_vbuf_range(&info, ctx->velems, vb, i, &elems, &base, &size);
1278 partial_inbounds = 0;
1279 min_vertex_index = info.min_index;
1280
1281 /* Copy only needed vertices to scratch space */
1282 size = AlignUp(size, 4);
1283 const void *ptr = (const uint8_t *) vb->buffer.user + base;
1284 memcpy(scratch, ptr, size);
1285 ptr = scratch;
1286 scratch += size;
1287 p_data = (const uint8_t *)ptr - base;
1288 }
1289
1290 swrVertexBuffers[i] = {0};
1291 swrVertexBuffers[i].index = i;
1292 swrVertexBuffers[i].pitch = pitch;
1293 swrVertexBuffers[i].pData = p_data;
1294 swrVertexBuffers[i].size = size;
1295 swrVertexBuffers[i].minVertex = min_vertex_index;
1296 swrVertexBuffers[i].maxVertex = elems;
1297 swrVertexBuffers[i].partialInboundsSize = partial_inbounds;
1298 }
1299
1300 SwrSetVertexBuffers(
1301 ctx->swrContext, ctx->num_vertex_buffers, swrVertexBuffers);
1302
1303 /* index buffer, if required (info passed in by swr_draw_vbo) */
1304 SWR_FORMAT index_type = R32_UINT; /* Default for non-indexed draws */
1305 if (info.index_size) {
1306 const uint8_t *p_data;
1307 uint32_t size, pitch;
1308
1309 pitch = p_draw_info->index_size ? p_draw_info->index_size : sizeof(uint32_t);
1310 index_type = swr_convert_index_type(pitch);
1311
1312 if (!info.has_user_indices) {
1313 /* VBO
1314 * size is based on buffer->width0 rather than info.count
1315 * to prevent having to validate VBO on each draw */
1316 size = info.index.resource->width0;
1317 p_data = swr_resource_data(info.index.resource);
1318 } else {
1319 /* Client buffer
1320 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
1321 * revalidate on each draw */
1322 post_update_dirty_flags |= SWR_NEW_VERTEX;
1323
1324 size = info.count * pitch;
1325 size = AlignUp(size, 4);
1326
1327 /* Copy indices to scratch space */
1328 const void *ptr = info.index.user;
1329 ptr = swr_copy_to_scratch_space(
1330 ctx, &ctx->scratch->index_buffer, ptr, size);
1331 p_data = (const uint8_t *)ptr;
1332 }
1333
1334 SWR_INDEX_BUFFER_STATE swrIndexBuffer;
1335 swrIndexBuffer.format = swr_convert_index_type(p_draw_info->index_size);
1336 swrIndexBuffer.pIndices = p_data;
1337 swrIndexBuffer.size = size;
1338
1339 SwrSetIndexBuffer(ctx->swrContext, &swrIndexBuffer);
1340 }
1341
1342 struct swr_vertex_element_state *velems = ctx->velems;
1343 if (velems && velems->fsState.indexType != index_type) {
1344 velems->fsFunc = NULL;
1345 velems->fsState.indexType = index_type;
1346 }
1347 }
1348
1349 /* GeometryShader */
1350 if (ctx->dirty & (SWR_NEW_GS |
1351 SWR_NEW_VS |
1352 SWR_NEW_SAMPLER |
1353 SWR_NEW_SAMPLER_VIEW)) {
1354 if (ctx->gs) {
1355 swr_jit_gs_key key;
1356 swr_generate_gs_key(key, ctx, ctx->gs);
1357 auto search = ctx->gs->map.find(key);
1358 PFN_GS_FUNC func;
1359 if (search != ctx->gs->map.end()) {
1360 func = search->second->shader;
1361 } else {
1362 func = swr_compile_gs(ctx, key);
1363 }
1364 SwrSetGsFunc(ctx->swrContext, func);
1365
1366 /* JIT sampler state */
1367 if (ctx->dirty & SWR_NEW_SAMPLER) {
1368 swr_update_sampler_state(ctx,
1369 PIPE_SHADER_GEOMETRY,
1370 key.nr_samplers,
1371 ctx->swrDC.samplersGS);
1372 }
1373
1374 /* JIT sampler view state */
1375 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1376 swr_update_texture_state(ctx,
1377 PIPE_SHADER_GEOMETRY,
1378 key.nr_sampler_views,
1379 ctx->swrDC.texturesGS);
1380 }
1381
1382 SwrSetGsState(ctx->swrContext, &ctx->gs->gsState);
1383 } else {
1384 SWR_GS_STATE state = { 0 };
1385 SwrSetGsState(ctx->swrContext, &state);
1386 SwrSetGsFunc(ctx->swrContext, NULL);
1387 }
1388 }
1389
1390 /* VertexShader */
1391 if (ctx->dirty & (SWR_NEW_VS |
1392 SWR_NEW_RASTERIZER | // for clip planes
1393 SWR_NEW_SAMPLER |
1394 SWR_NEW_SAMPLER_VIEW |
1395 SWR_NEW_FRAMEBUFFER)) {
1396 swr_jit_vs_key key;
1397 swr_generate_vs_key(key, ctx, ctx->vs);
1398 auto search = ctx->vs->map.find(key);
1399 PFN_VERTEX_FUNC func;
1400 if (search != ctx->vs->map.end()) {
1401 func = search->second->shader;
1402 } else {
1403 func = swr_compile_vs(ctx, key);
1404 }
1405 SwrSetVertexFunc(ctx->swrContext, func);
1406
1407 /* JIT sampler state */
1408 if (ctx->dirty & SWR_NEW_SAMPLER) {
1409 swr_update_sampler_state(ctx,
1410 PIPE_SHADER_VERTEX,
1411 key.nr_samplers,
1412 ctx->swrDC.samplersVS);
1413 }
1414
1415 /* JIT sampler view state */
1416 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1417 swr_update_texture_state(ctx,
1418 PIPE_SHADER_VERTEX,
1419 key.nr_sampler_views,
1420 ctx->swrDC.texturesVS);
1421 }
1422 }
1423
1424 /* work around the fact that poly stipple also affects lines */
1425 /* and points, since we rasterize them as triangles, too */
1426 /* Has to be before fragment shader, since it sets SWR_NEW_FS */
1427 if (p_draw_info) {
1428 bool new_prim_is_poly =
1429 (u_reduced_prim(p_draw_info->mode) == PIPE_PRIM_TRIANGLES) &&
1430 (ctx->derived.rastState.fillMode == SWR_FILLMODE_SOLID);
1431 if (new_prim_is_poly != ctx->poly_stipple.prim_is_poly) {
1432 ctx->dirty |= SWR_NEW_FS;
1433 ctx->poly_stipple.prim_is_poly = new_prim_is_poly;
1434 }
1435 }
1436
1437 /* FragmentShader */
1438 if (ctx->dirty & (SWR_NEW_FS |
1439 SWR_NEW_VS |
1440 SWR_NEW_GS |
1441 SWR_NEW_RASTERIZER |
1442 SWR_NEW_SAMPLER |
1443 SWR_NEW_SAMPLER_VIEW |
1444 SWR_NEW_FRAMEBUFFER)) {
1445 swr_jit_fs_key key;
1446 swr_generate_fs_key(key, ctx, ctx->fs);
1447 auto search = ctx->fs->map.find(key);
1448 PFN_PIXEL_KERNEL func;
1449 if (search != ctx->fs->map.end()) {
1450 func = search->second->shader;
1451 } else {
1452 func = swr_compile_fs(ctx, key);
1453 }
1454 SWR_PS_STATE psState = {0};
1455 psState.pfnPixelShader = func;
1456 psState.killsPixel = ctx->fs->info.base.uses_kill;
1457 psState.inputCoverage = SWR_INPUT_COVERAGE_NORMAL;
1458 psState.writesODepth = ctx->fs->info.base.writes_z;
1459 psState.usesSourceDepth = ctx->fs->info.base.reads_z;
1460 psState.shadingRate = SWR_SHADING_RATE_PIXEL;
1461 psState.numRenderTargets = ctx->framebuffer.nr_cbufs;
1462 psState.posOffset = SWR_PS_POSITION_SAMPLE_NONE;
1463 uint32_t barycentricsMask = 0;
1464 #if 0
1465 // when we switch to mesa-master
1466 if (ctx->fs->info.base.uses_persp_center ||
1467 ctx->fs->info.base.uses_linear_center)
1468 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1469 if (ctx->fs->info.base.uses_persp_centroid ||
1470 ctx->fs->info.base.uses_linear_centroid)
1471 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1472 if (ctx->fs->info.base.uses_persp_sample ||
1473 ctx->fs->info.base.uses_linear_sample)
1474 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1475 #else
1476 for (unsigned i = 0; i < ctx->fs->info.base.num_inputs; i++) {
1477 switch (ctx->fs->info.base.input_interpolate_loc[i]) {
1478 case TGSI_INTERPOLATE_LOC_CENTER:
1479 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1480 break;
1481 case TGSI_INTERPOLATE_LOC_CENTROID:
1482 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1483 break;
1484 case TGSI_INTERPOLATE_LOC_SAMPLE:
1485 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1486 break;
1487 }
1488 }
1489 #endif
1490 psState.barycentricsMask = barycentricsMask;
1491 psState.usesUAV = false; // XXX
1492 psState.forceEarlyZ = false;
1493 SwrSetPixelShaderState(ctx->swrContext, &psState);
1494
1495 /* JIT sampler state */
1496 if (ctx->dirty & (SWR_NEW_SAMPLER |
1497 SWR_NEW_FS)) {
1498 swr_update_sampler_state(ctx,
1499 PIPE_SHADER_FRAGMENT,
1500 key.nr_samplers,
1501 ctx->swrDC.samplersFS);
1502 }
1503
1504 /* JIT sampler view state */
1505 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW |
1506 SWR_NEW_FRAMEBUFFER |
1507 SWR_NEW_FS)) {
1508 swr_update_texture_state(ctx,
1509 PIPE_SHADER_FRAGMENT,
1510 key.nr_sampler_views,
1511 ctx->swrDC.texturesFS);
1512 }
1513 }
1514
1515
1516 /* VertexShader Constants */
1517 if (ctx->dirty & SWR_NEW_VSCONSTANTS) {
1518 swr_update_constants(ctx, PIPE_SHADER_VERTEX);
1519 }
1520
1521 /* FragmentShader Constants */
1522 if (ctx->dirty & SWR_NEW_FSCONSTANTS) {
1523 swr_update_constants(ctx, PIPE_SHADER_FRAGMENT);
1524 }
1525
1526 /* GeometryShader Constants */
1527 if (ctx->dirty & SWR_NEW_GSCONSTANTS) {
1528 swr_update_constants(ctx, PIPE_SHADER_GEOMETRY);
1529 }
1530
1531 /* Depth/stencil state */
1532 if (ctx->dirty & (SWR_NEW_DEPTH_STENCIL_ALPHA | SWR_NEW_FRAMEBUFFER)) {
1533 struct pipe_depth_state *depth = &(ctx->depth_stencil->depth);
1534 struct pipe_stencil_state *stencil = ctx->depth_stencil->stencil;
1535 SWR_DEPTH_STENCIL_STATE depthStencilState = {{0}};
1536 SWR_DEPTH_BOUNDS_STATE depthBoundsState = {0};
1537
1538 /* XXX, incomplete. Need to flesh out stencil & alpha test state
1539 struct pipe_stencil_state *front_stencil =
1540 ctx->depth_stencil.stencil[0];
1541 struct pipe_stencil_state *back_stencil = ctx->depth_stencil.stencil[1];
1542 struct pipe_alpha_state alpha;
1543 */
1544 if (stencil[0].enabled) {
1545 depthStencilState.stencilWriteEnable = 1;
1546 depthStencilState.stencilTestEnable = 1;
1547 depthStencilState.stencilTestFunc =
1548 swr_convert_depth_func(stencil[0].func);
1549
1550 depthStencilState.stencilPassDepthPassOp =
1551 swr_convert_stencil_op(stencil[0].zpass_op);
1552 depthStencilState.stencilPassDepthFailOp =
1553 swr_convert_stencil_op(stencil[0].zfail_op);
1554 depthStencilState.stencilFailOp =
1555 swr_convert_stencil_op(stencil[0].fail_op);
1556 depthStencilState.stencilWriteMask = stencil[0].writemask;
1557 depthStencilState.stencilTestMask = stencil[0].valuemask;
1558 depthStencilState.stencilRefValue = ctx->stencil_ref.ref_value[0];
1559 }
1560 if (stencil[1].enabled) {
1561 depthStencilState.doubleSidedStencilTestEnable = 1;
1562
1563 depthStencilState.backfaceStencilTestFunc =
1564 swr_convert_depth_func(stencil[1].func);
1565
1566 depthStencilState.backfaceStencilPassDepthPassOp =
1567 swr_convert_stencil_op(stencil[1].zpass_op);
1568 depthStencilState.backfaceStencilPassDepthFailOp =
1569 swr_convert_stencil_op(stencil[1].zfail_op);
1570 depthStencilState.backfaceStencilFailOp =
1571 swr_convert_stencil_op(stencil[1].fail_op);
1572 depthStencilState.backfaceStencilWriteMask = stencil[1].writemask;
1573 depthStencilState.backfaceStencilTestMask = stencil[1].valuemask;
1574
1575 depthStencilState.backfaceStencilRefValue =
1576 ctx->stencil_ref.ref_value[1];
1577 }
1578
1579 depthStencilState.depthTestEnable = depth->enabled;
1580 depthStencilState.depthTestFunc = swr_convert_depth_func(depth->func);
1581 depthStencilState.depthWriteEnable = depth->writemask;
1582 SwrSetDepthStencilState(ctx->swrContext, &depthStencilState);
1583
1584 depthBoundsState.depthBoundsTestEnable = depth->bounds_test;
1585 depthBoundsState.depthBoundsTestMinValue = depth->bounds_min;
1586 depthBoundsState.depthBoundsTestMaxValue = depth->bounds_max;
1587 SwrSetDepthBoundsState(ctx->swrContext, &depthBoundsState);
1588 }
1589
1590 /* Blend State */
1591 if (ctx->dirty & (SWR_NEW_BLEND |
1592 SWR_NEW_RASTERIZER |
1593 SWR_NEW_FRAMEBUFFER |
1594 SWR_NEW_DEPTH_STENCIL_ALPHA)) {
1595 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
1596
1597 SWR_BLEND_STATE blendState;
1598 memcpy(&blendState, &ctx->blend->blendState, sizeof(blendState));
1599 blendState.constantColor[0] = ctx->blend_color.color[0];
1600 blendState.constantColor[1] = ctx->blend_color.color[1];
1601 blendState.constantColor[2] = ctx->blend_color.color[2];
1602 blendState.constantColor[3] = ctx->blend_color.color[3];
1603 blendState.alphaTestReference =
1604 *((uint32_t*)&ctx->depth_stencil->alpha.ref_value);
1605
1606 blendState.sampleMask = ctx->sample_mask;
1607 blendState.sampleCount = GetSampleCount(fb->samples);
1608
1609 /* If there are no color buffers bound, disable writes on RT0
1610 * and skip loop */
1611 if (fb->nr_cbufs == 0) {
1612 blendState.renderTarget[0].writeDisableRed = 1;
1613 blendState.renderTarget[0].writeDisableGreen = 1;
1614 blendState.renderTarget[0].writeDisableBlue = 1;
1615 blendState.renderTarget[0].writeDisableAlpha = 1;
1616 SwrSetBlendFunc(ctx->swrContext, 0, NULL);
1617 }
1618 else
1619 for (int target = 0;
1620 target < std::min(SWR_NUM_RENDERTARGETS,
1621 PIPE_MAX_COLOR_BUFS);
1622 target++) {
1623 if (!fb->cbufs[target])
1624 continue;
1625
1626 struct swr_resource *colorBuffer =
1627 swr_resource(fb->cbufs[target]->texture);
1628
1629 BLEND_COMPILE_STATE compileState;
1630 memset(&compileState, 0, sizeof(compileState));
1631 compileState.format = colorBuffer->swr.format;
1632 memcpy(&compileState.blendState,
1633 &ctx->blend->compileState[target],
1634 sizeof(compileState.blendState));
1635
1636 const SWR_FORMAT_INFO& info = GetFormatInfo(compileState.format);
1637 if (compileState.blendState.logicOpEnable &&
1638 ((info.type[0] == SWR_TYPE_FLOAT) || info.isSRGB)) {
1639 compileState.blendState.logicOpEnable = false;
1640 }
1641
1642 if (info.type[0] == SWR_TYPE_SINT || info.type[0] == SWR_TYPE_UINT)
1643 compileState.blendState.blendEnable = false;
1644
1645 if (compileState.blendState.blendEnable == false &&
1646 compileState.blendState.logicOpEnable == false &&
1647 ctx->depth_stencil->alpha.enabled == 0) {
1648 SwrSetBlendFunc(ctx->swrContext, target, NULL);
1649 continue;
1650 }
1651
1652 compileState.desc.alphaTestEnable =
1653 ctx->depth_stencil->alpha.enabled;
1654 compileState.desc.independentAlphaBlendEnable =
1655 (compileState.blendState.sourceBlendFactor !=
1656 compileState.blendState.sourceAlphaBlendFactor) ||
1657 (compileState.blendState.destBlendFactor !=
1658 compileState.blendState.destAlphaBlendFactor) ||
1659 (compileState.blendState.colorBlendFunc !=
1660 compileState.blendState.alphaBlendFunc);
1661 compileState.desc.alphaToCoverageEnable =
1662 ctx->blend->pipe.alpha_to_coverage;
1663 compileState.desc.sampleMaskEnable = (blendState.sampleMask != 0);
1664 compileState.desc.numSamples = fb->samples;
1665
1666 compileState.alphaTestFunction =
1667 swr_convert_depth_func(ctx->depth_stencil->alpha.func);
1668 compileState.alphaTestFormat = ALPHA_TEST_FLOAT32; // xxx
1669
1670 compileState.Canonicalize();
1671
1672 PFN_BLEND_JIT_FUNC func = NULL;
1673 auto search = ctx->blendJIT->find(compileState);
1674 if (search != ctx->blendJIT->end()) {
1675 func = search->second;
1676 } else {
1677 HANDLE hJitMgr = screen->hJitMgr;
1678 func = JitCompileBlend(hJitMgr, compileState);
1679 debug_printf("BLEND shader %p\n", func);
1680 assert(func && "Error: BlendShader = NULL");
1681
1682 ctx->blendJIT->insert(std::make_pair(compileState, func));
1683 }
1684 SwrSetBlendFunc(ctx->swrContext, target, func);
1685 }
1686
1687 SwrSetBlendState(ctx->swrContext, &blendState);
1688 }
1689
1690 if (ctx->dirty & SWR_NEW_STIPPLE) {
1691 swr_update_poly_stipple(ctx);
1692 }
1693
1694 if (ctx->dirty & (SWR_NEW_VS | SWR_NEW_SO | SWR_NEW_RASTERIZER)) {
1695 ctx->vs->soState.rasterizerDisable =
1696 ctx->rasterizer->rasterizer_discard;
1697 SwrSetSoState(ctx->swrContext, &ctx->vs->soState);
1698
1699 pipe_stream_output_info *stream_output = &ctx->vs->pipe.stream_output;
1700
1701 for (uint32_t i = 0; i < ctx->num_so_targets; i++) {
1702 SWR_STREAMOUT_BUFFER buffer = {0};
1703 if (!ctx->so_targets[i])
1704 continue;
1705 buffer.enable = true;
1706 buffer.pBuffer =
1707 (uint32_t *)(swr_resource_data(ctx->so_targets[i]->buffer) +
1708 ctx->so_targets[i]->buffer_offset);
1709 buffer.bufferSize = ctx->so_targets[i]->buffer_size >> 2;
1710 buffer.pitch = stream_output->stride[i];
1711 buffer.streamOffset = 0;
1712
1713 SwrSetSoBuffers(ctx->swrContext, &buffer, i);
1714 }
1715 }
1716
1717 if (ctx->dirty & (SWR_NEW_CLIP | SWR_NEW_RASTERIZER | SWR_NEW_VS)) {
1718 // shader exporting clip distances overrides all user clip planes
1719 if (ctx->rasterizer->clip_plane_enable &&
1720 !ctx->vs->info.base.num_written_clipdistance)
1721 {
1722 swr_draw_context *pDC = &ctx->swrDC;
1723 memcpy(pDC->userClipPlanes,
1724 ctx->clip.ucp,
1725 sizeof(pDC->userClipPlanes));
1726 }
1727 }
1728
1729 // set up backend state
1730 SWR_BACKEND_STATE backendState = {0};
1731 backendState.numAttributes =
1732 ((ctx->gs ? ctx->gs->info.base.num_outputs : ctx->vs->info.base.num_outputs) - 1) +
1733 (ctx->rasterizer->sprite_coord_enable ? 1 : 0);
1734 backendState.numAttributes = std::min((size_t)backendState.numAttributes,
1735 sizeof(backendState.numComponents));
1736 for (unsigned i = 0; i < backendState.numAttributes; i++)
1737 backendState.numComponents[i] = 4;
1738 backendState.constantInterpolationMask = ctx->fs->constantMask |
1739 (ctx->rasterizer->flatshade ? ctx->fs->flatConstantMask : 0);
1740 backendState.pointSpriteTexCoordMask = ctx->fs->pointSpriteMask;
1741
1742 SwrSetBackendState(ctx->swrContext, &backendState);
1743
1744 /* Ensure that any in-progress attachment change StoreTiles finish */
1745 if (swr_is_fence_pending(screen->flush_fence))
1746 swr_fence_finish(pipe->screen, NULL, screen->flush_fence, 0);
1747
1748 /* Finally, update the in-use status of all resources involved in draw */
1749 swr_update_resource_status(pipe, p_draw_info);
1750
1751 ctx->dirty = post_update_dirty_flags;
1752 }
1753
1754
1755 static struct pipe_stream_output_target *
1756 swr_create_so_target(struct pipe_context *pipe,
1757 struct pipe_resource *buffer,
1758 unsigned buffer_offset,
1759 unsigned buffer_size)
1760 {
1761 struct pipe_stream_output_target *target;
1762
1763 target = CALLOC_STRUCT(pipe_stream_output_target);
1764 if (!target)
1765 return NULL;
1766
1767 target->context = pipe;
1768 target->reference.count = 1;
1769 pipe_resource_reference(&target->buffer, buffer);
1770 target->buffer_offset = buffer_offset;
1771 target->buffer_size = buffer_size;
1772 return target;
1773 }
1774
1775 static void
1776 swr_destroy_so_target(struct pipe_context *pipe,
1777 struct pipe_stream_output_target *target)
1778 {
1779 pipe_resource_reference(&target->buffer, NULL);
1780 FREE(target);
1781 }
1782
1783 static void
1784 swr_set_so_targets(struct pipe_context *pipe,
1785 unsigned num_targets,
1786 struct pipe_stream_output_target **targets,
1787 const unsigned *offsets)
1788 {
1789 struct swr_context *swr = swr_context(pipe);
1790 uint32_t i;
1791
1792 assert(num_targets <= MAX_SO_STREAMS);
1793
1794 for (i = 0; i < num_targets; i++) {
1795 pipe_so_target_reference(
1796 (struct pipe_stream_output_target **)&swr->so_targets[i],
1797 targets[i]);
1798 }
1799
1800 for (/* fall-through */; i < swr->num_so_targets; i++) {
1801 pipe_so_target_reference(
1802 (struct pipe_stream_output_target **)&swr->so_targets[i], NULL);
1803 }
1804
1805 swr->num_so_targets = num_targets;
1806
1807 swr->dirty |= SWR_NEW_SO;
1808 }
1809
1810
1811 void
1812 swr_state_init(struct pipe_context *pipe)
1813 {
1814 pipe->create_blend_state = swr_create_blend_state;
1815 pipe->bind_blend_state = swr_bind_blend_state;
1816 pipe->delete_blend_state = swr_delete_blend_state;
1817
1818 pipe->create_depth_stencil_alpha_state = swr_create_depth_stencil_state;
1819 pipe->bind_depth_stencil_alpha_state = swr_bind_depth_stencil_state;
1820 pipe->delete_depth_stencil_alpha_state = swr_delete_depth_stencil_state;
1821
1822 pipe->create_rasterizer_state = swr_create_rasterizer_state;
1823 pipe->bind_rasterizer_state = swr_bind_rasterizer_state;
1824 pipe->delete_rasterizer_state = swr_delete_rasterizer_state;
1825
1826 pipe->create_sampler_state = swr_create_sampler_state;
1827 pipe->bind_sampler_states = swr_bind_sampler_states;
1828 pipe->delete_sampler_state = swr_delete_sampler_state;
1829
1830 pipe->create_sampler_view = swr_create_sampler_view;
1831 pipe->set_sampler_views = swr_set_sampler_views;
1832 pipe->sampler_view_destroy = swr_sampler_view_destroy;
1833
1834 pipe->create_vs_state = swr_create_vs_state;
1835 pipe->bind_vs_state = swr_bind_vs_state;
1836 pipe->delete_vs_state = swr_delete_vs_state;
1837
1838 pipe->create_fs_state = swr_create_fs_state;
1839 pipe->bind_fs_state = swr_bind_fs_state;
1840 pipe->delete_fs_state = swr_delete_fs_state;
1841
1842 pipe->create_gs_state = swr_create_gs_state;
1843 pipe->bind_gs_state = swr_bind_gs_state;
1844 pipe->delete_gs_state = swr_delete_gs_state;
1845
1846 pipe->set_constant_buffer = swr_set_constant_buffer;
1847
1848 pipe->create_vertex_elements_state = swr_create_vertex_elements_state;
1849 pipe->bind_vertex_elements_state = swr_bind_vertex_elements_state;
1850 pipe->delete_vertex_elements_state = swr_delete_vertex_elements_state;
1851
1852 pipe->set_vertex_buffers = swr_set_vertex_buffers;
1853
1854 pipe->set_polygon_stipple = swr_set_polygon_stipple;
1855 pipe->set_clip_state = swr_set_clip_state;
1856 pipe->set_scissor_states = swr_set_scissor_states;
1857 pipe->set_viewport_states = swr_set_viewport_states;
1858
1859 pipe->set_framebuffer_state = swr_set_framebuffer_state;
1860
1861 pipe->set_blend_color = swr_set_blend_color;
1862 pipe->set_stencil_ref = swr_set_stencil_ref;
1863
1864 pipe->set_sample_mask = swr_set_sample_mask;
1865 pipe->get_sample_position = swr_get_sample_position;
1866
1867 pipe->create_stream_output_target = swr_create_so_target;
1868 pipe->stream_output_target_destroy = swr_destroy_so_target;
1869 pipe->set_stream_output_targets = swr_set_so_targets;
1870 }