src/gallium/drivers/swr/swr_state.cpp

   1 /****************************************************************************
   2  * Copyright (C) 2015 Intel Corporation.   All Rights Reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  ***************************************************************************/
  23
  24 #include "common/os.h"
  25 #include "jit_api.h"
  26 #include "JitManager.h"
  27 #include "state_llvm.h"
  28
  29 #include "gallivm/lp_bld_tgsi.h"
  30 #include "util/u_format.h"
  31
  32 #include "util/u_memory.h"
  33 #include "util/u_inlines.h"
  34 #include "util/u_helpers.h"
  35 #include "util/u_framebuffer.h"
  36
  37 #include "swr_state.h"
  38 #include "swr_context.h"
  39 #include "swr_context_llvm.h"
  40 #include "swr_screen.h"
  41 #include "swr_resource.h"
  42 #include "swr_tex_sample.h"
  43 #include "swr_scratch.h"
  44 #include "swr_shader.h"
  45 #include "swr_fence.h"
  46
  47 /* These should be pulled out into separate files as necessary
  48  * Just initializing everything here to get going. */
  49
  50 static void *
  51 swr_create_blend_state(struct pipe_context *pipe,
  52                        const struct pipe_blend_state *blend)
  53 {
  54    struct swr_blend_state *state = CALLOC_STRUCT(swr_blend_state);
  55
  56    memcpy(&state->pipe, blend, sizeof(*blend));
  57
  58    struct pipe_blend_state *pipe_blend = &state->pipe;
  59
  60    for (int target = 0;
  61         target < std::min(SWR_NUM_RENDERTARGETS, PIPE_MAX_COLOR_BUFS);
  62         target++) {
  63
  64       struct pipe_rt_blend_state *rt_blend = &pipe_blend->rt[target];
  65       SWR_RENDER_TARGET_BLEND_STATE &blendState =
  66          state->blendState.renderTarget[target];
  67       RENDER_TARGET_BLEND_COMPILE_STATE &compileState =
  68          state->compileState[target];
  69
  70       if (target != 0 && !pipe_blend->independent_blend_enable) {
  71          memcpy(&compileState,
  72                 &state->compileState[0],
  73                 sizeof(RENDER_TARGET_BLEND_COMPILE_STATE));
  74          continue;
  75       }
  76
  77       compileState.blendEnable = rt_blend->blend_enable;
  78       if (compileState.blendEnable) {
  79          compileState.sourceAlphaBlendFactor =
  80             swr_convert_blend_factor(rt_blend->alpha_src_factor);
  81          compileState.destAlphaBlendFactor =
  82             swr_convert_blend_factor(rt_blend->alpha_dst_factor);
  83          compileState.sourceBlendFactor =
  84             swr_convert_blend_factor(rt_blend->rgb_src_factor);
  85          compileState.destBlendFactor =
  86             swr_convert_blend_factor(rt_blend->rgb_dst_factor);
  87
  88          compileState.colorBlendFunc =
  89             swr_convert_blend_func(rt_blend->rgb_func);
  90          compileState.alphaBlendFunc =
  91             swr_convert_blend_func(rt_blend->alpha_func);
  92       }
  93       compileState.logicOpEnable = state->pipe.logicop_enable;
  94       if (compileState.logicOpEnable) {
  95          compileState.logicOpFunc =
  96             swr_convert_logic_op(state->pipe.logicop_func);
  97       }
  98
  99       blendState.writeDisableRed =
 100          (rt_blend->colormask & PIPE_MASK_R) ? 0 : 1;
 101       blendState.writeDisableGreen =
 102          (rt_blend->colormask & PIPE_MASK_G) ? 0 : 1;
 103       blendState.writeDisableBlue =
 104          (rt_blend->colormask & PIPE_MASK_B) ? 0 : 1;
 105       blendState.writeDisableAlpha =
 106          (rt_blend->colormask & PIPE_MASK_A) ? 0 : 1;
 107
 108       if (rt_blend->colormask == 0)
 109          compileState.blendEnable = false;
 110    }
 111
 112    return state;
 113 }
 114
 115 static void
 116 swr_bind_blend_state(struct pipe_context *pipe, void *blend)
 117 {
 118    struct swr_context *ctx = swr_context(pipe);
 119
 120    if (ctx->blend == blend)
 121       return;
 122
 123    ctx->blend = (swr_blend_state *)blend;
 124
 125    ctx->dirty |= SWR_NEW_BLEND;
 126 }
 127
 128 static void
 129 swr_delete_blend_state(struct pipe_context *pipe, void *blend)
 130 {
 131    FREE(blend);
 132 }
 133
 134 static void
 135 swr_set_blend_color(struct pipe_context *pipe,
 136                     const struct pipe_blend_color *color)
 137 {
 138    struct swr_context *ctx = swr_context(pipe);
 139
 140    ctx->blend_color = *color;
 141
 142    ctx->dirty |= SWR_NEW_BLEND;
 143 }
 144
 145 static void
 146 swr_set_stencil_ref(struct pipe_context *pipe,
 147                     const struct pipe_stencil_ref *ref)
 148 {
 149    struct swr_context *ctx = swr_context(pipe);
 150
 151    ctx->stencil_ref = *ref;
 152
 153    ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
 154 }
 155
 156 static void *
 157 swr_create_depth_stencil_state(
 158    struct pipe_context *pipe,
 159    const struct pipe_depth_stencil_alpha_state *depth_stencil)
 160 {
 161    struct pipe_depth_stencil_alpha_state *state;
 162
 163    state = (pipe_depth_stencil_alpha_state *)mem_dup(depth_stencil,
 164                                                      sizeof *depth_stencil);
 165
 166    return state;
 167 }
 168
 169 static void
 170 swr_bind_depth_stencil_state(struct pipe_context *pipe, void *depth_stencil)
 171 {
 172    struct swr_context *ctx = swr_context(pipe);
 173
 174    if (ctx->depth_stencil == (pipe_depth_stencil_alpha_state *)depth_stencil)
 175       return;
 176
 177    ctx->depth_stencil = (pipe_depth_stencil_alpha_state *)depth_stencil;
 178
 179    ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
 180 }
 181
 182 static void
 183 swr_delete_depth_stencil_state(struct pipe_context *pipe, void *depth)
 184 {
 185    FREE(depth);
 186 }
 187
 188
 189 static void *
 190 swr_create_rasterizer_state(struct pipe_context *pipe,
 191                             const struct pipe_rasterizer_state *rast)
 192 {
 193    struct pipe_rasterizer_state *state;
 194    state = (pipe_rasterizer_state *)mem_dup(rast, sizeof *rast);
 195
 196    return state;
 197 }
 198
 199 static void
 200 swr_bind_rasterizer_state(struct pipe_context *pipe, void *handle)
 201 {
 202    struct swr_context *ctx = swr_context(pipe);
 203    const struct pipe_rasterizer_state *rasterizer =
 204       (const struct pipe_rasterizer_state *)handle;
 205
 206    if (ctx->rasterizer == (pipe_rasterizer_state *)rasterizer)
 207       return;
 208
 209    ctx->rasterizer = (pipe_rasterizer_state *)rasterizer;
 210
 211    ctx->dirty |= SWR_NEW_RASTERIZER;
 212 }
 213
 214 static void
 215 swr_delete_rasterizer_state(struct pipe_context *pipe, void *rasterizer)
 216 {
 217    FREE(rasterizer);
 218 }
 219
 220
 221 static void *
 222 swr_create_sampler_state(struct pipe_context *pipe,
 223                          const struct pipe_sampler_state *sampler)
 224 {
 225    struct pipe_sampler_state *state =
 226       (pipe_sampler_state *)mem_dup(sampler, sizeof *sampler);
 227
 228    return state;
 229 }
 230
 231 static void
 232 swr_bind_sampler_states(struct pipe_context *pipe,
 233                         unsigned shader,
 234                         unsigned start,
 235                         unsigned num,
 236                         void **samplers)
 237 {
 238    struct swr_context *ctx = swr_context(pipe);
 239    unsigned i;
 240
 241    assert(shader < PIPE_SHADER_TYPES);
 242    assert(start + num <= Elements(ctx->samplers[shader]));
 243
 244    /* set the new samplers */
 245    ctx->num_samplers[shader] = num;
 246    for (i = 0; i < num; i++) {
 247       ctx->samplers[shader][start + i] = (pipe_sampler_state *)samplers[i];
 248    }
 249
 250    ctx->dirty |= SWR_NEW_SAMPLER;
 251 }
 252
 253 static void
 254 swr_delete_sampler_state(struct pipe_context *pipe, void *sampler)
 255 {
 256    FREE(sampler);
 257 }
 258
 259
 260 static struct pipe_sampler_view *
 261 swr_create_sampler_view(struct pipe_context *pipe,
 262                         struct pipe_resource *texture,
 263                         const struct pipe_sampler_view *templ)
 264 {
 265    struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view);
 266
 267    if (view) {
 268       *view = *templ;
 269       view->reference.count = 1;
 270       view->texture = NULL;
 271       pipe_resource_reference(&view->texture, texture);
 272       view->context = pipe;
 273    }
 274
 275    return view;
 276 }
 277
 278 static void
 279 swr_set_sampler_views(struct pipe_context *pipe,
 280                       unsigned shader,
 281                       unsigned start,
 282                       unsigned num,
 283                       struct pipe_sampler_view **views)
 284 {
 285    struct swr_context *ctx = swr_context(pipe);
 286    uint i;
 287
 288    assert(num <= PIPE_MAX_SHADER_SAMPLER_VIEWS);
 289
 290    assert(shader < PIPE_SHADER_TYPES);
 291    assert(start + num <= Elements(ctx->sampler_views[shader]));
 292
 293    /* set the new sampler views */
 294    ctx->num_sampler_views[shader] = num;
 295    for (i = 0; i < num; i++) {
 296       /* Note: we're using pipe_sampler_view_release() here to work around
 297        * a possible crash when the old view belongs to another context that
 298        * was already destroyed.
 299        */
 300       pipe_sampler_view_release(pipe, &ctx->sampler_views[shader][start + i]);
 301       pipe_sampler_view_reference(&ctx->sampler_views[shader][start + i],
 302                                   views[i]);
 303    }
 304
 305    ctx->dirty |= SWR_NEW_SAMPLER_VIEW;
 306 }
 307
 308 static void
 309 swr_sampler_view_destroy(struct pipe_context *pipe,
 310                          struct pipe_sampler_view *view)
 311 {
 312    pipe_resource_reference(&view->texture, NULL);
 313    FREE(view);
 314 }
 315
 316 static void *
 317 swr_create_vs_state(struct pipe_context *pipe,
 318                     const struct pipe_shader_state *vs)
 319 {
 320    struct swr_vertex_shader *swr_vs =
 321       (swr_vertex_shader *)CALLOC_STRUCT(swr_vertex_shader);
 322    if (!swr_vs)
 323       return NULL;
 324
 325    swr_vs->pipe.tokens = tgsi_dup_tokens(vs->tokens);
 326    swr_vs->pipe.stream_output = vs->stream_output;
 327
 328    lp_build_tgsi_info(vs->tokens, &swr_vs->info);
 329
 330    swr_vs->func = swr_compile_vs(pipe, swr_vs);
 331
 332    swr_vs->soState = {0};
 333
 334    if (swr_vs->pipe.stream_output.num_outputs) {
 335       pipe_stream_output_info *stream_output = &swr_vs->pipe.stream_output;
 336
 337       swr_vs->soState.soEnable = true;
 338       // soState.rasterizerDisable set on state dirty
 339       // soState.streamToRasterizer not used
 340
 341       for (uint32_t i = 0; i < stream_output->num_outputs; i++) {
 342          swr_vs->soState.streamMasks[stream_output->output[i].stream] |=
 343             1 << (stream_output->output[i].register_index - 1);
 344       }
 345       for (uint32_t i = 0; i < MAX_SO_STREAMS; i++) {
 346         swr_vs->soState.streamNumEntries[i] =
 347              _mm_popcnt_u32(swr_vs->soState.streamMasks[i]);
 348        }
 349    }
 350
 351    return swr_vs;
 352 }
 353
 354 static void
 355 swr_bind_vs_state(struct pipe_context *pipe, void *vs)
 356 {
 357    struct swr_context *ctx = swr_context(pipe);
 358
 359    if (ctx->vs == vs)
 360       return;
 361
 362    ctx->vs = (swr_vertex_shader *)vs;
 363    ctx->dirty |= SWR_NEW_VS;
 364 }
 365
 366 static void
 367 swr_delete_vs_state(struct pipe_context *pipe, void *vs)
 368 {
 369    struct swr_vertex_shader *swr_vs = (swr_vertex_shader *)vs;
 370    FREE((void *)swr_vs->pipe.tokens);
 371    FREE(vs);
 372 }
 373
 374 static void *
 375 swr_create_fs_state(struct pipe_context *pipe,
 376                     const struct pipe_shader_state *fs)
 377 {
 378    struct swr_fragment_shader *swr_fs = new swr_fragment_shader;
 379    if (!swr_fs)
 380       return NULL;
 381
 382    swr_fs->pipe.tokens = tgsi_dup_tokens(fs->tokens);
 383
 384    lp_build_tgsi_info(fs->tokens, &swr_fs->info);
 385
 386    return swr_fs;
 387 }
 388
 389
 390 static void
 391 swr_bind_fs_state(struct pipe_context *pipe, void *fs)
 392 {
 393    struct swr_context *ctx = swr_context(pipe);
 394
 395    if (ctx->fs == fs)
 396       return;
 397
 398    ctx->fs = (swr_fragment_shader *)fs;
 399    ctx->dirty |= SWR_NEW_FS;
 400 }
 401
 402 static void
 403 swr_delete_fs_state(struct pipe_context *pipe, void *fs)
 404 {
 405    struct swr_fragment_shader *swr_fs = (swr_fragment_shader *)fs;
 406    FREE((void *)swr_fs->pipe.tokens);
 407    delete swr_fs;
 408 }
 409
 410
 411 static void
 412 swr_set_constant_buffer(struct pipe_context *pipe,
 413                         uint shader,
 414                         uint index,
 415                         struct pipe_constant_buffer *cb)
 416 {
 417    struct swr_context *ctx = swr_context(pipe);
 418    struct pipe_resource *constants = cb ? cb->buffer : NULL;
 419
 420    assert(shader < PIPE_SHADER_TYPES);
 421    assert(index < Elements(ctx->constants[shader]));
 422
 423    /* note: reference counting */
 424    util_copy_constant_buffer(&ctx->constants[shader][index], cb);
 425
 426    if (shader == PIPE_SHADER_VERTEX || shader == PIPE_SHADER_GEOMETRY) {
 427       ctx->dirty |= SWR_NEW_VSCONSTANTS;
 428    } else if (shader == PIPE_SHADER_FRAGMENT) {
 429       ctx->dirty |= SWR_NEW_FSCONSTANTS;
 430    }
 431
 432    if (cb && cb->user_buffer) {
 433       pipe_resource_reference(&constants, NULL);
 434    }
 435 }
 436
 437
 438 static void *
 439 swr_create_vertex_elements_state(struct pipe_context *pipe,
 440                                  unsigned num_elements,
 441                                  const struct pipe_vertex_element *attribs)
 442 {
 443    struct swr_vertex_element_state *velems;
 444    assert(num_elements <= PIPE_MAX_ATTRIBS);
 445    velems = CALLOC_STRUCT(swr_vertex_element_state);
 446    if (velems) {
 447       velems->fsState.numAttribs = num_elements;
 448       for (unsigned i = 0; i < num_elements; i++) {
 449          // XXX: we should do this keyed on the VS usage info
 450
 451          const struct util_format_description *desc =
 452             util_format_description(attribs[i].src_format);
 453
 454          velems->fsState.layout[i].AlignedByteOffset = attribs[i].src_offset;
 455          velems->fsState.layout[i].Format =
 456             mesa_to_swr_format(attribs[i].src_format);
 457          velems->fsState.layout[i].StreamIndex =
 458             attribs[i].vertex_buffer_index;
 459          velems->fsState.layout[i].InstanceEnable =
 460             attribs[i].instance_divisor != 0;
 461          velems->fsState.layout[i].ComponentControl0 =
 462             desc->channel[0].type != UTIL_FORMAT_TYPE_VOID
 463             ? ComponentControl::StoreSrc
 464             : ComponentControl::Store0;
 465          velems->fsState.layout[i].ComponentControl1 =
 466             desc->channel[1].type != UTIL_FORMAT_TYPE_VOID
 467             ? ComponentControl::StoreSrc
 468             : ComponentControl::Store0;
 469          velems->fsState.layout[i].ComponentControl2 =
 470             desc->channel[2].type != UTIL_FORMAT_TYPE_VOID
 471             ? ComponentControl::StoreSrc
 472             : ComponentControl::Store0;
 473          velems->fsState.layout[i].ComponentControl3 =
 474             desc->channel[3].type != UTIL_FORMAT_TYPE_VOID
 475             ? ComponentControl::StoreSrc
 476             : ComponentControl::Store1Fp;
 477          velems->fsState.layout[i].ComponentPacking = ComponentEnable::XYZW;
 478          velems->fsState.layout[i].InstanceDataStepRate =
 479             attribs[i].instance_divisor;
 480
 481          /* Calculate the pitch of each stream */
 482          const SWR_FORMAT_INFO &swr_desc = GetFormatInfo(
 483             mesa_to_swr_format(attribs[i].src_format));
 484          velems->stream_pitch[attribs[i].vertex_buffer_index] += swr_desc.Bpp;
 485       }
 486    }
 487
 488    return velems;
 489 }
 490
 491 static void
 492 swr_bind_vertex_elements_state(struct pipe_context *pipe, void *velems)
 493 {
 494    struct swr_context *ctx = swr_context(pipe);
 495    struct swr_vertex_element_state *swr_velems =
 496       (struct swr_vertex_element_state *)velems;
 497
 498    ctx->velems = swr_velems;
 499    ctx->dirty |= SWR_NEW_VERTEX;
 500 }
 501
 502 static void
 503 swr_delete_vertex_elements_state(struct pipe_context *pipe, void *velems)
 504 {
 505    /* XXX Need to destroy fetch shader? */
 506    FREE(velems);
 507 }
 508
 509
 510 static void
 511 swr_set_vertex_buffers(struct pipe_context *pipe,
 512                        unsigned start_slot,
 513                        unsigned num_elements,
 514                        const struct pipe_vertex_buffer *buffers)
 515 {
 516    struct swr_context *ctx = swr_context(pipe);
 517
 518    assert(num_elements <= PIPE_MAX_ATTRIBS);
 519
 520    util_set_vertex_buffers_count(ctx->vertex_buffer,
 521                                  &ctx->num_vertex_buffers,
 522                                  buffers,
 523                                  start_slot,
 524                                  num_elements);
 525
 526    ctx->dirty |= SWR_NEW_VERTEX;
 527 }
 528
 529
 530 static void
 531 swr_set_index_buffer(struct pipe_context *pipe,
 532                      const struct pipe_index_buffer *ib)
 533 {
 534    struct swr_context *ctx = swr_context(pipe);
 535
 536    if (ib)
 537       memcpy(&ctx->index_buffer, ib, sizeof(ctx->index_buffer));
 538    else
 539       memset(&ctx->index_buffer, 0, sizeof(ctx->index_buffer));
 540
 541    ctx->dirty |= SWR_NEW_VERTEX;
 542 }
 543
 544 static void
 545 swr_set_polygon_stipple(struct pipe_context *pipe,
 546                         const struct pipe_poly_stipple *stipple)
 547 {
 548    struct swr_context *ctx = swr_context(pipe);
 549
 550    ctx->poly_stipple = *stipple; /* struct copy */
 551    ctx->dirty |= SWR_NEW_STIPPLE;
 552 }
 553
 554 static void
 555 swr_set_clip_state(struct pipe_context *pipe,
 556                    const struct pipe_clip_state *clip)
 557 {
 558    struct swr_context *ctx = swr_context(pipe);
 559
 560    ctx->clip = *clip;
 561    /* XXX Unimplemented, but prevents crash */
 562
 563    ctx->dirty |= SWR_NEW_CLIP;
 564 }
 565
 566
 567 static void
 568 swr_set_scissor_states(struct pipe_context *pipe,
 569                        unsigned start_slot,
 570                        unsigned num_viewports,
 571                        const struct pipe_scissor_state *scissor)
 572 {
 573    struct swr_context *ctx = swr_context(pipe);
 574
 575    ctx->scissor = *scissor;
 576    ctx->dirty |= SWR_NEW_SCISSOR;
 577 }
 578
 579 static void
 580 swr_set_viewport_states(struct pipe_context *pipe,
 581                         unsigned start_slot,
 582                         unsigned num_viewports,
 583                         const struct pipe_viewport_state *vpt)
 584 {
 585    struct swr_context *ctx = swr_context(pipe);
 586
 587    ctx->viewport = *vpt;
 588    ctx->dirty |= SWR_NEW_VIEWPORT;
 589 }
 590
 591
 592 static void
 593 swr_set_framebuffer_state(struct pipe_context *pipe,
 594                           const struct pipe_framebuffer_state *fb)
 595 {
 596    struct swr_context *ctx = swr_context(pipe);
 597
 598    boolean changed = !util_framebuffer_state_equal(&ctx->framebuffer, fb);
 599
 600    assert(fb->width <= KNOB_GUARDBAND_WIDTH);
 601    assert(fb->height <= KNOB_GUARDBAND_HEIGHT);
 602
 603    if (changed) {
 604       unsigned i;
 605       for (i = 0; i < fb->nr_cbufs; ++i)
 606          pipe_surface_reference(&ctx->framebuffer.cbufs[i], fb->cbufs[i]);
 607       for (; i < ctx->framebuffer.nr_cbufs; ++i)
 608          pipe_surface_reference(&ctx->framebuffer.cbufs[i], NULL);
 609
 610       ctx->framebuffer.nr_cbufs = fb->nr_cbufs;
 611
 612       ctx->framebuffer.width = fb->width;
 613       ctx->framebuffer.height = fb->height;
 614
 615       pipe_surface_reference(&ctx->framebuffer.zsbuf, fb->zsbuf);
 616
 617       ctx->dirty |= SWR_NEW_FRAMEBUFFER;
 618    }
 619 }
 620
 621
 622 static void
 623 swr_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
 624 {
 625    struct swr_context *ctx = swr_context(pipe);
 626
 627    if (sample_mask != ctx->sample_mask) {
 628       ctx->sample_mask = sample_mask;
 629       ctx->dirty |= SWR_NEW_RASTERIZER;
 630    }
 631 }
 632
 633 /*
 634  * Update resource in-use status
 635  * All resources bound to color or depth targets marked as WRITE resources.
 636  * VBO Vertex/index buffers and texture views marked as READ resources.
 637  */
 638 void
 639 swr_update_resource_status(struct pipe_context *pipe,
 640                            const struct pipe_draw_info *p_draw_info)
 641 {
 642    struct swr_context *ctx = swr_context(pipe);
 643    struct pipe_framebuffer_state *fb = &ctx->framebuffer;
 644
 645    /* colorbuffer targets */
 646    if (fb->nr_cbufs)
 647       for (uint32_t i = 0; i < fb->nr_cbufs; ++i)
 648          if (fb->cbufs[i])
 649             swr_resource_write(pipe, swr_resource(fb->cbufs[i]->texture));
 650
 651    /* depth/stencil target */
 652    if (fb->zsbuf)
 653       swr_resource_write(pipe, swr_resource(fb->zsbuf->texture));
 654
 655    /* VBO vertex buffers */
 656    for (uint32_t i = 0; i < ctx->num_vertex_buffers; i++) {
 657       struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
 658       if (!vb->user_buffer)
 659          swr_resource_read(pipe, swr_resource(vb->buffer));
 660    }
 661
 662    /* VBO index buffer */
 663    if (p_draw_info && p_draw_info->indexed) {
 664       struct pipe_index_buffer *ib = &ctx->index_buffer;
 665       if (!ib->user_buffer)
 666          swr_resource_read(pipe, swr_resource(ib->buffer));
 667    }
 668
 669    /* texture sampler views */
 670    for (uint32_t i = 0; i < PIPE_MAX_SHADER_SAMPLER_VIEWS; i++) {
 671       struct pipe_sampler_view *view =
 672          ctx->sampler_views[PIPE_SHADER_FRAGMENT][i];
 673       if (view)
 674          swr_resource_read(pipe, swr_resource(view->texture));
 675    }
 676 }
 677
 678 void
 679 swr_update_derived(struct pipe_context *pipe,
 680                    const struct pipe_draw_info *p_draw_info)
 681 {
 682    struct swr_context *ctx = swr_context(pipe);
 683    struct swr_screen *screen = swr_screen(ctx->pipe.screen);
 684
 685    /* Any state that requires dirty flags to be re-triggered sets this mask */
 686    /* For example, user_buffer vertex and index buffers. */
 687    unsigned post_update_dirty_flags = 0;
 688
 689    /* Render Targets */
 690    if (ctx->dirty & SWR_NEW_FRAMEBUFFER) {
 691       struct pipe_framebuffer_state *fb = &ctx->framebuffer;
 692       SWR_SURFACE_STATE *new_attachment[SWR_NUM_ATTACHMENTS] = {0};
 693       UINT i;
 694
 695       /* colorbuffer targets */
 696       if (fb->nr_cbufs)
 697          for (i = 0; i < fb->nr_cbufs; ++i)
 698             if (fb->cbufs[i]) {
 699                struct swr_resource *colorBuffer =
 700                   swr_resource(fb->cbufs[i]->texture);
 701                new_attachment[SWR_ATTACHMENT_COLOR0 + i] = &colorBuffer->swr;
 702             }
 703
 704       /* depth/stencil target */
 705       if (fb->zsbuf) {
 706          struct swr_resource *depthStencilBuffer =
 707             swr_resource(fb->zsbuf->texture);
 708          if (depthStencilBuffer->has_depth) {
 709             new_attachment[SWR_ATTACHMENT_DEPTH] = &depthStencilBuffer->swr;
 710
 711             if (depthStencilBuffer->has_stencil)
 712                new_attachment[SWR_ATTACHMENT_STENCIL] =
 713                   &depthStencilBuffer->secondary;
 714
 715          } else if (depthStencilBuffer->has_stencil)
 716             new_attachment[SWR_ATTACHMENT_STENCIL] = &depthStencilBuffer->swr;
 717       }
 718
 719       /* Make the attachment updates */
 720       swr_draw_context *pDC = &ctx->swrDC;
 721       SWR_SURFACE_STATE *renderTargets = pDC->renderTargets;
 722       unsigned need_fence = FALSE;
 723       for (i = 0; i < SWR_NUM_ATTACHMENTS; i++) {
 724          void *new_base = nullptr;
 725          if (new_attachment[i])
 726             new_base = new_attachment[i]->pBaseAddress;
 727
 728          /* StoreTile for changed target */
 729          if (renderTargets[i].pBaseAddress != new_base) {
 730             if (renderTargets[i].pBaseAddress) {
 731                /* If changing attachment to a new target, mark tiles as
 732                 * INVALID so they are reloaded from surface.
 733                 * If detaching attachment, mark tiles as RESOLVED so core
 734                 * won't try to load from non-existent target. */
 735                enum SWR_TILE_STATE post_state = (new_attachment[i]
 736                   ? SWR_TILE_INVALID : SWR_TILE_RESOLVED);
 737                swr_store_render_target(pipe, i, post_state);
 738
 739                need_fence |= TRUE;
 740             }
 741
 742             /* Make new attachment */
 743             if (new_attachment[i])
 744                renderTargets[i] = *new_attachment[i];
 745             else
 746                if (renderTargets[i].pBaseAddress)
 747                   renderTargets[i] = {0};
 748          }
 749       }
 750
 751       /* This fence ensures any attachment changes are resolved before the
 752        * next draw */
 753       if (need_fence)
 754          swr_fence_submit(ctx, screen->flush_fence);
 755    }
 756
 757    /* Raster state */
 758    if (ctx->dirty & (SWR_NEW_RASTERIZER | SWR_NEW_FRAMEBUFFER)) {
 759       pipe_rasterizer_state *rasterizer = ctx->rasterizer;
 760       pipe_framebuffer_state *fb = &ctx->framebuffer;
 761
 762       SWR_RASTSTATE *rastState = &ctx->derived.rastState;
 763       rastState->cullMode = swr_convert_cull_mode(rasterizer->cull_face);
 764       rastState->frontWinding = rasterizer->front_ccw
 765          ? SWR_FRONTWINDING_CCW
 766          : SWR_FRONTWINDING_CW;
 767       rastState->scissorEnable = rasterizer->scissor;
 768       rastState->pointSize = rasterizer->point_size > 0.0f
 769          ? rasterizer->point_size
 770          : 1.0f;
 771       rastState->lineWidth = rasterizer->line_width > 0.0f
 772          ? rasterizer->line_width
 773          : 1.0f;
 774
 775       rastState->pointParam = rasterizer->point_size_per_vertex;
 776
 777       rastState->pointSpriteEnable = rasterizer->sprite_coord_enable;
 778       rastState->pointSpriteTopOrigin =
 779          rasterizer->sprite_coord_mode == PIPE_SPRITE_COORD_UPPER_LEFT;
 780
 781       /* XXX TODO: Add multisample */
 782       rastState->msaaRastEnable = false;
 783       rastState->rastMode = SWR_MSAA_RASTMODE_OFF_PIXEL;
 784       rastState->sampleCount = SWR_MULTISAMPLE_1X;
 785       rastState->bForcedSampleCount = false;
 786
 787       bool do_offset = false;
 788       switch (rasterizer->fill_front) {
 789       case PIPE_POLYGON_MODE_FILL:
 790          do_offset = rasterizer->offset_tri;
 791          break;
 792       case PIPE_POLYGON_MODE_LINE:
 793          do_offset = rasterizer->offset_line;
 794          break;
 795       case PIPE_POLYGON_MODE_POINT:
 796          do_offset = rasterizer->offset_point;
 797          break;
 798       }
 799
 800       if (do_offset) {
 801          rastState->depthBias = rasterizer->offset_units;
 802          rastState->slopeScaledDepthBias = rasterizer->offset_scale;
 803          rastState->depthBiasClamp = rasterizer->offset_clamp;
 804       } else {
 805          rastState->depthBias = 0;
 806          rastState->slopeScaledDepthBias = 0;
 807          rastState->depthBiasClamp = 0;
 808       }
 809       struct pipe_surface *zb = fb->zsbuf;
 810       if (zb && swr_resource(zb->texture)->has_depth)
 811          rastState->depthFormat = swr_resource(zb->texture)->swr.format;
 812
 813       rastState->depthClipEnable = rasterizer->depth_clip;
 814
 815       SwrSetRastState(ctx->swrContext, rastState);
 816    }
 817
 818    /* Scissor */
 819    if (ctx->dirty & SWR_NEW_SCISSOR) {
 820       pipe_scissor_state *scissor = &ctx->scissor;
 821       BBOX bbox(scissor->miny, scissor->maxy,
 822                 scissor->minx, scissor->maxx);
 823       SwrSetScissorRects(ctx->swrContext, 1, &bbox);
 824    }
 825
 826    /* Viewport */
 827    if (ctx->dirty & (SWR_NEW_VIEWPORT | SWR_NEW_FRAMEBUFFER
 828                      | SWR_NEW_RASTERIZER)) {
 829       pipe_viewport_state *state = &ctx->viewport;
 830       pipe_framebuffer_state *fb = &ctx->framebuffer;
 831       pipe_rasterizer_state *rasterizer = ctx->rasterizer;
 832
 833       SWR_VIEWPORT *vp = &ctx->derived.vp;
 834       SWR_VIEWPORT_MATRIX *vpm = &ctx->derived.vpm;
 835
 836       vp->x = state->translate[0] - state->scale[0];
 837       vp->width = state->translate[0] + state->scale[0];
 838       vp->y = state->translate[1] - fabs(state->scale[1]);
 839       vp->height = state->translate[1] + fabs(state->scale[1]);
 840       if (rasterizer->clip_halfz == 0) {
 841          vp->minZ = state->translate[2] - state->scale[2];
 842          vp->maxZ = state->translate[2] + state->scale[2];
 843       } else {
 844          vp->minZ = state->translate[2];
 845          vp->maxZ = state->translate[2] + state->scale[2];
 846       }
 847
 848       vpm->m00 = state->scale[0];
 849       vpm->m11 = state->scale[1];
 850       vpm->m22 = state->scale[2];
 851       vpm->m30 = state->translate[0];
 852       vpm->m31 = state->translate[1];
 853       vpm->m32 = state->translate[2];
 854
 855       /* Now that the matrix is calculated, clip the view coords to screen
 856        * size.  OpenGL allows for -ve x,y in the viewport. */
 857       vp->x = std::max(vp->x, 0.0f);
 858       vp->y = std::max(vp->y, 0.0f);
 859       vp->width = std::min(vp->width, (float)fb->width);
 860       vp->height = std::min(vp->height, (float)fb->height);
 861
 862       SwrSetViewports(ctx->swrContext, 1, vp, vpm);
 863    }
 864
 865    /* Set vertex & index buffers */
 866    /* (using draw info if called by swr_draw_vbo) */
 867    if (ctx->dirty & SWR_NEW_VERTEX) {
 868       uint32_t size, pitch, max_vertex, partial_inbounds;
 869       const uint8_t *p_data;
 870
 871       /* If being called by swr_draw_vbo, copy draw details */
 872       struct pipe_draw_info info = {0};
 873       if (p_draw_info)
 874          info = *p_draw_info;
 875
 876       /* vertex buffers */
 877       SWR_VERTEX_BUFFER_STATE swrVertexBuffers[PIPE_MAX_ATTRIBS];
 878       for (UINT i = 0; i < ctx->num_vertex_buffers; i++) {
 879          struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
 880
 881          pitch = vb->stride;
 882          if (!vb->user_buffer) {
 883             /* VBO
 884              * size is based on buffer->width0 rather than info.max_index
 885              * to prevent having to validate VBO on each draw */
 886             size = vb->buffer->width0;
 887             max_vertex = size / pitch;
 888             partial_inbounds = size % pitch;
 889
 890             p_data = (const uint8_t *)swr_resource_data(vb->buffer)
 891                + vb->buffer_offset;
 892          } else {
 893             /* Client buffer
 894              * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
 895              * revalidate on each draw */
 896             post_update_dirty_flags |= SWR_NEW_VERTEX;
 897
 898             if (pitch) {
 899                size = (info.max_index - info.min_index + 1) * pitch;
 900             } else {
 901                /* pitch = 0, means constant value
 902                 * set size to 1 vertex */
 903                size = ctx->velems->stream_pitch[i];
 904             }
 905
 906             max_vertex = info.max_index + 1;
 907             partial_inbounds = 0;
 908
 909             /* Copy only needed vertices to scratch space */
 910             size = AlignUp(size, 4);
 911             const void *ptr = (const uint8_t *) vb->user_buffer
 912                + info.min_index * pitch;
 913             ptr = swr_copy_to_scratch_space(
 914                ctx, &ctx->scratch->vertex_buffer, ptr, size);
 915             p_data = (const uint8_t *)ptr - info.min_index * pitch;
 916          }
 917
 918          swrVertexBuffers[i] = {0};
 919          swrVertexBuffers[i].index = i;
 920          swrVertexBuffers[i].pitch = pitch;
 921          swrVertexBuffers[i].pData = p_data;
 922          swrVertexBuffers[i].size = size;
 923          swrVertexBuffers[i].maxVertex = max_vertex;
 924          swrVertexBuffers[i].partialInboundsSize = partial_inbounds;
 925       }
 926
 927       SwrSetVertexBuffers(
 928          ctx->swrContext, ctx->num_vertex_buffers, swrVertexBuffers);
 929
 930       /* index buffer, if required (info passed in by swr_draw_vbo) */
 931       SWR_FORMAT index_type = R32_UINT; /* Default for non-indexed draws */
 932       if (info.indexed) {
 933          struct pipe_index_buffer *ib = &ctx->index_buffer;
 934
 935          pitch = ib->index_size ? ib->index_size : sizeof(uint32_t);
 936          index_type = swr_convert_index_type(pitch);
 937
 938          if (!ib->user_buffer) {
 939             /* VBO
 940              * size is based on buffer->width0 rather than info.count
 941              * to prevent having to validate VBO on each draw */
 942             size = ib->buffer->width0;
 943             p_data =
 944                (const uint8_t *)swr_resource_data(ib->buffer) + ib->offset;
 945          } else {
 946             /* Client buffer
 947              * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
 948              * revalidate on each draw */
 949             post_update_dirty_flags |= SWR_NEW_VERTEX;
 950
 951             size = info.count * pitch;
 952             size = AlignUp(size, 4);
 953
 954             /* Copy indices to scratch space */
 955             const void *ptr = ib->user_buffer;
 956             ptr = swr_copy_to_scratch_space(
 957                ctx, &ctx->scratch->index_buffer, ptr, size);
 958             p_data = (const uint8_t *)ptr;
 959          }
 960
 961          SWR_INDEX_BUFFER_STATE swrIndexBuffer;
 962          swrIndexBuffer.format = swr_convert_index_type(ib->index_size);
 963          swrIndexBuffer.pIndices = p_data;
 964          swrIndexBuffer.size = size;
 965
 966          SwrSetIndexBuffer(ctx->swrContext, &swrIndexBuffer);
 967       }
 968
 969       struct swr_vertex_element_state *velems = ctx->velems;
 970       if (velems && velems->fsState.indexType != index_type) {
 971          velems->fsFunc = NULL;
 972          velems->fsState.indexType = index_type;
 973       }
 974    }
 975
 976    /* VertexShader */
 977    if (ctx->dirty & (SWR_NEW_VS | SWR_NEW_FRAMEBUFFER)) {
 978       SwrSetVertexFunc(ctx->swrContext, ctx->vs->func);
 979    }
 980
 981    swr_jit_key key;
 982    if (ctx->dirty & (SWR_NEW_FS | SWR_NEW_SAMPLER | SWR_NEW_SAMPLER_VIEW
 983                      | SWR_NEW_RASTERIZER | SWR_NEW_FRAMEBUFFER)) {
 984       memset(&key, 0, sizeof(key));
 985       swr_generate_fs_key(key, ctx, ctx->fs);
 986       auto search = ctx->fs->map.find(key);
 987       PFN_PIXEL_KERNEL func;
 988       if (search != ctx->fs->map.end()) {
 989          func = search->second;
 990       } else {
 991          func = swr_compile_fs(ctx, key);
 992          ctx->fs->map.insert(std::make_pair(key, func));
 993       }
 994       SWR_PS_STATE psState = {0};
 995       psState.pfnPixelShader = func;
 996       psState.killsPixel = ctx->fs->info.base.uses_kill;
 997       psState.inputCoverage = SWR_INPUT_COVERAGE_NORMAL;
 998       psState.writesODepth = ctx->fs->info.base.writes_z;
 999       psState.usesSourceDepth = ctx->fs->info.base.reads_z;
1000       psState.shadingRate = SWR_SHADING_RATE_PIXEL; // XXX
1001       psState.numRenderTargets = ctx->framebuffer.nr_cbufs;
1002       psState.posOffset = SWR_PS_POSITION_SAMPLE_NONE; // XXX msaa
1003       uint32_t barycentricsMask = 0;
1004 #if 0
1005       // when we switch to mesa-master
1006       if (ctx->fs->info.base.uses_persp_center ||
1007           ctx->fs->info.base.uses_linear_center)
1008          barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1009       if (ctx->fs->info.base.uses_persp_centroid ||
1010           ctx->fs->info.base.uses_linear_centroid)
1011          barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1012       if (ctx->fs->info.base.uses_persp_sample ||
1013           ctx->fs->info.base.uses_linear_sample)
1014          barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1015 #else
1016       for (unsigned i = 0; i < ctx->fs->info.base.num_inputs; i++) {
1017          switch (ctx->fs->info.base.input_interpolate_loc[i]) {
1018          case TGSI_INTERPOLATE_LOC_CENTER:
1019             barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1020             break;
1021          case TGSI_INTERPOLATE_LOC_CENTROID:
1022             barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1023             break;
1024          case TGSI_INTERPOLATE_LOC_SAMPLE:
1025             barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1026             break;
1027          }
1028       }
1029 #endif
1030       psState.barycentricsMask = barycentricsMask;
1031       psState.usesUAV = false; // XXX
1032       psState.forceEarlyZ = false;
1033       SwrSetPixelShaderState(ctx->swrContext, &psState);
1034    }
1035
1036    /* JIT sampler state */
1037    if (ctx->dirty & SWR_NEW_SAMPLER) {
1038       swr_draw_context *pDC = &ctx->swrDC;
1039
1040       for (unsigned i = 0; i < key.nr_samplers; i++) {
1041          const struct pipe_sampler_state *sampler =
1042             ctx->samplers[PIPE_SHADER_FRAGMENT][i];
1043
1044          if (sampler) {
1045             pDC->samplersFS[i].min_lod = sampler->min_lod;
1046             pDC->samplersFS[i].max_lod = sampler->max_lod;
1047             pDC->samplersFS[i].lod_bias = sampler->lod_bias;
1048             COPY_4V(pDC->samplersFS[i].border_color, sampler->border_color.f);
1049          }
1050       }
1051    }
1052
1053    /* JIT sampler view state */
1054    if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1055       swr_draw_context *pDC = &ctx->swrDC;
1056
1057       for (unsigned i = 0; i < key.nr_sampler_views; i++) {
1058          struct pipe_sampler_view *view =
1059             ctx->sampler_views[PIPE_SHADER_FRAGMENT][i];
1060
1061          if (view) {
1062             struct pipe_resource *res = view->texture;
1063             struct swr_resource *swr_res = swr_resource(res);
1064             struct swr_jit_texture *jit_tex = &pDC->texturesFS[i];
1065             memset(jit_tex, 0, sizeof(*jit_tex));
1066             jit_tex->width = res->width0;
1067             jit_tex->height = res->height0;
1068             jit_tex->depth = res->depth0;
1069             jit_tex->first_level = view->u.tex.first_level;
1070             jit_tex->last_level = view->u.tex.last_level;
1071             jit_tex->base_ptr = swr_res->swr.pBaseAddress;
1072
1073             for (unsigned level = jit_tex->first_level;
1074                  level <= jit_tex->last_level;
1075                  level++) {
1076                jit_tex->row_stride[level] = swr_res->row_stride[level];
1077                jit_tex->img_stride[level] = swr_res->img_stride[level];
1078                jit_tex->mip_offsets[level] = swr_res->mip_offsets[level];
1079             }
1080          }
1081       }
1082    }
1083
1084    /* VertexShader Constants */
1085    if (ctx->dirty & SWR_NEW_VSCONSTANTS) {
1086       swr_draw_context *pDC = &ctx->swrDC;
1087
1088       for (UINT i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
1089          const pipe_constant_buffer *cb =
1090             &ctx->constants[PIPE_SHADER_VERTEX][i];
1091          pDC->num_constantsVS[i] = cb->buffer_size;
1092          if (cb->buffer)
1093             pDC->constantVS[i] =
1094                (const float *)((const uint8_t *)cb->buffer + cb->buffer_offset);
1095          else {
1096             /* Need to copy these constants to scratch space */
1097             if (cb->user_buffer && cb->buffer_size) {
1098                const void *ptr =
1099                   ((const uint8_t *)cb->user_buffer + cb->buffer_offset);
1100                uint32_t size = AlignUp(cb->buffer_size, 4);
1101                ptr = swr_copy_to_scratch_space(
1102                   ctx, &ctx->scratch->vs_constants, ptr, size);
1103                pDC->constantVS[i] = (const float *)ptr;
1104             }
1105          }
1106       }
1107    }
1108
1109    /* FragmentShader Constants */
1110    if (ctx->dirty & SWR_NEW_FSCONSTANTS) {
1111       swr_draw_context *pDC = &ctx->swrDC;
1112
1113       for (UINT i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
1114          const pipe_constant_buffer *cb =
1115             &ctx->constants[PIPE_SHADER_FRAGMENT][i];
1116          pDC->num_constantsFS[i] = cb->buffer_size;
1117          if (cb->buffer)
1118             pDC->constantFS[i] =
1119                (const float *)((const uint8_t *)cb->buffer + cb->buffer_offset);
1120          else {
1121             /* Need to copy these constants to scratch space */
1122             if (cb->user_buffer && cb->buffer_size) {
1123                const void *ptr =
1124                   ((const uint8_t *)cb->user_buffer + cb->buffer_offset);
1125                uint32_t size = AlignUp(cb->buffer_size, 4);
1126                ptr = swr_copy_to_scratch_space(
1127                   ctx, &ctx->scratch->fs_constants, ptr, size);
1128                pDC->constantFS[i] = (const float *)ptr;
1129             }
1130          }
1131       }
1132    }
1133
1134    /* Depth/stencil state */
1135    if (ctx->dirty & (SWR_NEW_DEPTH_STENCIL_ALPHA | SWR_NEW_FRAMEBUFFER)) {
1136       struct pipe_depth_state *depth = &(ctx->depth_stencil->depth);
1137       struct pipe_stencil_state *stencil = ctx->depth_stencil->stencil;
1138       SWR_DEPTH_STENCIL_STATE depthStencilState = {{0}};
1139
1140       /* XXX, incomplete.  Need to flesh out stencil & alpha test state
1141       struct pipe_stencil_state *front_stencil =
1142       ctx->depth_stencil.stencil[0];
1143       struct pipe_stencil_state *back_stencil = ctx->depth_stencil.stencil[1];
1144       struct pipe_alpha_state alpha;
1145       */
1146       if (stencil[0].enabled) {
1147          depthStencilState.stencilWriteEnable = 1;
1148          depthStencilState.stencilTestEnable = 1;
1149          depthStencilState.stencilTestFunc =
1150             swr_convert_depth_func(stencil[0].func);
1151
1152          depthStencilState.stencilPassDepthPassOp =
1153             swr_convert_stencil_op(stencil[0].zpass_op);
1154          depthStencilState.stencilPassDepthFailOp =
1155             swr_convert_stencil_op(stencil[0].zfail_op);
1156          depthStencilState.stencilFailOp =
1157             swr_convert_stencil_op(stencil[0].fail_op);
1158          depthStencilState.stencilWriteMask = stencil[0].writemask;
1159          depthStencilState.stencilTestMask = stencil[0].valuemask;
1160          depthStencilState.stencilRefValue = ctx->stencil_ref.ref_value[0];
1161       }
1162       if (stencil[1].enabled) {
1163          depthStencilState.doubleSidedStencilTestEnable = 1;
1164
1165          depthStencilState.backfaceStencilTestFunc =
1166             swr_convert_depth_func(stencil[1].func);
1167
1168          depthStencilState.backfaceStencilPassDepthPassOp =
1169             swr_convert_stencil_op(stencil[1].zpass_op);
1170          depthStencilState.backfaceStencilPassDepthFailOp =
1171             swr_convert_stencil_op(stencil[1].zfail_op);
1172          depthStencilState.backfaceStencilFailOp =
1173             swr_convert_stencil_op(stencil[1].fail_op);
1174          depthStencilState.backfaceStencilWriteMask = stencil[1].writemask;
1175          depthStencilState.backfaceStencilTestMask = stencil[1].valuemask;
1176
1177          depthStencilState.backfaceStencilRefValue =
1178             ctx->stencil_ref.ref_value[1];
1179       }
1180
1181       depthStencilState.depthTestEnable = depth->enabled;
1182       depthStencilState.depthTestFunc = swr_convert_depth_func(depth->func);
1183       depthStencilState.depthWriteEnable = depth->writemask;
1184       SwrSetDepthStencilState(ctx->swrContext, &depthStencilState);
1185    }
1186
1187    /* Blend State */
1188    if (ctx->dirty & (SWR_NEW_BLEND |
1189                      SWR_NEW_FRAMEBUFFER |
1190                      SWR_NEW_DEPTH_STENCIL_ALPHA)) {
1191       struct pipe_framebuffer_state *fb = &ctx->framebuffer;
1192
1193       SWR_BLEND_STATE blendState;
1194       memcpy(&blendState, &ctx->blend->blendState, sizeof(blendState));
1195       blendState.constantColor[0] = ctx->blend_color.color[0];
1196       blendState.constantColor[1] = ctx->blend_color.color[1];
1197       blendState.constantColor[2] = ctx->blend_color.color[2];
1198       blendState.constantColor[3] = ctx->blend_color.color[3];
1199       blendState.alphaTestReference =
1200          *((uint32_t*)&ctx->depth_stencil->alpha.ref_value);
1201
1202       // XXX MSAA
1203       blendState.sampleMask = 0;
1204       blendState.sampleCount = SWR_MULTISAMPLE_1X;
1205
1206       /* If there are no color buffers bound, disable writes on RT0
1207        * and skip loop */
1208       if (fb->nr_cbufs == 0) {
1209          blendState.renderTarget[0].writeDisableRed = 1;
1210          blendState.renderTarget[0].writeDisableGreen = 1;
1211          blendState.renderTarget[0].writeDisableBlue = 1;
1212          blendState.renderTarget[0].writeDisableAlpha = 1;
1213          SwrSetBlendFunc(ctx->swrContext, 0, NULL);
1214       }
1215       else
1216          for (int target = 0;
1217                target < std::min(SWR_NUM_RENDERTARGETS,
1218                                  PIPE_MAX_COLOR_BUFS);
1219                target++) {
1220             if (!fb->cbufs[target])
1221                continue;
1222
1223             struct swr_resource *colorBuffer =
1224                swr_resource(fb->cbufs[target]->texture);
1225
1226             BLEND_COMPILE_STATE compileState;
1227             memset(&compileState, 0, sizeof(compileState));
1228             compileState.format = colorBuffer->swr.format;
1229             memcpy(&compileState.blendState,
1230                    &ctx->blend->compileState[target],
1231                    sizeof(compileState.blendState));
1232
1233             if (compileState.blendState.blendEnable == false &&
1234                 compileState.blendState.logicOpEnable == false) {
1235                SwrSetBlendFunc(ctx->swrContext, target, NULL);
1236                continue;
1237             }
1238
1239             compileState.desc.alphaTestEnable =
1240                ctx->depth_stencil->alpha.enabled;
1241             compileState.desc.independentAlphaBlendEnable =
1242                ctx->blend->pipe.independent_blend_enable;
1243             compileState.desc.alphaToCoverageEnable =
1244                ctx->blend->pipe.alpha_to_coverage;
1245             compileState.desc.sampleMaskEnable = 0; // XXX
1246             compileState.desc.numSamples = 1; // XXX
1247
1248             compileState.alphaTestFunction =
1249                swr_convert_depth_func(ctx->depth_stencil->alpha.func);
1250             compileState.alphaTestFormat = ALPHA_TEST_FLOAT32; // xxx
1251
1252             PFN_BLEND_JIT_FUNC func = NULL;
1253             auto search = ctx->blendJIT->find(compileState);
1254             if (search != ctx->blendJIT->end()) {
1255                func = search->second;
1256             } else {
1257                HANDLE hJitMgr = screen->hJitMgr;
1258                func = JitCompileBlend(hJitMgr, compileState);
1259                debug_printf("BLEND shader %p\n", func);
1260                assert(func && "Error: BlendShader = NULL");
1261
1262                ctx->blendJIT->insert(std::make_pair(compileState, func));
1263             }
1264             SwrSetBlendFunc(ctx->swrContext, target, func);
1265          }
1266
1267       SwrSetBlendState(ctx->swrContext, &blendState);
1268    }
1269
1270    if (ctx->dirty & SWR_NEW_STIPPLE) {
1271       /* XXX What to do with this one??? SWR doesn't stipple */
1272    }
1273
1274    if (ctx->dirty & (SWR_NEW_VS | SWR_NEW_SO | SWR_NEW_RASTERIZER)) {
1275       ctx->vs->soState.rasterizerDisable =
1276          ctx->rasterizer->rasterizer_discard;
1277       SwrSetSoState(ctx->swrContext, &ctx->vs->soState);
1278
1279       pipe_stream_output_info *stream_output = &ctx->vs->pipe.stream_output;
1280
1281       for (uint32_t i = 0; i < ctx->num_so_targets; i++) {
1282          SWR_STREAMOUT_BUFFER buffer = {0};
1283          if (!ctx->so_targets[i])
1284             continue;
1285          buffer.enable = true;
1286          buffer.pBuffer =
1287             (uint32_t *)swr_resource_data(ctx->so_targets[i]->buffer);
1288          buffer.bufferSize = ctx->so_targets[i]->buffer_size >> 2;
1289          buffer.pitch = stream_output->stride[i];
1290          buffer.streamOffset = ctx->so_targets[i]->buffer_offset >> 2;
1291
1292          SwrSetSoBuffers(ctx->swrContext, &buffer, i);
1293       }
1294    }
1295
1296    uint32_t linkage = ctx->vs->linkageMask;
1297    if (ctx->rasterizer->sprite_coord_enable)
1298       linkage |= (1 << ctx->vs->info.base.num_outputs);
1299
1300    SwrSetLinkage(ctx->swrContext, linkage, NULL);
1301
1302    // set up frontend state
1303    SWR_FRONTEND_STATE feState = {0};
1304    SwrSetFrontendState(ctx->swrContext, &feState);
1305
1306    // set up backend state
1307    SWR_BACKEND_STATE backendState = {0};
1308    backendState.numAttributes = 1;
1309    backendState.numComponents[0] = 4;
1310    backendState.constantInterpolationMask = ctx->fs->constantMask;
1311    backendState.pointSpriteTexCoordMask = ctx->fs->pointSpriteMask;
1312
1313    SwrSetBackendState(ctx->swrContext, &backendState);
1314
1315    /* Ensure that any in-progress attachment change StoreTiles finish */
1316    if (swr_is_fence_pending(screen->flush_fence))
1317       swr_fence_finish(pipe->screen, screen->flush_fence, 0);
1318
1319    /* Finally, update the in-use status of all resources involved in draw */
1320    swr_update_resource_status(pipe, p_draw_info);
1321
1322    ctx->dirty = post_update_dirty_flags;
1323 }
1324
1325
1326 static struct pipe_stream_output_target *
1327 swr_create_so_target(struct pipe_context *pipe,
1328                      struct pipe_resource *buffer,
1329                      unsigned buffer_offset,
1330                      unsigned buffer_size)
1331 {
1332    struct pipe_stream_output_target *target;
1333
1334    target = CALLOC_STRUCT(pipe_stream_output_target);
1335    if (!target)
1336       return NULL;
1337
1338    target->context = pipe;
1339    target->reference.count = 1;
1340    pipe_resource_reference(&target->buffer, buffer);
1341    target->buffer_offset = buffer_offset;
1342    target->buffer_size = buffer_size;
1343    return target;
1344 }
1345
1346 static void
1347 swr_destroy_so_target(struct pipe_context *pipe,
1348                       struct pipe_stream_output_target *target)
1349 {
1350    pipe_resource_reference(&target->buffer, NULL);
1351    FREE(target);
1352 }
1353
1354 static void
1355 swr_set_so_targets(struct pipe_context *pipe,
1356                    unsigned num_targets,
1357                    struct pipe_stream_output_target **targets,
1358                    const unsigned *offsets)
1359 {
1360    struct swr_context *swr = swr_context(pipe);
1361    uint32_t i;
1362
1363    assert(num_targets < MAX_SO_STREAMS);
1364
1365    for (i = 0; i < num_targets; i++) {
1366       pipe_so_target_reference(
1367          (struct pipe_stream_output_target **)&swr->so_targets[i],
1368          targets[i]);
1369    }
1370
1371    for (/* fall-through */; i < swr->num_so_targets; i++) {
1372       pipe_so_target_reference(
1373          (struct pipe_stream_output_target **)&swr->so_targets[i], NULL);
1374    }
1375
1376    swr->num_so_targets = num_targets;
1377
1378    swr->dirty = SWR_NEW_SO;
1379 }
1380
1381
1382 void
1383 swr_state_init(struct pipe_context *pipe)
1384 {
1385    pipe->create_blend_state = swr_create_blend_state;
1386    pipe->bind_blend_state = swr_bind_blend_state;
1387    pipe->delete_blend_state = swr_delete_blend_state;
1388
1389    pipe->create_depth_stencil_alpha_state = swr_create_depth_stencil_state;
1390    pipe->bind_depth_stencil_alpha_state = swr_bind_depth_stencil_state;
1391    pipe->delete_depth_stencil_alpha_state = swr_delete_depth_stencil_state;
1392
1393    pipe->create_rasterizer_state = swr_create_rasterizer_state;
1394    pipe->bind_rasterizer_state = swr_bind_rasterizer_state;
1395    pipe->delete_rasterizer_state = swr_delete_rasterizer_state;
1396
1397    pipe->create_sampler_state = swr_create_sampler_state;
1398    pipe->bind_sampler_states = swr_bind_sampler_states;
1399    pipe->delete_sampler_state = swr_delete_sampler_state;
1400
1401    pipe->create_sampler_view = swr_create_sampler_view;
1402    pipe->set_sampler_views = swr_set_sampler_views;
1403    pipe->sampler_view_destroy = swr_sampler_view_destroy;
1404
1405    pipe->create_vs_state = swr_create_vs_state;
1406    pipe->bind_vs_state = swr_bind_vs_state;
1407    pipe->delete_vs_state = swr_delete_vs_state;
1408
1409    pipe->create_fs_state = swr_create_fs_state;
1410    pipe->bind_fs_state = swr_bind_fs_state;
1411    pipe->delete_fs_state = swr_delete_fs_state;
1412
1413    pipe->set_constant_buffer = swr_set_constant_buffer;
1414
1415    pipe->create_vertex_elements_state = swr_create_vertex_elements_state;
1416    pipe->bind_vertex_elements_state = swr_bind_vertex_elements_state;
1417    pipe->delete_vertex_elements_state = swr_delete_vertex_elements_state;
1418
1419    pipe->set_vertex_buffers = swr_set_vertex_buffers;
1420    pipe->set_index_buffer = swr_set_index_buffer;
1421
1422    pipe->set_polygon_stipple = swr_set_polygon_stipple;
1423    pipe->set_clip_state = swr_set_clip_state;
1424    pipe->set_scissor_states = swr_set_scissor_states;
1425    pipe->set_viewport_states = swr_set_viewport_states;
1426
1427    pipe->set_framebuffer_state = swr_set_framebuffer_state;
1428
1429    pipe->set_blend_color = swr_set_blend_color;
1430    pipe->set_stencil_ref = swr_set_stencil_ref;
1431
1432    pipe->set_sample_mask = swr_set_sample_mask;
1433
1434    pipe->create_stream_output_target = swr_create_so_target;
1435    pipe->stream_output_target_destroy = swr_destroy_so_target;
1436    pipe->set_stream_output_targets = swr_set_so_targets;
1437 }