swr: Add polygon stipple support
[mesa.git] / src / gallium / drivers / swr / swr_state.cpp
1 /****************************************************************************
2 * Copyright (C) 2015 Intel Corporation. All Rights Reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
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9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
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23
24 // llvm redefines DEBUG
25 #pragma push_macro("DEBUG")
26 #undef DEBUG
27 #include "JitManager.h"
28 #pragma pop_macro("DEBUG")
29
30 #include "common/os.h"
31 #include "jit_api.h"
32 #include "gen_state_llvm.h"
33 #include "core/multisample.h"
34
35 #include "gallivm/lp_bld_tgsi.h"
36 #include "util/u_format.h"
37
38 #include "util/u_memory.h"
39 #include "util/u_inlines.h"
40 #include "util/u_helpers.h"
41 #include "util/u_framebuffer.h"
42 #include "util/u_viewport.h"
43 #include "util/u_prim.h"
44
45 #include "swr_state.h"
46 #include "swr_context.h"
47 #include "gen_swr_context_llvm.h"
48 #include "swr_screen.h"
49 #include "swr_resource.h"
50 #include "swr_tex_sample.h"
51 #include "swr_scratch.h"
52 #include "swr_shader.h"
53 #include "swr_fence.h"
54
55 /* These should be pulled out into separate files as necessary
56 * Just initializing everything here to get going. */
57
58 static void *
59 swr_create_blend_state(struct pipe_context *pipe,
60 const struct pipe_blend_state *blend)
61 {
62 struct swr_blend_state *state = CALLOC_STRUCT(swr_blend_state);
63
64 memcpy(&state->pipe, blend, sizeof(*blend));
65
66 struct pipe_blend_state *pipe_blend = &state->pipe;
67
68 for (int target = 0;
69 target < std::min(SWR_NUM_RENDERTARGETS, PIPE_MAX_COLOR_BUFS);
70 target++) {
71
72 struct pipe_rt_blend_state *rt_blend = &pipe_blend->rt[target];
73 SWR_RENDER_TARGET_BLEND_STATE &blendState =
74 state->blendState.renderTarget[target];
75 RENDER_TARGET_BLEND_COMPILE_STATE &compileState =
76 state->compileState[target];
77
78 if (target != 0 && !pipe_blend->independent_blend_enable) {
79 memcpy(&compileState,
80 &state->compileState[0],
81 sizeof(RENDER_TARGET_BLEND_COMPILE_STATE));
82 continue;
83 }
84
85 compileState.blendEnable = rt_blend->blend_enable;
86 if (compileState.blendEnable) {
87 compileState.sourceAlphaBlendFactor =
88 swr_convert_blend_factor(rt_blend->alpha_src_factor);
89 compileState.destAlphaBlendFactor =
90 swr_convert_blend_factor(rt_blend->alpha_dst_factor);
91 compileState.sourceBlendFactor =
92 swr_convert_blend_factor(rt_blend->rgb_src_factor);
93 compileState.destBlendFactor =
94 swr_convert_blend_factor(rt_blend->rgb_dst_factor);
95
96 compileState.colorBlendFunc =
97 swr_convert_blend_func(rt_blend->rgb_func);
98 compileState.alphaBlendFunc =
99 swr_convert_blend_func(rt_blend->alpha_func);
100 }
101 compileState.logicOpEnable = state->pipe.logicop_enable;
102 if (compileState.logicOpEnable) {
103 compileState.logicOpFunc =
104 swr_convert_logic_op(state->pipe.logicop_func);
105 }
106
107 blendState.writeDisableRed =
108 (rt_blend->colormask & PIPE_MASK_R) ? 0 : 1;
109 blendState.writeDisableGreen =
110 (rt_blend->colormask & PIPE_MASK_G) ? 0 : 1;
111 blendState.writeDisableBlue =
112 (rt_blend->colormask & PIPE_MASK_B) ? 0 : 1;
113 blendState.writeDisableAlpha =
114 (rt_blend->colormask & PIPE_MASK_A) ? 0 : 1;
115
116 if (rt_blend->colormask == 0)
117 compileState.blendEnable = false;
118 }
119
120 return state;
121 }
122
123 static void
124 swr_bind_blend_state(struct pipe_context *pipe, void *blend)
125 {
126 struct swr_context *ctx = swr_context(pipe);
127
128 if (ctx->blend == blend)
129 return;
130
131 ctx->blend = (swr_blend_state *)blend;
132
133 ctx->dirty |= SWR_NEW_BLEND;
134 }
135
136 static void
137 swr_delete_blend_state(struct pipe_context *pipe, void *blend)
138 {
139 FREE(blend);
140 }
141
142 static void
143 swr_set_blend_color(struct pipe_context *pipe,
144 const struct pipe_blend_color *color)
145 {
146 struct swr_context *ctx = swr_context(pipe);
147
148 ctx->blend_color = *color;
149
150 ctx->dirty |= SWR_NEW_BLEND;
151 }
152
153 static void
154 swr_set_stencil_ref(struct pipe_context *pipe,
155 const struct pipe_stencil_ref *ref)
156 {
157 struct swr_context *ctx = swr_context(pipe);
158
159 ctx->stencil_ref = *ref;
160
161 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
162 }
163
164 static void *
165 swr_create_depth_stencil_state(
166 struct pipe_context *pipe,
167 const struct pipe_depth_stencil_alpha_state *depth_stencil)
168 {
169 struct pipe_depth_stencil_alpha_state *state;
170
171 state = (pipe_depth_stencil_alpha_state *)mem_dup(depth_stencil,
172 sizeof *depth_stencil);
173
174 return state;
175 }
176
177 static void
178 swr_bind_depth_stencil_state(struct pipe_context *pipe, void *depth_stencil)
179 {
180 struct swr_context *ctx = swr_context(pipe);
181
182 if (ctx->depth_stencil == (pipe_depth_stencil_alpha_state *)depth_stencil)
183 return;
184
185 ctx->depth_stencil = (pipe_depth_stencil_alpha_state *)depth_stencil;
186
187 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
188 }
189
190 static void
191 swr_delete_depth_stencil_state(struct pipe_context *pipe, void *depth)
192 {
193 FREE(depth);
194 }
195
196
197 static void *
198 swr_create_rasterizer_state(struct pipe_context *pipe,
199 const struct pipe_rasterizer_state *rast)
200 {
201 struct pipe_rasterizer_state *state;
202 state = (pipe_rasterizer_state *)mem_dup(rast, sizeof *rast);
203
204 return state;
205 }
206
207 static void
208 swr_bind_rasterizer_state(struct pipe_context *pipe, void *handle)
209 {
210 struct swr_context *ctx = swr_context(pipe);
211 const struct pipe_rasterizer_state *rasterizer =
212 (const struct pipe_rasterizer_state *)handle;
213
214 if (ctx->rasterizer == (pipe_rasterizer_state *)rasterizer)
215 return;
216
217 ctx->rasterizer = (pipe_rasterizer_state *)rasterizer;
218
219 ctx->dirty |= SWR_NEW_RASTERIZER;
220 }
221
222 static void
223 swr_delete_rasterizer_state(struct pipe_context *pipe, void *rasterizer)
224 {
225 FREE(rasterizer);
226 }
227
228
229 static void *
230 swr_create_sampler_state(struct pipe_context *pipe,
231 const struct pipe_sampler_state *sampler)
232 {
233 struct pipe_sampler_state *state =
234 (pipe_sampler_state *)mem_dup(sampler, sizeof *sampler);
235
236 return state;
237 }
238
239 static void
240 swr_bind_sampler_states(struct pipe_context *pipe,
241 enum pipe_shader_type shader,
242 unsigned start,
243 unsigned num,
244 void **samplers)
245 {
246 struct swr_context *ctx = swr_context(pipe);
247 unsigned i;
248
249 assert(shader < PIPE_SHADER_TYPES);
250 assert(start + num <= ARRAY_SIZE(ctx->samplers[shader]));
251
252 /* set the new samplers */
253 ctx->num_samplers[shader] = num;
254 for (i = 0; i < num; i++) {
255 ctx->samplers[shader][start + i] = (pipe_sampler_state *)samplers[i];
256 }
257
258 ctx->dirty |= SWR_NEW_SAMPLER;
259 }
260
261 static void
262 swr_delete_sampler_state(struct pipe_context *pipe, void *sampler)
263 {
264 FREE(sampler);
265 }
266
267
268 static struct pipe_sampler_view *
269 swr_create_sampler_view(struct pipe_context *pipe,
270 struct pipe_resource *texture,
271 const struct pipe_sampler_view *templ)
272 {
273 struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view);
274
275 if (view) {
276 *view = *templ;
277 view->reference.count = 1;
278 view->texture = NULL;
279 pipe_resource_reference(&view->texture, texture);
280 view->context = pipe;
281 }
282
283 return view;
284 }
285
286 static void
287 swr_set_sampler_views(struct pipe_context *pipe,
288 enum pipe_shader_type shader,
289 unsigned start,
290 unsigned num,
291 struct pipe_sampler_view **views)
292 {
293 struct swr_context *ctx = swr_context(pipe);
294 uint i;
295
296 assert(num <= PIPE_MAX_SHADER_SAMPLER_VIEWS);
297
298 assert(shader < PIPE_SHADER_TYPES);
299 assert(start + num <= ARRAY_SIZE(ctx->sampler_views[shader]));
300
301 /* set the new sampler views */
302 ctx->num_sampler_views[shader] = num;
303 for (i = 0; i < num; i++) {
304 /* Note: we're using pipe_sampler_view_release() here to work around
305 * a possible crash when the old view belongs to another context that
306 * was already destroyed.
307 */
308 pipe_sampler_view_release(pipe, &ctx->sampler_views[shader][start + i]);
309 pipe_sampler_view_reference(&ctx->sampler_views[shader][start + i],
310 views[i]);
311 }
312
313 ctx->dirty |= SWR_NEW_SAMPLER_VIEW;
314 }
315
316 static void
317 swr_sampler_view_destroy(struct pipe_context *pipe,
318 struct pipe_sampler_view *view)
319 {
320 pipe_resource_reference(&view->texture, NULL);
321 FREE(view);
322 }
323
324 static void *
325 swr_create_vs_state(struct pipe_context *pipe,
326 const struct pipe_shader_state *vs)
327 {
328 struct swr_vertex_shader *swr_vs = new swr_vertex_shader;
329 if (!swr_vs)
330 return NULL;
331
332 swr_vs->pipe.tokens = tgsi_dup_tokens(vs->tokens);
333 swr_vs->pipe.stream_output = vs->stream_output;
334
335 lp_build_tgsi_info(vs->tokens, &swr_vs->info);
336
337 swr_vs->soState = {0};
338
339 if (swr_vs->pipe.stream_output.num_outputs) {
340 pipe_stream_output_info *stream_output = &swr_vs->pipe.stream_output;
341
342 swr_vs->soState.soEnable = true;
343 // soState.rasterizerDisable set on state dirty
344 // soState.streamToRasterizer not used
345
346 for (uint32_t i = 0; i < stream_output->num_outputs; i++) {
347 swr_vs->soState.streamMasks[stream_output->output[i].stream] |=
348 1 << (stream_output->output[i].register_index - 1);
349 }
350 for (uint32_t i = 0; i < MAX_SO_STREAMS; i++) {
351 swr_vs->soState.streamNumEntries[i] =
352 _mm_popcnt_u32(swr_vs->soState.streamMasks[i]);
353 }
354 }
355
356 return swr_vs;
357 }
358
359 static void
360 swr_bind_vs_state(struct pipe_context *pipe, void *vs)
361 {
362 struct swr_context *ctx = swr_context(pipe);
363
364 if (ctx->vs == vs)
365 return;
366
367 ctx->vs = (swr_vertex_shader *)vs;
368 ctx->dirty |= SWR_NEW_VS;
369 }
370
371 static void
372 swr_delete_vs_state(struct pipe_context *pipe, void *vs)
373 {
374 struct swr_vertex_shader *swr_vs = (swr_vertex_shader *)vs;
375 FREE((void *)swr_vs->pipe.tokens);
376 struct swr_screen *screen = swr_screen(pipe->screen);
377
378 /* Defer deletion of vs state */
379 swr_fence_work_delete_vs(screen->flush_fence, swr_vs);
380 }
381
382 static void *
383 swr_create_fs_state(struct pipe_context *pipe,
384 const struct pipe_shader_state *fs)
385 {
386 struct swr_fragment_shader *swr_fs = new swr_fragment_shader;
387 if (!swr_fs)
388 return NULL;
389
390 swr_fs->pipe.tokens = tgsi_dup_tokens(fs->tokens);
391
392 lp_build_tgsi_info(fs->tokens, &swr_fs->info);
393
394 return swr_fs;
395 }
396
397
398 static void
399 swr_bind_fs_state(struct pipe_context *pipe, void *fs)
400 {
401 struct swr_context *ctx = swr_context(pipe);
402
403 if (ctx->fs == fs)
404 return;
405
406 ctx->fs = (swr_fragment_shader *)fs;
407 ctx->dirty |= SWR_NEW_FS;
408 }
409
410 static void
411 swr_delete_fs_state(struct pipe_context *pipe, void *fs)
412 {
413 struct swr_fragment_shader *swr_fs = (swr_fragment_shader *)fs;
414 FREE((void *)swr_fs->pipe.tokens);
415 struct swr_screen *screen = swr_screen(pipe->screen);
416
417 /* Defer deleton of fs state */
418 swr_fence_work_delete_fs(screen->flush_fence, swr_fs);
419 }
420
421 static void *
422 swr_create_gs_state(struct pipe_context *pipe,
423 const struct pipe_shader_state *gs)
424 {
425 struct swr_geometry_shader *swr_gs = new swr_geometry_shader;
426 if (!swr_gs)
427 return NULL;
428
429 swr_gs->pipe.tokens = tgsi_dup_tokens(gs->tokens);
430
431 lp_build_tgsi_info(gs->tokens, &swr_gs->info);
432
433 return swr_gs;
434 }
435
436
437 static void
438 swr_bind_gs_state(struct pipe_context *pipe, void *gs)
439 {
440 struct swr_context *ctx = swr_context(pipe);
441
442 if (ctx->gs == gs)
443 return;
444
445 ctx->gs = (swr_geometry_shader *)gs;
446 ctx->dirty |= SWR_NEW_GS;
447 }
448
449 static void
450 swr_delete_gs_state(struct pipe_context *pipe, void *gs)
451 {
452 struct swr_geometry_shader *swr_gs = (swr_geometry_shader *)gs;
453 FREE((void *)swr_gs->pipe.tokens);
454 struct swr_screen *screen = swr_screen(pipe->screen);
455
456 /* Defer deleton of fs state */
457 swr_fence_work_delete_gs(screen->flush_fence, swr_gs);
458 }
459
460 static void
461 swr_set_constant_buffer(struct pipe_context *pipe,
462 enum pipe_shader_type shader,
463 uint index,
464 const struct pipe_constant_buffer *cb)
465 {
466 struct swr_context *ctx = swr_context(pipe);
467 struct pipe_resource *constants = cb ? cb->buffer : NULL;
468
469 assert(shader < PIPE_SHADER_TYPES);
470 assert(index < ARRAY_SIZE(ctx->constants[shader]));
471
472 /* note: reference counting */
473 util_copy_constant_buffer(&ctx->constants[shader][index], cb);
474
475 if (shader == PIPE_SHADER_VERTEX) {
476 ctx->dirty |= SWR_NEW_VSCONSTANTS;
477 } else if (shader == PIPE_SHADER_FRAGMENT) {
478 ctx->dirty |= SWR_NEW_FSCONSTANTS;
479 } else if (shader == PIPE_SHADER_GEOMETRY) {
480 ctx->dirty |= SWR_NEW_GSCONSTANTS;
481 }
482
483 if (cb && cb->user_buffer) {
484 pipe_resource_reference(&constants, NULL);
485 }
486 }
487
488
489 static void *
490 swr_create_vertex_elements_state(struct pipe_context *pipe,
491 unsigned num_elements,
492 const struct pipe_vertex_element *attribs)
493 {
494 struct swr_vertex_element_state *velems;
495 assert(num_elements <= PIPE_MAX_ATTRIBS);
496 velems = new swr_vertex_element_state;
497 if (velems) {
498 velems->fsState.bVertexIDOffsetEnable = true;
499 velems->fsState.numAttribs = num_elements;
500 for (unsigned i = 0; i < num_elements; i++) {
501 // XXX: we should do this keyed on the VS usage info
502
503 const struct util_format_description *desc =
504 util_format_description(attribs[i].src_format);
505
506 velems->fsState.layout[i].AlignedByteOffset = attribs[i].src_offset;
507 velems->fsState.layout[i].Format =
508 mesa_to_swr_format(attribs[i].src_format);
509 velems->fsState.layout[i].StreamIndex =
510 attribs[i].vertex_buffer_index;
511 velems->fsState.layout[i].InstanceEnable =
512 attribs[i].instance_divisor != 0;
513 velems->fsState.layout[i].ComponentControl0 =
514 desc->channel[0].type != UTIL_FORMAT_TYPE_VOID
515 ? ComponentControl::StoreSrc
516 : ComponentControl::Store0;
517 velems->fsState.layout[i].ComponentControl1 =
518 desc->channel[1].type != UTIL_FORMAT_TYPE_VOID
519 ? ComponentControl::StoreSrc
520 : ComponentControl::Store0;
521 velems->fsState.layout[i].ComponentControl2 =
522 desc->channel[2].type != UTIL_FORMAT_TYPE_VOID
523 ? ComponentControl::StoreSrc
524 : ComponentControl::Store0;
525 velems->fsState.layout[i].ComponentControl3 =
526 desc->channel[3].type != UTIL_FORMAT_TYPE_VOID
527 ? ComponentControl::StoreSrc
528 : ComponentControl::Store1Fp;
529 velems->fsState.layout[i].ComponentPacking = ComponentEnable::XYZW;
530 velems->fsState.layout[i].InstanceDataStepRate =
531 attribs[i].instance_divisor;
532
533 /* Calculate the pitch of each stream */
534 const SWR_FORMAT_INFO &swr_desc = GetFormatInfo(
535 mesa_to_swr_format(attribs[i].src_format));
536 velems->stream_pitch[attribs[i].vertex_buffer_index] += swr_desc.Bpp;
537
538 if (attribs[i].instance_divisor != 0) {
539 velems->instanced_bufs |= 1U << attribs[i].vertex_buffer_index;
540 uint32_t *min_instance_div =
541 &velems->min_instance_div[attribs[i].vertex_buffer_index];
542 if (!*min_instance_div ||
543 attribs[i].instance_divisor < *min_instance_div)
544 *min_instance_div = attribs[i].instance_divisor;
545 }
546 }
547 }
548
549 return velems;
550 }
551
552 static void
553 swr_bind_vertex_elements_state(struct pipe_context *pipe, void *velems)
554 {
555 struct swr_context *ctx = swr_context(pipe);
556 struct swr_vertex_element_state *swr_velems =
557 (struct swr_vertex_element_state *)velems;
558
559 ctx->velems = swr_velems;
560 ctx->dirty |= SWR_NEW_VERTEX;
561 }
562
563 static void
564 swr_delete_vertex_elements_state(struct pipe_context *pipe, void *velems)
565 {
566 struct swr_vertex_element_state *swr_velems =
567 (struct swr_vertex_element_state *) velems;
568 /* XXX Need to destroy fetch shader? */
569 delete swr_velems;
570 }
571
572
573 static void
574 swr_set_vertex_buffers(struct pipe_context *pipe,
575 unsigned start_slot,
576 unsigned num_elements,
577 const struct pipe_vertex_buffer *buffers)
578 {
579 struct swr_context *ctx = swr_context(pipe);
580
581 assert(num_elements <= PIPE_MAX_ATTRIBS);
582
583 util_set_vertex_buffers_count(ctx->vertex_buffer,
584 &ctx->num_vertex_buffers,
585 buffers,
586 start_slot,
587 num_elements);
588
589 ctx->dirty |= SWR_NEW_VERTEX;
590 }
591
592
593 static void
594 swr_set_index_buffer(struct pipe_context *pipe,
595 const struct pipe_index_buffer *ib)
596 {
597 struct swr_context *ctx = swr_context(pipe);
598
599 if (ib)
600 memcpy(&ctx->index_buffer, ib, sizeof(ctx->index_buffer));
601 else
602 memset(&ctx->index_buffer, 0, sizeof(ctx->index_buffer));
603
604 ctx->dirty |= SWR_NEW_VERTEX;
605 }
606
607 static void
608 swr_set_polygon_stipple(struct pipe_context *pipe,
609 const struct pipe_poly_stipple *stipple)
610 {
611 struct swr_context *ctx = swr_context(pipe);
612
613 ctx->poly_stipple.pipe = *stipple; /* struct copy */
614 ctx->dirty |= SWR_NEW_STIPPLE;
615 }
616
617 static void
618 swr_set_clip_state(struct pipe_context *pipe,
619 const struct pipe_clip_state *clip)
620 {
621 struct swr_context *ctx = swr_context(pipe);
622
623 ctx->clip = *clip;
624 /* XXX Unimplemented, but prevents crash */
625
626 ctx->dirty |= SWR_NEW_CLIP;
627 }
628
629
630 static void
631 swr_set_scissor_states(struct pipe_context *pipe,
632 unsigned start_slot,
633 unsigned num_viewports,
634 const struct pipe_scissor_state *scissor)
635 {
636 struct swr_context *ctx = swr_context(pipe);
637
638 ctx->scissor = *scissor;
639 ctx->swr_scissor.xmin = scissor->minx;
640 ctx->swr_scissor.xmax = scissor->maxx;
641 ctx->swr_scissor.ymin = scissor->miny;
642 ctx->swr_scissor.ymax = scissor->maxy;
643 ctx->dirty |= SWR_NEW_SCISSOR;
644 }
645
646 static void
647 swr_set_viewport_states(struct pipe_context *pipe,
648 unsigned start_slot,
649 unsigned num_viewports,
650 const struct pipe_viewport_state *vpt)
651 {
652 struct swr_context *ctx = swr_context(pipe);
653
654 ctx->viewport = *vpt;
655 ctx->dirty |= SWR_NEW_VIEWPORT;
656 }
657
658
659 static void
660 swr_set_framebuffer_state(struct pipe_context *pipe,
661 const struct pipe_framebuffer_state *fb)
662 {
663 struct swr_context *ctx = swr_context(pipe);
664
665 boolean changed = !util_framebuffer_state_equal(&ctx->framebuffer, fb);
666
667 assert(fb->width <= KNOB_GUARDBAND_WIDTH);
668 assert(fb->height <= KNOB_GUARDBAND_HEIGHT);
669
670 if (changed) {
671 util_copy_framebuffer_state(&ctx->framebuffer, fb);
672
673 /* 0 and 1 both indicate no msaa. Core doesn't understand 0 samples */
674 ctx->framebuffer.samples = std::max((ubyte)1, ctx->framebuffer.samples);
675
676 ctx->dirty |= SWR_NEW_FRAMEBUFFER;
677 }
678 }
679
680
681 static void
682 swr_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
683 {
684 struct swr_context *ctx = swr_context(pipe);
685
686 if (sample_mask != ctx->sample_mask) {
687 ctx->sample_mask = sample_mask;
688 ctx->dirty |= SWR_NEW_RASTERIZER;
689 }
690 }
691
692 /*
693 * MSAA fixed sample position table
694 * used by update_derived and get_sample_position
695 * (integer locations on a 16x16 grid)
696 */
697 static const uint8_t swr_sample_positions[][2] =
698 { /* 1x*/ { 8, 8},
699 /* 2x*/ {12,12},{ 4, 4},
700 /* 4x*/ { 6, 2},{14, 6},{ 2,10},{10,14},
701 /* 8x*/ { 9, 5},{ 7,11},{13, 9},{ 5, 3},
702 { 3,13},{ 1, 7},{11,15},{15, 1},
703 /*16x*/ { 9, 9},{ 7, 5},{ 5,10},{12, 7},
704 { 3, 6},{10,13},{13,11},{11, 3},
705 { 6,14},{ 8, 1},{ 4, 2},{ 2,12},
706 { 0, 8},{15, 4},{14,15},{ 1, 0} };
707
708 static void
709 swr_get_sample_position(struct pipe_context *pipe,
710 unsigned sample_count, unsigned sample_index,
711 float *out_value)
712 {
713 /* validate sample_count */
714 sample_count = GetNumSamples(GetSampleCount(sample_count));
715
716 const uint8_t *sample = swr_sample_positions[sample_count-1 + sample_index];
717 out_value[0] = sample[0] / 16.0f;
718 out_value[1] = sample[1] / 16.0f;
719 }
720
721
722 /*
723 * Update resource in-use status
724 * All resources bound to color or depth targets marked as WRITE resources.
725 * VBO Vertex/index buffers and texture views marked as READ resources.
726 */
727 void
728 swr_update_resource_status(struct pipe_context *pipe,
729 const struct pipe_draw_info *p_draw_info)
730 {
731 struct swr_context *ctx = swr_context(pipe);
732 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
733
734 /* colorbuffer targets */
735 if (fb->nr_cbufs)
736 for (uint32_t i = 0; i < fb->nr_cbufs; ++i)
737 if (fb->cbufs[i])
738 swr_resource_write(fb->cbufs[i]->texture);
739
740 /* depth/stencil target */
741 if (fb->zsbuf)
742 swr_resource_write(fb->zsbuf->texture);
743
744 /* VBO vertex buffers */
745 for (uint32_t i = 0; i < ctx->num_vertex_buffers; i++) {
746 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
747 if (!vb->user_buffer)
748 swr_resource_read(vb->buffer);
749 }
750
751 /* VBO index buffer */
752 if (p_draw_info && p_draw_info->indexed) {
753 struct pipe_index_buffer *ib = &ctx->index_buffer;
754 if (!ib->user_buffer)
755 swr_resource_read(ib->buffer);
756 }
757
758 /* transform feedback buffers */
759 for (uint32_t i = 0; i < ctx->num_so_targets; i++) {
760 struct pipe_stream_output_target *target = ctx->so_targets[i];
761 if (target && target->buffer)
762 swr_resource_write(target->buffer);
763 }
764
765 /* texture sampler views */
766 for (uint32_t j : {PIPE_SHADER_VERTEX, PIPE_SHADER_FRAGMENT}) {
767 for (uint32_t i = 0; i < ctx->num_sampler_views[j]; i++) {
768 struct pipe_sampler_view *view = ctx->sampler_views[j][i];
769 if (view)
770 swr_resource_read(view->texture);
771 }
772 }
773
774 /* constant buffers */
775 for (uint32_t j : {PIPE_SHADER_VERTEX, PIPE_SHADER_FRAGMENT}) {
776 for (uint32_t i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
777 struct pipe_constant_buffer *cb = &ctx->constants[j][i];
778 if (cb->buffer)
779 swr_resource_read(cb->buffer);
780 }
781 }
782 }
783
784 static void
785 swr_update_texture_state(struct swr_context *ctx,
786 enum pipe_shader_type shader_type,
787 unsigned num_sampler_views,
788 swr_jit_texture *textures)
789 {
790 for (unsigned i = 0; i < num_sampler_views; i++) {
791 struct pipe_sampler_view *view =
792 ctx->sampler_views[shader_type][i];
793 struct swr_jit_texture *jit_tex = &textures[i];
794
795 memset(jit_tex, 0, sizeof(*jit_tex));
796 if (view) {
797 struct pipe_resource *res = view->texture;
798 struct swr_resource *swr_res = swr_resource(res);
799 SWR_SURFACE_STATE *swr = &swr_res->swr;
800 size_t *mip_offsets = swr_res->mip_offsets;
801 if (swr_res->has_depth && swr_res->has_stencil &&
802 !util_format_has_depth(util_format_description(view->format))) {
803 swr = &swr_res->secondary;
804 mip_offsets = swr_res->secondary_mip_offsets;
805 }
806
807 jit_tex->width = res->width0;
808 jit_tex->height = res->height0;
809 jit_tex->base_ptr = swr->pBaseAddress;
810 if (view->target != PIPE_BUFFER) {
811 jit_tex->first_level = view->u.tex.first_level;
812 jit_tex->last_level = view->u.tex.last_level;
813 if (view->target == PIPE_TEXTURE_3D)
814 jit_tex->depth = res->depth0;
815 else
816 jit_tex->depth =
817 view->u.tex.last_layer - view->u.tex.first_layer + 1;
818 jit_tex->base_ptr += view->u.tex.first_layer *
819 swr->qpitch * swr->pitch;
820 } else {
821 unsigned view_blocksize = util_format_get_blocksize(view->format);
822 jit_tex->base_ptr += view->u.buf.offset;
823 jit_tex->width = view->u.buf.size / view_blocksize;
824 jit_tex->depth = 1;
825 }
826
827 for (unsigned level = jit_tex->first_level;
828 level <= jit_tex->last_level;
829 level++) {
830 jit_tex->row_stride[level] = swr->pitch;
831 jit_tex->img_stride[level] = swr->qpitch * swr->pitch;
832 jit_tex->mip_offsets[level] = mip_offsets[level];
833 }
834 }
835 }
836 }
837
838 static void
839 swr_update_sampler_state(struct swr_context *ctx,
840 enum pipe_shader_type shader_type,
841 unsigned num_samplers,
842 swr_jit_sampler *samplers)
843 {
844 for (unsigned i = 0; i < num_samplers; i++) {
845 const struct pipe_sampler_state *sampler =
846 ctx->samplers[shader_type][i];
847
848 if (sampler) {
849 samplers[i].min_lod = sampler->min_lod;
850 samplers[i].max_lod = sampler->max_lod;
851 samplers[i].lod_bias = sampler->lod_bias;
852 COPY_4V(samplers[i].border_color, sampler->border_color.f);
853 }
854 }
855 }
856
857 static void
858 swr_update_constants(struct swr_context *ctx, enum pipe_shader_type shaderType)
859 {
860 swr_draw_context *pDC = &ctx->swrDC;
861
862 const float **constant;
863 uint32_t *num_constants;
864 struct swr_scratch_space *scratch;
865
866 switch (shaderType) {
867 case PIPE_SHADER_VERTEX:
868 constant = pDC->constantVS;
869 num_constants = pDC->num_constantsVS;
870 scratch = &ctx->scratch->vs_constants;
871 break;
872 case PIPE_SHADER_FRAGMENT:
873 constant = pDC->constantFS;
874 num_constants = pDC->num_constantsFS;
875 scratch = &ctx->scratch->fs_constants;
876 break;
877 case PIPE_SHADER_GEOMETRY:
878 constant = pDC->constantGS;
879 num_constants = pDC->num_constantsGS;
880 scratch = &ctx->scratch->gs_constants;
881 break;
882 default:
883 debug_printf("Unsupported shader type constants\n");
884 return;
885 }
886
887 for (UINT i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
888 const pipe_constant_buffer *cb = &ctx->constants[shaderType][i];
889 num_constants[i] = cb->buffer_size;
890 if (cb->buffer) {
891 constant[i] =
892 (const float *)(swr_resource_data(cb->buffer) +
893 cb->buffer_offset);
894 } else {
895 /* Need to copy these constants to scratch space */
896 if (cb->user_buffer && cb->buffer_size) {
897 const void *ptr =
898 ((const uint8_t *)cb->user_buffer + cb->buffer_offset);
899 uint32_t size = AlignUp(cb->buffer_size, 4);
900 ptr = swr_copy_to_scratch_space(ctx, scratch, ptr, size);
901 constant[i] = (const float *)ptr;
902 }
903 }
904 }
905 }
906
907 static bool
908 swr_change_rt(struct swr_context *ctx,
909 unsigned attachment,
910 const struct pipe_surface *sf)
911 {
912 swr_draw_context *pDC = &ctx->swrDC;
913 struct SWR_SURFACE_STATE *rt = &pDC->renderTargets[attachment];
914
915 /* Do nothing if the render target hasn't changed */
916 if ((!sf || !sf->texture) && rt->pBaseAddress == nullptr)
917 return false;
918
919 /* Deal with disabling RT up front */
920 if (!sf || !sf->texture) {
921 /* If detaching attachment, mark tiles as RESOLVED so core
922 * won't try to load from non-existent target. */
923 swr_store_render_target(&ctx->pipe, attachment, SWR_TILE_RESOLVED);
924 *rt = {0};
925 return true;
926 }
927
928 const struct swr_resource *swr = swr_resource(sf->texture);
929 const SWR_SURFACE_STATE *swr_surface = &swr->swr;
930 SWR_FORMAT fmt = mesa_to_swr_format(sf->format);
931
932 if (attachment == SWR_ATTACHMENT_STENCIL && swr->secondary.pBaseAddress) {
933 swr_surface = &swr->secondary;
934 fmt = swr_surface->format;
935 }
936
937 if (rt->pBaseAddress == swr_surface->pBaseAddress &&
938 rt->format == fmt &&
939 rt->lod == sf->u.tex.level &&
940 rt->arrayIndex == sf->u.tex.first_layer)
941 return false;
942
943 bool need_fence = false;
944
945 /* StoreTile for changed target */
946 if (rt->pBaseAddress) {
947 /* If changing attachment to a new target, mark tiles as
948 * INVALID so they are reloaded from surface. */
949 swr_store_render_target(&ctx->pipe, attachment, SWR_TILE_INVALID);
950 need_fence = true;
951 }
952
953 /* Make new attachment */
954 *rt = *swr_surface;
955 rt->format = fmt;
956 rt->lod = sf->u.tex.level;
957 rt->arrayIndex = sf->u.tex.first_layer;
958
959 return need_fence;
960 }
961
962 static inline void
963 swr_user_vbuf_range(const struct pipe_draw_info *info,
964 const struct swr_vertex_element_state *velems,
965 const struct pipe_vertex_buffer *vb,
966 uint32_t i,
967 uint32_t *totelems,
968 uint32_t *base,
969 uint32_t *size)
970 {
971 /* FIXME: The size is too large - we don't access the full extra stride. */
972 unsigned elems;
973 if (velems->instanced_bufs & (1U << i)) {
974 elems = info->instance_count / velems->min_instance_div[i] + 1;
975 *totelems = info->start_instance + elems;
976 *base = info->start_instance * vb->stride;
977 *size = elems * vb->stride;
978 } else if (vb->stride) {
979 elems = info->max_index - info->min_index + 1;
980 *totelems = info->max_index + 1;
981 *base = info->min_index * vb->stride;
982 *size = elems * vb->stride;
983 } else {
984 *totelems = 1;
985 *base = 0;
986 *size = velems->stream_pitch[i];
987 }
988 }
989
990 static void
991 swr_update_poly_stipple(struct swr_context *ctx)
992 {
993 struct swr_draw_context *pDC = &ctx->swrDC;
994
995 assert(sizeof(ctx->poly_stipple.pipe.stipple) == sizeof(pDC->polyStipple));
996 memcpy(pDC->polyStipple,
997 ctx->poly_stipple.pipe.stipple,
998 sizeof(ctx->poly_stipple.pipe.stipple));
999 }
1000
1001 void
1002 swr_update_derived(struct pipe_context *pipe,
1003 const struct pipe_draw_info *p_draw_info)
1004 {
1005 struct swr_context *ctx = swr_context(pipe);
1006 struct swr_screen *screen = swr_screen(pipe->screen);
1007
1008 /* When called from swr_clear (p_draw_info = null), set any null
1009 * state-objects to the dummy state objects to prevent nullptr dereference
1010 * in validation below.
1011 *
1012 * Important that this remains static for zero initialization. These
1013 * aren't meant to be proper state objects, just empty structs. They will
1014 * not be written to.
1015 *
1016 * Shaders can't be part of the union since they contain std::unordered_map
1017 */
1018 static struct {
1019 union {
1020 struct pipe_rasterizer_state rasterizer;
1021 struct pipe_depth_stencil_alpha_state depth_stencil;
1022 struct swr_blend_state blend;
1023 } state;
1024 struct swr_vertex_shader vs;
1025 struct swr_fragment_shader fs;
1026 } swr_dummy;
1027
1028 if (!p_draw_info) {
1029 if (!ctx->rasterizer)
1030 ctx->rasterizer = &swr_dummy.state.rasterizer;
1031 if (!ctx->depth_stencil)
1032 ctx->depth_stencil = &swr_dummy.state.depth_stencil;
1033 if (!ctx->blend)
1034 ctx->blend = &swr_dummy.state.blend;
1035 if (!ctx->vs)
1036 ctx->vs = &swr_dummy.vs;
1037 if (!ctx->fs)
1038 ctx->fs = &swr_dummy.fs;
1039 }
1040
1041 /* Update screen->pipe to current pipe context. */
1042 if (screen->pipe != pipe)
1043 screen->pipe = pipe;
1044
1045 /* Any state that requires dirty flags to be re-triggered sets this mask */
1046 /* For example, user_buffer vertex and index buffers. */
1047 unsigned post_update_dirty_flags = 0;
1048
1049 /* Render Targets */
1050 if (ctx->dirty & SWR_NEW_FRAMEBUFFER) {
1051 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
1052 const struct util_format_description *desc = NULL;
1053 bool need_fence = false;
1054
1055 /* colorbuffer targets */
1056 if (fb->nr_cbufs) {
1057 for (unsigned i = 0; i < fb->nr_cbufs; ++i)
1058 need_fence |= swr_change_rt(
1059 ctx, SWR_ATTACHMENT_COLOR0 + i, fb->cbufs[i]);
1060 }
1061 for (unsigned i = fb->nr_cbufs; i < SWR_NUM_RENDERTARGETS; ++i)
1062 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_COLOR0 + i, NULL);
1063
1064 /* depth/stencil target */
1065 if (fb->zsbuf)
1066 desc = util_format_description(fb->zsbuf->format);
1067 if (fb->zsbuf && util_format_has_depth(desc))
1068 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_DEPTH, fb->zsbuf);
1069 else
1070 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_DEPTH, NULL);
1071
1072 if (fb->zsbuf && util_format_has_stencil(desc))
1073 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_STENCIL, fb->zsbuf);
1074 else
1075 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_STENCIL, NULL);
1076
1077 /* This fence ensures any attachment changes are resolved before the
1078 * next draw */
1079 if (need_fence)
1080 swr_fence_submit(ctx, screen->flush_fence);
1081 }
1082
1083 /* Raster state */
1084 if (ctx->dirty & (SWR_NEW_RASTERIZER |
1085 SWR_NEW_VS | // clipping
1086 SWR_NEW_FRAMEBUFFER)) {
1087 pipe_rasterizer_state *rasterizer = ctx->rasterizer;
1088 pipe_framebuffer_state *fb = &ctx->framebuffer;
1089
1090 SWR_RASTSTATE *rastState = &ctx->derived.rastState;
1091 rastState->cullMode = swr_convert_cull_mode(rasterizer->cull_face);
1092 rastState->frontWinding = rasterizer->front_ccw
1093 ? SWR_FRONTWINDING_CCW
1094 : SWR_FRONTWINDING_CW;
1095 rastState->scissorEnable = rasterizer->scissor;
1096 rastState->pointSize = rasterizer->point_size > 0.0f
1097 ? rasterizer->point_size
1098 : 1.0f;
1099 rastState->lineWidth = rasterizer->line_width > 0.0f
1100 ? rasterizer->line_width
1101 : 1.0f;
1102
1103 rastState->pointParam = rasterizer->point_size_per_vertex;
1104
1105 rastState->pointSpriteEnable = rasterizer->sprite_coord_enable;
1106 rastState->pointSpriteTopOrigin =
1107 rasterizer->sprite_coord_mode == PIPE_SPRITE_COORD_UPPER_LEFT;
1108
1109 /* If SWR_MSAA_FORCE_ENABLE is set, turn msaa on */
1110 if (screen->msaa_force_enable && !rasterizer->multisample) {
1111 /* Force enable and use the value the surface was created with */
1112 rasterizer->multisample = true;
1113 fb->samples = swr_resource(fb->cbufs[0]->texture)->swr.numSamples;
1114 fprintf(stderr,"msaa force enable: %d samples\n", fb->samples);
1115 }
1116
1117 rastState->sampleCount = GetSampleCount(fb->samples);
1118 rastState->forcedSampleCount = false;
1119 rastState->bIsCenterPattern = !rasterizer->multisample;
1120 rastState->pixelLocation = SWR_PIXEL_LOCATION_CENTER;
1121
1122 /* Only initialize sample positions if msaa is enabled */
1123 if (rasterizer->multisample) {
1124 for (uint32_t i = 0; i < fb->samples; i++) {
1125 const uint8_t *sample = swr_sample_positions[fb->samples-1 + i];
1126 rastState->samplePositions.SetXi(i, sample[0] << 4);
1127 rastState->samplePositions.SetYi(i, sample[1] << 4);
1128 rastState->samplePositions.SetX (i, sample[0] / 16.0f);
1129 rastState->samplePositions.SetY (i, sample[1] / 16.0f);
1130 }
1131 rastState->samplePositions.PrecalcSampleData(fb->samples);
1132 }
1133
1134 bool do_offset = false;
1135 switch (rasterizer->fill_front) {
1136 case PIPE_POLYGON_MODE_FILL:
1137 do_offset = rasterizer->offset_tri;
1138 break;
1139 case PIPE_POLYGON_MODE_LINE:
1140 do_offset = rasterizer->offset_line;
1141 break;
1142 case PIPE_POLYGON_MODE_POINT:
1143 do_offset = rasterizer->offset_point;
1144 break;
1145 }
1146
1147 if (do_offset) {
1148 rastState->depthBias = rasterizer->offset_units;
1149 rastState->slopeScaledDepthBias = rasterizer->offset_scale;
1150 rastState->depthBiasClamp = rasterizer->offset_clamp;
1151 } else {
1152 rastState->depthBias = 0;
1153 rastState->slopeScaledDepthBias = 0;
1154 rastState->depthBiasClamp = 0;
1155 }
1156 struct pipe_surface *zb = fb->zsbuf;
1157 if (zb && swr_resource(zb->texture)->has_depth)
1158 rastState->depthFormat = swr_resource(zb->texture)->swr.format;
1159
1160 rastState->depthClipEnable = rasterizer->depth_clip;
1161 rastState->clipHalfZ = rasterizer->clip_halfz;
1162
1163 rastState->clipDistanceMask =
1164 ctx->vs->info.base.num_written_clipdistance ?
1165 ctx->vs->info.base.clipdist_writemask & rasterizer->clip_plane_enable :
1166 rasterizer->clip_plane_enable;
1167
1168 rastState->cullDistanceMask =
1169 ctx->vs->info.base.culldist_writemask << ctx->vs->info.base.num_written_clipdistance;
1170
1171 SwrSetRastState(ctx->swrContext, rastState);
1172 }
1173
1174 /* Scissor */
1175 if (ctx->dirty & SWR_NEW_SCISSOR) {
1176 SwrSetScissorRects(ctx->swrContext, 1, &ctx->swr_scissor);
1177 }
1178
1179 /* Viewport */
1180 if (ctx->dirty & (SWR_NEW_VIEWPORT | SWR_NEW_FRAMEBUFFER
1181 | SWR_NEW_RASTERIZER)) {
1182 pipe_viewport_state *state = &ctx->viewport;
1183 pipe_framebuffer_state *fb = &ctx->framebuffer;
1184 pipe_rasterizer_state *rasterizer = ctx->rasterizer;
1185
1186 SWR_VIEWPORT *vp = &ctx->derived.vp;
1187 SWR_VIEWPORT_MATRICES *vpm = &ctx->derived.vpm;
1188
1189 vp->x = state->translate[0] - state->scale[0];
1190 vp->width = 2 * state->scale[0];
1191 vp->y = state->translate[1] - fabs(state->scale[1]);
1192 vp->height = 2 * fabs(state->scale[1]);
1193 util_viewport_zmin_zmax(state, rasterizer->clip_halfz,
1194 &vp->minZ, &vp->maxZ);
1195
1196 vpm->m00[0] = state->scale[0];
1197 vpm->m11[0] = state->scale[1];
1198 vpm->m22[0] = state->scale[2];
1199 vpm->m30[0] = state->translate[0];
1200 vpm->m31[0] = state->translate[1];
1201 vpm->m32[0] = state->translate[2];
1202
1203 /* Now that the matrix is calculated, clip the view coords to screen
1204 * size. OpenGL allows for -ve x,y in the viewport. */
1205 if (vp->x < 0.0f) {
1206 vp->width += vp->x;
1207 vp->x = 0.0f;
1208 }
1209 if (vp->y < 0.0f) {
1210 vp->height += vp->y;
1211 vp->y = 0.0f;
1212 }
1213 vp->width = std::min(vp->width, (float)fb->width - vp->x);
1214 vp->height = std::min(vp->height, (float)fb->height - vp->y);
1215
1216 SwrSetViewports(ctx->swrContext, 1, vp, vpm);
1217 }
1218
1219 /* Set vertex & index buffers */
1220 /* (using draw info if called by swr_draw_vbo) */
1221 if (ctx->dirty & SWR_NEW_VERTEX) {
1222 uint32_t scratch_total;
1223 uint8_t *scratch = NULL;
1224
1225 /* If being called by swr_draw_vbo, copy draw details */
1226 struct pipe_draw_info info = {0};
1227 if (p_draw_info)
1228 info = *p_draw_info;
1229
1230 /* We must get all the scratch space in one go */
1231 scratch_total = 0;
1232 for (UINT i = 0; i < ctx->num_vertex_buffers; i++) {
1233 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
1234
1235 if (!vb->user_buffer)
1236 continue;
1237
1238 uint32_t elems, base, size;
1239 swr_user_vbuf_range(&info, ctx->velems, vb, i, &elems, &base, &size);
1240 scratch_total += AlignUp(size, 4);
1241 }
1242
1243 if (scratch_total) {
1244 scratch = (uint8_t *)swr_copy_to_scratch_space(
1245 ctx, &ctx->scratch->vertex_buffer, NULL, scratch_total);
1246 }
1247
1248 /* vertex buffers */
1249 SWR_VERTEX_BUFFER_STATE swrVertexBuffers[PIPE_MAX_ATTRIBS];
1250 for (UINT i = 0; i < ctx->num_vertex_buffers; i++) {
1251 uint32_t size, pitch, elems, partial_inbounds;
1252 uint32_t min_vertex_index;
1253 const uint8_t *p_data;
1254 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
1255
1256 pitch = vb->stride;
1257 if (!vb->user_buffer) {
1258 /* VBO
1259 * size is based on buffer->width0 rather than info.max_index
1260 * to prevent having to validate VBO on each draw */
1261 size = vb->buffer->width0;
1262 elems = size / pitch;
1263 partial_inbounds = size % pitch;
1264 min_vertex_index = 0;
1265
1266 p_data = swr_resource_data(vb->buffer) + vb->buffer_offset;
1267 } else {
1268 /* Client buffer
1269 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
1270 * revalidate on each draw */
1271 post_update_dirty_flags |= SWR_NEW_VERTEX;
1272
1273 uint32_t base;
1274 swr_user_vbuf_range(&info, ctx->velems, vb, i, &elems, &base, &size);
1275 partial_inbounds = 0;
1276 min_vertex_index = info.min_index;
1277
1278 /* Copy only needed vertices to scratch space */
1279 size = AlignUp(size, 4);
1280 const void *ptr = (const uint8_t *) vb->user_buffer + base;
1281 memcpy(scratch, ptr, size);
1282 ptr = scratch;
1283 scratch += size;
1284 p_data = (const uint8_t *)ptr - base;
1285 }
1286
1287 swrVertexBuffers[i] = {0};
1288 swrVertexBuffers[i].index = i;
1289 swrVertexBuffers[i].pitch = pitch;
1290 swrVertexBuffers[i].pData = p_data;
1291 swrVertexBuffers[i].size = size;
1292 swrVertexBuffers[i].minVertex = min_vertex_index;
1293 swrVertexBuffers[i].maxVertex = elems;
1294 swrVertexBuffers[i].partialInboundsSize = partial_inbounds;
1295 }
1296
1297 SwrSetVertexBuffers(
1298 ctx->swrContext, ctx->num_vertex_buffers, swrVertexBuffers);
1299
1300 /* index buffer, if required (info passed in by swr_draw_vbo) */
1301 SWR_FORMAT index_type = R32_UINT; /* Default for non-indexed draws */
1302 if (info.indexed) {
1303 const uint8_t *p_data;
1304 uint32_t size, pitch;
1305 struct pipe_index_buffer *ib = &ctx->index_buffer;
1306
1307 pitch = ib->index_size ? ib->index_size : sizeof(uint32_t);
1308 index_type = swr_convert_index_type(pitch);
1309
1310 if (!ib->user_buffer) {
1311 /* VBO
1312 * size is based on buffer->width0 rather than info.count
1313 * to prevent having to validate VBO on each draw */
1314 size = ib->buffer->width0;
1315 p_data = swr_resource_data(ib->buffer) + ib->offset;
1316 } else {
1317 /* Client buffer
1318 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
1319 * revalidate on each draw */
1320 post_update_dirty_flags |= SWR_NEW_VERTEX;
1321
1322 size = info.count * pitch;
1323 size = AlignUp(size, 4);
1324
1325 /* Copy indices to scratch space */
1326 const void *ptr = ib->user_buffer;
1327 ptr = swr_copy_to_scratch_space(
1328 ctx, &ctx->scratch->index_buffer, ptr, size);
1329 p_data = (const uint8_t *)ptr;
1330 }
1331
1332 SWR_INDEX_BUFFER_STATE swrIndexBuffer;
1333 swrIndexBuffer.format = swr_convert_index_type(ib->index_size);
1334 swrIndexBuffer.pIndices = p_data;
1335 swrIndexBuffer.size = size;
1336
1337 SwrSetIndexBuffer(ctx->swrContext, &swrIndexBuffer);
1338 }
1339
1340 struct swr_vertex_element_state *velems = ctx->velems;
1341 if (velems && velems->fsState.indexType != index_type) {
1342 velems->fsFunc = NULL;
1343 velems->fsState.indexType = index_type;
1344 }
1345 }
1346
1347 /* GeometryShader */
1348 if (ctx->dirty & (SWR_NEW_GS |
1349 SWR_NEW_VS |
1350 SWR_NEW_SAMPLER |
1351 SWR_NEW_SAMPLER_VIEW)) {
1352 if (ctx->gs) {
1353 swr_jit_gs_key key;
1354 swr_generate_gs_key(key, ctx, ctx->gs);
1355 auto search = ctx->gs->map.find(key);
1356 PFN_GS_FUNC func;
1357 if (search != ctx->gs->map.end()) {
1358 func = search->second->shader;
1359 } else {
1360 func = swr_compile_gs(ctx, key);
1361 }
1362 SwrSetGsFunc(ctx->swrContext, func);
1363
1364 /* JIT sampler state */
1365 if (ctx->dirty & SWR_NEW_SAMPLER) {
1366 swr_update_sampler_state(ctx,
1367 PIPE_SHADER_GEOMETRY,
1368 key.nr_samplers,
1369 ctx->swrDC.samplersGS);
1370 }
1371
1372 /* JIT sampler view state */
1373 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1374 swr_update_texture_state(ctx,
1375 PIPE_SHADER_GEOMETRY,
1376 key.nr_sampler_views,
1377 ctx->swrDC.texturesGS);
1378 }
1379
1380 SwrSetGsState(ctx->swrContext, &ctx->gs->gsState);
1381 } else {
1382 SWR_GS_STATE state = { 0 };
1383 SwrSetGsState(ctx->swrContext, &state);
1384 SwrSetGsFunc(ctx->swrContext, NULL);
1385 }
1386 }
1387
1388 /* VertexShader */
1389 if (ctx->dirty & (SWR_NEW_VS |
1390 SWR_NEW_RASTERIZER | // for clip planes
1391 SWR_NEW_SAMPLER |
1392 SWR_NEW_SAMPLER_VIEW |
1393 SWR_NEW_FRAMEBUFFER)) {
1394 swr_jit_vs_key key;
1395 swr_generate_vs_key(key, ctx, ctx->vs);
1396 auto search = ctx->vs->map.find(key);
1397 PFN_VERTEX_FUNC func;
1398 if (search != ctx->vs->map.end()) {
1399 func = search->second->shader;
1400 } else {
1401 func = swr_compile_vs(ctx, key);
1402 }
1403 SwrSetVertexFunc(ctx->swrContext, func);
1404
1405 /* JIT sampler state */
1406 if (ctx->dirty & SWR_NEW_SAMPLER) {
1407 swr_update_sampler_state(ctx,
1408 PIPE_SHADER_VERTEX,
1409 key.nr_samplers,
1410 ctx->swrDC.samplersVS);
1411 }
1412
1413 /* JIT sampler view state */
1414 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1415 swr_update_texture_state(ctx,
1416 PIPE_SHADER_VERTEX,
1417 key.nr_sampler_views,
1418 ctx->swrDC.texturesVS);
1419 }
1420 }
1421
1422 /* work around the fact that poly stipple also affects lines */
1423 /* and points, since we rasterize them as triangles, too */
1424 /* Has to be before fragment shader, since it sets SWR_NEW_FS */
1425 if (p_draw_info) {
1426 bool new_prim_is_poly = (u_reduced_prim(p_draw_info->mode) == PIPE_PRIM_TRIANGLES);
1427 if (new_prim_is_poly != ctx->poly_stipple.prim_is_poly) {
1428 ctx->dirty |= SWR_NEW_FS;
1429 ctx->poly_stipple.prim_is_poly = new_prim_is_poly;
1430 }
1431 }
1432
1433 /* FragmentShader */
1434 if (ctx->dirty & (SWR_NEW_FS |
1435 SWR_NEW_VS |
1436 SWR_NEW_GS |
1437 SWR_NEW_RASTERIZER |
1438 SWR_NEW_SAMPLER |
1439 SWR_NEW_SAMPLER_VIEW |
1440 SWR_NEW_FRAMEBUFFER)) {
1441 swr_jit_fs_key key;
1442 swr_generate_fs_key(key, ctx, ctx->fs);
1443 auto search = ctx->fs->map.find(key);
1444 PFN_PIXEL_KERNEL func;
1445 if (search != ctx->fs->map.end()) {
1446 func = search->second->shader;
1447 } else {
1448 func = swr_compile_fs(ctx, key);
1449 }
1450 SWR_PS_STATE psState = {0};
1451 psState.pfnPixelShader = func;
1452 psState.killsPixel = ctx->fs->info.base.uses_kill;
1453 psState.inputCoverage = SWR_INPUT_COVERAGE_NORMAL;
1454 psState.writesODepth = ctx->fs->info.base.writes_z;
1455 psState.usesSourceDepth = ctx->fs->info.base.reads_z;
1456 psState.shadingRate = SWR_SHADING_RATE_PIXEL;
1457 psState.numRenderTargets = ctx->framebuffer.nr_cbufs;
1458 psState.posOffset = SWR_PS_POSITION_SAMPLE_NONE;
1459 uint32_t barycentricsMask = 0;
1460 #if 0
1461 // when we switch to mesa-master
1462 if (ctx->fs->info.base.uses_persp_center ||
1463 ctx->fs->info.base.uses_linear_center)
1464 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1465 if (ctx->fs->info.base.uses_persp_centroid ||
1466 ctx->fs->info.base.uses_linear_centroid)
1467 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1468 if (ctx->fs->info.base.uses_persp_sample ||
1469 ctx->fs->info.base.uses_linear_sample)
1470 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1471 #else
1472 for (unsigned i = 0; i < ctx->fs->info.base.num_inputs; i++) {
1473 switch (ctx->fs->info.base.input_interpolate_loc[i]) {
1474 case TGSI_INTERPOLATE_LOC_CENTER:
1475 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1476 break;
1477 case TGSI_INTERPOLATE_LOC_CENTROID:
1478 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1479 break;
1480 case TGSI_INTERPOLATE_LOC_SAMPLE:
1481 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1482 break;
1483 }
1484 }
1485 #endif
1486 psState.barycentricsMask = barycentricsMask;
1487 psState.usesUAV = false; // XXX
1488 psState.forceEarlyZ = false;
1489 SwrSetPixelShaderState(ctx->swrContext, &psState);
1490
1491 /* JIT sampler state */
1492 if (ctx->dirty & (SWR_NEW_SAMPLER |
1493 SWR_NEW_FS)) {
1494 swr_update_sampler_state(ctx,
1495 PIPE_SHADER_FRAGMENT,
1496 key.nr_samplers,
1497 ctx->swrDC.samplersFS);
1498 }
1499
1500 /* JIT sampler view state */
1501 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW |
1502 SWR_NEW_FRAMEBUFFER |
1503 SWR_NEW_FS)) {
1504 swr_update_texture_state(ctx,
1505 PIPE_SHADER_FRAGMENT,
1506 key.nr_sampler_views,
1507 ctx->swrDC.texturesFS);
1508 }
1509 }
1510
1511
1512 /* VertexShader Constants */
1513 if (ctx->dirty & SWR_NEW_VSCONSTANTS) {
1514 swr_update_constants(ctx, PIPE_SHADER_VERTEX);
1515 }
1516
1517 /* FragmentShader Constants */
1518 if (ctx->dirty & SWR_NEW_FSCONSTANTS) {
1519 swr_update_constants(ctx, PIPE_SHADER_FRAGMENT);
1520 }
1521
1522 /* GeometryShader Constants */
1523 if (ctx->dirty & SWR_NEW_GSCONSTANTS) {
1524 swr_update_constants(ctx, PIPE_SHADER_GEOMETRY);
1525 }
1526
1527 /* Depth/stencil state */
1528 if (ctx->dirty & (SWR_NEW_DEPTH_STENCIL_ALPHA | SWR_NEW_FRAMEBUFFER)) {
1529 struct pipe_depth_state *depth = &(ctx->depth_stencil->depth);
1530 struct pipe_stencil_state *stencil = ctx->depth_stencil->stencil;
1531 SWR_DEPTH_STENCIL_STATE depthStencilState = {{0}};
1532 SWR_DEPTH_BOUNDS_STATE depthBoundsState = {0};
1533
1534 /* XXX, incomplete. Need to flesh out stencil & alpha test state
1535 struct pipe_stencil_state *front_stencil =
1536 ctx->depth_stencil.stencil[0];
1537 struct pipe_stencil_state *back_stencil = ctx->depth_stencil.stencil[1];
1538 struct pipe_alpha_state alpha;
1539 */
1540 if (stencil[0].enabled) {
1541 depthStencilState.stencilWriteEnable = 1;
1542 depthStencilState.stencilTestEnable = 1;
1543 depthStencilState.stencilTestFunc =
1544 swr_convert_depth_func(stencil[0].func);
1545
1546 depthStencilState.stencilPassDepthPassOp =
1547 swr_convert_stencil_op(stencil[0].zpass_op);
1548 depthStencilState.stencilPassDepthFailOp =
1549 swr_convert_stencil_op(stencil[0].zfail_op);
1550 depthStencilState.stencilFailOp =
1551 swr_convert_stencil_op(stencil[0].fail_op);
1552 depthStencilState.stencilWriteMask = stencil[0].writemask;
1553 depthStencilState.stencilTestMask = stencil[0].valuemask;
1554 depthStencilState.stencilRefValue = ctx->stencil_ref.ref_value[0];
1555 }
1556 if (stencil[1].enabled) {
1557 depthStencilState.doubleSidedStencilTestEnable = 1;
1558
1559 depthStencilState.backfaceStencilTestFunc =
1560 swr_convert_depth_func(stencil[1].func);
1561
1562 depthStencilState.backfaceStencilPassDepthPassOp =
1563 swr_convert_stencil_op(stencil[1].zpass_op);
1564 depthStencilState.backfaceStencilPassDepthFailOp =
1565 swr_convert_stencil_op(stencil[1].zfail_op);
1566 depthStencilState.backfaceStencilFailOp =
1567 swr_convert_stencil_op(stencil[1].fail_op);
1568 depthStencilState.backfaceStencilWriteMask = stencil[1].writemask;
1569 depthStencilState.backfaceStencilTestMask = stencil[1].valuemask;
1570
1571 depthStencilState.backfaceStencilRefValue =
1572 ctx->stencil_ref.ref_value[1];
1573 }
1574
1575 depthStencilState.depthTestEnable = depth->enabled;
1576 depthStencilState.depthTestFunc = swr_convert_depth_func(depth->func);
1577 depthStencilState.depthWriteEnable = depth->writemask;
1578 SwrSetDepthStencilState(ctx->swrContext, &depthStencilState);
1579
1580 depthBoundsState.depthBoundsTestEnable = depth->bounds_test;
1581 depthBoundsState.depthBoundsTestMinValue = depth->bounds_min;
1582 depthBoundsState.depthBoundsTestMaxValue = depth->bounds_max;
1583 SwrSetDepthBoundsState(ctx->swrContext, &depthBoundsState);
1584 }
1585
1586 /* Blend State */
1587 if (ctx->dirty & (SWR_NEW_BLEND |
1588 SWR_NEW_RASTERIZER |
1589 SWR_NEW_FRAMEBUFFER |
1590 SWR_NEW_DEPTH_STENCIL_ALPHA)) {
1591 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
1592
1593 SWR_BLEND_STATE blendState;
1594 memcpy(&blendState, &ctx->blend->blendState, sizeof(blendState));
1595 blendState.constantColor[0] = ctx->blend_color.color[0];
1596 blendState.constantColor[1] = ctx->blend_color.color[1];
1597 blendState.constantColor[2] = ctx->blend_color.color[2];
1598 blendState.constantColor[3] = ctx->blend_color.color[3];
1599 blendState.alphaTestReference =
1600 *((uint32_t*)&ctx->depth_stencil->alpha.ref_value);
1601
1602 blendState.sampleMask = ctx->sample_mask;
1603 blendState.sampleCount = GetSampleCount(fb->samples);
1604
1605 /* If there are no color buffers bound, disable writes on RT0
1606 * and skip loop */
1607 if (fb->nr_cbufs == 0) {
1608 blendState.renderTarget[0].writeDisableRed = 1;
1609 blendState.renderTarget[0].writeDisableGreen = 1;
1610 blendState.renderTarget[0].writeDisableBlue = 1;
1611 blendState.renderTarget[0].writeDisableAlpha = 1;
1612 SwrSetBlendFunc(ctx->swrContext, 0, NULL);
1613 }
1614 else
1615 for (int target = 0;
1616 target < std::min(SWR_NUM_RENDERTARGETS,
1617 PIPE_MAX_COLOR_BUFS);
1618 target++) {
1619 if (!fb->cbufs[target])
1620 continue;
1621
1622 struct swr_resource *colorBuffer =
1623 swr_resource(fb->cbufs[target]->texture);
1624
1625 BLEND_COMPILE_STATE compileState;
1626 memset(&compileState, 0, sizeof(compileState));
1627 compileState.format = colorBuffer->swr.format;
1628 memcpy(&compileState.blendState,
1629 &ctx->blend->compileState[target],
1630 sizeof(compileState.blendState));
1631
1632 const SWR_FORMAT_INFO& info = GetFormatInfo(compileState.format);
1633 if (compileState.blendState.logicOpEnable &&
1634 ((info.type[0] == SWR_TYPE_FLOAT) || info.isSRGB)) {
1635 compileState.blendState.logicOpEnable = false;
1636 }
1637
1638 if (info.type[0] == SWR_TYPE_SINT || info.type[0] == SWR_TYPE_UINT)
1639 compileState.blendState.blendEnable = false;
1640
1641 if (compileState.blendState.blendEnable == false &&
1642 compileState.blendState.logicOpEnable == false &&
1643 ctx->depth_stencil->alpha.enabled == 0) {
1644 SwrSetBlendFunc(ctx->swrContext, target, NULL);
1645 continue;
1646 }
1647
1648 compileState.desc.alphaTestEnable =
1649 ctx->depth_stencil->alpha.enabled;
1650 compileState.desc.independentAlphaBlendEnable =
1651 (compileState.blendState.sourceBlendFactor !=
1652 compileState.blendState.sourceAlphaBlendFactor) ||
1653 (compileState.blendState.destBlendFactor !=
1654 compileState.blendState.destAlphaBlendFactor) ||
1655 (compileState.blendState.colorBlendFunc !=
1656 compileState.blendState.alphaBlendFunc);
1657 compileState.desc.alphaToCoverageEnable =
1658 ctx->blend->pipe.alpha_to_coverage;
1659 compileState.desc.sampleMaskEnable = (blendState.sampleMask != 0);
1660 compileState.desc.numSamples = fb->samples;
1661
1662 compileState.alphaTestFunction =
1663 swr_convert_depth_func(ctx->depth_stencil->alpha.func);
1664 compileState.alphaTestFormat = ALPHA_TEST_FLOAT32; // xxx
1665
1666 compileState.Canonicalize();
1667
1668 PFN_BLEND_JIT_FUNC func = NULL;
1669 auto search = ctx->blendJIT->find(compileState);
1670 if (search != ctx->blendJIT->end()) {
1671 func = search->second;
1672 } else {
1673 HANDLE hJitMgr = screen->hJitMgr;
1674 func = JitCompileBlend(hJitMgr, compileState);
1675 debug_printf("BLEND shader %p\n", func);
1676 assert(func && "Error: BlendShader = NULL");
1677
1678 ctx->blendJIT->insert(std::make_pair(compileState, func));
1679 }
1680 SwrSetBlendFunc(ctx->swrContext, target, func);
1681 }
1682
1683 SwrSetBlendState(ctx->swrContext, &blendState);
1684 }
1685
1686 if (ctx->dirty & SWR_NEW_STIPPLE) {
1687 swr_update_poly_stipple(ctx);
1688 }
1689
1690 if (ctx->dirty & (SWR_NEW_VS | SWR_NEW_SO | SWR_NEW_RASTERIZER)) {
1691 ctx->vs->soState.rasterizerDisable =
1692 ctx->rasterizer->rasterizer_discard;
1693 SwrSetSoState(ctx->swrContext, &ctx->vs->soState);
1694
1695 pipe_stream_output_info *stream_output = &ctx->vs->pipe.stream_output;
1696
1697 for (uint32_t i = 0; i < ctx->num_so_targets; i++) {
1698 SWR_STREAMOUT_BUFFER buffer = {0};
1699 if (!ctx->so_targets[i])
1700 continue;
1701 buffer.enable = true;
1702 buffer.pBuffer =
1703 (uint32_t *)(swr_resource_data(ctx->so_targets[i]->buffer) +
1704 ctx->so_targets[i]->buffer_offset);
1705 buffer.bufferSize = ctx->so_targets[i]->buffer_size >> 2;
1706 buffer.pitch = stream_output->stride[i];
1707 buffer.streamOffset = 0;
1708
1709 SwrSetSoBuffers(ctx->swrContext, &buffer, i);
1710 }
1711 }
1712
1713 if (ctx->dirty & (SWR_NEW_CLIP | SWR_NEW_RASTERIZER | SWR_NEW_VS)) {
1714 // shader exporting clip distances overrides all user clip planes
1715 if (ctx->rasterizer->clip_plane_enable &&
1716 !ctx->vs->info.base.num_written_clipdistance)
1717 {
1718 swr_draw_context *pDC = &ctx->swrDC;
1719 memcpy(pDC->userClipPlanes,
1720 ctx->clip.ucp,
1721 sizeof(pDC->userClipPlanes));
1722 }
1723 }
1724
1725 // set up backend state
1726 SWR_BACKEND_STATE backendState = {0};
1727 backendState.numAttributes =
1728 ((ctx->gs ? ctx->gs->info.base.num_outputs : ctx->vs->info.base.num_outputs) - 1) +
1729 (ctx->rasterizer->sprite_coord_enable ? 1 : 0);
1730 backendState.numAttributes = std::min((size_t)backendState.numAttributes,
1731 sizeof(backendState.numComponents));
1732 for (unsigned i = 0; i < backendState.numAttributes; i++)
1733 backendState.numComponents[i] = 4;
1734 backendState.constantInterpolationMask = ctx->fs->constantMask |
1735 (ctx->rasterizer->flatshade ? ctx->fs->flatConstantMask : 0);
1736 backendState.pointSpriteTexCoordMask = ctx->fs->pointSpriteMask;
1737
1738 SwrSetBackendState(ctx->swrContext, &backendState);
1739
1740 /* Ensure that any in-progress attachment change StoreTiles finish */
1741 if (swr_is_fence_pending(screen->flush_fence))
1742 swr_fence_finish(pipe->screen, NULL, screen->flush_fence, 0);
1743
1744 /* Finally, update the in-use status of all resources involved in draw */
1745 swr_update_resource_status(pipe, p_draw_info);
1746
1747 ctx->dirty = post_update_dirty_flags;
1748 }
1749
1750
1751 static struct pipe_stream_output_target *
1752 swr_create_so_target(struct pipe_context *pipe,
1753 struct pipe_resource *buffer,
1754 unsigned buffer_offset,
1755 unsigned buffer_size)
1756 {
1757 struct pipe_stream_output_target *target;
1758
1759 target = CALLOC_STRUCT(pipe_stream_output_target);
1760 if (!target)
1761 return NULL;
1762
1763 target->context = pipe;
1764 target->reference.count = 1;
1765 pipe_resource_reference(&target->buffer, buffer);
1766 target->buffer_offset = buffer_offset;
1767 target->buffer_size = buffer_size;
1768 return target;
1769 }
1770
1771 static void
1772 swr_destroy_so_target(struct pipe_context *pipe,
1773 struct pipe_stream_output_target *target)
1774 {
1775 pipe_resource_reference(&target->buffer, NULL);
1776 FREE(target);
1777 }
1778
1779 static void
1780 swr_set_so_targets(struct pipe_context *pipe,
1781 unsigned num_targets,
1782 struct pipe_stream_output_target **targets,
1783 const unsigned *offsets)
1784 {
1785 struct swr_context *swr = swr_context(pipe);
1786 uint32_t i;
1787
1788 assert(num_targets <= MAX_SO_STREAMS);
1789
1790 for (i = 0; i < num_targets; i++) {
1791 pipe_so_target_reference(
1792 (struct pipe_stream_output_target **)&swr->so_targets[i],
1793 targets[i]);
1794 }
1795
1796 for (/* fall-through */; i < swr->num_so_targets; i++) {
1797 pipe_so_target_reference(
1798 (struct pipe_stream_output_target **)&swr->so_targets[i], NULL);
1799 }
1800
1801 swr->num_so_targets = num_targets;
1802
1803 swr->dirty |= SWR_NEW_SO;
1804 }
1805
1806
1807 void
1808 swr_state_init(struct pipe_context *pipe)
1809 {
1810 pipe->create_blend_state = swr_create_blend_state;
1811 pipe->bind_blend_state = swr_bind_blend_state;
1812 pipe->delete_blend_state = swr_delete_blend_state;
1813
1814 pipe->create_depth_stencil_alpha_state = swr_create_depth_stencil_state;
1815 pipe->bind_depth_stencil_alpha_state = swr_bind_depth_stencil_state;
1816 pipe->delete_depth_stencil_alpha_state = swr_delete_depth_stencil_state;
1817
1818 pipe->create_rasterizer_state = swr_create_rasterizer_state;
1819 pipe->bind_rasterizer_state = swr_bind_rasterizer_state;
1820 pipe->delete_rasterizer_state = swr_delete_rasterizer_state;
1821
1822 pipe->create_sampler_state = swr_create_sampler_state;
1823 pipe->bind_sampler_states = swr_bind_sampler_states;
1824 pipe->delete_sampler_state = swr_delete_sampler_state;
1825
1826 pipe->create_sampler_view = swr_create_sampler_view;
1827 pipe->set_sampler_views = swr_set_sampler_views;
1828 pipe->sampler_view_destroy = swr_sampler_view_destroy;
1829
1830 pipe->create_vs_state = swr_create_vs_state;
1831 pipe->bind_vs_state = swr_bind_vs_state;
1832 pipe->delete_vs_state = swr_delete_vs_state;
1833
1834 pipe->create_fs_state = swr_create_fs_state;
1835 pipe->bind_fs_state = swr_bind_fs_state;
1836 pipe->delete_fs_state = swr_delete_fs_state;
1837
1838 pipe->create_gs_state = swr_create_gs_state;
1839 pipe->bind_gs_state = swr_bind_gs_state;
1840 pipe->delete_gs_state = swr_delete_gs_state;
1841
1842 pipe->set_constant_buffer = swr_set_constant_buffer;
1843
1844 pipe->create_vertex_elements_state = swr_create_vertex_elements_state;
1845 pipe->bind_vertex_elements_state = swr_bind_vertex_elements_state;
1846 pipe->delete_vertex_elements_state = swr_delete_vertex_elements_state;
1847
1848 pipe->set_vertex_buffers = swr_set_vertex_buffers;
1849 pipe->set_index_buffer = swr_set_index_buffer;
1850
1851 pipe->set_polygon_stipple = swr_set_polygon_stipple;
1852 pipe->set_clip_state = swr_set_clip_state;
1853 pipe->set_scissor_states = swr_set_scissor_states;
1854 pipe->set_viewport_states = swr_set_viewport_states;
1855
1856 pipe->set_framebuffer_state = swr_set_framebuffer_state;
1857
1858 pipe->set_blend_color = swr_set_blend_color;
1859 pipe->set_stencil_ref = swr_set_stencil_ref;
1860
1861 pipe->set_sample_mask = swr_set_sample_mask;
1862 pipe->get_sample_position = swr_get_sample_position;
1863
1864 pipe->create_stream_output_target = swr_create_so_target;
1865 pipe->stream_output_target_destroy = swr_destroy_so_target;
1866 pipe->set_stream_output_targets = swr_set_so_targets;
1867 }