projects / mesa.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
freedreno: Add layout_resource_for_modifier screen vfunc
[mesa.git] / src / gallium / drivers / swr / swr_state.cpp
1 /****************************************************************************
2 * Copyright (C) 2015 Intel Corporation. All Rights Reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 ***************************************************************************/
23
24 #include <llvm/Config/llvm-config.h>
25
26 #if LLVM_VERSION_MAJOR < 7
27 // llvm redefines DEBUG
28 #pragma push_macro("DEBUG")
29 #undef DEBUG
30 #endif
31
32 #include <rasterizer/core/state.h>
33 #include "JitManager.h"
34
35 #if LLVM_VERSION_MAJOR < 7
36 #pragma pop_macro("DEBUG")
37 #endif
38
39 #include "common/os.h"
40 #include "jit_api.h"
41 #include "gen_state_llvm.h"
42 #include "core/multisample.h"
43 #include "core/state_funcs.h"
44
45 #include "gallivm/lp_bld_tgsi.h"
46 #include "util/format/u_format.h"
47
48 #include "util/u_memory.h"
49 #include "util/u_inlines.h"
50 #include "util/u_helpers.h"
51 #include "util/u_framebuffer.h"
52 #include "util/u_viewport.h"
53 #include "util/u_prim.h"
54
55 #include "swr_state.h"
56 #include "swr_context.h"
57 #include "gen_surf_state_llvm.h"
58 #include "gen_swr_context_llvm.h"
59 #include "swr_screen.h"
60 #include "swr_resource.h"
61 #include "swr_tex_sample.h"
62 #include "swr_scratch.h"
63 #include "swr_shader.h"
64 #include "swr_fence.h"
65
66 /* These should be pulled out into separate files as necessary
67 * Just initializing everything here to get going. */
68
69 static void *
70 swr_create_blend_state(struct pipe_context *pipe,
71 const struct pipe_blend_state *blend)
72 {
73 struct swr_blend_state *state = CALLOC_STRUCT(swr_blend_state);
74 assert(state != nullptr);
75
76 memcpy(&state->pipe, blend, sizeof(*blend));
77
78 struct pipe_blend_state *pipe_blend = &state->pipe;
79
80 for (int target = 0;
81 target < std::min(SWR_NUM_RENDERTARGETS, PIPE_MAX_COLOR_BUFS);
82 target++) {
83
84 struct pipe_rt_blend_state *rt_blend = &pipe_blend->rt[target];
85 SWR_RENDER_TARGET_BLEND_STATE &blendState =
86 state->blendState.renderTarget[target];
87 RENDER_TARGET_BLEND_COMPILE_STATE &compileState =
88 state->compileState[target];
89
90 if (target != 0 && !pipe_blend->independent_blend_enable) {
91 memcpy(&compileState,
92 &state->compileState[0],
93 sizeof(RENDER_TARGET_BLEND_COMPILE_STATE));
94 continue;
95 }
96
97 compileState.blendEnable = rt_blend->blend_enable;
98 if (compileState.blendEnable) {
99 compileState.sourceAlphaBlendFactor =
100 swr_convert_blend_factor(rt_blend->alpha_src_factor);
101 compileState.destAlphaBlendFactor =
102 swr_convert_blend_factor(rt_blend->alpha_dst_factor);
103 compileState.sourceBlendFactor =
104 swr_convert_blend_factor(rt_blend->rgb_src_factor);
105 compileState.destBlendFactor =
106 swr_convert_blend_factor(rt_blend->rgb_dst_factor);
107
108 compileState.colorBlendFunc =
109 swr_convert_blend_func(rt_blend->rgb_func);
110 compileState.alphaBlendFunc =
111 swr_convert_blend_func(rt_blend->alpha_func);
112 }
113 compileState.logicOpEnable = state->pipe.logicop_enable;
114 if (compileState.logicOpEnable) {
115 compileState.logicOpFunc =
116 swr_convert_logic_op(state->pipe.logicop_func);
117 }
118
119 blendState.writeDisableRed =
120 (rt_blend->colormask & PIPE_MASK_R) ? 0 : 1;
121 blendState.writeDisableGreen =
122 (rt_blend->colormask & PIPE_MASK_G) ? 0 : 1;
123 blendState.writeDisableBlue =
124 (rt_blend->colormask & PIPE_MASK_B) ? 0 : 1;
125 blendState.writeDisableAlpha =
126 (rt_blend->colormask & PIPE_MASK_A) ? 0 : 1;
127
128 if (rt_blend->colormask == 0)
129 compileState.blendEnable = false;
130 }
131
132 return state;
133 }
134
135 static void
136 swr_bind_blend_state(struct pipe_context *pipe, void *blend)
137 {
138 struct swr_context *ctx = swr_context(pipe);
139
140 if (ctx->blend == blend)
141 return;
142
143 ctx->blend = (swr_blend_state *)blend;
144
145 ctx->dirty |= SWR_NEW_BLEND;
146 }
147
148 static void
149 swr_delete_blend_state(struct pipe_context *pipe, void *blend)
150 {
151 FREE(blend);
152 }
153
154 static void
155 swr_set_blend_color(struct pipe_context *pipe,
156 const struct pipe_blend_color *color)
157 {
158 struct swr_context *ctx = swr_context(pipe);
159
160 ctx->blend_color = *color;
161
162 ctx->dirty |= SWR_NEW_BLEND;
163 }
164
165 static void
166 swr_set_stencil_ref(struct pipe_context *pipe,
167 const struct pipe_stencil_ref *ref)
168 {
169 struct swr_context *ctx = swr_context(pipe);
170
171 ctx->stencil_ref = *ref;
172
173 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
174 }
175
176 static void *
177 swr_create_depth_stencil_state(
178 struct pipe_context *pipe,
179 const struct pipe_depth_stencil_alpha_state *depth_stencil)
180 {
181 struct pipe_depth_stencil_alpha_state *state;
182
183 state = (pipe_depth_stencil_alpha_state *)mem_dup(depth_stencil,
184 sizeof *depth_stencil);
185
186 return state;
187 }
188
189 static void
190 swr_bind_depth_stencil_state(struct pipe_context *pipe, void *depth_stencil)
191 {
192 struct swr_context *ctx = swr_context(pipe);
193
194 if (ctx->depth_stencil == (pipe_depth_stencil_alpha_state *)depth_stencil)
195 return;
196
197 ctx->depth_stencil = (pipe_depth_stencil_alpha_state *)depth_stencil;
198
199 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
200 }
201
202 static void
203 swr_delete_depth_stencil_state(struct pipe_context *pipe, void *depth)
204 {
205 FREE(depth);
206 }
207
208
209 static void *
210 swr_create_rasterizer_state(struct pipe_context *pipe,
211 const struct pipe_rasterizer_state *rast)
212 {
213 struct pipe_rasterizer_state *state;
214 state = (pipe_rasterizer_state *)mem_dup(rast, sizeof *rast);
215
216 return state;
217 }
218
219 static void
220 swr_bind_rasterizer_state(struct pipe_context *pipe, void *handle)
221 {
222 struct swr_context *ctx = swr_context(pipe);
223 const struct pipe_rasterizer_state *rasterizer =
224 (const struct pipe_rasterizer_state *)handle;
225
226 if (ctx->rasterizer == (pipe_rasterizer_state *)rasterizer)
227 return;
228
229 ctx->rasterizer = (pipe_rasterizer_state *)rasterizer;
230
231 ctx->dirty |= SWR_NEW_RASTERIZER;
232 }
233
234 static void
235 swr_delete_rasterizer_state(struct pipe_context *pipe, void *rasterizer)
236 {
237 FREE(rasterizer);
238 }
239
240
241 static void *
242 swr_create_sampler_state(struct pipe_context *pipe,
243 const struct pipe_sampler_state *sampler)
244 {
245 struct pipe_sampler_state *state =
246 (pipe_sampler_state *)mem_dup(sampler, sizeof *sampler);
247
248 return state;
249 }
250
251 static void
252 swr_bind_sampler_states(struct pipe_context *pipe,
253 enum pipe_shader_type shader,
254 unsigned start,
255 unsigned num,
256 void **samplers)
257 {
258 struct swr_context *ctx = swr_context(pipe);
259 unsigned i;
260
261 assert(shader < PIPE_SHADER_TYPES);
262 assert(start + num <= ARRAY_SIZE(ctx->samplers[shader]));
263
264 /* set the new samplers */
265 ctx->num_samplers[shader] = num;
266 for (i = 0; i < num; i++) {
267 ctx->samplers[shader][start + i] = (pipe_sampler_state *)samplers[i];
268 }
269
270 ctx->dirty |= SWR_NEW_SAMPLER;
271 }
272
273 static void
274 swr_delete_sampler_state(struct pipe_context *pipe, void *sampler)
275 {
276 FREE(sampler);
277 }
278
279
280 static struct pipe_sampler_view *
281 swr_create_sampler_view(struct pipe_context *pipe,
282 struct pipe_resource *texture,
283 const struct pipe_sampler_view *templ)
284 {
285 struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view);
286
287 if (view) {
288 *view = *templ;
289 view->reference.count = 1;
290 view->texture = NULL;
291 pipe_resource_reference(&view->texture, texture);
292 view->context = pipe;
293 }
294
295 return view;
296 }
297
298 static void
299 swr_set_sampler_views(struct pipe_context *pipe,
300 enum pipe_shader_type shader,
301 unsigned start,
302 unsigned num,
303 struct pipe_sampler_view **views)
304 {
305 struct swr_context *ctx = swr_context(pipe);
306 uint i;
307
308 assert(num <= PIPE_MAX_SHADER_SAMPLER_VIEWS);
309
310 assert(shader < PIPE_SHADER_TYPES);
311 assert(start + num <= ARRAY_SIZE(ctx->sampler_views[shader]));
312
313 /* set the new sampler views */
314 ctx->num_sampler_views[shader] = num;
315 for (i = 0; i < num; i++) {
316 pipe_sampler_view_reference(&ctx->sampler_views[shader][start + i],
317 views[i]);
318 }
319
320 ctx->dirty |= SWR_NEW_SAMPLER_VIEW;
321 }
322
323 static void
324 swr_sampler_view_destroy(struct pipe_context *pipe,
325 struct pipe_sampler_view *view)
326 {
327 pipe_resource_reference(&view->texture, NULL);
328 FREE(view);
329 }
330
331 static void *
332 swr_create_vs_state(struct pipe_context *pipe,
333 const struct pipe_shader_state *vs)
334 {
335 struct swr_vertex_shader *swr_vs = new swr_vertex_shader;
336 if (!swr_vs)
337 return NULL;
338
339 swr_vs->pipe.tokens = tgsi_dup_tokens(vs->tokens);
340 swr_vs->pipe.stream_output = vs->stream_output;
341
342 lp_build_tgsi_info(vs->tokens, &swr_vs->info);
343
344 swr_vs->soState = {0};
345
346 if (swr_vs->pipe.stream_output.num_outputs) {
347 pipe_stream_output_info *stream_output = &swr_vs->pipe.stream_output;
348
349 swr_vs->soState.soEnable = true;
350 // soState.rasterizerDisable set on state dirty
351 // soState.streamToRasterizer not used
352
353 for (uint32_t i = 0; i < stream_output->num_outputs; i++) {
354 unsigned attrib_slot = stream_output->output[i].register_index;
355 attrib_slot = swr_so_adjust_attrib(attrib_slot, swr_vs);
356 swr_vs->soState.streamMasks[stream_output->output[i].stream] |=
357 (1 << attrib_slot);
358 }
359 for (uint32_t i = 0; i < MAX_SO_STREAMS; i++) {
360 swr_vs->soState.streamNumEntries[i] =
361 _mm_popcnt_u32(swr_vs->soState.streamMasks[i]);
362 }
363 }
364
365 return swr_vs;
366 }
367
368 static void
369 swr_bind_vs_state(struct pipe_context *pipe, void *vs)
370 {
371 struct swr_context *ctx = swr_context(pipe);
372
373 if (ctx->vs == vs)
374 return;
375
376 ctx->vs = (swr_vertex_shader *)vs;
377 ctx->dirty |= SWR_NEW_VS;
378 }
379
380 static void
381 swr_delete_vs_state(struct pipe_context *pipe, void *vs)
382 {
383 struct swr_vertex_shader *swr_vs = (swr_vertex_shader *)vs;
384 FREE((void *)swr_vs->pipe.tokens);
385 struct swr_screen *screen = swr_screen(pipe->screen);
386
387 /* Defer deletion of vs state */
388 swr_fence_work_delete_vs(screen->flush_fence, swr_vs);
389 }
390
391 static void *
392 swr_create_fs_state(struct pipe_context *pipe,
393 const struct pipe_shader_state *fs)
394 {
395 struct swr_fragment_shader *swr_fs = new swr_fragment_shader;
396 if (!swr_fs)
397 return NULL;
398
399 swr_fs->pipe.tokens = tgsi_dup_tokens(fs->tokens);
400
401 lp_build_tgsi_info(fs->tokens, &swr_fs->info);
402
403 return swr_fs;
404 }
405
406
407 static void
408 swr_bind_fs_state(struct pipe_context *pipe, void *fs)
409 {
410 struct swr_context *ctx = swr_context(pipe);
411
412 if (ctx->fs == fs)
413 return;
414
415 ctx->fs = (swr_fragment_shader *)fs;
416 ctx->dirty |= SWR_NEW_FS;
417 }
418
419 static void
420 swr_delete_fs_state(struct pipe_context *pipe, void *fs)
421 {
422 struct swr_fragment_shader *swr_fs = (swr_fragment_shader *)fs;
423 FREE((void *)swr_fs->pipe.tokens);
424 struct swr_screen *screen = swr_screen(pipe->screen);
425
426 /* Defer deleton of fs state */
427 swr_fence_work_delete_fs(screen->flush_fence, swr_fs);
428 }
429
430 static void *
431 swr_create_gs_state(struct pipe_context *pipe,
432 const struct pipe_shader_state *gs)
433 {
434 struct swr_geometry_shader *swr_gs = new swr_geometry_shader;
435 if (!swr_gs)
436 return NULL;
437
438 swr_gs->pipe.tokens = tgsi_dup_tokens(gs->tokens);
439 lp_build_tgsi_info(gs->tokens, &swr_gs->info);
440 return swr_gs;
441 }
442
443 static void
444 swr_bind_gs_state(struct pipe_context *pipe, void *gs)
445 {
446 struct swr_context *ctx = swr_context(pipe);
447
448 if (ctx->gs == gs)
449 return;
450
451 ctx->gs = (swr_geometry_shader *)gs;
452 ctx->dirty |= SWR_NEW_GS;
453 }
454
455 static void
456 swr_delete_gs_state(struct pipe_context *pipe, void *gs)
457 {
458 struct swr_geometry_shader *swr_gs = (swr_geometry_shader *)gs;
459 FREE((void *)swr_gs->pipe.tokens);
460 struct swr_screen *screen = swr_screen(pipe->screen);
461
462 /* Defer deleton of fs state */
463 swr_fence_work_delete_gs(screen->flush_fence, swr_gs);
464 }
465
466 static void *
467 swr_create_tcs_state(struct pipe_context *pipe,
468 const struct pipe_shader_state *tcs)
469 {
470 struct swr_tess_control_shader *swr_tcs = new swr_tess_control_shader;
471 if (!swr_tcs)
472 return NULL;
473
474 swr_tcs->pipe.tokens = tgsi_dup_tokens(tcs->tokens);
475 lp_build_tgsi_info(tcs->tokens, &swr_tcs->info);
476 return swr_tcs;
477 }
478
479 static void
480 swr_bind_tcs_state(struct pipe_context *pipe, void *tcs)
481 {
482 struct swr_context *ctx = swr_context(pipe);
483
484 if (ctx->tcs == tcs)
485 return;
486
487 ctx->tcs = (swr_tess_control_shader *)tcs;
488 ctx->dirty |= SWR_NEW_TCS;
489 ctx->dirty |= SWR_NEW_TS;
490 }
491
492 static void
493 swr_delete_tcs_state(struct pipe_context *pipe, void *tcs)
494 {
495 struct swr_tess_control_shader *swr_tcs = (swr_tess_control_shader *)tcs;
496 FREE((void *)swr_tcs->pipe.tokens);
497 struct swr_screen *screen = swr_screen(pipe->screen);
498
499 /* Defer deleton of tcs state */
500 swr_fence_work_delete_tcs(screen->flush_fence, swr_tcs);
501 }
502
503 static void *
504 swr_create_tes_state(struct pipe_context *pipe,
505 const struct pipe_shader_state *tes)
506 {
507 struct swr_tess_evaluation_shader *swr_tes = new swr_tess_evaluation_shader;
508 if (!swr_tes)
509 return NULL;
510
511 swr_tes->pipe.tokens = tgsi_dup_tokens(tes->tokens);
512 lp_build_tgsi_info(tes->tokens, &swr_tes->info);
513 return swr_tes;
514 }
515
516 static void
517 swr_bind_tes_state(struct pipe_context *pipe, void *tes)
518 {
519 struct swr_context *ctx = swr_context(pipe);
520
521 if (ctx->tes == tes)
522 return;
523
524 // Save current tessellator state first
525 if (ctx->tes != nullptr) {
526 ctx->tes->ts_state = ctx->tsState;
527 }
528
529 ctx->tes = (swr_tess_evaluation_shader *)tes;
530
531 ctx->dirty |= SWR_NEW_TES;
532 ctx->dirty |= SWR_NEW_TS;
533 }
534
535 static void
536 swr_delete_tes_state(struct pipe_context *pipe, void *tes)
537 {
538 struct swr_tess_evaluation_shader *swr_tes = (swr_tess_evaluation_shader *)tes;
539 FREE((void *)swr_tes->pipe.tokens);
540 struct swr_screen *screen = swr_screen(pipe->screen);
541
542 /* Defer deleton of tes state */
543 swr_fence_work_delete_tes(screen->flush_fence, swr_tes);
544 }
545
546 static void
547 swr_set_constant_buffer(struct pipe_context *pipe,
548 enum pipe_shader_type shader,
549 uint index,
550 const struct pipe_constant_buffer *cb)
551 {
552 struct swr_context *ctx = swr_context(pipe);
553 struct pipe_resource *constants = cb ? cb->buffer : NULL;
554
555 assert(shader < PIPE_SHADER_TYPES);
556 assert(index < ARRAY_SIZE(ctx->constants[shader]));
557
558 /* note: reference counting */
559 util_copy_constant_buffer(&ctx->constants[shader][index], cb);
560
561 if (shader == PIPE_SHADER_VERTEX) {
562 ctx->dirty |= SWR_NEW_VSCONSTANTS;
563 } else if (shader == PIPE_SHADER_FRAGMENT) {
564 ctx->dirty |= SWR_NEW_FSCONSTANTS;
565 } else if (shader == PIPE_SHADER_GEOMETRY) {
566 ctx->dirty |= SWR_NEW_GSCONSTANTS;
567 } else if (shader == PIPE_SHADER_TESS_CTRL) {
568 ctx->dirty |= SWR_NEW_TCSCONSTANTS;
569 } else if (shader == PIPE_SHADER_TESS_EVAL) {
570 ctx->dirty |= SWR_NEW_TESCONSTANTS;
571 }
572 if (cb && cb->user_buffer) {
573 pipe_resource_reference(&constants, NULL);
574 }
575 }
576
577
578 static void *
579 swr_create_vertex_elements_state(struct pipe_context *pipe,
580 unsigned num_elements,
581 const struct pipe_vertex_element *attribs)
582 {
583 struct swr_vertex_element_state *velems;
584 assert(num_elements <= PIPE_MAX_ATTRIBS);
585 velems = new swr_vertex_element_state;
586 if (velems) {
587 memset(&velems->fsState, 0, sizeof(velems->fsState));
588 velems->fsState.bVertexIDOffsetEnable = true;
589 velems->fsState.numAttribs = num_elements;
590 for (unsigned i = 0; i < num_elements; i++) {
591 // XXX: we should do this keyed on the VS usage info
592
593 const struct util_format_description *desc =
594 util_format_description(attribs[i].src_format);
595
596 velems->fsState.layout[i].AlignedByteOffset = attribs[i].src_offset;
597 velems->fsState.layout[i].Format =
598 mesa_to_swr_format(attribs[i].src_format);
599 velems->fsState.layout[i].StreamIndex =
600 attribs[i].vertex_buffer_index;
601 velems->fsState.layout[i].InstanceEnable =
602 attribs[i].instance_divisor != 0;
603 velems->fsState.layout[i].ComponentControl0 =
604 desc->channel[0].type != UTIL_FORMAT_TYPE_VOID
605 ? ComponentControl::StoreSrc
606 : ComponentControl::Store0;
607 velems->fsState.layout[i].ComponentControl1 =
608 desc->channel[1].type != UTIL_FORMAT_TYPE_VOID
609 ? ComponentControl::StoreSrc
610 : ComponentControl::Store0;
611 velems->fsState.layout[i].ComponentControl2 =
612 desc->channel[2].type != UTIL_FORMAT_TYPE_VOID
613 ? ComponentControl::StoreSrc
614 : ComponentControl::Store0;
615 velems->fsState.layout[i].ComponentControl3 =
616 desc->channel[3].type != UTIL_FORMAT_TYPE_VOID
617 ? ComponentControl::StoreSrc
618 : ComponentControl::Store1Fp;
619 velems->fsState.layout[i].ComponentPacking = ComponentEnable::XYZW;
620 velems->fsState.layout[i].InstanceAdvancementState =
621 attribs[i].instance_divisor;
622
623 /* Calculate the pitch of each stream */
624 const SWR_FORMAT_INFO &swr_desc = GetFormatInfo(
625 mesa_to_swr_format(attribs[i].src_format));
626 velems->stream_pitch[attribs[i].vertex_buffer_index] += swr_desc.Bpp;
627
628 if (attribs[i].instance_divisor != 0) {
629 velems->instanced_bufs |= 1U << attribs[i].vertex_buffer_index;
630 uint32_t *min_instance_div =
631 &velems->min_instance_div[attribs[i].vertex_buffer_index];
632 if (!*min_instance_div ||
633 attribs[i].instance_divisor < *min_instance_div)
634 *min_instance_div = attribs[i].instance_divisor;
635 }
636 }
637 }
638
639 return velems;
640 }
641
642 static void
643 swr_bind_vertex_elements_state(struct pipe_context *pipe, void *velems)
644 {
645 struct swr_context *ctx = swr_context(pipe);
646 struct swr_vertex_element_state *swr_velems =
647 (struct swr_vertex_element_state *)velems;
648
649 ctx->velems = swr_velems;
650 ctx->dirty |= SWR_NEW_VERTEX;
651 }
652
653 static void
654 swr_delete_vertex_elements_state(struct pipe_context *pipe, void *velems)
655 {
656 struct swr_vertex_element_state *swr_velems =
657 (struct swr_vertex_element_state *) velems;
658 /* XXX Need to destroy fetch shader? */
659 delete swr_velems;
660 }
661
662
663 static void
664 swr_set_vertex_buffers(struct pipe_context *pipe,
665 unsigned start_slot,
666 unsigned num_elements,
667 const struct pipe_vertex_buffer *buffers)
668 {
669 struct swr_context *ctx = swr_context(pipe);
670
671 assert(num_elements <= PIPE_MAX_ATTRIBS);
672
673 util_set_vertex_buffers_count(ctx->vertex_buffer,
674 &ctx->num_vertex_buffers,
675 buffers,
676 start_slot,
677 num_elements);
678
679 ctx->dirty |= SWR_NEW_VERTEX;
680 }
681
682
683 static void
684 swr_set_polygon_stipple(struct pipe_context *pipe,
685 const struct pipe_poly_stipple *stipple)
686 {
687 struct swr_context *ctx = swr_context(pipe);
688
689 ctx->poly_stipple.pipe = *stipple; /* struct copy */
690 ctx->dirty |= SWR_NEW_STIPPLE;
691 }
692
693 static void
694 swr_set_clip_state(struct pipe_context *pipe,
695 const struct pipe_clip_state *clip)
696 {
697 struct swr_context *ctx = swr_context(pipe);
698
699 ctx->clip = *clip;
700 /* XXX Unimplemented, but prevents crash */
701
702 ctx->dirty |= SWR_NEW_CLIP;
703 }
704
705
706 static void
707 swr_set_scissor_states(struct pipe_context *pipe,
708 unsigned start_slot,
709 unsigned num_scissors,
710 const struct pipe_scissor_state *scissors)
711 {
712 struct swr_context *ctx = swr_context(pipe);
713
714 memcpy(ctx->scissors + start_slot, scissors,
715 sizeof(struct pipe_scissor_state) * num_scissors);
716
717 for (unsigned i = 0; i < num_scissors; i++) {
718 auto idx = start_slot + i;
719 ctx->swr_scissors[idx].xmin = scissors[idx].minx;
720 ctx->swr_scissors[idx].xmax = scissors[idx].maxx;
721 ctx->swr_scissors[idx].ymin = scissors[idx].miny;
722 ctx->swr_scissors[idx].ymax = scissors[idx].maxy;
723 }
724 ctx->dirty |= SWR_NEW_SCISSOR;
725 }
726
727 static void
728 swr_set_viewport_states(struct pipe_context *pipe,
729 unsigned start_slot,
730 unsigned num_viewports,
731 const struct pipe_viewport_state *vpt)
732 {
733 struct swr_context *ctx = swr_context(pipe);
734
735 memcpy(ctx->viewports + start_slot, vpt, sizeof(struct pipe_viewport_state) * num_viewports);
736 ctx->dirty |= SWR_NEW_VIEWPORT;
737 }
738
739
740 static void
741 swr_set_framebuffer_state(struct pipe_context *pipe,
742 const struct pipe_framebuffer_state *fb)
743 {
744 struct swr_context *ctx = swr_context(pipe);
745
746 bool changed = !util_framebuffer_state_equal(&ctx->framebuffer, fb);
747
748 assert(fb->width <= KNOB_GUARDBAND_WIDTH);
749 assert(fb->height <= KNOB_GUARDBAND_HEIGHT);
750
751 if (changed) {
752 util_copy_framebuffer_state(&ctx->framebuffer, fb);
753
754 /* 0 and 1 both indicate no msaa. Core doesn't understand 0 samples */
755 ctx->framebuffer.samples = std::max((ubyte)1, ctx->framebuffer.samples);
756
757 ctx->dirty |= SWR_NEW_FRAMEBUFFER;
758 }
759 }
760
761
762 static void
763 swr_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
764 {
765 struct swr_context *ctx = swr_context(pipe);
766
767 if (sample_mask != ctx->sample_mask) {
768 ctx->sample_mask = sample_mask;
769 ctx->dirty |= SWR_NEW_RASTERIZER;
770 }
771 }
772
773 /*
774 * MSAA fixed sample position table
775 * used by update_derived and get_sample_position
776 * (integer locations on a 16x16 grid)
777 */
778 static const uint8_t swr_sample_positions[][2] =
779 { /* 1x*/ { 8, 8},
780 /* 2x*/ {12,12},{ 4, 4},
781 /* 4x*/ { 6, 2},{14, 6},{ 2,10},{10,14},
782 /* 8x*/ { 9, 5},{ 7,11},{13, 9},{ 5, 3},
783 { 3,13},{ 1, 7},{11,15},{15, 1},
784 /*16x*/ { 9, 9},{ 7, 5},{ 5,10},{12, 7},
785 { 3, 6},{10,13},{13,11},{11, 3},
786 { 6,14},{ 8, 1},{ 4, 2},{ 2,12},
787 { 0, 8},{15, 4},{14,15},{ 1, 0} };
788
789 static void
790 swr_get_sample_position(struct pipe_context *pipe,
791 unsigned sample_count, unsigned sample_index,
792 float *out_value)
793 {
794 /* validate sample_count */
795 sample_count = GetNumSamples(GetSampleCount(sample_count));
796
797 const uint8_t *sample = swr_sample_positions[sample_count-1 + sample_index];
798 out_value[0] = sample[0] / 16.0f;
799 out_value[1] = sample[1] / 16.0f;
800 }
801
802
803 /*
804 * Update resource in-use status
805 * All resources bound to color or depth targets marked as WRITE resources.
806 * VBO Vertex/index buffers and texture views marked as READ resources.
807 */
808 void
809 swr_update_resource_status(struct pipe_context *pipe,
810 const struct pipe_draw_info *p_draw_info)
811 {
812 struct swr_context *ctx = swr_context(pipe);
813 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
814
815 /* colorbuffer targets */
816 if (fb->nr_cbufs)
817 for (uint32_t i = 0; i < fb->nr_cbufs; ++i)
818 if (fb->cbufs[i])
819 swr_resource_write(fb->cbufs[i]->texture);
820
821 /* depth/stencil target */
822 if (fb->zsbuf)
823 swr_resource_write(fb->zsbuf->texture);
824
825 /* VBO vertex buffers */
826 for (uint32_t i = 0; i < ctx->num_vertex_buffers; i++) {
827 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
828 if (!vb->is_user_buffer && vb->buffer.resource)
829 swr_resource_read(vb->buffer.resource);
830 }
831
832 /* VBO index buffer */
833 if (p_draw_info && p_draw_info->index_size) {
834 if (!p_draw_info->has_user_indices)
835 swr_resource_read(p_draw_info->index.resource);
836 }
837
838 /* transform feedback buffers */
839 for (uint32_t i = 0; i < ctx->num_so_targets; i++) {
840 struct pipe_stream_output_target *target = ctx->so_targets[i];
841 if (target && target->buffer)
842 swr_resource_write(target->buffer);
843 }
844
845 /* texture sampler views */
846 for (uint32_t j : {PIPE_SHADER_VERTEX, PIPE_SHADER_FRAGMENT}) {
847 for (uint32_t i = 0; i < ctx->num_sampler_views[j]; i++) {
848 struct pipe_sampler_view *view = ctx->sampler_views[j][i];
849 if (view)
850 swr_resource_read(view->texture);
851 }
852 }
853
854 /* constant buffers */
855 for (uint32_t j : {PIPE_SHADER_VERTEX, PIPE_SHADER_FRAGMENT}) {
856 for (uint32_t i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
857 struct pipe_constant_buffer *cb = &ctx->constants[j][i];
858 if (cb->buffer)
859 swr_resource_read(cb->buffer);
860 }
861 }
862 }
863
864 static void
865 swr_update_texture_state(struct swr_context *ctx,
866 enum pipe_shader_type shader_type,
867 unsigned num_sampler_views,
868 swr_jit_texture *textures)
869 {
870 for (unsigned i = 0; i < num_sampler_views; i++) {
871 struct pipe_sampler_view *view =
872 ctx->sampler_views[shader_type][i];
873 struct swr_jit_texture *jit_tex = &textures[i];
874
875 memset(jit_tex, 0, sizeof(*jit_tex));
876 if (view) {
877 struct pipe_resource *res = view->texture;
878 struct swr_resource *swr_res = swr_resource(res);
879 SWR_SURFACE_STATE *swr = &swr_res->swr;
880 size_t *mip_offsets = swr_res->mip_offsets;
881 if (swr_res->has_depth && swr_res->has_stencil &&
882 !util_format_has_depth(util_format_description(view->format))) {
883 swr = &swr_res->secondary;
884 mip_offsets = swr_res->secondary_mip_offsets;
885 }
886
887 jit_tex->width = res->width0;
888 jit_tex->height = res->height0;
889 jit_tex->base_ptr = (uint8_t*)swr->xpBaseAddress;
890 if (view->target != PIPE_BUFFER) {
891 jit_tex->first_level = view->u.tex.first_level;
892 jit_tex->last_level = view->u.tex.last_level;
893 if (view->target == PIPE_TEXTURE_3D)
894 jit_tex->depth = res->depth0;
895 else
896 jit_tex->depth =
897 view->u.tex.last_layer - view->u.tex.first_layer + 1;
898 jit_tex->base_ptr += view->u.tex.first_layer *
899 swr->qpitch * swr->pitch;
900 } else {
901 unsigned view_blocksize = util_format_get_blocksize(view->format);
902 jit_tex->base_ptr += view->u.buf.offset;
903 jit_tex->width = view->u.buf.size / view_blocksize;
904 jit_tex->depth = 1;
905 }
906
907 for (unsigned level = jit_tex->first_level;
908 level <= jit_tex->last_level;
909 level++) {
910 jit_tex->row_stride[level] = swr->pitch;
911 jit_tex->img_stride[level] = swr->qpitch * swr->pitch;
912 jit_tex->mip_offsets[level] = mip_offsets[level];
913 }
914 }
915 }
916 }
917
918 static void
919 swr_update_sampler_state(struct swr_context *ctx,
920 enum pipe_shader_type shader_type,
921 unsigned num_samplers,
922 swr_jit_sampler *samplers)
923 {
924 for (unsigned i = 0; i < num_samplers; i++) {
925 const struct pipe_sampler_state *sampler =
926 ctx->samplers[shader_type][i];
927
928 if (sampler) {
929 samplers[i].min_lod = sampler->min_lod;
930 samplers[i].max_lod = sampler->max_lod;
931 samplers[i].lod_bias = sampler->lod_bias;
932 COPY_4V(samplers[i].border_color, sampler->border_color.f);
933 }
934 }
935 }
936
937 static void
938 swr_update_constants(struct swr_context *ctx, enum pipe_shader_type shaderType)
939 {
940 swr_draw_context *pDC = &ctx->swrDC;
941
942 const float **constant;
943 uint32_t *num_constants;
944 struct swr_scratch_space *scratch;
945
946 switch (shaderType) {
947 case PIPE_SHADER_VERTEX:
948 constant = pDC->constantVS;
949 num_constants = pDC->num_constantsVS;
950 scratch = &ctx->scratch->vs_constants;
951 break;
952 case PIPE_SHADER_FRAGMENT:
953 constant = pDC->constantFS;
954 num_constants = pDC->num_constantsFS;
955 scratch = &ctx->scratch->fs_constants;
956 break;
957 case PIPE_SHADER_GEOMETRY:
958 constant = pDC->constantGS;
959 num_constants = pDC->num_constantsGS;
960 scratch = &ctx->scratch->gs_constants;
961 break;
962 case PIPE_SHADER_TESS_CTRL:
963 constant = pDC->constantTCS;
964 num_constants = pDC->num_constantsTCS;
965 scratch = &ctx->scratch->tcs_constants;
966 break;
967 case PIPE_SHADER_TESS_EVAL:
968 constant = pDC->constantTES;
969 num_constants = pDC->num_constantsTES;
970 scratch = &ctx->scratch->tes_constants;
971 break;
972 default:
973 assert(0 && "Unsupported shader type constants");
974 return;
975 }
976
977 for (UINT i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
978 const pipe_constant_buffer *cb = &ctx->constants[shaderType][i];
979 num_constants[i] = cb->buffer_size;
980 if (cb->buffer) {
981 constant[i] =
982 (const float *)(swr_resource_data(cb->buffer) +
983 cb->buffer_offset);
984 } else {
985 /* Need to copy these constants to scratch space */
986 if (cb->user_buffer && cb->buffer_size) {
987 const void *ptr =
988 ((const uint8_t *)cb->user_buffer + cb->buffer_offset);
989 uint32_t size = AlignUp(cb->buffer_size, 4);
990 ptr = swr_copy_to_scratch_space(ctx, scratch, ptr, size);
991 constant[i] = (const float *)ptr;
992 }
993 }
994 }
995 }
996
997 static bool
998 swr_change_rt(struct swr_context *ctx,
999 unsigned attachment,
1000 const struct pipe_surface *sf)
1001 {
1002 swr_draw_context *pDC = &ctx->swrDC;
1003 struct SWR_SURFACE_STATE *rt = &pDC->renderTargets[attachment];
1004
1005 /* Do nothing if the render target hasn't changed */
1006 if ((!sf || !sf->texture) && (void*)(rt->xpBaseAddress) == nullptr)
1007 return false;
1008
1009 /* Deal with disabling RT up front */
1010 if (!sf || !sf->texture) {
1011 /* If detaching attachment, mark tiles as RESOLVED so core
1012 * won't try to load from non-existent target. */
1013 swr_store_render_target(&ctx->pipe, attachment, SWR_TILE_RESOLVED);
1014 *rt = {0};
1015 return true;
1016 }
1017
1018 const struct swr_resource *swr = swr_resource(sf->texture);
1019 const SWR_SURFACE_STATE *swr_surface = &swr->swr;
1020 SWR_FORMAT fmt = mesa_to_swr_format(sf->format);
1021
1022 if (attachment == SWR_ATTACHMENT_STENCIL && swr->secondary.xpBaseAddress) {
1023 swr_surface = &swr->secondary;
1024 fmt = swr_surface->format;
1025 }
1026
1027 if (rt->xpBaseAddress == swr_surface->xpBaseAddress &&
1028 rt->format == fmt &&
1029 rt->lod == sf->u.tex.level &&
1030 rt->arrayIndex == sf->u.tex.first_layer)
1031 return false;
1032
1033 bool need_fence = false;
1034
1035 /* StoreTile for changed target */
1036 if (rt->xpBaseAddress) {
1037 /* If changing attachment to a new target, mark tiles as
1038 * INVALID so they are reloaded from surface. */
1039 swr_store_render_target(&ctx->pipe, attachment, SWR_TILE_INVALID);
1040 need_fence = true;
1041 } else {
1042 /* if no previous attachment, invalidate tiles that may be marked
1043 * RESOLVED because of an old attachment */
1044 swr_invalidate_render_target(&ctx->pipe, attachment, sf->width, sf->height);
1045 /* no need to set fence here */
1046 }
1047
1048 /* Make new attachment */
1049 *rt = *swr_surface;
1050 rt->format = fmt;
1051 rt->lod = sf->u.tex.level;
1052 rt->arrayIndex = sf->u.tex.first_layer;
1053
1054 return need_fence;
1055 }
1056
1057 /*
1058 * for cases where resources are shared between contexts, invalidate
1059 * this ctx's resource. so it can be fetched fresh. Old ctx's resource
1060 * is already stored during a flush
1061 */
1062 static inline void
1063 swr_invalidate_buffers_after_ctx_change(struct pipe_context *pipe)
1064 {
1065 struct swr_context *ctx = swr_context(pipe);
1066
1067 for (uint32_t i = 0; i < ctx->framebuffer.nr_cbufs; i++) {
1068 struct pipe_surface *cb = ctx->framebuffer.cbufs[i];
1069 if (cb) {
1070 struct swr_resource *res = swr_resource(cb->texture);
1071 if (res->curr_pipe != pipe) {
1072 /* if curr_pipe is NULL (first use), status should not be WRITE */
1073 assert(res->curr_pipe || !(res->status & SWR_RESOURCE_WRITE));
1074 if (res->status & SWR_RESOURCE_WRITE) {
1075 swr_invalidate_render_target(pipe, i, cb->width, cb->height);
1076 }
1077 }
1078 res->curr_pipe = pipe;
1079 }
1080 }
1081 if (ctx->framebuffer.zsbuf) {
1082 struct pipe_surface *zb = ctx->framebuffer.zsbuf;
1083 if (zb) {
1084 struct swr_resource *res = swr_resource(zb->texture);
1085 if (res->curr_pipe != pipe) {
1086 /* if curr_pipe is NULL (first use), status should not be WRITE */
1087 assert(res->curr_pipe || !(res->status & SWR_RESOURCE_WRITE));
1088 if (res->status & SWR_RESOURCE_WRITE) {
1089 swr_invalidate_render_target(pipe, SWR_ATTACHMENT_DEPTH, zb->width, zb->height);
1090 swr_invalidate_render_target(pipe, SWR_ATTACHMENT_STENCIL, zb->width, zb->height);
1091 }
1092 }
1093 res->curr_pipe = pipe;
1094 }
1095 }
1096 }
1097
1098 static inline void
1099 swr_user_vbuf_range(const struct pipe_draw_info *info,
1100 const struct swr_vertex_element_state *velems,
1101 const struct pipe_vertex_buffer *vb,
1102 uint32_t i,
1103 uint32_t *totelems,
1104 uint32_t *base,
1105 uint32_t *size)
1106 {
1107 /* FIXME: The size is too large - we don't access the full extra stride. */
1108 unsigned elems;
1109 if (velems->instanced_bufs & (1U << i)) {
1110 elems = info->instance_count / velems->min_instance_div[i] + 1;
1111 *totelems = info->start_instance + elems;
1112 *base = info->start_instance * vb->stride;
1113 *size = elems * vb->stride;
1114 } else if (vb->stride) {
1115 elems = info->max_index - info->min_index + 1;
1116 *totelems = (info->max_index + info->index_bias) + 1;
1117 *base = (info->min_index + info->index_bias) * vb->stride;
1118 *size = elems * vb->stride;
1119 } else {
1120 *totelems = 1;
1121 *base = 0;
1122 *size = velems->stream_pitch[i];
1123 }
1124 }
1125
1126 static void
1127 swr_update_poly_stipple(struct swr_context *ctx)
1128 {
1129 struct swr_draw_context *pDC = &ctx->swrDC;
1130
1131 assert(sizeof(ctx->poly_stipple.pipe.stipple) == sizeof(pDC->polyStipple));
1132 memcpy(pDC->polyStipple,
1133 ctx->poly_stipple.pipe.stipple,
1134 sizeof(ctx->poly_stipple.pipe.stipple));
1135 }
1136
1137
1138 static struct tgsi_shader_info *
1139 swr_get_last_fe(const struct swr_context *ctx)
1140 {
1141 tgsi_shader_info *pLastFE = &ctx->vs->info.base;
1142
1143 if (ctx->gs) {
1144 pLastFE = &ctx->gs->info.base;
1145 }
1146 else if (ctx->tes) {
1147 pLastFE = &ctx->tes->info.base;
1148 }
1149 else if (ctx->tcs) {
1150 pLastFE = &ctx->tcs->info.base;
1151 }
1152 return pLastFE;
1153 }
1154
1155
1156 void
1157 swr_update_derived(struct pipe_context *pipe,
1158 const struct pipe_draw_info *p_draw_info)
1159 {
1160 struct swr_context *ctx = swr_context(pipe);
1161 struct swr_screen *screen = swr_screen(pipe->screen);
1162
1163 /* When called from swr_clear (p_draw_info = null), set any null
1164 * state-objects to the dummy state objects to prevent nullptr dereference
1165 * in validation below.
1166 *
1167 * Important that this remains static for zero initialization. These
1168 * aren't meant to be proper state objects, just empty structs. They will
1169 * not be written to.
1170 *
1171 * Shaders can't be part of the union since they contain std::unordered_map
1172 */
1173 static struct {
1174 union {
1175 struct pipe_rasterizer_state rasterizer;
1176 struct pipe_depth_stencil_alpha_state depth_stencil;
1177 struct swr_blend_state blend;
1178 } state;
1179 struct swr_vertex_shader vs;
1180 struct swr_fragment_shader fs;
1181 } swr_dummy;
1182
1183 if (!p_draw_info) {
1184 if (!ctx->rasterizer)
1185 ctx->rasterizer = &swr_dummy.state.rasterizer;
1186 if (!ctx->depth_stencil)
1187 ctx->depth_stencil = &swr_dummy.state.depth_stencil;
1188 if (!ctx->blend)
1189 ctx->blend = &swr_dummy.state.blend;
1190 if (!ctx->vs)
1191 ctx->vs = &swr_dummy.vs;
1192 if (!ctx->fs)
1193 ctx->fs = &swr_dummy.fs;
1194 }
1195
1196 /* Update screen->pipe to current pipe context. */
1197 screen->pipe = pipe;
1198
1199 /* Any state that requires dirty flags to be re-triggered sets this mask */
1200 /* For example, user_buffer vertex and index buffers. */
1201 unsigned post_update_dirty_flags = 0;
1202
1203 /* bring resources that changed context up-to-date */
1204 swr_invalidate_buffers_after_ctx_change(pipe);
1205
1206 /* Render Targets */
1207 if (ctx->dirty & SWR_NEW_FRAMEBUFFER) {
1208 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
1209 const struct util_format_description *desc = NULL;
1210 bool need_fence = false;
1211
1212 /* colorbuffer targets */
1213 if (fb->nr_cbufs) {
1214 for (unsigned i = 0; i < fb->nr_cbufs; ++i)
1215 need_fence |= swr_change_rt(
1216 ctx, SWR_ATTACHMENT_COLOR0 + i, fb->cbufs[i]);
1217 }
1218 for (unsigned i = fb->nr_cbufs; i < SWR_NUM_RENDERTARGETS; ++i)
1219 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_COLOR0 + i, NULL);
1220
1221 /* depth/stencil target */
1222 if (fb->zsbuf)
1223 desc = util_format_description(fb->zsbuf->format);
1224 if (fb->zsbuf && util_format_has_depth(desc))
1225 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_DEPTH, fb->zsbuf);
1226 else
1227 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_DEPTH, NULL);
1228
1229 if (fb->zsbuf && util_format_has_stencil(desc))
1230 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_STENCIL, fb->zsbuf);
1231 else
1232 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_STENCIL, NULL);
1233
1234 /* This fence ensures any attachment changes are resolved before the
1235 * next draw */
1236 if (need_fence)
1237 swr_fence_submit(ctx, screen->flush_fence);
1238 }
1239
1240 /* Raster state */
1241 if (ctx->dirty & (SWR_NEW_RASTERIZER |
1242 SWR_NEW_VS | // clipping
1243 SWR_NEW_TES |
1244 SWR_NEW_TCS |
1245 SWR_NEW_FRAMEBUFFER)) {
1246 pipe_rasterizer_state *rasterizer = ctx->rasterizer;
1247 pipe_framebuffer_state *fb = &ctx->framebuffer;
1248
1249 SWR_RASTSTATE *rastState = &ctx->derived.rastState;
1250 rastState->cullMode = swr_convert_cull_mode(rasterizer->cull_face);
1251 rastState->frontWinding = rasterizer->front_ccw
1252 ? SWR_FRONTWINDING_CCW
1253 : SWR_FRONTWINDING_CW;
1254 rastState->scissorEnable = rasterizer->scissor;
1255 rastState->pointSize = rasterizer->point_size > 0.0f
1256 ? rasterizer->point_size
1257 : 1.0f;
1258 rastState->lineWidth = rasterizer->line_width > 0.0f
1259 ? rasterizer->line_width
1260 : 1.0f;
1261
1262 rastState->pointParam = rasterizer->point_size_per_vertex;
1263
1264 rastState->pointSpriteEnable = rasterizer->sprite_coord_enable;
1265 rastState->pointSpriteTopOrigin =
1266 rasterizer->sprite_coord_mode == PIPE_SPRITE_COORD_UPPER_LEFT;
1267
1268 /* If SWR_MSAA_FORCE_ENABLE is set, turn msaa on */
1269 if (screen->msaa_force_enable && !rasterizer->multisample) {
1270 /* Force enable and use the value the surface was created with */
1271 rasterizer->multisample = true;
1272 fb->samples = swr_resource(fb->cbufs[0]->texture)->swr.numSamples;
1273 fprintf(stderr,"msaa force enable: %d samples\n", fb->samples);
1274 }
1275
1276 rastState->sampleCount = GetSampleCount(fb->samples);
1277 rastState->forcedSampleCount = false;
1278 rastState->bIsCenterPattern = !rasterizer->multisample;
1279 rastState->pixelLocation = SWR_PIXEL_LOCATION_CENTER;
1280
1281 /* Only initialize sample positions if msaa is enabled */
1282 if (rasterizer->multisample) {
1283 for (uint32_t i = 0; i < fb->samples; i++) {
1284 const uint8_t *sample = swr_sample_positions[fb->samples-1 + i];
1285 rastState->samplePositions.SetXi(i, sample[0] << 4);
1286 rastState->samplePositions.SetYi(i, sample[1] << 4);
1287 rastState->samplePositions.SetX (i, sample[0] / 16.0f);
1288 rastState->samplePositions.SetY (i, sample[1] / 16.0f);
1289 }
1290 rastState->samplePositions.PrecalcSampleData(fb->samples);
1291 }
1292
1293 bool do_offset = false;
1294 switch (rasterizer->fill_front) {
1295 case PIPE_POLYGON_MODE_FILL:
1296 do_offset = rasterizer->offset_tri;
1297 break;
1298 case PIPE_POLYGON_MODE_LINE:
1299 do_offset = rasterizer->offset_line;
1300 break;
1301 case PIPE_POLYGON_MODE_POINT:
1302 do_offset = rasterizer->offset_point;
1303 break;
1304 }
1305
1306 if (do_offset) {
1307 rastState->depthBias = rasterizer->offset_units;
1308 rastState->slopeScaledDepthBias = rasterizer->offset_scale;
1309 rastState->depthBiasClamp = rasterizer->offset_clamp;
1310 } else {
1311 rastState->depthBias = 0;
1312 rastState->slopeScaledDepthBias = 0;
1313 rastState->depthBiasClamp = 0;
1314 }
1315
1316 /* translate polygon mode, at least for the front==back case */
1317 rastState->fillMode = swr_convert_fill_mode(rasterizer->fill_front);
1318
1319 struct pipe_surface *zb = fb->zsbuf;
1320 if (zb && swr_resource(zb->texture)->has_depth)
1321 rastState->depthFormat = swr_resource(zb->texture)->swr.format;
1322
1323 rastState->depthClipEnable = rasterizer->depth_clip_near;
1324 rastState->clipEnable = rasterizer->depth_clip_near | rasterizer->depth_clip_far;
1325 rastState->clipHalfZ = rasterizer->clip_halfz;
1326
1327 ctx->api.pfnSwrSetRastState(ctx->swrContext, rastState);
1328 }
1329
1330 /* Viewport */
1331 if (ctx->dirty & (SWR_NEW_VIEWPORT | SWR_NEW_FRAMEBUFFER
1332 | SWR_NEW_RASTERIZER)) {
1333 pipe_viewport_state *state = &ctx->viewports[0];
1334 pipe_framebuffer_state *fb = &ctx->framebuffer;
1335 pipe_rasterizer_state *rasterizer = ctx->rasterizer;
1336
1337 SWR_VIEWPORT *vp = &ctx->derived.vp[0];
1338 SWR_VIEWPORT_MATRICES *vpm = &ctx->derived.vpm;
1339
1340 for (unsigned i = 0; i < KNOB_NUM_VIEWPORTS_SCISSORS; i++) {
1341 vp->x = state->translate[0] - state->scale[0];
1342 vp->width = 2 * state->scale[0];
1343 vp->y = state->translate[1] - fabs(state->scale[1]);
1344 vp->height = 2 * fabs(state->scale[1]);
1345 util_viewport_zmin_zmax(state, rasterizer->clip_halfz,
1346 &vp->minZ, &vp->maxZ);
1347
1348 if (rasterizer->depth_clip_near) {
1349 vp->minZ = 0.0f;
1350 }
1351
1352 if (rasterizer->depth_clip_far) {
1353 vp->maxZ = 1.0f;
1354 }
1355
1356 vpm->m00[i] = state->scale[0];
1357 vpm->m11[i] = state->scale[1];
1358 vpm->m22[i] = state->scale[2];
1359 vpm->m30[i] = state->translate[0];
1360 vpm->m31[i] = state->translate[1];
1361 vpm->m32[i] = state->translate[2];
1362
1363 /* Now that the matrix is calculated, clip the view coords to screen
1364 * size. OpenGL allows for -ve x,y in the viewport. */
1365 if (vp->x < 0.0f) {
1366 vp->width += vp->x;
1367 vp->x = 0.0f;
1368 }
1369 if (vp->y < 0.0f) {
1370 vp->height += vp->y;
1371 vp->y = 0.0f;
1372 }
1373 vp->width = std::min(vp->width, (float) fb->width - vp->x);
1374 vp->height = std::min(vp->height, (float) fb->height - vp->y);
1375
1376 vp++;
1377 state++;
1378 }
1379 ctx->api.pfnSwrSetViewports(ctx->swrContext, KNOB_NUM_VIEWPORTS_SCISSORS,
1380 &ctx->derived.vp[0], &ctx->derived.vpm);
1381 }
1382
1383 /* When called from swr_clear (p_draw_info = null), render targets,
1384 * rasterState and viewports (dependent on render targets) are the only
1385 * necessary validation. Defer remaining validation by setting
1386 * post_update_dirty_flags and clear all dirty flags. BackendState is
1387 * still unconditionally validated below */
1388 if (!p_draw_info) {
1389 post_update_dirty_flags = ctx->dirty & ~(SWR_NEW_FRAMEBUFFER |
1390 SWR_NEW_RASTERIZER |
1391 SWR_NEW_VIEWPORT);
1392 ctx->dirty = 0;
1393 }
1394
1395 /* Scissor */
1396 if (ctx->dirty & SWR_NEW_SCISSOR) {
1397 ctx->api.pfnSwrSetScissorRects(ctx->swrContext, KNOB_NUM_VIEWPORTS_SCISSORS, ctx->swr_scissors);
1398 }
1399
1400 /* Set vertex & index buffers */
1401 if (ctx->dirty & SWR_NEW_VERTEX) {
1402 const struct pipe_draw_info &info = *p_draw_info;
1403
1404 /* vertex buffers */
1405 SWR_VERTEX_BUFFER_STATE swrVertexBuffers[PIPE_MAX_ATTRIBS];
1406 for (UINT i = 0; i < ctx->num_vertex_buffers; i++) {
1407 uint32_t size = 0, pitch = 0, elems = 0, partial_inbounds = 0;
1408 uint32_t min_vertex_index = 0;
1409 const uint8_t *p_data;
1410 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
1411
1412 pitch = vb->stride;
1413 if (vb->is_user_buffer) {
1414 /* Client buffer
1415 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
1416 * revalidate on each draw */
1417 post_update_dirty_flags |= SWR_NEW_VERTEX;
1418
1419 uint32_t base;
1420 swr_user_vbuf_range(&info, ctx->velems, vb, i, &elems, &base, &size);
1421 partial_inbounds = 0;
1422 min_vertex_index = info.min_index + info.index_bias;
1423
1424 /* Use user memory directly. The draw will access user-buffer
1425 * directly and then block. It's easier and usually
1426 * faster than copying.
1427 */
1428 post_update_dirty_flags |= SWR_BLOCK_CLIENT_DRAW;
1429 p_data = (const uint8_t *) vb->buffer.user;
1430 } else if (vb->buffer.resource) {
1431 /* VBO */
1432 if (!pitch) {
1433 /* If pitch=0 (ie vb->stride), buffer contains a single
1434 * constant attribute. Use the stream_pitch which was
1435 * calculated during creation of vertex_elements_state for the
1436 * size of the attribute. */
1437 size = ctx->velems->stream_pitch[i];
1438 elems = 1;
1439 partial_inbounds = 0;
1440 min_vertex_index = 0;
1441 } else {
1442 /* size is based on buffer->width0 rather than info.max_index
1443 * to prevent having to validate VBO on each draw. */
1444 size = vb->buffer.resource->width0;
1445 elems = size / pitch;
1446 partial_inbounds = size % pitch;
1447 min_vertex_index = 0;
1448 }
1449
1450 p_data = swr_resource_data(vb->buffer.resource) + vb->buffer_offset;
1451 } else
1452 p_data = NULL;
1453
1454 swrVertexBuffers[i] = {0};
1455 swrVertexBuffers[i].index = i;
1456 swrVertexBuffers[i].pitch = pitch;
1457 swrVertexBuffers[i].xpData = (gfxptr_t) p_data;
1458 swrVertexBuffers[i].size = size;
1459 swrVertexBuffers[i].minVertex = min_vertex_index;
1460 swrVertexBuffers[i].maxVertex = elems;
1461 swrVertexBuffers[i].partialInboundsSize = partial_inbounds;
1462 }
1463
1464 ctx->api.pfnSwrSetVertexBuffers(
1465 ctx->swrContext, ctx->num_vertex_buffers, swrVertexBuffers);
1466
1467 /* index buffer, if required (info passed in by swr_draw_vbo) */
1468 SWR_FORMAT index_type = R32_UINT; /* Default for non-indexed draws */
1469 if (info.index_size) {
1470 const uint8_t *p_data;
1471 uint32_t size, pitch;
1472
1473 pitch = info.index_size ? info.index_size : sizeof(uint32_t);
1474 index_type = swr_convert_index_type(pitch);
1475
1476 if (!info.has_user_indices) {
1477 /* VBO
1478 * size is based on buffer->width0 rather than info.count
1479 * to prevent having to validate VBO on each draw */
1480 size = info.index.resource->width0;
1481 p_data = swr_resource_data(info.index.resource);
1482 } else {
1483 /* Client buffer
1484 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
1485 * revalidate on each draw */
1486 post_update_dirty_flags |= SWR_NEW_VERTEX;
1487
1488 size = info.count * pitch;
1489
1490 /* Use user memory directly. The draw will access user-buffer
1491 * directly and then block. It's easier and usually
1492 * faster than copying.
1493 */
1494 post_update_dirty_flags |= SWR_BLOCK_CLIENT_DRAW;
1495 p_data = (const uint8_t *) info.index.user;
1496 }
1497
1498 SWR_INDEX_BUFFER_STATE swrIndexBuffer;
1499 swrIndexBuffer.format = swr_convert_index_type(info.index_size);
1500 swrIndexBuffer.xpIndices = (gfxptr_t) p_data;
1501 swrIndexBuffer.size = size;
1502
1503 ctx->api.pfnSwrSetIndexBuffer(ctx->swrContext, &swrIndexBuffer);
1504 }
1505
1506 struct swr_vertex_element_state *velems = ctx->velems;
1507 if (velems && velems->fsState.indexType != index_type) {
1508 velems->fsFunc = NULL;
1509 velems->fsState.indexType = index_type;
1510 }
1511 }
1512
1513 /* GeometryShader */
1514 if (ctx->dirty & (SWR_NEW_GS |
1515 SWR_NEW_VS |
1516 SWR_NEW_TCS |
1517 SWR_NEW_TES |
1518 SWR_NEW_SAMPLER |
1519 SWR_NEW_SAMPLER_VIEW)) {
1520 if (ctx->gs) {
1521 swr_jit_gs_key key;
1522 swr_generate_gs_key(key, ctx, ctx->gs);
1523 auto search = ctx->gs->map.find(key);
1524 PFN_GS_FUNC func;
1525 if (search != ctx->gs->map.end()) {
1526 func = search->second->shader;
1527 } else {
1528 func = swr_compile_gs(ctx, key);
1529 }
1530 ctx->api.pfnSwrSetGsFunc(ctx->swrContext, func);
1531
1532 /* JIT sampler state */
1533 if (ctx->dirty & SWR_NEW_SAMPLER) {
1534 swr_update_sampler_state(ctx,
1535 PIPE_SHADER_GEOMETRY,
1536 key.nr_samplers,
1537 ctx->swrDC.samplersGS);
1538 }
1539
1540 /* JIT sampler view state */
1541 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1542 swr_update_texture_state(ctx,
1543 PIPE_SHADER_GEOMETRY,
1544 key.nr_sampler_views,
1545 ctx->swrDC.texturesGS);
1546 }
1547
1548 ctx->api.pfnSwrSetGsState(ctx->swrContext, &ctx->gs->gsState);
1549 } else {
1550 SWR_GS_STATE state = { 0 };
1551 ctx->api.pfnSwrSetGsState(ctx->swrContext, &state);
1552 ctx->api.pfnSwrSetGsFunc(ctx->swrContext, NULL);
1553 }
1554 }
1555
1556 // We may need to restore tessellation state
1557 // This restored state may be however overwritten
1558 // during shader compilation
1559 if (ctx->dirty & SWR_NEW_TS) {
1560 if (ctx->tes != nullptr) {
1561 ctx->tsState = ctx->tes->ts_state;
1562 ctx->api.pfnSwrSetTsState(ctx->swrContext, &ctx->tsState);
1563 } else {
1564 SWR_TS_STATE state = { 0 };
1565 ctx->api.pfnSwrSetTsState(ctx->swrContext, &state);
1566 }
1567 }
1568
1569 // Tessellation Evaluation Shader
1570 // Compile TES first, because TCS is optional
1571 if (ctx->dirty & (SWR_NEW_GS |
1572 SWR_NEW_VS |
1573 SWR_NEW_TCS |
1574 SWR_NEW_TES |
1575 SWR_NEW_SAMPLER |
1576 SWR_NEW_SAMPLER_VIEW)) {
1577 if (ctx->tes) {
1578 swr_jit_tes_key key;
1579 swr_generate_tes_key(key, ctx, ctx->tes);
1580
1581 auto search = ctx->tes->map.find(key);
1582 PFN_TES_FUNC func;
1583 if (search != ctx->tes->map.end()) {
1584 func = search->second->shader;
1585 } else {
1586 func = swr_compile_tes(ctx, key);
1587 }
1588
1589 ctx->api.pfnSwrSetDsFunc(ctx->swrContext, func);
1590
1591 /* JIT sampler state */
1592 if (ctx->dirty & SWR_NEW_SAMPLER) {
1593 swr_update_sampler_state(ctx,
1594 PIPE_SHADER_TESS_EVAL,
1595 key.nr_samplers,
1596 ctx->swrDC.samplersTES);
1597 }
1598
1599 /* JIT sampler view state */
1600 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1601 swr_update_texture_state(ctx,
1602 PIPE_SHADER_TESS_EVAL,
1603 key.nr_sampler_views,
1604 ctx->swrDC.texturesTES);
1605 }
1606
1607 // Update tessellation state in case it's been updated
1608 ctx->api.pfnSwrSetTsState(ctx->swrContext, &ctx->tsState);
1609 } else {
1610 ctx->api.pfnSwrSetDsFunc(ctx->swrContext, NULL);
1611 }
1612 }
1613
1614 /* Tessellation Control Shader */
1615 if (ctx->dirty & (SWR_NEW_GS |
1616 SWR_NEW_VS |
1617 SWR_NEW_TCS |
1618 SWR_NEW_TES |
1619 SWR_NEW_SAMPLER |
1620 SWR_NEW_SAMPLER_VIEW)) {
1621 if (ctx->tcs) {
1622 ctx->tcs->vertices_per_patch = p_draw_info->vertices_per_patch;
1623
1624 swr_jit_tcs_key key;
1625 swr_generate_tcs_key(key, ctx, ctx->tcs);
1626
1627 auto search = ctx->tcs->map.find(key);
1628 PFN_TCS_FUNC func;
1629 if (search != ctx->tcs->map.end()) {
1630 func = search->second->shader;
1631 } else {
1632 func = swr_compile_tcs(ctx, key);
1633 }
1634
1635 ctx->api.pfnSwrSetHsFunc(ctx->swrContext, func);
1636
1637 /* JIT sampler state */
1638 if (ctx->dirty & SWR_NEW_SAMPLER) {
1639 swr_update_sampler_state(ctx,
1640 PIPE_SHADER_TESS_CTRL,
1641 key.nr_samplers,
1642 ctx->swrDC.samplersTCS);
1643 }
1644
1645 /* JIT sampler view state */
1646 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1647 swr_update_texture_state(ctx,
1648 PIPE_SHADER_TESS_CTRL,
1649 key.nr_sampler_views,
1650 ctx->swrDC.texturesTCS);
1651 }
1652
1653 // Update tessellation state in case it's been updated
1654 ctx->api.pfnSwrSetTsState(ctx->swrContext, &ctx->tsState);
1655 } else {
1656 ctx->api.pfnSwrSetHsFunc(ctx->swrContext, NULL);
1657 }
1658 }
1659
1660 /* VertexShader */
1661 if (ctx->dirty
1662 & (SWR_NEW_VS | SWR_NEW_RASTERIZER | // for clip planes
1663 SWR_NEW_SAMPLER | SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1664 swr_jit_vs_key key;
1665 swr_generate_vs_key(key, ctx, ctx->vs);
1666 auto search = ctx->vs->map.find(key);
1667 PFN_VERTEX_FUNC func;
1668 if (search != ctx->vs->map.end()) {
1669 func = search->second->shader;
1670 } else {
1671 func = swr_compile_vs(ctx, key);
1672 }
1673 ctx->api.pfnSwrSetVertexFunc(ctx->swrContext, func);
1674
1675 /* JIT sampler state */
1676 if (ctx->dirty & SWR_NEW_SAMPLER) {
1677 swr_update_sampler_state(
1678 ctx, PIPE_SHADER_VERTEX, key.nr_samplers, ctx->swrDC.samplersVS);
1679 }
1680
1681 /* JIT sampler view state */
1682 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1683 swr_update_texture_state(ctx,
1684 PIPE_SHADER_VERTEX,
1685 key.nr_sampler_views,
1686 ctx->swrDC.texturesVS);
1687 }
1688 }
1689
1690 /* work around the fact that poly stipple also affects lines */
1691 /* and points, since we rasterize them as triangles, too */
1692 /* Has to be before fragment shader, since it sets SWR_NEW_FS */
1693 if (p_draw_info) {
1694 bool new_prim_is_poly =
1695 (u_reduced_prim(p_draw_info->mode) == PIPE_PRIM_TRIANGLES) &&
1696 (ctx->derived.rastState.fillMode == SWR_FILLMODE_SOLID);
1697 if (new_prim_is_poly != ctx->poly_stipple.prim_is_poly) {
1698 ctx->dirty |= SWR_NEW_FS;
1699 ctx->poly_stipple.prim_is_poly = new_prim_is_poly;
1700 }
1701 }
1702
1703 /* FragmentShader */
1704 if (ctx->dirty & (SWR_NEW_FS |
1705 SWR_NEW_VS |
1706 SWR_NEW_GS |
1707 SWR_NEW_TES |
1708 SWR_NEW_TCS |
1709 SWR_NEW_RASTERIZER |
1710 SWR_NEW_SAMPLER |
1711 SWR_NEW_SAMPLER_VIEW |
1712 SWR_NEW_FRAMEBUFFER)) {
1713 swr_jit_fs_key key;
1714 swr_generate_fs_key(key, ctx, ctx->fs);
1715 auto search = ctx->fs->map.find(key);
1716 PFN_PIXEL_KERNEL func;
1717 if (search != ctx->fs->map.end()) {
1718 func = search->second->shader;
1719 } else {
1720 func = swr_compile_fs(ctx, key);
1721 }
1722 SWR_PS_STATE psState = {0};
1723 psState.pfnPixelShader = func;
1724 psState.killsPixel = ctx->fs->info.base.uses_kill;
1725 psState.inputCoverage = SWR_INPUT_COVERAGE_NORMAL;
1726 psState.writesODepth = ctx->fs->info.base.writes_z;
1727 psState.usesSourceDepth = ctx->fs->info.base.reads_z;
1728 psState.shadingRate = SWR_SHADING_RATE_PIXEL;
1729 psState.renderTargetMask = (1 << ctx->framebuffer.nr_cbufs) - 1;
1730 psState.posOffset = SWR_PS_POSITION_SAMPLE_NONE;
1731 uint32_t barycentricsMask = 0;
1732 #if 0
1733 // when we switch to mesa-master
1734 if (ctx->fs->info.base.uses_persp_center ||
1735 ctx->fs->info.base.uses_linear_center)
1736 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1737 if (ctx->fs->info.base.uses_persp_centroid ||
1738 ctx->fs->info.base.uses_linear_centroid)
1739 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1740 if (ctx->fs->info.base.uses_persp_sample ||
1741 ctx->fs->info.base.uses_linear_sample)
1742 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1743 #else
1744 for (unsigned i = 0; i < ctx->fs->info.base.num_inputs; i++) {
1745 switch (ctx->fs->info.base.input_interpolate_loc[i]) {
1746 case TGSI_INTERPOLATE_LOC_CENTER:
1747 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1748 break;
1749 case TGSI_INTERPOLATE_LOC_CENTROID:
1750 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1751 break;
1752 case TGSI_INTERPOLATE_LOC_SAMPLE:
1753 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1754 break;
1755 }
1756 }
1757 #endif
1758 psState.barycentricsMask = barycentricsMask;
1759 psState.usesUAV = false; // XXX
1760 psState.forceEarlyZ = false;
1761 ctx->api.pfnSwrSetPixelShaderState(ctx->swrContext, &psState);
1762
1763 /* JIT sampler state */
1764 if (ctx->dirty & (SWR_NEW_SAMPLER |
1765 SWR_NEW_FS)) {
1766 swr_update_sampler_state(ctx,
1767 PIPE_SHADER_FRAGMENT,
1768 key.nr_samplers,
1769 ctx->swrDC.samplersFS);
1770 }
1771
1772 /* JIT sampler view state */
1773 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW |
1774 SWR_NEW_FRAMEBUFFER |
1775 SWR_NEW_FS)) {
1776 swr_update_texture_state(ctx,
1777 PIPE_SHADER_FRAGMENT,
1778 key.nr_sampler_views,
1779 ctx->swrDC.texturesFS);
1780 }
1781 }
1782
1783
1784 /* VertexShader Constants */
1785 if (ctx->dirty & SWR_NEW_VSCONSTANTS) {
1786 swr_update_constants(ctx, PIPE_SHADER_VERTEX);
1787 }
1788
1789 /* FragmentShader Constants */
1790 if (ctx->dirty & SWR_NEW_FSCONSTANTS) {
1791 swr_update_constants(ctx, PIPE_SHADER_FRAGMENT);
1792 }
1793
1794 /* GeometryShader Constants */
1795 if (ctx->dirty & SWR_NEW_GSCONSTANTS) {
1796 swr_update_constants(ctx, PIPE_SHADER_GEOMETRY);
1797 }
1798
1799 /* Tessellation Control Shader Constants */
1800 if (ctx->dirty & SWR_NEW_TCSCONSTANTS) {
1801 swr_update_constants(ctx, PIPE_SHADER_TESS_CTRL);
1802 }
1803
1804 /* Tessellation Evaluation Shader Constants */
1805 if (ctx->dirty & SWR_NEW_TESCONSTANTS) {
1806 swr_update_constants(ctx, PIPE_SHADER_TESS_EVAL);
1807 }
1808
1809 /* Depth/stencil state */
1810 if (ctx->dirty & (SWR_NEW_DEPTH_STENCIL_ALPHA | SWR_NEW_FRAMEBUFFER)) {
1811 struct pipe_depth_state *depth = &(ctx->depth_stencil->depth);
1812 struct pipe_stencil_state *stencil = ctx->depth_stencil->stencil;
1813 SWR_DEPTH_STENCIL_STATE depthStencilState = {{0}};
1814 SWR_DEPTH_BOUNDS_STATE depthBoundsState = {0};
1815
1816 /* XXX, incomplete. Need to flesh out stencil & alpha test state
1817 struct pipe_stencil_state *front_stencil =
1818 ctx->depth_stencil.stencil[0];
1819 struct pipe_stencil_state *back_stencil = ctx->depth_stencil.stencil[1];
1820 struct pipe_alpha_state alpha;
1821 */
1822 if (stencil[0].enabled) {
1823 depthStencilState.stencilWriteEnable = 1;
1824 depthStencilState.stencilTestEnable = 1;
1825 depthStencilState.stencilTestFunc =
1826 swr_convert_depth_func(stencil[0].func);
1827
1828 depthStencilState.stencilPassDepthPassOp =
1829 swr_convert_stencil_op(stencil[0].zpass_op);
1830 depthStencilState.stencilPassDepthFailOp =
1831 swr_convert_stencil_op(stencil[0].zfail_op);
1832 depthStencilState.stencilFailOp =
1833 swr_convert_stencil_op(stencil[0].fail_op);
1834 depthStencilState.stencilWriteMask = stencil[0].writemask;
1835 depthStencilState.stencilTestMask = stencil[0].valuemask;
1836 depthStencilState.stencilRefValue = ctx->stencil_ref.ref_value[0];
1837 }
1838 if (stencil[1].enabled) {
1839 depthStencilState.doubleSidedStencilTestEnable = 1;
1840
1841 depthStencilState.backfaceStencilTestFunc =
1842 swr_convert_depth_func(stencil[1].func);
1843
1844 depthStencilState.backfaceStencilPassDepthPassOp =
1845 swr_convert_stencil_op(stencil[1].zpass_op);
1846 depthStencilState.backfaceStencilPassDepthFailOp =
1847 swr_convert_stencil_op(stencil[1].zfail_op);
1848 depthStencilState.backfaceStencilFailOp =
1849 swr_convert_stencil_op(stencil[1].fail_op);
1850 depthStencilState.backfaceStencilWriteMask = stencil[1].writemask;
1851 depthStencilState.backfaceStencilTestMask = stencil[1].valuemask;
1852
1853 depthStencilState.backfaceStencilRefValue =
1854 ctx->stencil_ref.ref_value[1];
1855 }
1856
1857 depthStencilState.depthTestEnable = depth->enabled;
1858 depthStencilState.depthTestFunc = swr_convert_depth_func(depth->func);
1859 depthStencilState.depthWriteEnable = depth->writemask;
1860 ctx->api.pfnSwrSetDepthStencilState(ctx->swrContext, &depthStencilState);
1861
1862 depthBoundsState.depthBoundsTestEnable = depth->bounds_test;
1863 depthBoundsState.depthBoundsTestMinValue = depth->bounds_min;
1864 depthBoundsState.depthBoundsTestMaxValue = depth->bounds_max;
1865 ctx->api.pfnSwrSetDepthBoundsState(ctx->swrContext, &depthBoundsState);
1866 }
1867
1868 /* Blend State */
1869 if (ctx->dirty & (SWR_NEW_BLEND |
1870 SWR_NEW_RASTERIZER |
1871 SWR_NEW_FRAMEBUFFER |
1872 SWR_NEW_DEPTH_STENCIL_ALPHA)) {
1873 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
1874
1875 SWR_BLEND_STATE blendState;
1876 memcpy(&blendState, &ctx->blend->blendState, sizeof(blendState));
1877 blendState.constantColor[0] = ctx->blend_color.color[0];
1878 blendState.constantColor[1] = ctx->blend_color.color[1];
1879 blendState.constantColor[2] = ctx->blend_color.color[2];
1880 blendState.constantColor[3] = ctx->blend_color.color[3];
1881 blendState.alphaTestReference =
1882 *((uint32_t*)&ctx->depth_stencil->alpha.ref_value);
1883
1884 blendState.sampleMask = ctx->sample_mask;
1885 blendState.sampleCount = GetSampleCount(fb->samples);
1886
1887 /* If there are no color buffers bound, disable writes on RT0
1888 * and skip loop */
1889 if (fb->nr_cbufs == 0) {
1890 blendState.renderTarget[0].writeDisableRed = 1;
1891 blendState.renderTarget[0].writeDisableGreen = 1;
1892 blendState.renderTarget[0].writeDisableBlue = 1;
1893 blendState.renderTarget[0].writeDisableAlpha = 1;
1894 ctx->api.pfnSwrSetBlendFunc(ctx->swrContext, 0, NULL);
1895 }
1896 else
1897 for (int target = 0;
1898 target < std::min(SWR_NUM_RENDERTARGETS,
1899 PIPE_MAX_COLOR_BUFS);
1900 target++) {
1901 if (!fb->cbufs[target])
1902 continue;
1903
1904 struct swr_resource *colorBuffer =
1905 swr_resource(fb->cbufs[target]->texture);
1906
1907 BLEND_COMPILE_STATE compileState;
1908 memset(&compileState, 0, sizeof(compileState));
1909 compileState.format = colorBuffer->swr.format;
1910 memcpy(&compileState.blendState,
1911 &ctx->blend->compileState[target],
1912 sizeof(compileState.blendState));
1913
1914 const SWR_FORMAT_INFO& info = GetFormatInfo(compileState.format);
1915 if (compileState.blendState.logicOpEnable &&
1916 ((info.type[0] == SWR_TYPE_FLOAT) || info.isSRGB)) {
1917 compileState.blendState.logicOpEnable = false;
1918 }
1919
1920 if (info.type[0] == SWR_TYPE_SINT || info.type[0] == SWR_TYPE_UINT)
1921 compileState.blendState.blendEnable = false;
1922
1923 if (compileState.blendState.blendEnable == false &&
1924 compileState.blendState.logicOpEnable == false &&
1925 ctx->depth_stencil->alpha.enabled == 0) {
1926 ctx->api.pfnSwrSetBlendFunc(ctx->swrContext, target, NULL);
1927 continue;
1928 }
1929
1930 compileState.desc.alphaTestEnable =
1931 ctx->depth_stencil->alpha.enabled;
1932 compileState.desc.independentAlphaBlendEnable =
1933 (compileState.blendState.sourceBlendFactor !=
1934 compileState.blendState.sourceAlphaBlendFactor) ||
1935 (compileState.blendState.destBlendFactor !=
1936 compileState.blendState.destAlphaBlendFactor) ||
1937 (compileState.blendState.colorBlendFunc !=
1938 compileState.blendState.alphaBlendFunc);
1939 compileState.desc.alphaToCoverageEnable =
1940 ctx->blend->pipe.alpha_to_coverage;
1941 compileState.desc.sampleMaskEnable = (blendState.sampleMask != 0);
1942 compileState.desc.numSamples = fb->samples;
1943
1944 compileState.alphaTestFunction =
1945 swr_convert_depth_func(ctx->depth_stencil->alpha.func);
1946 compileState.alphaTestFormat = ALPHA_TEST_FLOAT32; // xxx
1947
1948 compileState.Canonicalize();
1949
1950 PFN_BLEND_JIT_FUNC func = NULL;
1951 auto search = ctx->blendJIT->find(compileState);
1952 if (search != ctx->blendJIT->end()) {
1953 func = search->second;
1954 } else {
1955 HANDLE hJitMgr = screen->hJitMgr;
1956 func = JitCompileBlend(hJitMgr, compileState);
1957 debug_printf("BLEND shader %p\n", func);
1958 assert(func && "Error: BlendShader = NULL");
1959
1960 ctx->blendJIT->insert(std::make_pair(compileState, func));
1961 }
1962 ctx->api.pfnSwrSetBlendFunc(ctx->swrContext, target, func);
1963 }
1964
1965 ctx->api.pfnSwrSetBlendState(ctx->swrContext, &blendState);
1966 }
1967
1968 if (ctx->dirty & SWR_NEW_STIPPLE) {
1969 swr_update_poly_stipple(ctx);
1970 }
1971
1972 if (ctx->dirty & (SWR_NEW_VS | SWR_NEW_TCS | SWR_NEW_TES | SWR_NEW_SO | SWR_NEW_RASTERIZER)) {
1973 ctx->vs->soState.rasterizerDisable =
1974 ctx->rasterizer->rasterizer_discard;
1975 ctx->api.pfnSwrSetSoState(ctx->swrContext, &ctx->vs->soState);
1976
1977 pipe_stream_output_info *stream_output = &ctx->vs->pipe.stream_output;
1978
1979 for (uint32_t i = 0; i < MAX_SO_STREAMS; i++) {
1980 SWR_STREAMOUT_BUFFER buffer = {0};
1981 if (ctx->so_targets[i]) {
1982 buffer.enable = true;
1983 buffer.pBuffer =
1984 (gfxptr_t)(swr_resource_data(ctx->so_targets[i]->buffer) +
1985 ctx->so_targets[i]->buffer_offset);
1986 buffer.bufferSize = ctx->so_targets[i]->buffer_size >> 2;
1987 buffer.pitch = stream_output->stride[i];
1988 buffer.streamOffset = 0;
1989 }
1990
1991 ctx->api.pfnSwrSetSoBuffers(ctx->swrContext, &buffer, i);
1992 }
1993 }
1994
1995
1996 if (ctx->dirty & (SWR_NEW_CLIP | SWR_NEW_RASTERIZER | SWR_NEW_VS)) {
1997 // shader exporting clip distances overrides all user clip planes
1998 if (ctx->rasterizer->clip_plane_enable &&
1999 !swr_get_last_fe(ctx)->num_written_clipdistance)
2000 {
2001 swr_draw_context *pDC = &ctx->swrDC;
2002 memcpy(pDC->userClipPlanes,
2003 ctx->clip.ucp,
2004 sizeof(pDC->userClipPlanes));
2005 }
2006 }
2007
2008 // set up backend state
2009 SWR_BACKEND_STATE backendState = {0};
2010 if (ctx->gs) {
2011 backendState.numAttributes = ctx->gs->info.base.num_outputs - 1;
2012 } else
2013 if (ctx->tes) {
2014 backendState.numAttributes = ctx->tes->info.base.num_outputs - 1;
2015 // no case for TCS, because if TCS is active, TES must be active
2016 // as well - pipeline stages after tessellation does not support patches
2017 } else {
2018 backendState.numAttributes = ctx->vs->info.base.num_outputs - 1;
2019 if (ctx->fs->info.base.uses_primid) {
2020 backendState.numAttributes++;
2021 backendState.swizzleEnable = true;
2022 for (unsigned i = 0; i < sizeof(backendState.numComponents); i++) {
2023 backendState.swizzleMap[i].sourceAttrib = i;
2024 }
2025 backendState.swizzleMap[ctx->vs->info.base.num_outputs - 1].constantSource =
2026 SWR_CONSTANT_SOURCE_PRIM_ID;
2027 backendState.swizzleMap[ctx->vs->info.base.num_outputs - 1].componentOverrideMask = 1;
2028 }
2029 }
2030 if (ctx->rasterizer->sprite_coord_enable)
2031 backendState.numAttributes++;
2032
2033 backendState.numAttributes = std::min((size_t)backendState.numAttributes,
2034 sizeof(backendState.numComponents));
2035 for (unsigned i = 0; i < backendState.numAttributes; i++)
2036 backendState.numComponents[i] = 4;
2037 backendState.constantInterpolationMask = ctx->fs->constantMask |
2038 (ctx->rasterizer->flatshade ? ctx->fs->flatConstantMask : 0);
2039 backendState.pointSpriteTexCoordMask = ctx->fs->pointSpriteMask;
2040
2041 struct tgsi_shader_info *pLastFE = swr_get_last_fe(ctx);
2042
2043 backendState.readRenderTargetArrayIndex = pLastFE->writes_layer;
2044 backendState.readViewportArrayIndex = pLastFE->writes_viewport_index;
2045 backendState.vertexAttribOffset = VERTEX_ATTRIB_START_SLOT; // TODO: optimize
2046
2047 backendState.clipDistanceMask =
2048 pLastFE->num_written_clipdistance ?
2049 pLastFE->clipdist_writemask & ctx->rasterizer->clip_plane_enable :
2050 ctx->rasterizer->clip_plane_enable;
2051
2052 backendState.cullDistanceMask =
2053 pLastFE->culldist_writemask << pLastFE->num_written_clipdistance;
2054
2055 // Assume old layout of SGV, POSITION, CLIPCULL, ATTRIB
2056 backendState.vertexClipCullOffset = backendState.vertexAttribOffset - 2;
2057
2058 ctx->api.pfnSwrSetBackendState(ctx->swrContext, &backendState);
2059
2060 /* Ensure that any in-progress attachment change StoreTiles finish */
2061 if (swr_is_fence_pending(screen->flush_fence))
2062 swr_fence_finish(pipe->screen, NULL, screen->flush_fence, 0);
2063
2064 /* Finally, update the in-use status of all resources involved in draw */
2065 swr_update_resource_status(pipe, p_draw_info);
2066
2067 ctx->dirty = post_update_dirty_flags;
2068 }
2069
2070
2071 static struct pipe_stream_output_target *
2072 swr_create_so_target(struct pipe_context *pipe,
2073 struct pipe_resource *buffer,
2074 unsigned buffer_offset,
2075 unsigned buffer_size)
2076 {
2077 struct pipe_stream_output_target *target;
2078
2079 target = CALLOC_STRUCT(pipe_stream_output_target);
2080 if (!target)
2081 return NULL;
2082
2083 target->context = pipe;
2084 target->reference.count = 1;
2085 pipe_resource_reference(&target->buffer, buffer);
2086 target->buffer_offset = buffer_offset;
2087 target->buffer_size = buffer_size;
2088 return target;
2089 }
2090
2091 static void
2092 swr_destroy_so_target(struct pipe_context *pipe,
2093 struct pipe_stream_output_target *target)
2094 {
2095 pipe_resource_reference(&target->buffer, NULL);
2096 FREE(target);
2097 }
2098
2099 static void
2100 swr_set_so_targets(struct pipe_context *pipe,
2101 unsigned num_targets,
2102 struct pipe_stream_output_target **targets,
2103 const unsigned *offsets)
2104 {
2105 struct swr_context *swr = swr_context(pipe);
2106 uint32_t i;
2107
2108 assert(num_targets <= MAX_SO_STREAMS);
2109
2110 for (i = 0; i < num_targets; i++) {
2111 pipe_so_target_reference(
2112 (struct pipe_stream_output_target **)&swr->so_targets[i],
2113 targets[i]);
2114 }
2115
2116 for (/* fall-through */; i < swr->num_so_targets; i++) {
2117 pipe_so_target_reference(
2118 (struct pipe_stream_output_target **)&swr->so_targets[i], NULL);
2119 }
2120
2121 swr->num_so_targets = num_targets;
2122 swr->swrDC.soPrims = &swr->so_primCounter;
2123
2124 swr->dirty |= SWR_NEW_SO;
2125 }
2126
2127
2128 void
2129 swr_state_init(struct pipe_context *pipe)
2130 {
2131 pipe->create_blend_state = swr_create_blend_state;
2132 pipe->bind_blend_state = swr_bind_blend_state;
2133 pipe->delete_blend_state = swr_delete_blend_state;
2134
2135 pipe->create_depth_stencil_alpha_state = swr_create_depth_stencil_state;
2136 pipe->bind_depth_stencil_alpha_state = swr_bind_depth_stencil_state;
2137 pipe->delete_depth_stencil_alpha_state = swr_delete_depth_stencil_state;
2138
2139 pipe->create_rasterizer_state = swr_create_rasterizer_state;
2140 pipe->bind_rasterizer_state = swr_bind_rasterizer_state;
2141 pipe->delete_rasterizer_state = swr_delete_rasterizer_state;
2142
2143 pipe->create_sampler_state = swr_create_sampler_state;
2144 pipe->bind_sampler_states = swr_bind_sampler_states;
2145 pipe->delete_sampler_state = swr_delete_sampler_state;
2146
2147 pipe->create_sampler_view = swr_create_sampler_view;
2148 pipe->set_sampler_views = swr_set_sampler_views;
2149 pipe->sampler_view_destroy = swr_sampler_view_destroy;
2150
2151 pipe->create_vs_state = swr_create_vs_state;
2152 pipe->bind_vs_state = swr_bind_vs_state;
2153 pipe->delete_vs_state = swr_delete_vs_state;
2154
2155 pipe->create_fs_state = swr_create_fs_state;
2156 pipe->bind_fs_state = swr_bind_fs_state;
2157 pipe->delete_fs_state = swr_delete_fs_state;
2158
2159 pipe->create_gs_state = swr_create_gs_state;
2160 pipe->bind_gs_state = swr_bind_gs_state;
2161 pipe->delete_gs_state = swr_delete_gs_state;
2162
2163 pipe->create_tcs_state = swr_create_tcs_state;
2164 pipe->bind_tcs_state = swr_bind_tcs_state;
2165 pipe->delete_tcs_state = swr_delete_tcs_state;
2166
2167 pipe->create_tes_state = swr_create_tes_state;
2168 pipe->bind_tes_state = swr_bind_tes_state;
2169 pipe->delete_tes_state = swr_delete_tes_state;
2170
2171 pipe->set_constant_buffer = swr_set_constant_buffer;
2172
2173 pipe->create_vertex_elements_state = swr_create_vertex_elements_state;
2174 pipe->bind_vertex_elements_state = swr_bind_vertex_elements_state;
2175 pipe->delete_vertex_elements_state = swr_delete_vertex_elements_state;
2176
2177 pipe->set_vertex_buffers = swr_set_vertex_buffers;
2178
2179 pipe->set_polygon_stipple = swr_set_polygon_stipple;
2180 pipe->set_clip_state = swr_set_clip_state;
2181 pipe->set_scissor_states = swr_set_scissor_states;
2182 pipe->set_viewport_states = swr_set_viewport_states;
2183
2184 pipe->set_framebuffer_state = swr_set_framebuffer_state;
2185
2186 pipe->set_blend_color = swr_set_blend_color;
2187 pipe->set_stencil_ref = swr_set_stencil_ref;
2188
2189 pipe->set_sample_mask = swr_set_sample_mask;
2190 pipe->get_sample_position = swr_get_sample_position;
2191
2192 pipe->create_stream_output_target = swr_create_so_target;
2193 pipe->stream_output_target_destroy = swr_destroy_so_target;
2194 pipe->set_stream_output_targets = swr_set_so_targets;
2195 }