d19acfbb347ba4026e92ab6b405b08a8a6c9b0b7
[mesa.git] / src / gallium / drivers / swr / swr_state.cpp
1 /****************************************************************************
2 * Copyright (C) 2015 Intel Corporation. All Rights Reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 ***************************************************************************/
23
24 // llvm redefines DEBUG
25 #pragma push_macro("DEBUG")
26 #undef DEBUG
27 #include "JitManager.h"
28 #pragma pop_macro("DEBUG")
29
30 #include "common/os.h"
31 #include "jit_api.h"
32 #include "state_llvm.h"
33
34 #include "gallivm/lp_bld_tgsi.h"
35 #include "util/u_format.h"
36
37 #include "util/u_memory.h"
38 #include "util/u_inlines.h"
39 #include "util/u_helpers.h"
40 #include "util/u_framebuffer.h"
41 #include "util/u_viewport.h"
42
43 #include "swr_state.h"
44 #include "swr_context.h"
45 #include "swr_context_llvm.h"
46 #include "swr_screen.h"
47 #include "swr_resource.h"
48 #include "swr_tex_sample.h"
49 #include "swr_scratch.h"
50 #include "swr_shader.h"
51 #include "swr_fence.h"
52
53 /* These should be pulled out into separate files as necessary
54 * Just initializing everything here to get going. */
55
56 static void *
57 swr_create_blend_state(struct pipe_context *pipe,
58 const struct pipe_blend_state *blend)
59 {
60 struct swr_blend_state *state = CALLOC_STRUCT(swr_blend_state);
61
62 memcpy(&state->pipe, blend, sizeof(*blend));
63
64 struct pipe_blend_state *pipe_blend = &state->pipe;
65
66 for (int target = 0;
67 target < std::min(SWR_NUM_RENDERTARGETS, PIPE_MAX_COLOR_BUFS);
68 target++) {
69
70 struct pipe_rt_blend_state *rt_blend = &pipe_blend->rt[target];
71 SWR_RENDER_TARGET_BLEND_STATE &blendState =
72 state->blendState.renderTarget[target];
73 RENDER_TARGET_BLEND_COMPILE_STATE &compileState =
74 state->compileState[target];
75
76 if (target != 0 && !pipe_blend->independent_blend_enable) {
77 memcpy(&compileState,
78 &state->compileState[0],
79 sizeof(RENDER_TARGET_BLEND_COMPILE_STATE));
80 continue;
81 }
82
83 compileState.blendEnable = rt_blend->blend_enable;
84 if (compileState.blendEnable) {
85 compileState.sourceAlphaBlendFactor =
86 swr_convert_blend_factor(rt_blend->alpha_src_factor);
87 compileState.destAlphaBlendFactor =
88 swr_convert_blend_factor(rt_blend->alpha_dst_factor);
89 compileState.sourceBlendFactor =
90 swr_convert_blend_factor(rt_blend->rgb_src_factor);
91 compileState.destBlendFactor =
92 swr_convert_blend_factor(rt_blend->rgb_dst_factor);
93
94 compileState.colorBlendFunc =
95 swr_convert_blend_func(rt_blend->rgb_func);
96 compileState.alphaBlendFunc =
97 swr_convert_blend_func(rt_blend->alpha_func);
98 }
99 compileState.logicOpEnable = state->pipe.logicop_enable;
100 if (compileState.logicOpEnable) {
101 compileState.logicOpFunc =
102 swr_convert_logic_op(state->pipe.logicop_func);
103 }
104
105 blendState.writeDisableRed =
106 (rt_blend->colormask & PIPE_MASK_R) ? 0 : 1;
107 blendState.writeDisableGreen =
108 (rt_blend->colormask & PIPE_MASK_G) ? 0 : 1;
109 blendState.writeDisableBlue =
110 (rt_blend->colormask & PIPE_MASK_B) ? 0 : 1;
111 blendState.writeDisableAlpha =
112 (rt_blend->colormask & PIPE_MASK_A) ? 0 : 1;
113
114 if (rt_blend->colormask == 0)
115 compileState.blendEnable = false;
116 }
117
118 return state;
119 }
120
121 static void
122 swr_bind_blend_state(struct pipe_context *pipe, void *blend)
123 {
124 struct swr_context *ctx = swr_context(pipe);
125
126 if (ctx->blend == blend)
127 return;
128
129 ctx->blend = (swr_blend_state *)blend;
130
131 ctx->dirty |= SWR_NEW_BLEND;
132 }
133
134 static void
135 swr_delete_blend_state(struct pipe_context *pipe, void *blend)
136 {
137 FREE(blend);
138 }
139
140 static void
141 swr_set_blend_color(struct pipe_context *pipe,
142 const struct pipe_blend_color *color)
143 {
144 struct swr_context *ctx = swr_context(pipe);
145
146 ctx->blend_color = *color;
147
148 ctx->dirty |= SWR_NEW_BLEND;
149 }
150
151 static void
152 swr_set_stencil_ref(struct pipe_context *pipe,
153 const struct pipe_stencil_ref *ref)
154 {
155 struct swr_context *ctx = swr_context(pipe);
156
157 ctx->stencil_ref = *ref;
158
159 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
160 }
161
162 static void *
163 swr_create_depth_stencil_state(
164 struct pipe_context *pipe,
165 const struct pipe_depth_stencil_alpha_state *depth_stencil)
166 {
167 struct pipe_depth_stencil_alpha_state *state;
168
169 state = (pipe_depth_stencil_alpha_state *)mem_dup(depth_stencil,
170 sizeof *depth_stencil);
171
172 return state;
173 }
174
175 static void
176 swr_bind_depth_stencil_state(struct pipe_context *pipe, void *depth_stencil)
177 {
178 struct swr_context *ctx = swr_context(pipe);
179
180 if (ctx->depth_stencil == (pipe_depth_stencil_alpha_state *)depth_stencil)
181 return;
182
183 ctx->depth_stencil = (pipe_depth_stencil_alpha_state *)depth_stencil;
184
185 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
186 }
187
188 static void
189 swr_delete_depth_stencil_state(struct pipe_context *pipe, void *depth)
190 {
191 FREE(depth);
192 }
193
194
195 static void *
196 swr_create_rasterizer_state(struct pipe_context *pipe,
197 const struct pipe_rasterizer_state *rast)
198 {
199 struct pipe_rasterizer_state *state;
200 state = (pipe_rasterizer_state *)mem_dup(rast, sizeof *rast);
201
202 return state;
203 }
204
205 static void
206 swr_bind_rasterizer_state(struct pipe_context *pipe, void *handle)
207 {
208 struct swr_context *ctx = swr_context(pipe);
209 const struct pipe_rasterizer_state *rasterizer =
210 (const struct pipe_rasterizer_state *)handle;
211
212 if (ctx->rasterizer == (pipe_rasterizer_state *)rasterizer)
213 return;
214
215 ctx->rasterizer = (pipe_rasterizer_state *)rasterizer;
216
217 ctx->dirty |= SWR_NEW_RASTERIZER;
218 }
219
220 static void
221 swr_delete_rasterizer_state(struct pipe_context *pipe, void *rasterizer)
222 {
223 FREE(rasterizer);
224 }
225
226
227 static void *
228 swr_create_sampler_state(struct pipe_context *pipe,
229 const struct pipe_sampler_state *sampler)
230 {
231 struct pipe_sampler_state *state =
232 (pipe_sampler_state *)mem_dup(sampler, sizeof *sampler);
233
234 return state;
235 }
236
237 static void
238 swr_bind_sampler_states(struct pipe_context *pipe,
239 enum pipe_shader_type shader,
240 unsigned start,
241 unsigned num,
242 void **samplers)
243 {
244 struct swr_context *ctx = swr_context(pipe);
245 unsigned i;
246
247 assert(shader < PIPE_SHADER_TYPES);
248 assert(start + num <= ARRAY_SIZE(ctx->samplers[shader]));
249
250 /* set the new samplers */
251 ctx->num_samplers[shader] = num;
252 for (i = 0; i < num; i++) {
253 ctx->samplers[shader][start + i] = (pipe_sampler_state *)samplers[i];
254 }
255
256 ctx->dirty |= SWR_NEW_SAMPLER;
257 }
258
259 static void
260 swr_delete_sampler_state(struct pipe_context *pipe, void *sampler)
261 {
262 FREE(sampler);
263 }
264
265
266 static struct pipe_sampler_view *
267 swr_create_sampler_view(struct pipe_context *pipe,
268 struct pipe_resource *texture,
269 const struct pipe_sampler_view *templ)
270 {
271 struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view);
272
273 if (view) {
274 *view = *templ;
275 view->reference.count = 1;
276 view->texture = NULL;
277 pipe_resource_reference(&view->texture, texture);
278 view->context = pipe;
279 }
280
281 return view;
282 }
283
284 static void
285 swr_set_sampler_views(struct pipe_context *pipe,
286 enum pipe_shader_type shader,
287 unsigned start,
288 unsigned num,
289 struct pipe_sampler_view **views)
290 {
291 struct swr_context *ctx = swr_context(pipe);
292 uint i;
293
294 assert(num <= PIPE_MAX_SHADER_SAMPLER_VIEWS);
295
296 assert(shader < PIPE_SHADER_TYPES);
297 assert(start + num <= ARRAY_SIZE(ctx->sampler_views[shader]));
298
299 /* set the new sampler views */
300 ctx->num_sampler_views[shader] = num;
301 for (i = 0; i < num; i++) {
302 /* Note: we're using pipe_sampler_view_release() here to work around
303 * a possible crash when the old view belongs to another context that
304 * was already destroyed.
305 */
306 pipe_sampler_view_release(pipe, &ctx->sampler_views[shader][start + i]);
307 pipe_sampler_view_reference(&ctx->sampler_views[shader][start + i],
308 views[i]);
309 }
310
311 ctx->dirty |= SWR_NEW_SAMPLER_VIEW;
312 }
313
314 static void
315 swr_sampler_view_destroy(struct pipe_context *pipe,
316 struct pipe_sampler_view *view)
317 {
318 pipe_resource_reference(&view->texture, NULL);
319 FREE(view);
320 }
321
322 static void *
323 swr_create_vs_state(struct pipe_context *pipe,
324 const struct pipe_shader_state *vs)
325 {
326 struct swr_vertex_shader *swr_vs = new swr_vertex_shader;
327 if (!swr_vs)
328 return NULL;
329
330 swr_vs->pipe.tokens = tgsi_dup_tokens(vs->tokens);
331 swr_vs->pipe.stream_output = vs->stream_output;
332
333 lp_build_tgsi_info(vs->tokens, &swr_vs->info);
334
335 swr_vs->soState = {0};
336
337 if (swr_vs->pipe.stream_output.num_outputs) {
338 pipe_stream_output_info *stream_output = &swr_vs->pipe.stream_output;
339
340 swr_vs->soState.soEnable = true;
341 // soState.rasterizerDisable set on state dirty
342 // soState.streamToRasterizer not used
343
344 for (uint32_t i = 0; i < stream_output->num_outputs; i++) {
345 swr_vs->soState.streamMasks[stream_output->output[i].stream] |=
346 1 << (stream_output->output[i].register_index - 1);
347 }
348 for (uint32_t i = 0; i < MAX_SO_STREAMS; i++) {
349 swr_vs->soState.streamNumEntries[i] =
350 _mm_popcnt_u32(swr_vs->soState.streamMasks[i]);
351 }
352 }
353
354 return swr_vs;
355 }
356
357 static void
358 swr_bind_vs_state(struct pipe_context *pipe, void *vs)
359 {
360 struct swr_context *ctx = swr_context(pipe);
361
362 if (ctx->vs == vs)
363 return;
364
365 ctx->vs = (swr_vertex_shader *)vs;
366 ctx->dirty |= SWR_NEW_VS;
367 }
368
369 static void
370 swr_delete_vs_state(struct pipe_context *pipe, void *vs)
371 {
372 struct swr_vertex_shader *swr_vs = (swr_vertex_shader *)vs;
373 FREE((void *)swr_vs->pipe.tokens);
374 delete swr_vs;
375 }
376
377 static void *
378 swr_create_fs_state(struct pipe_context *pipe,
379 const struct pipe_shader_state *fs)
380 {
381 struct swr_fragment_shader *swr_fs = new swr_fragment_shader;
382 if (!swr_fs)
383 return NULL;
384
385 swr_fs->pipe.tokens = tgsi_dup_tokens(fs->tokens);
386
387 lp_build_tgsi_info(fs->tokens, &swr_fs->info);
388
389 return swr_fs;
390 }
391
392
393 static void
394 swr_bind_fs_state(struct pipe_context *pipe, void *fs)
395 {
396 struct swr_context *ctx = swr_context(pipe);
397
398 if (ctx->fs == fs)
399 return;
400
401 ctx->fs = (swr_fragment_shader *)fs;
402 ctx->dirty |= SWR_NEW_FS;
403 }
404
405 static void
406 swr_delete_fs_state(struct pipe_context *pipe, void *fs)
407 {
408 struct swr_fragment_shader *swr_fs = (swr_fragment_shader *)fs;
409 FREE((void *)swr_fs->pipe.tokens);
410 delete swr_fs;
411 }
412
413
414 static void
415 swr_set_constant_buffer(struct pipe_context *pipe,
416 uint shader,
417 uint index,
418 const struct pipe_constant_buffer *cb)
419 {
420 struct swr_context *ctx = swr_context(pipe);
421 struct pipe_resource *constants = cb ? cb->buffer : NULL;
422
423 assert(shader < PIPE_SHADER_TYPES);
424 assert(index < ARRAY_SIZE(ctx->constants[shader]));
425
426 /* note: reference counting */
427 util_copy_constant_buffer(&ctx->constants[shader][index], cb);
428
429 if (shader == PIPE_SHADER_VERTEX || shader == PIPE_SHADER_GEOMETRY) {
430 ctx->dirty |= SWR_NEW_VSCONSTANTS;
431 } else if (shader == PIPE_SHADER_FRAGMENT) {
432 ctx->dirty |= SWR_NEW_FSCONSTANTS;
433 }
434
435 if (cb && cb->user_buffer) {
436 pipe_resource_reference(&constants, NULL);
437 }
438 }
439
440
441 static void *
442 swr_create_vertex_elements_state(struct pipe_context *pipe,
443 unsigned num_elements,
444 const struct pipe_vertex_element *attribs)
445 {
446 struct swr_vertex_element_state *velems;
447 assert(num_elements <= PIPE_MAX_ATTRIBS);
448 velems = CALLOC_STRUCT(swr_vertex_element_state);
449 if (velems) {
450 velems->fsState.numAttribs = num_elements;
451 for (unsigned i = 0; i < num_elements; i++) {
452 // XXX: we should do this keyed on the VS usage info
453
454 const struct util_format_description *desc =
455 util_format_description(attribs[i].src_format);
456
457 velems->fsState.layout[i].AlignedByteOffset = attribs[i].src_offset;
458 velems->fsState.layout[i].Format =
459 mesa_to_swr_format(attribs[i].src_format);
460 velems->fsState.layout[i].StreamIndex =
461 attribs[i].vertex_buffer_index;
462 velems->fsState.layout[i].InstanceEnable =
463 attribs[i].instance_divisor != 0;
464 velems->fsState.layout[i].ComponentControl0 =
465 desc->channel[0].type != UTIL_FORMAT_TYPE_VOID
466 ? ComponentControl::StoreSrc
467 : ComponentControl::Store0;
468 velems->fsState.layout[i].ComponentControl1 =
469 desc->channel[1].type != UTIL_FORMAT_TYPE_VOID
470 ? ComponentControl::StoreSrc
471 : ComponentControl::Store0;
472 velems->fsState.layout[i].ComponentControl2 =
473 desc->channel[2].type != UTIL_FORMAT_TYPE_VOID
474 ? ComponentControl::StoreSrc
475 : ComponentControl::Store0;
476 velems->fsState.layout[i].ComponentControl3 =
477 desc->channel[3].type != UTIL_FORMAT_TYPE_VOID
478 ? ComponentControl::StoreSrc
479 : ComponentControl::Store1Fp;
480 velems->fsState.layout[i].ComponentPacking = ComponentEnable::XYZW;
481 velems->fsState.layout[i].InstanceDataStepRate =
482 attribs[i].instance_divisor;
483
484 /* Calculate the pitch of each stream */
485 const SWR_FORMAT_INFO &swr_desc = GetFormatInfo(
486 mesa_to_swr_format(attribs[i].src_format));
487 velems->stream_pitch[attribs[i].vertex_buffer_index] += swr_desc.Bpp;
488 }
489 }
490
491 return velems;
492 }
493
494 static void
495 swr_bind_vertex_elements_state(struct pipe_context *pipe, void *velems)
496 {
497 struct swr_context *ctx = swr_context(pipe);
498 struct swr_vertex_element_state *swr_velems =
499 (struct swr_vertex_element_state *)velems;
500
501 ctx->velems = swr_velems;
502 ctx->dirty |= SWR_NEW_VERTEX;
503 }
504
505 static void
506 swr_delete_vertex_elements_state(struct pipe_context *pipe, void *velems)
507 {
508 /* XXX Need to destroy fetch shader? */
509 FREE(velems);
510 }
511
512
513 static void
514 swr_set_vertex_buffers(struct pipe_context *pipe,
515 unsigned start_slot,
516 unsigned num_elements,
517 const struct pipe_vertex_buffer *buffers)
518 {
519 struct swr_context *ctx = swr_context(pipe);
520
521 assert(num_elements <= PIPE_MAX_ATTRIBS);
522
523 util_set_vertex_buffers_count(ctx->vertex_buffer,
524 &ctx->num_vertex_buffers,
525 buffers,
526 start_slot,
527 num_elements);
528
529 ctx->dirty |= SWR_NEW_VERTEX;
530 }
531
532
533 static void
534 swr_set_index_buffer(struct pipe_context *pipe,
535 const struct pipe_index_buffer *ib)
536 {
537 struct swr_context *ctx = swr_context(pipe);
538
539 if (ib)
540 memcpy(&ctx->index_buffer, ib, sizeof(ctx->index_buffer));
541 else
542 memset(&ctx->index_buffer, 0, sizeof(ctx->index_buffer));
543
544 ctx->dirty |= SWR_NEW_VERTEX;
545 }
546
547 static void
548 swr_set_polygon_stipple(struct pipe_context *pipe,
549 const struct pipe_poly_stipple *stipple)
550 {
551 struct swr_context *ctx = swr_context(pipe);
552
553 ctx->poly_stipple = *stipple; /* struct copy */
554 ctx->dirty |= SWR_NEW_STIPPLE;
555 }
556
557 static void
558 swr_set_clip_state(struct pipe_context *pipe,
559 const struct pipe_clip_state *clip)
560 {
561 struct swr_context *ctx = swr_context(pipe);
562
563 ctx->clip = *clip;
564 /* XXX Unimplemented, but prevents crash */
565
566 ctx->dirty |= SWR_NEW_CLIP;
567 }
568
569
570 static void
571 swr_set_scissor_states(struct pipe_context *pipe,
572 unsigned start_slot,
573 unsigned num_viewports,
574 const struct pipe_scissor_state *scissor)
575 {
576 struct swr_context *ctx = swr_context(pipe);
577
578 ctx->scissor = *scissor;
579 ctx->swr_scissor.xmin = scissor->minx;
580 ctx->swr_scissor.xmax = scissor->maxx;
581 ctx->swr_scissor.ymin = scissor->miny;
582 ctx->swr_scissor.ymax = scissor->maxy;
583 ctx->dirty |= SWR_NEW_SCISSOR;
584 }
585
586 static void
587 swr_set_viewport_states(struct pipe_context *pipe,
588 unsigned start_slot,
589 unsigned num_viewports,
590 const struct pipe_viewport_state *vpt)
591 {
592 struct swr_context *ctx = swr_context(pipe);
593
594 ctx->viewport = *vpt;
595 ctx->dirty |= SWR_NEW_VIEWPORT;
596 }
597
598
599 static void
600 swr_set_framebuffer_state(struct pipe_context *pipe,
601 const struct pipe_framebuffer_state *fb)
602 {
603 struct swr_context *ctx = swr_context(pipe);
604
605 boolean changed = !util_framebuffer_state_equal(&ctx->framebuffer, fb);
606
607 assert(fb->width <= KNOB_GUARDBAND_WIDTH);
608 assert(fb->height <= KNOB_GUARDBAND_HEIGHT);
609
610 if (changed) {
611 unsigned i;
612 for (i = 0; i < fb->nr_cbufs; ++i)
613 pipe_surface_reference(&ctx->framebuffer.cbufs[i], fb->cbufs[i]);
614 for (; i < ctx->framebuffer.nr_cbufs; ++i)
615 pipe_surface_reference(&ctx->framebuffer.cbufs[i], NULL);
616
617 ctx->framebuffer.nr_cbufs = fb->nr_cbufs;
618
619 ctx->framebuffer.width = fb->width;
620 ctx->framebuffer.height = fb->height;
621
622 pipe_surface_reference(&ctx->framebuffer.zsbuf, fb->zsbuf);
623
624 ctx->dirty |= SWR_NEW_FRAMEBUFFER;
625 }
626 }
627
628
629 static void
630 swr_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
631 {
632 struct swr_context *ctx = swr_context(pipe);
633
634 if (sample_mask != ctx->sample_mask) {
635 ctx->sample_mask = sample_mask;
636 ctx->dirty |= SWR_NEW_RASTERIZER;
637 }
638 }
639
640 /*
641 * Update resource in-use status
642 * All resources bound to color or depth targets marked as WRITE resources.
643 * VBO Vertex/index buffers and texture views marked as READ resources.
644 */
645 void
646 swr_update_resource_status(struct pipe_context *pipe,
647 const struct pipe_draw_info *p_draw_info)
648 {
649 struct swr_context *ctx = swr_context(pipe);
650 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
651
652 /* colorbuffer targets */
653 if (fb->nr_cbufs)
654 for (uint32_t i = 0; i < fb->nr_cbufs; ++i)
655 if (fb->cbufs[i])
656 swr_resource_write(fb->cbufs[i]->texture);
657
658 /* depth/stencil target */
659 if (fb->zsbuf)
660 swr_resource_write(fb->zsbuf->texture);
661
662 /* VBO vertex buffers */
663 for (uint32_t i = 0; i < ctx->num_vertex_buffers; i++) {
664 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
665 if (!vb->user_buffer)
666 swr_resource_read(vb->buffer);
667 }
668
669 /* VBO index buffer */
670 if (p_draw_info && p_draw_info->indexed) {
671 struct pipe_index_buffer *ib = &ctx->index_buffer;
672 if (!ib->user_buffer)
673 swr_resource_read(ib->buffer);
674 }
675
676 /* texture sampler views */
677 for (uint32_t i = 0; i < PIPE_MAX_SHADER_SAMPLER_VIEWS; i++) {
678 struct pipe_sampler_view *view =
679 ctx->sampler_views[PIPE_SHADER_FRAGMENT][i];
680 if (view)
681 swr_resource_read(view->texture);
682 }
683 }
684
685 static void
686 swr_update_texture_state(struct swr_context *ctx,
687 unsigned shader_type,
688 unsigned num_sampler_views,
689 swr_jit_texture *textures)
690 {
691 for (unsigned i = 0; i < num_sampler_views; i++) {
692 struct pipe_sampler_view *view =
693 ctx->sampler_views[shader_type][i];
694
695 if (view) {
696 struct pipe_resource *res = view->texture;
697 struct swr_resource *swr_res = swr_resource(res);
698 struct swr_jit_texture *jit_tex = &textures[i];
699 memset(jit_tex, 0, sizeof(*jit_tex));
700 jit_tex->width = res->width0;
701 jit_tex->height = res->height0;
702 jit_tex->depth = res->depth0;
703 jit_tex->first_level = view->u.tex.first_level;
704 jit_tex->last_level = view->u.tex.last_level;
705 jit_tex->base_ptr = swr_res->swr.pBaseAddress;
706
707 for (unsigned level = jit_tex->first_level;
708 level <= jit_tex->last_level;
709 level++) {
710 jit_tex->row_stride[level] = swr_res->row_stride[level];
711 jit_tex->img_stride[level] = swr_res->img_stride[level];
712 jit_tex->mip_offsets[level] = swr_res->mip_offsets[level];
713 }
714 }
715 }
716 }
717
718 static void
719 swr_update_sampler_state(struct swr_context *ctx,
720 unsigned shader_type,
721 unsigned num_samplers,
722 swr_jit_sampler *samplers)
723 {
724 for (unsigned i = 0; i < num_samplers; i++) {
725 const struct pipe_sampler_state *sampler =
726 ctx->samplers[shader_type][i];
727
728 if (sampler) {
729 samplers[i].min_lod = sampler->min_lod;
730 samplers[i].max_lod = sampler->max_lod;
731 samplers[i].lod_bias = sampler->lod_bias;
732 COPY_4V(samplers[i].border_color, sampler->border_color.f);
733 }
734 }
735 }
736
737 static void
738 swr_update_constants(struct swr_context *ctx, enum pipe_shader_type shaderType)
739 {
740 swr_draw_context *pDC = &ctx->swrDC;
741
742 const float **constant;
743 uint32_t *num_constants;
744 struct swr_scratch_space *scratch;
745
746 switch (shaderType) {
747 case PIPE_SHADER_VERTEX:
748 constant = pDC->constantVS;
749 num_constants = pDC->num_constantsVS;
750 scratch = &ctx->scratch->vs_constants;
751 break;
752 case PIPE_SHADER_FRAGMENT:
753 constant = pDC->constantFS;
754 num_constants = pDC->num_constantsFS;
755 scratch = &ctx->scratch->fs_constants;
756 break;
757 default:
758 debug_printf("Unsupported shader type constants\n");
759 return;
760 }
761
762 for (UINT i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
763 const pipe_constant_buffer *cb = &ctx->constants[shaderType][i];
764 num_constants[i] = cb->buffer_size;
765 if (cb->buffer) {
766 constant[i] =
767 (const float *)(swr_resource_data(cb->buffer) +
768 cb->buffer_offset);
769 } else {
770 /* Need to copy these constants to scratch space */
771 if (cb->user_buffer && cb->buffer_size) {
772 const void *ptr =
773 ((const uint8_t *)cb->user_buffer + cb->buffer_offset);
774 uint32_t size = AlignUp(cb->buffer_size, 4);
775 ptr = swr_copy_to_scratch_space(ctx, scratch, ptr, size);
776 constant[i] = (const float *)ptr;
777 }
778 }
779 }
780 }
781
782 void
783 swr_update_derived(struct pipe_context *pipe,
784 const struct pipe_draw_info *p_draw_info)
785 {
786 struct swr_context *ctx = swr_context(pipe);
787 struct swr_screen *screen = swr_screen(ctx->pipe.screen);
788
789 /* Update screen->pipe to current pipe context. */
790 if (screen->pipe != pipe)
791 screen->pipe = pipe;
792
793 /* Any state that requires dirty flags to be re-triggered sets this mask */
794 /* For example, user_buffer vertex and index buffers. */
795 unsigned post_update_dirty_flags = 0;
796
797 /* Render Targets */
798 if (ctx->dirty & SWR_NEW_FRAMEBUFFER) {
799 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
800 SWR_SURFACE_STATE *new_attachment[SWR_NUM_ATTACHMENTS] = {0};
801 UINT i;
802
803 /* colorbuffer targets */
804 if (fb->nr_cbufs)
805 for (i = 0; i < fb->nr_cbufs; ++i)
806 if (fb->cbufs[i]) {
807 struct swr_resource *colorBuffer =
808 swr_resource(fb->cbufs[i]->texture);
809 new_attachment[SWR_ATTACHMENT_COLOR0 + i] = &colorBuffer->swr;
810 }
811
812 /* depth/stencil target */
813 if (fb->zsbuf) {
814 struct swr_resource *depthStencilBuffer =
815 swr_resource(fb->zsbuf->texture);
816 if (depthStencilBuffer->has_depth) {
817 new_attachment[SWR_ATTACHMENT_DEPTH] = &depthStencilBuffer->swr;
818
819 if (depthStencilBuffer->has_stencil)
820 new_attachment[SWR_ATTACHMENT_STENCIL] =
821 &depthStencilBuffer->secondary;
822
823 } else if (depthStencilBuffer->has_stencil)
824 new_attachment[SWR_ATTACHMENT_STENCIL] = &depthStencilBuffer->swr;
825 }
826
827 /* Make the attachment updates */
828 swr_draw_context *pDC = &ctx->swrDC;
829 SWR_SURFACE_STATE *renderTargets = pDC->renderTargets;
830 unsigned need_fence = FALSE;
831 for (i = 0; i < SWR_NUM_ATTACHMENTS; i++) {
832 void *new_base = nullptr;
833 if (new_attachment[i])
834 new_base = new_attachment[i]->pBaseAddress;
835
836 /* StoreTile for changed target */
837 if (renderTargets[i].pBaseAddress != new_base) {
838 if (renderTargets[i].pBaseAddress) {
839 /* If changing attachment to a new target, mark tiles as
840 * INVALID so they are reloaded from surface.
841 * If detaching attachment, mark tiles as RESOLVED so core
842 * won't try to load from non-existent target. */
843 enum SWR_TILE_STATE post_state = (new_attachment[i]
844 ? SWR_TILE_INVALID : SWR_TILE_RESOLVED);
845 swr_store_render_target(pipe, i, post_state);
846
847 need_fence |= TRUE;
848 }
849
850 /* Make new attachment */
851 if (new_attachment[i])
852 renderTargets[i] = *new_attachment[i];
853 else
854 if (renderTargets[i].pBaseAddress)
855 renderTargets[i] = {0};
856 }
857 }
858
859 /* This fence ensures any attachment changes are resolved before the
860 * next draw */
861 if (need_fence)
862 swr_fence_submit(ctx, screen->flush_fence);
863 }
864
865 /* Raster state */
866 if (ctx->dirty & (SWR_NEW_RASTERIZER |
867 SWR_NEW_VS | // clipping
868 SWR_NEW_FRAMEBUFFER)) {
869 pipe_rasterizer_state *rasterizer = ctx->rasterizer;
870 pipe_framebuffer_state *fb = &ctx->framebuffer;
871
872 SWR_RASTSTATE *rastState = &ctx->derived.rastState;
873 rastState->cullMode = swr_convert_cull_mode(rasterizer->cull_face);
874 rastState->frontWinding = rasterizer->front_ccw
875 ? SWR_FRONTWINDING_CCW
876 : SWR_FRONTWINDING_CW;
877 rastState->scissorEnable = rasterizer->scissor;
878 rastState->pointSize = rasterizer->point_size > 0.0f
879 ? rasterizer->point_size
880 : 1.0f;
881 rastState->lineWidth = rasterizer->line_width > 0.0f
882 ? rasterizer->line_width
883 : 1.0f;
884
885 rastState->pointParam = rasterizer->point_size_per_vertex;
886
887 rastState->pointSpriteEnable = rasterizer->sprite_coord_enable;
888 rastState->pointSpriteTopOrigin =
889 rasterizer->sprite_coord_mode == PIPE_SPRITE_COORD_UPPER_LEFT;
890
891 /* XXX TODO: Add multisample */
892 rastState->msaaRastEnable = false;
893 rastState->rastMode = SWR_MSAA_RASTMODE_OFF_PIXEL;
894 rastState->sampleCount = SWR_MULTISAMPLE_1X;
895 rastState->forcedSampleCount = false;
896
897 bool do_offset = false;
898 switch (rasterizer->fill_front) {
899 case PIPE_POLYGON_MODE_FILL:
900 do_offset = rasterizer->offset_tri;
901 break;
902 case PIPE_POLYGON_MODE_LINE:
903 do_offset = rasterizer->offset_line;
904 break;
905 case PIPE_POLYGON_MODE_POINT:
906 do_offset = rasterizer->offset_point;
907 break;
908 }
909
910 if (do_offset) {
911 rastState->depthBias = rasterizer->offset_units;
912 rastState->slopeScaledDepthBias = rasterizer->offset_scale;
913 rastState->depthBiasClamp = rasterizer->offset_clamp;
914 } else {
915 rastState->depthBias = 0;
916 rastState->slopeScaledDepthBias = 0;
917 rastState->depthBiasClamp = 0;
918 }
919 struct pipe_surface *zb = fb->zsbuf;
920 if (zb && swr_resource(zb->texture)->has_depth)
921 rastState->depthFormat = swr_resource(zb->texture)->swr.format;
922
923 rastState->depthClipEnable = rasterizer->depth_clip;
924 rastState->clipHalfZ = rasterizer->clip_halfz;
925
926 rastState->clipDistanceMask =
927 ctx->vs->info.base.num_written_clipdistance ?
928 ctx->vs->info.base.clipdist_writemask & rasterizer->clip_plane_enable :
929 rasterizer->clip_plane_enable;
930
931 rastState->cullDistanceMask =
932 ctx->vs->info.base.culldist_writemask << ctx->vs->info.base.num_written_clipdistance;
933
934 SwrSetRastState(ctx->swrContext, rastState);
935 }
936
937 /* Scissor */
938 if (ctx->dirty & SWR_NEW_SCISSOR) {
939 SwrSetScissorRects(ctx->swrContext, 1, &ctx->swr_scissor);
940 }
941
942 /* Viewport */
943 if (ctx->dirty & (SWR_NEW_VIEWPORT | SWR_NEW_FRAMEBUFFER
944 | SWR_NEW_RASTERIZER)) {
945 pipe_viewport_state *state = &ctx->viewport;
946 pipe_framebuffer_state *fb = &ctx->framebuffer;
947 pipe_rasterizer_state *rasterizer = ctx->rasterizer;
948
949 SWR_VIEWPORT *vp = &ctx->derived.vp;
950 SWR_VIEWPORT_MATRICES *vpm = &ctx->derived.vpm;
951
952 vp->x = state->translate[0] - state->scale[0];
953 vp->width = state->translate[0] + state->scale[0];
954 vp->y = state->translate[1] - fabs(state->scale[1]);
955 vp->height = state->translate[1] + fabs(state->scale[1]);
956 util_viewport_zmin_zmax(state, rasterizer->clip_halfz,
957 &vp->minZ, &vp->maxZ);
958
959 vpm->m00[0] = state->scale[0];
960 vpm->m11[0] = state->scale[1];
961 vpm->m22[0] = state->scale[2];
962 vpm->m30[0] = state->translate[0];
963 vpm->m31[0] = state->translate[1];
964 vpm->m32[0] = state->translate[2];
965
966 /* Now that the matrix is calculated, clip the view coords to screen
967 * size. OpenGL allows for -ve x,y in the viewport. */
968 vp->x = std::max(vp->x, 0.0f);
969 vp->y = std::max(vp->y, 0.0f);
970 vp->width = std::min(vp->width, (float)fb->width);
971 vp->height = std::min(vp->height, (float)fb->height);
972
973 SwrSetViewports(ctx->swrContext, 1, vp, vpm);
974 }
975
976 /* Set vertex & index buffers */
977 /* (using draw info if called by swr_draw_vbo) */
978 if (ctx->dirty & SWR_NEW_VERTEX) {
979 uint32_t size, pitch, max_vertex, partial_inbounds;
980 const uint8_t *p_data;
981
982 /* If being called by swr_draw_vbo, copy draw details */
983 struct pipe_draw_info info = {0};
984 if (p_draw_info)
985 info = *p_draw_info;
986
987 /* vertex buffers */
988 SWR_VERTEX_BUFFER_STATE swrVertexBuffers[PIPE_MAX_ATTRIBS];
989 for (UINT i = 0; i < ctx->num_vertex_buffers; i++) {
990 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
991
992 pitch = vb->stride;
993 if (!vb->user_buffer) {
994 /* VBO
995 * size is based on buffer->width0 rather than info.max_index
996 * to prevent having to validate VBO on each draw */
997 size = vb->buffer->width0;
998 max_vertex = size / pitch;
999 partial_inbounds = size % pitch;
1000
1001 p_data = swr_resource_data(vb->buffer) + vb->buffer_offset;
1002 } else {
1003 /* Client buffer
1004 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
1005 * revalidate on each draw */
1006 post_update_dirty_flags |= SWR_NEW_VERTEX;
1007
1008 if (pitch) {
1009 size = (info.max_index - info.min_index + 1) * pitch;
1010 } else {
1011 /* pitch = 0, means constant value
1012 * set size to 1 vertex */
1013 size = ctx->velems->stream_pitch[i];
1014 }
1015
1016 max_vertex = info.max_index + 1;
1017 partial_inbounds = 0;
1018
1019 /* Copy only needed vertices to scratch space */
1020 size = AlignUp(size, 4);
1021 const void *ptr = (const uint8_t *) vb->user_buffer
1022 + info.min_index * pitch;
1023 ptr = swr_copy_to_scratch_space(
1024 ctx, &ctx->scratch->vertex_buffer, ptr, size);
1025 p_data = (const uint8_t *)ptr - info.min_index * pitch;
1026 }
1027
1028 swrVertexBuffers[i] = {0};
1029 swrVertexBuffers[i].index = i;
1030 swrVertexBuffers[i].pitch = pitch;
1031 swrVertexBuffers[i].pData = p_data;
1032 swrVertexBuffers[i].size = size;
1033 swrVertexBuffers[i].maxVertex = max_vertex;
1034 swrVertexBuffers[i].partialInboundsSize = partial_inbounds;
1035 }
1036
1037 SwrSetVertexBuffers(
1038 ctx->swrContext, ctx->num_vertex_buffers, swrVertexBuffers);
1039
1040 /* index buffer, if required (info passed in by swr_draw_vbo) */
1041 SWR_FORMAT index_type = R32_UINT; /* Default for non-indexed draws */
1042 if (info.indexed) {
1043 struct pipe_index_buffer *ib = &ctx->index_buffer;
1044
1045 pitch = ib->index_size ? ib->index_size : sizeof(uint32_t);
1046 index_type = swr_convert_index_type(pitch);
1047
1048 if (!ib->user_buffer) {
1049 /* VBO
1050 * size is based on buffer->width0 rather than info.count
1051 * to prevent having to validate VBO on each draw */
1052 size = ib->buffer->width0;
1053 p_data = swr_resource_data(ib->buffer) + ib->offset;
1054 } else {
1055 /* Client buffer
1056 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
1057 * revalidate on each draw */
1058 post_update_dirty_flags |= SWR_NEW_VERTEX;
1059
1060 size = info.count * pitch;
1061 size = AlignUp(size, 4);
1062
1063 /* Copy indices to scratch space */
1064 const void *ptr = ib->user_buffer;
1065 ptr = swr_copy_to_scratch_space(
1066 ctx, &ctx->scratch->index_buffer, ptr, size);
1067 p_data = (const uint8_t *)ptr;
1068 }
1069
1070 SWR_INDEX_BUFFER_STATE swrIndexBuffer;
1071 swrIndexBuffer.format = swr_convert_index_type(ib->index_size);
1072 swrIndexBuffer.pIndices = p_data;
1073 swrIndexBuffer.size = size;
1074
1075 SwrSetIndexBuffer(ctx->swrContext, &swrIndexBuffer);
1076 }
1077
1078 struct swr_vertex_element_state *velems = ctx->velems;
1079 if (velems && velems->fsState.indexType != index_type) {
1080 velems->fsFunc = NULL;
1081 velems->fsState.indexType = index_type;
1082 }
1083 }
1084
1085 /* VertexShader */
1086 if (ctx->dirty & (SWR_NEW_VS |
1087 SWR_NEW_RASTERIZER | // for clip planes
1088 SWR_NEW_SAMPLER |
1089 SWR_NEW_SAMPLER_VIEW |
1090 SWR_NEW_FRAMEBUFFER)) {
1091 swr_jit_vs_key key;
1092 swr_generate_vs_key(key, ctx, ctx->vs);
1093 auto search = ctx->vs->map.find(key);
1094 PFN_VERTEX_FUNC func;
1095 if (search != ctx->vs->map.end()) {
1096 func = search->second->shader;
1097 } else {
1098 func = swr_compile_vs(ctx, key);
1099 }
1100 SwrSetVertexFunc(ctx->swrContext, func);
1101
1102 /* JIT sampler state */
1103 if (ctx->dirty & SWR_NEW_SAMPLER) {
1104 swr_update_sampler_state(ctx,
1105 PIPE_SHADER_VERTEX,
1106 key.nr_samplers,
1107 ctx->swrDC.samplersVS);
1108 }
1109
1110 /* JIT sampler view state */
1111 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1112 swr_update_texture_state(ctx,
1113 PIPE_SHADER_VERTEX,
1114 key.nr_sampler_views,
1115 ctx->swrDC.texturesVS);
1116 }
1117 }
1118
1119 /* FragmentShader */
1120 if (ctx->dirty & (SWR_NEW_FS | SWR_NEW_SAMPLER | SWR_NEW_SAMPLER_VIEW
1121 | SWR_NEW_RASTERIZER | SWR_NEW_FRAMEBUFFER)) {
1122 swr_jit_fs_key key;
1123 swr_generate_fs_key(key, ctx, ctx->fs);
1124 auto search = ctx->fs->map.find(key);
1125 PFN_PIXEL_KERNEL func;
1126 if (search != ctx->fs->map.end()) {
1127 func = search->second->shader;
1128 } else {
1129 func = swr_compile_fs(ctx, key);
1130 }
1131 SWR_PS_STATE psState = {0};
1132 psState.pfnPixelShader = func;
1133 psState.killsPixel = ctx->fs->info.base.uses_kill;
1134 psState.inputCoverage = SWR_INPUT_COVERAGE_NORMAL;
1135 psState.writesODepth = ctx->fs->info.base.writes_z;
1136 psState.usesSourceDepth = ctx->fs->info.base.reads_z;
1137 psState.shadingRate = SWR_SHADING_RATE_PIXEL; // XXX
1138 psState.numRenderTargets = ctx->framebuffer.nr_cbufs;
1139 psState.posOffset = SWR_PS_POSITION_SAMPLE_NONE; // XXX msaa
1140 uint32_t barycentricsMask = 0;
1141 #if 0
1142 // when we switch to mesa-master
1143 if (ctx->fs->info.base.uses_persp_center ||
1144 ctx->fs->info.base.uses_linear_center)
1145 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1146 if (ctx->fs->info.base.uses_persp_centroid ||
1147 ctx->fs->info.base.uses_linear_centroid)
1148 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1149 if (ctx->fs->info.base.uses_persp_sample ||
1150 ctx->fs->info.base.uses_linear_sample)
1151 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1152 #else
1153 for (unsigned i = 0; i < ctx->fs->info.base.num_inputs; i++) {
1154 switch (ctx->fs->info.base.input_interpolate_loc[i]) {
1155 case TGSI_INTERPOLATE_LOC_CENTER:
1156 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1157 break;
1158 case TGSI_INTERPOLATE_LOC_CENTROID:
1159 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1160 break;
1161 case TGSI_INTERPOLATE_LOC_SAMPLE:
1162 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1163 break;
1164 }
1165 }
1166 #endif
1167 psState.barycentricsMask = barycentricsMask;
1168 psState.usesUAV = false; // XXX
1169 psState.forceEarlyZ = false;
1170 SwrSetPixelShaderState(ctx->swrContext, &psState);
1171
1172 /* JIT sampler state */
1173 if (ctx->dirty & SWR_NEW_SAMPLER) {
1174 swr_update_sampler_state(ctx,
1175 PIPE_SHADER_FRAGMENT,
1176 key.nr_samplers,
1177 ctx->swrDC.samplersFS);
1178 }
1179
1180 /* JIT sampler view state */
1181 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1182 swr_update_texture_state(ctx,
1183 PIPE_SHADER_FRAGMENT,
1184 key.nr_sampler_views,
1185 ctx->swrDC.texturesFS);
1186 }
1187 }
1188
1189
1190 /* VertexShader Constants */
1191 if (ctx->dirty & SWR_NEW_VSCONSTANTS) {
1192 swr_update_constants(ctx, PIPE_SHADER_VERTEX);
1193 }
1194
1195 /* FragmentShader Constants */
1196 if (ctx->dirty & SWR_NEW_FSCONSTANTS) {
1197 swr_update_constants(ctx, PIPE_SHADER_FRAGMENT);
1198 }
1199
1200 /* Depth/stencil state */
1201 if (ctx->dirty & (SWR_NEW_DEPTH_STENCIL_ALPHA | SWR_NEW_FRAMEBUFFER)) {
1202 struct pipe_depth_state *depth = &(ctx->depth_stencil->depth);
1203 struct pipe_stencil_state *stencil = ctx->depth_stencil->stencil;
1204 SWR_DEPTH_STENCIL_STATE depthStencilState = {{0}};
1205 SWR_DEPTH_BOUNDS_STATE depthBoundsState = {0};
1206
1207 /* XXX, incomplete. Need to flesh out stencil & alpha test state
1208 struct pipe_stencil_state *front_stencil =
1209 ctx->depth_stencil.stencil[0];
1210 struct pipe_stencil_state *back_stencil = ctx->depth_stencil.stencil[1];
1211 struct pipe_alpha_state alpha;
1212 */
1213 if (stencil[0].enabled) {
1214 depthStencilState.stencilWriteEnable = 1;
1215 depthStencilState.stencilTestEnable = 1;
1216 depthStencilState.stencilTestFunc =
1217 swr_convert_depth_func(stencil[0].func);
1218
1219 depthStencilState.stencilPassDepthPassOp =
1220 swr_convert_stencil_op(stencil[0].zpass_op);
1221 depthStencilState.stencilPassDepthFailOp =
1222 swr_convert_stencil_op(stencil[0].zfail_op);
1223 depthStencilState.stencilFailOp =
1224 swr_convert_stencil_op(stencil[0].fail_op);
1225 depthStencilState.stencilWriteMask = stencil[0].writemask;
1226 depthStencilState.stencilTestMask = stencil[0].valuemask;
1227 depthStencilState.stencilRefValue = ctx->stencil_ref.ref_value[0];
1228 }
1229 if (stencil[1].enabled) {
1230 depthStencilState.doubleSidedStencilTestEnable = 1;
1231
1232 depthStencilState.backfaceStencilTestFunc =
1233 swr_convert_depth_func(stencil[1].func);
1234
1235 depthStencilState.backfaceStencilPassDepthPassOp =
1236 swr_convert_stencil_op(stencil[1].zpass_op);
1237 depthStencilState.backfaceStencilPassDepthFailOp =
1238 swr_convert_stencil_op(stencil[1].zfail_op);
1239 depthStencilState.backfaceStencilFailOp =
1240 swr_convert_stencil_op(stencil[1].fail_op);
1241 depthStencilState.backfaceStencilWriteMask = stencil[1].writemask;
1242 depthStencilState.backfaceStencilTestMask = stencil[1].valuemask;
1243
1244 depthStencilState.backfaceStencilRefValue =
1245 ctx->stencil_ref.ref_value[1];
1246 }
1247
1248 depthStencilState.depthTestEnable = depth->enabled;
1249 depthStencilState.depthTestFunc = swr_convert_depth_func(depth->func);
1250 depthStencilState.depthWriteEnable = depth->writemask;
1251 SwrSetDepthStencilState(ctx->swrContext, &depthStencilState);
1252
1253 depthBoundsState.depthBoundsTestEnable = depth->bounds_test;
1254 depthBoundsState.depthBoundsTestMinValue = depth->bounds_min;
1255 depthBoundsState.depthBoundsTestMaxValue = depth->bounds_max;
1256 SwrSetDepthBoundsState(ctx->swrContext, &depthBoundsState);
1257 }
1258
1259 /* Blend State */
1260 if (ctx->dirty & (SWR_NEW_BLEND |
1261 SWR_NEW_FRAMEBUFFER |
1262 SWR_NEW_DEPTH_STENCIL_ALPHA)) {
1263 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
1264
1265 SWR_BLEND_STATE blendState;
1266 memcpy(&blendState, &ctx->blend->blendState, sizeof(blendState));
1267 blendState.constantColor[0] = ctx->blend_color.color[0];
1268 blendState.constantColor[1] = ctx->blend_color.color[1];
1269 blendState.constantColor[2] = ctx->blend_color.color[2];
1270 blendState.constantColor[3] = ctx->blend_color.color[3];
1271 blendState.alphaTestReference =
1272 *((uint32_t*)&ctx->depth_stencil->alpha.ref_value);
1273
1274 // XXX MSAA
1275 blendState.sampleMask = 0;
1276 blendState.sampleCount = SWR_MULTISAMPLE_1X;
1277
1278 /* If there are no color buffers bound, disable writes on RT0
1279 * and skip loop */
1280 if (fb->nr_cbufs == 0) {
1281 blendState.renderTarget[0].writeDisableRed = 1;
1282 blendState.renderTarget[0].writeDisableGreen = 1;
1283 blendState.renderTarget[0].writeDisableBlue = 1;
1284 blendState.renderTarget[0].writeDisableAlpha = 1;
1285 SwrSetBlendFunc(ctx->swrContext, 0, NULL);
1286 }
1287 else
1288 for (int target = 0;
1289 target < std::min(SWR_NUM_RENDERTARGETS,
1290 PIPE_MAX_COLOR_BUFS);
1291 target++) {
1292 if (!fb->cbufs[target])
1293 continue;
1294
1295 struct swr_resource *colorBuffer =
1296 swr_resource(fb->cbufs[target]->texture);
1297
1298 BLEND_COMPILE_STATE compileState;
1299 memset(&compileState, 0, sizeof(compileState));
1300 compileState.format = colorBuffer->swr.format;
1301 memcpy(&compileState.blendState,
1302 &ctx->blend->compileState[target],
1303 sizeof(compileState.blendState));
1304
1305 const SWR_FORMAT_INFO& info = GetFormatInfo(compileState.format);
1306 if (compileState.blendState.logicOpEnable &&
1307 ((info.type[0] == SWR_TYPE_FLOAT) || info.isSRGB)) {
1308 compileState.blendState.logicOpEnable = false;
1309 }
1310
1311 if (compileState.blendState.blendEnable == false &&
1312 compileState.blendState.logicOpEnable == false &&
1313 ctx->depth_stencil->alpha.enabled == 0) {
1314 SwrSetBlendFunc(ctx->swrContext, target, NULL);
1315 continue;
1316 }
1317
1318 compileState.desc.alphaTestEnable =
1319 ctx->depth_stencil->alpha.enabled;
1320 compileState.desc.independentAlphaBlendEnable =
1321 ctx->blend->pipe.independent_blend_enable;
1322 compileState.desc.alphaToCoverageEnable =
1323 ctx->blend->pipe.alpha_to_coverage;
1324 compileState.desc.sampleMaskEnable = 0; // XXX
1325 compileState.desc.numSamples = 1; // XXX
1326
1327 compileState.alphaTestFunction =
1328 swr_convert_depth_func(ctx->depth_stencil->alpha.func);
1329 compileState.alphaTestFormat = ALPHA_TEST_FLOAT32; // xxx
1330
1331 compileState.Canonicalize();
1332
1333 PFN_BLEND_JIT_FUNC func = NULL;
1334 auto search = ctx->blendJIT->find(compileState);
1335 if (search != ctx->blendJIT->end()) {
1336 func = search->second;
1337 } else {
1338 HANDLE hJitMgr = screen->hJitMgr;
1339 func = JitCompileBlend(hJitMgr, compileState);
1340 debug_printf("BLEND shader %p\n", func);
1341 assert(func && "Error: BlendShader = NULL");
1342
1343 ctx->blendJIT->insert(std::make_pair(compileState, func));
1344 }
1345 SwrSetBlendFunc(ctx->swrContext, target, func);
1346 }
1347
1348 SwrSetBlendState(ctx->swrContext, &blendState);
1349 }
1350
1351 if (ctx->dirty & SWR_NEW_STIPPLE) {
1352 /* XXX What to do with this one??? SWR doesn't stipple */
1353 }
1354
1355 if (ctx->dirty & (SWR_NEW_VS | SWR_NEW_SO | SWR_NEW_RASTERIZER)) {
1356 ctx->vs->soState.rasterizerDisable =
1357 ctx->rasterizer->rasterizer_discard;
1358 SwrSetSoState(ctx->swrContext, &ctx->vs->soState);
1359
1360 pipe_stream_output_info *stream_output = &ctx->vs->pipe.stream_output;
1361
1362 for (uint32_t i = 0; i < ctx->num_so_targets; i++) {
1363 SWR_STREAMOUT_BUFFER buffer = {0};
1364 if (!ctx->so_targets[i])
1365 continue;
1366 buffer.enable = true;
1367 buffer.pBuffer =
1368 (uint32_t *)swr_resource_data(ctx->so_targets[i]->buffer);
1369 buffer.bufferSize = ctx->so_targets[i]->buffer_size >> 2;
1370 buffer.pitch = stream_output->stride[i];
1371 buffer.streamOffset = ctx->so_targets[i]->buffer_offset >> 2;
1372
1373 SwrSetSoBuffers(ctx->swrContext, &buffer, i);
1374 }
1375 }
1376
1377 if (ctx->dirty & SWR_NEW_CLIP) {
1378 // shader exporting clip distances overrides all user clip planes
1379 if (ctx->rasterizer->clip_plane_enable &&
1380 !ctx->vs->info.base.num_written_clipdistance)
1381 {
1382 swr_draw_context *pDC = &ctx->swrDC;
1383 memcpy(pDC->userClipPlanes,
1384 ctx->clip.ucp,
1385 sizeof(pDC->userClipPlanes));
1386 }
1387 }
1388
1389 // set up backend state
1390 SWR_BACKEND_STATE backendState = {0};
1391 backendState.numAttributes =
1392 ctx->vs->info.base.num_outputs - 1 +
1393 (ctx->rasterizer->sprite_coord_enable ? 1 : 0);
1394 for (unsigned i = 0; i < backendState.numAttributes; i++)
1395 backendState.numComponents[i] = 4;
1396 backendState.constantInterpolationMask =
1397 ctx->rasterizer->flatshade ?
1398 ctx->fs->flatConstantMask :
1399 ctx->fs->constantMask;
1400 backendState.pointSpriteTexCoordMask = ctx->fs->pointSpriteMask;
1401
1402 SwrSetBackendState(ctx->swrContext, &backendState);
1403
1404 /* Ensure that any in-progress attachment change StoreTiles finish */
1405 if (swr_is_fence_pending(screen->flush_fence))
1406 swr_fence_finish(pipe->screen, NULL, screen->flush_fence, 0);
1407
1408 /* Finally, update the in-use status of all resources involved in draw */
1409 swr_update_resource_status(pipe, p_draw_info);
1410
1411 ctx->dirty = post_update_dirty_flags;
1412 }
1413
1414
1415 static struct pipe_stream_output_target *
1416 swr_create_so_target(struct pipe_context *pipe,
1417 struct pipe_resource *buffer,
1418 unsigned buffer_offset,
1419 unsigned buffer_size)
1420 {
1421 struct pipe_stream_output_target *target;
1422
1423 target = CALLOC_STRUCT(pipe_stream_output_target);
1424 if (!target)
1425 return NULL;
1426
1427 target->context = pipe;
1428 target->reference.count = 1;
1429 pipe_resource_reference(&target->buffer, buffer);
1430 target->buffer_offset = buffer_offset;
1431 target->buffer_size = buffer_size;
1432 return target;
1433 }
1434
1435 static void
1436 swr_destroy_so_target(struct pipe_context *pipe,
1437 struct pipe_stream_output_target *target)
1438 {
1439 pipe_resource_reference(&target->buffer, NULL);
1440 FREE(target);
1441 }
1442
1443 static void
1444 swr_set_so_targets(struct pipe_context *pipe,
1445 unsigned num_targets,
1446 struct pipe_stream_output_target **targets,
1447 const unsigned *offsets)
1448 {
1449 struct swr_context *swr = swr_context(pipe);
1450 uint32_t i;
1451
1452 assert(num_targets < MAX_SO_STREAMS);
1453
1454 for (i = 0; i < num_targets; i++) {
1455 pipe_so_target_reference(
1456 (struct pipe_stream_output_target **)&swr->so_targets[i],
1457 targets[i]);
1458 }
1459
1460 for (/* fall-through */; i < swr->num_so_targets; i++) {
1461 pipe_so_target_reference(
1462 (struct pipe_stream_output_target **)&swr->so_targets[i], NULL);
1463 }
1464
1465 swr->num_so_targets = num_targets;
1466
1467 swr->dirty = SWR_NEW_SO;
1468 }
1469
1470
1471 void
1472 swr_state_init(struct pipe_context *pipe)
1473 {
1474 pipe->create_blend_state = swr_create_blend_state;
1475 pipe->bind_blend_state = swr_bind_blend_state;
1476 pipe->delete_blend_state = swr_delete_blend_state;
1477
1478 pipe->create_depth_stencil_alpha_state = swr_create_depth_stencil_state;
1479 pipe->bind_depth_stencil_alpha_state = swr_bind_depth_stencil_state;
1480 pipe->delete_depth_stencil_alpha_state = swr_delete_depth_stencil_state;
1481
1482 pipe->create_rasterizer_state = swr_create_rasterizer_state;
1483 pipe->bind_rasterizer_state = swr_bind_rasterizer_state;
1484 pipe->delete_rasterizer_state = swr_delete_rasterizer_state;
1485
1486 pipe->create_sampler_state = swr_create_sampler_state;
1487 pipe->bind_sampler_states = swr_bind_sampler_states;
1488 pipe->delete_sampler_state = swr_delete_sampler_state;
1489
1490 pipe->create_sampler_view = swr_create_sampler_view;
1491 pipe->set_sampler_views = swr_set_sampler_views;
1492 pipe->sampler_view_destroy = swr_sampler_view_destroy;
1493
1494 pipe->create_vs_state = swr_create_vs_state;
1495 pipe->bind_vs_state = swr_bind_vs_state;
1496 pipe->delete_vs_state = swr_delete_vs_state;
1497
1498 pipe->create_fs_state = swr_create_fs_state;
1499 pipe->bind_fs_state = swr_bind_fs_state;
1500 pipe->delete_fs_state = swr_delete_fs_state;
1501
1502 pipe->set_constant_buffer = swr_set_constant_buffer;
1503
1504 pipe->create_vertex_elements_state = swr_create_vertex_elements_state;
1505 pipe->bind_vertex_elements_state = swr_bind_vertex_elements_state;
1506 pipe->delete_vertex_elements_state = swr_delete_vertex_elements_state;
1507
1508 pipe->set_vertex_buffers = swr_set_vertex_buffers;
1509 pipe->set_index_buffer = swr_set_index_buffer;
1510
1511 pipe->set_polygon_stipple = swr_set_polygon_stipple;
1512 pipe->set_clip_state = swr_set_clip_state;
1513 pipe->set_scissor_states = swr_set_scissor_states;
1514 pipe->set_viewport_states = swr_set_viewport_states;
1515
1516 pipe->set_framebuffer_state = swr_set_framebuffer_state;
1517
1518 pipe->set_blend_color = swr_set_blend_color;
1519 pipe->set_stencil_ref = swr_set_stencil_ref;
1520
1521 pipe->set_sample_mask = swr_set_sample_mask;
1522
1523 pipe->create_stream_output_target = swr_create_so_target;
1524 pipe->stream_output_target_destroy = swr_destroy_so_target;
1525 pipe->set_stream_output_targets = swr_set_so_targets;
1526 }