f1cf4ae2e52a456e339da6ba472fd96102cc2737
[mesa.git] / src / gallium / drivers / swr / swr_state.cpp
1 /****************************************************************************
2 * Copyright (C) 2015 Intel Corporation. All Rights Reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 ***************************************************************************/
23
24 // llvm redefines DEBUG
25 #pragma push_macro("DEBUG")
26 #undef DEBUG
27 #include "JitManager.h"
28 #pragma pop_macro("DEBUG")
29
30 #include "common/os.h"
31 #include "jit_api.h"
32 #include "state_llvm.h"
33
34 #include "gallivm/lp_bld_tgsi.h"
35 #include "util/u_format.h"
36
37 #include "util/u_memory.h"
38 #include "util/u_inlines.h"
39 #include "util/u_helpers.h"
40 #include "util/u_framebuffer.h"
41 #include "util/u_viewport.h"
42
43 #include "swr_state.h"
44 #include "swr_context.h"
45 #include "swr_context_llvm.h"
46 #include "swr_screen.h"
47 #include "swr_resource.h"
48 #include "swr_tex_sample.h"
49 #include "swr_scratch.h"
50 #include "swr_shader.h"
51 #include "swr_fence.h"
52
53 /* These should be pulled out into separate files as necessary
54 * Just initializing everything here to get going. */
55
56 static void *
57 swr_create_blend_state(struct pipe_context *pipe,
58 const struct pipe_blend_state *blend)
59 {
60 struct swr_blend_state *state = CALLOC_STRUCT(swr_blend_state);
61
62 memcpy(&state->pipe, blend, sizeof(*blend));
63
64 struct pipe_blend_state *pipe_blend = &state->pipe;
65
66 for (int target = 0;
67 target < std::min(SWR_NUM_RENDERTARGETS, PIPE_MAX_COLOR_BUFS);
68 target++) {
69
70 struct pipe_rt_blend_state *rt_blend = &pipe_blend->rt[target];
71 SWR_RENDER_TARGET_BLEND_STATE &blendState =
72 state->blendState.renderTarget[target];
73 RENDER_TARGET_BLEND_COMPILE_STATE &compileState =
74 state->compileState[target];
75
76 if (target != 0 && !pipe_blend->independent_blend_enable) {
77 memcpy(&compileState,
78 &state->compileState[0],
79 sizeof(RENDER_TARGET_BLEND_COMPILE_STATE));
80 continue;
81 }
82
83 compileState.blendEnable = rt_blend->blend_enable;
84 if (compileState.blendEnable) {
85 compileState.sourceAlphaBlendFactor =
86 swr_convert_blend_factor(rt_blend->alpha_src_factor);
87 compileState.destAlphaBlendFactor =
88 swr_convert_blend_factor(rt_blend->alpha_dst_factor);
89 compileState.sourceBlendFactor =
90 swr_convert_blend_factor(rt_blend->rgb_src_factor);
91 compileState.destBlendFactor =
92 swr_convert_blend_factor(rt_blend->rgb_dst_factor);
93
94 compileState.colorBlendFunc =
95 swr_convert_blend_func(rt_blend->rgb_func);
96 compileState.alphaBlendFunc =
97 swr_convert_blend_func(rt_blend->alpha_func);
98 }
99 compileState.logicOpEnable = state->pipe.logicop_enable;
100 if (compileState.logicOpEnable) {
101 compileState.logicOpFunc =
102 swr_convert_logic_op(state->pipe.logicop_func);
103 }
104
105 blendState.writeDisableRed =
106 (rt_blend->colormask & PIPE_MASK_R) ? 0 : 1;
107 blendState.writeDisableGreen =
108 (rt_blend->colormask & PIPE_MASK_G) ? 0 : 1;
109 blendState.writeDisableBlue =
110 (rt_blend->colormask & PIPE_MASK_B) ? 0 : 1;
111 blendState.writeDisableAlpha =
112 (rt_blend->colormask & PIPE_MASK_A) ? 0 : 1;
113
114 if (rt_blend->colormask == 0)
115 compileState.blendEnable = false;
116 }
117
118 return state;
119 }
120
121 static void
122 swr_bind_blend_state(struct pipe_context *pipe, void *blend)
123 {
124 struct swr_context *ctx = swr_context(pipe);
125
126 if (ctx->blend == blend)
127 return;
128
129 ctx->blend = (swr_blend_state *)blend;
130
131 ctx->dirty |= SWR_NEW_BLEND;
132 }
133
134 static void
135 swr_delete_blend_state(struct pipe_context *pipe, void *blend)
136 {
137 FREE(blend);
138 }
139
140 static void
141 swr_set_blend_color(struct pipe_context *pipe,
142 const struct pipe_blend_color *color)
143 {
144 struct swr_context *ctx = swr_context(pipe);
145
146 ctx->blend_color = *color;
147
148 ctx->dirty |= SWR_NEW_BLEND;
149 }
150
151 static void
152 swr_set_stencil_ref(struct pipe_context *pipe,
153 const struct pipe_stencil_ref *ref)
154 {
155 struct swr_context *ctx = swr_context(pipe);
156
157 ctx->stencil_ref = *ref;
158
159 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
160 }
161
162 static void *
163 swr_create_depth_stencil_state(
164 struct pipe_context *pipe,
165 const struct pipe_depth_stencil_alpha_state *depth_stencil)
166 {
167 struct pipe_depth_stencil_alpha_state *state;
168
169 state = (pipe_depth_stencil_alpha_state *)mem_dup(depth_stencil,
170 sizeof *depth_stencil);
171
172 return state;
173 }
174
175 static void
176 swr_bind_depth_stencil_state(struct pipe_context *pipe, void *depth_stencil)
177 {
178 struct swr_context *ctx = swr_context(pipe);
179
180 if (ctx->depth_stencil == (pipe_depth_stencil_alpha_state *)depth_stencil)
181 return;
182
183 ctx->depth_stencil = (pipe_depth_stencil_alpha_state *)depth_stencil;
184
185 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
186 }
187
188 static void
189 swr_delete_depth_stencil_state(struct pipe_context *pipe, void *depth)
190 {
191 FREE(depth);
192 }
193
194
195 static void *
196 swr_create_rasterizer_state(struct pipe_context *pipe,
197 const struct pipe_rasterizer_state *rast)
198 {
199 struct pipe_rasterizer_state *state;
200 state = (pipe_rasterizer_state *)mem_dup(rast, sizeof *rast);
201
202 return state;
203 }
204
205 static void
206 swr_bind_rasterizer_state(struct pipe_context *pipe, void *handle)
207 {
208 struct swr_context *ctx = swr_context(pipe);
209 const struct pipe_rasterizer_state *rasterizer =
210 (const struct pipe_rasterizer_state *)handle;
211
212 if (ctx->rasterizer == (pipe_rasterizer_state *)rasterizer)
213 return;
214
215 ctx->rasterizer = (pipe_rasterizer_state *)rasterizer;
216
217 ctx->dirty |= SWR_NEW_RASTERIZER;
218 }
219
220 static void
221 swr_delete_rasterizer_state(struct pipe_context *pipe, void *rasterizer)
222 {
223 FREE(rasterizer);
224 }
225
226
227 static void *
228 swr_create_sampler_state(struct pipe_context *pipe,
229 const struct pipe_sampler_state *sampler)
230 {
231 struct pipe_sampler_state *state =
232 (pipe_sampler_state *)mem_dup(sampler, sizeof *sampler);
233
234 return state;
235 }
236
237 static void
238 swr_bind_sampler_states(struct pipe_context *pipe,
239 enum pipe_shader_type shader,
240 unsigned start,
241 unsigned num,
242 void **samplers)
243 {
244 struct swr_context *ctx = swr_context(pipe);
245 unsigned i;
246
247 assert(shader < PIPE_SHADER_TYPES);
248 assert(start + num <= ARRAY_SIZE(ctx->samplers[shader]));
249
250 /* set the new samplers */
251 ctx->num_samplers[shader] = num;
252 for (i = 0; i < num; i++) {
253 ctx->samplers[shader][start + i] = (pipe_sampler_state *)samplers[i];
254 }
255
256 ctx->dirty |= SWR_NEW_SAMPLER;
257 }
258
259 static void
260 swr_delete_sampler_state(struct pipe_context *pipe, void *sampler)
261 {
262 FREE(sampler);
263 }
264
265
266 static struct pipe_sampler_view *
267 swr_create_sampler_view(struct pipe_context *pipe,
268 struct pipe_resource *texture,
269 const struct pipe_sampler_view *templ)
270 {
271 struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view);
272
273 if (view) {
274 *view = *templ;
275 view->reference.count = 1;
276 view->texture = NULL;
277 pipe_resource_reference(&view->texture, texture);
278 view->context = pipe;
279 }
280
281 return view;
282 }
283
284 static void
285 swr_set_sampler_views(struct pipe_context *pipe,
286 enum pipe_shader_type shader,
287 unsigned start,
288 unsigned num,
289 struct pipe_sampler_view **views)
290 {
291 struct swr_context *ctx = swr_context(pipe);
292 uint i;
293
294 assert(num <= PIPE_MAX_SHADER_SAMPLER_VIEWS);
295
296 assert(shader < PIPE_SHADER_TYPES);
297 assert(start + num <= ARRAY_SIZE(ctx->sampler_views[shader]));
298
299 /* set the new sampler views */
300 ctx->num_sampler_views[shader] = num;
301 for (i = 0; i < num; i++) {
302 /* Note: we're using pipe_sampler_view_release() here to work around
303 * a possible crash when the old view belongs to another context that
304 * was already destroyed.
305 */
306 pipe_sampler_view_release(pipe, &ctx->sampler_views[shader][start + i]);
307 pipe_sampler_view_reference(&ctx->sampler_views[shader][start + i],
308 views[i]);
309 }
310
311 ctx->dirty |= SWR_NEW_SAMPLER_VIEW;
312 }
313
314 static void
315 swr_sampler_view_destroy(struct pipe_context *pipe,
316 struct pipe_sampler_view *view)
317 {
318 pipe_resource_reference(&view->texture, NULL);
319 FREE(view);
320 }
321
322 static void *
323 swr_create_vs_state(struct pipe_context *pipe,
324 const struct pipe_shader_state *vs)
325 {
326 struct swr_vertex_shader *swr_vs = new swr_vertex_shader;
327 if (!swr_vs)
328 return NULL;
329
330 swr_vs->pipe.tokens = tgsi_dup_tokens(vs->tokens);
331 swr_vs->pipe.stream_output = vs->stream_output;
332
333 lp_build_tgsi_info(vs->tokens, &swr_vs->info);
334
335 swr_vs->soState = {0};
336
337 if (swr_vs->pipe.stream_output.num_outputs) {
338 pipe_stream_output_info *stream_output = &swr_vs->pipe.stream_output;
339
340 swr_vs->soState.soEnable = true;
341 // soState.rasterizerDisable set on state dirty
342 // soState.streamToRasterizer not used
343
344 for (uint32_t i = 0; i < stream_output->num_outputs; i++) {
345 swr_vs->soState.streamMasks[stream_output->output[i].stream] |=
346 1 << (stream_output->output[i].register_index - 1);
347 }
348 for (uint32_t i = 0; i < MAX_SO_STREAMS; i++) {
349 swr_vs->soState.streamNumEntries[i] =
350 _mm_popcnt_u32(swr_vs->soState.streamMasks[i]);
351 }
352 }
353
354 return swr_vs;
355 }
356
357 static void
358 swr_bind_vs_state(struct pipe_context *pipe, void *vs)
359 {
360 struct swr_context *ctx = swr_context(pipe);
361
362 if (ctx->vs == vs)
363 return;
364
365 ctx->vs = (swr_vertex_shader *)vs;
366 ctx->dirty |= SWR_NEW_VS;
367 }
368
369 static void
370 swr_delete_vs_state(struct pipe_context *pipe, void *vs)
371 {
372 struct swr_vertex_shader *swr_vs = (swr_vertex_shader *)vs;
373 FREE((void *)swr_vs->pipe.tokens);
374 struct swr_screen *screen = swr_screen(pipe->screen);
375 if (!swr_is_fence_pending(screen->flush_fence))
376 swr_fence_submit(swr_context(pipe), screen->flush_fence);
377 swr_fence_finish(pipe->screen, NULL, screen->flush_fence, 0);
378 delete swr_vs;
379 }
380
381 static void *
382 swr_create_fs_state(struct pipe_context *pipe,
383 const struct pipe_shader_state *fs)
384 {
385 struct swr_fragment_shader *swr_fs = new swr_fragment_shader;
386 if (!swr_fs)
387 return NULL;
388
389 swr_fs->pipe.tokens = tgsi_dup_tokens(fs->tokens);
390
391 lp_build_tgsi_info(fs->tokens, &swr_fs->info);
392
393 return swr_fs;
394 }
395
396
397 static void
398 swr_bind_fs_state(struct pipe_context *pipe, void *fs)
399 {
400 struct swr_context *ctx = swr_context(pipe);
401
402 if (ctx->fs == fs)
403 return;
404
405 ctx->fs = (swr_fragment_shader *)fs;
406 ctx->dirty |= SWR_NEW_FS;
407 }
408
409 static void
410 swr_delete_fs_state(struct pipe_context *pipe, void *fs)
411 {
412 struct swr_fragment_shader *swr_fs = (swr_fragment_shader *)fs;
413 FREE((void *)swr_fs->pipe.tokens);
414 struct swr_screen *screen = swr_screen(pipe->screen);
415 if (!swr_is_fence_pending(screen->flush_fence))
416 swr_fence_submit(swr_context(pipe), screen->flush_fence);
417 swr_fence_finish(pipe->screen, NULL, screen->flush_fence, 0);
418 delete swr_fs;
419 }
420
421
422 static void
423 swr_set_constant_buffer(struct pipe_context *pipe,
424 uint shader,
425 uint index,
426 const struct pipe_constant_buffer *cb)
427 {
428 struct swr_context *ctx = swr_context(pipe);
429 struct pipe_resource *constants = cb ? cb->buffer : NULL;
430
431 assert(shader < PIPE_SHADER_TYPES);
432 assert(index < ARRAY_SIZE(ctx->constants[shader]));
433
434 /* note: reference counting */
435 util_copy_constant_buffer(&ctx->constants[shader][index], cb);
436
437 if (shader == PIPE_SHADER_VERTEX || shader == PIPE_SHADER_GEOMETRY) {
438 ctx->dirty |= SWR_NEW_VSCONSTANTS;
439 } else if (shader == PIPE_SHADER_FRAGMENT) {
440 ctx->dirty |= SWR_NEW_FSCONSTANTS;
441 }
442
443 if (cb && cb->user_buffer) {
444 pipe_resource_reference(&constants, NULL);
445 }
446 }
447
448
449 static void *
450 swr_create_vertex_elements_state(struct pipe_context *pipe,
451 unsigned num_elements,
452 const struct pipe_vertex_element *attribs)
453 {
454 struct swr_vertex_element_state *velems;
455 assert(num_elements <= PIPE_MAX_ATTRIBS);
456 velems = CALLOC_STRUCT(swr_vertex_element_state);
457 if (velems) {
458 velems->fsState.bVertexIDOffsetEnable = true;
459 velems->fsState.numAttribs = num_elements;
460 for (unsigned i = 0; i < num_elements; i++) {
461 // XXX: we should do this keyed on the VS usage info
462
463 const struct util_format_description *desc =
464 util_format_description(attribs[i].src_format);
465
466 velems->fsState.layout[i].AlignedByteOffset = attribs[i].src_offset;
467 velems->fsState.layout[i].Format =
468 mesa_to_swr_format(attribs[i].src_format);
469 velems->fsState.layout[i].StreamIndex =
470 attribs[i].vertex_buffer_index;
471 velems->fsState.layout[i].InstanceEnable =
472 attribs[i].instance_divisor != 0;
473 velems->fsState.layout[i].ComponentControl0 =
474 desc->channel[0].type != UTIL_FORMAT_TYPE_VOID
475 ? ComponentControl::StoreSrc
476 : ComponentControl::Store0;
477 velems->fsState.layout[i].ComponentControl1 =
478 desc->channel[1].type != UTIL_FORMAT_TYPE_VOID
479 ? ComponentControl::StoreSrc
480 : ComponentControl::Store0;
481 velems->fsState.layout[i].ComponentControl2 =
482 desc->channel[2].type != UTIL_FORMAT_TYPE_VOID
483 ? ComponentControl::StoreSrc
484 : ComponentControl::Store0;
485 velems->fsState.layout[i].ComponentControl3 =
486 desc->channel[3].type != UTIL_FORMAT_TYPE_VOID
487 ? ComponentControl::StoreSrc
488 : ComponentControl::Store1Fp;
489 velems->fsState.layout[i].ComponentPacking = ComponentEnable::XYZW;
490 velems->fsState.layout[i].InstanceDataStepRate =
491 attribs[i].instance_divisor;
492
493 /* Calculate the pitch of each stream */
494 const SWR_FORMAT_INFO &swr_desc = GetFormatInfo(
495 mesa_to_swr_format(attribs[i].src_format));
496 velems->stream_pitch[attribs[i].vertex_buffer_index] += swr_desc.Bpp;
497 }
498 }
499
500 return velems;
501 }
502
503 static void
504 swr_bind_vertex_elements_state(struct pipe_context *pipe, void *velems)
505 {
506 struct swr_context *ctx = swr_context(pipe);
507 struct swr_vertex_element_state *swr_velems =
508 (struct swr_vertex_element_state *)velems;
509
510 ctx->velems = swr_velems;
511 ctx->dirty |= SWR_NEW_VERTEX;
512 }
513
514 static void
515 swr_delete_vertex_elements_state(struct pipe_context *pipe, void *velems)
516 {
517 /* XXX Need to destroy fetch shader? */
518 FREE(velems);
519 }
520
521
522 static void
523 swr_set_vertex_buffers(struct pipe_context *pipe,
524 unsigned start_slot,
525 unsigned num_elements,
526 const struct pipe_vertex_buffer *buffers)
527 {
528 struct swr_context *ctx = swr_context(pipe);
529
530 assert(num_elements <= PIPE_MAX_ATTRIBS);
531
532 util_set_vertex_buffers_count(ctx->vertex_buffer,
533 &ctx->num_vertex_buffers,
534 buffers,
535 start_slot,
536 num_elements);
537
538 ctx->dirty |= SWR_NEW_VERTEX;
539 }
540
541
542 static void
543 swr_set_index_buffer(struct pipe_context *pipe,
544 const struct pipe_index_buffer *ib)
545 {
546 struct swr_context *ctx = swr_context(pipe);
547
548 if (ib)
549 memcpy(&ctx->index_buffer, ib, sizeof(ctx->index_buffer));
550 else
551 memset(&ctx->index_buffer, 0, sizeof(ctx->index_buffer));
552
553 ctx->dirty |= SWR_NEW_VERTEX;
554 }
555
556 static void
557 swr_set_polygon_stipple(struct pipe_context *pipe,
558 const struct pipe_poly_stipple *stipple)
559 {
560 struct swr_context *ctx = swr_context(pipe);
561
562 ctx->poly_stipple = *stipple; /* struct copy */
563 ctx->dirty |= SWR_NEW_STIPPLE;
564 }
565
566 static void
567 swr_set_clip_state(struct pipe_context *pipe,
568 const struct pipe_clip_state *clip)
569 {
570 struct swr_context *ctx = swr_context(pipe);
571
572 ctx->clip = *clip;
573 /* XXX Unimplemented, but prevents crash */
574
575 ctx->dirty |= SWR_NEW_CLIP;
576 }
577
578
579 static void
580 swr_set_scissor_states(struct pipe_context *pipe,
581 unsigned start_slot,
582 unsigned num_viewports,
583 const struct pipe_scissor_state *scissor)
584 {
585 struct swr_context *ctx = swr_context(pipe);
586
587 ctx->scissor = *scissor;
588 ctx->swr_scissor.xmin = scissor->minx;
589 ctx->swr_scissor.xmax = scissor->maxx;
590 ctx->swr_scissor.ymin = scissor->miny;
591 ctx->swr_scissor.ymax = scissor->maxy;
592 ctx->dirty |= SWR_NEW_SCISSOR;
593 }
594
595 static void
596 swr_set_viewport_states(struct pipe_context *pipe,
597 unsigned start_slot,
598 unsigned num_viewports,
599 const struct pipe_viewport_state *vpt)
600 {
601 struct swr_context *ctx = swr_context(pipe);
602
603 ctx->viewport = *vpt;
604 ctx->dirty |= SWR_NEW_VIEWPORT;
605 }
606
607
608 static void
609 swr_set_framebuffer_state(struct pipe_context *pipe,
610 const struct pipe_framebuffer_state *fb)
611 {
612 struct swr_context *ctx = swr_context(pipe);
613
614 boolean changed = !util_framebuffer_state_equal(&ctx->framebuffer, fb);
615
616 assert(fb->width <= KNOB_GUARDBAND_WIDTH);
617 assert(fb->height <= KNOB_GUARDBAND_HEIGHT);
618
619 if (changed) {
620 util_copy_framebuffer_state(&ctx->framebuffer, fb);
621
622 ctx->dirty |= SWR_NEW_FRAMEBUFFER;
623 }
624 }
625
626
627 static void
628 swr_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
629 {
630 struct swr_context *ctx = swr_context(pipe);
631
632 if (sample_mask != ctx->sample_mask) {
633 ctx->sample_mask = sample_mask;
634 ctx->dirty |= SWR_NEW_RASTERIZER;
635 }
636 }
637
638 /*
639 * Update resource in-use status
640 * All resources bound to color or depth targets marked as WRITE resources.
641 * VBO Vertex/index buffers and texture views marked as READ resources.
642 */
643 void
644 swr_update_resource_status(struct pipe_context *pipe,
645 const struct pipe_draw_info *p_draw_info)
646 {
647 struct swr_context *ctx = swr_context(pipe);
648 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
649
650 /* colorbuffer targets */
651 if (fb->nr_cbufs)
652 for (uint32_t i = 0; i < fb->nr_cbufs; ++i)
653 if (fb->cbufs[i])
654 swr_resource_write(fb->cbufs[i]->texture);
655
656 /* depth/stencil target */
657 if (fb->zsbuf)
658 swr_resource_write(fb->zsbuf->texture);
659
660 /* VBO vertex buffers */
661 for (uint32_t i = 0; i < ctx->num_vertex_buffers; i++) {
662 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
663 if (!vb->user_buffer)
664 swr_resource_read(vb->buffer);
665 }
666
667 /* VBO index buffer */
668 if (p_draw_info && p_draw_info->indexed) {
669 struct pipe_index_buffer *ib = &ctx->index_buffer;
670 if (!ib->user_buffer)
671 swr_resource_read(ib->buffer);
672 }
673
674 /* transform feedback buffers */
675 for (uint32_t i = 0; i < ctx->num_so_targets; i++) {
676 struct pipe_stream_output_target *target = ctx->so_targets[i];
677 if (target && target->buffer)
678 swr_resource_write(target->buffer);
679 }
680
681 /* texture sampler views */
682 for (uint32_t j : {PIPE_SHADER_VERTEX, PIPE_SHADER_FRAGMENT}) {
683 for (uint32_t i = 0; i < ctx->num_sampler_views[j]; i++) {
684 struct pipe_sampler_view *view = ctx->sampler_views[j][i];
685 if (view)
686 swr_resource_read(view->texture);
687 }
688 }
689
690 /* constant buffers */
691 for (uint32_t j : {PIPE_SHADER_VERTEX, PIPE_SHADER_FRAGMENT}) {
692 for (uint32_t i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
693 struct pipe_constant_buffer *cb = &ctx->constants[j][i];
694 if (cb->buffer)
695 swr_resource_read(cb->buffer);
696 }
697 }
698 }
699
700 static void
701 swr_update_texture_state(struct swr_context *ctx,
702 unsigned shader_type,
703 unsigned num_sampler_views,
704 swr_jit_texture *textures)
705 {
706 for (unsigned i = 0; i < num_sampler_views; i++) {
707 struct pipe_sampler_view *view =
708 ctx->sampler_views[shader_type][i];
709 struct swr_jit_texture *jit_tex = &textures[i];
710
711 memset(jit_tex, 0, sizeof(*jit_tex));
712 if (view) {
713 struct pipe_resource *res = view->texture;
714 struct swr_resource *swr_res = swr_resource(res);
715 SWR_SURFACE_STATE *swr = &swr_res->swr;
716 size_t *mip_offsets = swr_res->mip_offsets;
717 if (swr_res->has_depth && swr_res->has_stencil &&
718 !util_format_has_depth(util_format_description(view->format))) {
719 swr = &swr_res->secondary;
720 mip_offsets = swr_res->secondary_mip_offsets;
721 }
722
723 jit_tex->width = res->width0;
724 jit_tex->height = res->height0;
725 jit_tex->base_ptr = swr->pBaseAddress;
726 if (view->target != PIPE_BUFFER) {
727 jit_tex->first_level = view->u.tex.first_level;
728 jit_tex->last_level = view->u.tex.last_level;
729 if (view->target == PIPE_TEXTURE_3D)
730 jit_tex->depth = res->depth0;
731 else
732 jit_tex->depth =
733 view->u.tex.last_layer - view->u.tex.first_layer + 1;
734 jit_tex->base_ptr += view->u.tex.first_layer *
735 swr->qpitch * swr->pitch;
736 } else {
737 unsigned view_blocksize = util_format_get_blocksize(view->format);
738 jit_tex->base_ptr += view->u.buf.offset;
739 jit_tex->width = view->u.buf.size / view_blocksize;
740 jit_tex->depth = 1;
741 }
742
743 for (unsigned level = jit_tex->first_level;
744 level <= jit_tex->last_level;
745 level++) {
746 jit_tex->row_stride[level] = swr->pitch;
747 jit_tex->img_stride[level] = swr->qpitch * swr->pitch;
748 jit_tex->mip_offsets[level] = mip_offsets[level];
749 }
750 }
751 }
752 }
753
754 static void
755 swr_update_sampler_state(struct swr_context *ctx,
756 unsigned shader_type,
757 unsigned num_samplers,
758 swr_jit_sampler *samplers)
759 {
760 for (unsigned i = 0; i < num_samplers; i++) {
761 const struct pipe_sampler_state *sampler =
762 ctx->samplers[shader_type][i];
763
764 if (sampler) {
765 samplers[i].min_lod = sampler->min_lod;
766 samplers[i].max_lod = sampler->max_lod;
767 samplers[i].lod_bias = sampler->lod_bias;
768 COPY_4V(samplers[i].border_color, sampler->border_color.f);
769 }
770 }
771 }
772
773 static void
774 swr_update_constants(struct swr_context *ctx, enum pipe_shader_type shaderType)
775 {
776 swr_draw_context *pDC = &ctx->swrDC;
777
778 const float **constant;
779 uint32_t *num_constants;
780 struct swr_scratch_space *scratch;
781
782 switch (shaderType) {
783 case PIPE_SHADER_VERTEX:
784 constant = pDC->constantVS;
785 num_constants = pDC->num_constantsVS;
786 scratch = &ctx->scratch->vs_constants;
787 break;
788 case PIPE_SHADER_FRAGMENT:
789 constant = pDC->constantFS;
790 num_constants = pDC->num_constantsFS;
791 scratch = &ctx->scratch->fs_constants;
792 break;
793 default:
794 debug_printf("Unsupported shader type constants\n");
795 return;
796 }
797
798 for (UINT i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
799 const pipe_constant_buffer *cb = &ctx->constants[shaderType][i];
800 num_constants[i] = cb->buffer_size;
801 if (cb->buffer) {
802 constant[i] =
803 (const float *)(swr_resource_data(cb->buffer) +
804 cb->buffer_offset);
805 } else {
806 /* Need to copy these constants to scratch space */
807 if (cb->user_buffer && cb->buffer_size) {
808 const void *ptr =
809 ((const uint8_t *)cb->user_buffer + cb->buffer_offset);
810 uint32_t size = AlignUp(cb->buffer_size, 4);
811 ptr = swr_copy_to_scratch_space(ctx, scratch, ptr, size);
812 constant[i] = (const float *)ptr;
813 }
814 }
815 }
816 }
817
818 static bool
819 swr_change_rt(struct swr_context *ctx,
820 unsigned attachment,
821 const struct pipe_surface *sf)
822 {
823 swr_draw_context *pDC = &ctx->swrDC;
824 struct SWR_SURFACE_STATE *rt = &pDC->renderTargets[attachment];
825
826 /* Do nothing if the render target hasn't changed */
827 if ((!sf || !sf->texture) && rt->pBaseAddress == nullptr)
828 return false;
829
830 /* Deal with disabling RT up front */
831 if (!sf || !sf->texture) {
832 /* If detaching attachment, mark tiles as RESOLVED so core
833 * won't try to load from non-existent target. */
834 swr_store_render_target(&ctx->pipe, attachment, SWR_TILE_RESOLVED);
835 *rt = {0};
836 return true;
837 }
838
839 const struct swr_resource *swr = swr_resource(sf->texture);
840 const SWR_SURFACE_STATE *swr_surface = &swr->swr;
841 SWR_FORMAT fmt = mesa_to_swr_format(sf->format);
842
843 if (attachment == SWR_ATTACHMENT_STENCIL && swr->secondary.pBaseAddress) {
844 swr_surface = &swr->secondary;
845 fmt = swr_surface->format;
846 }
847
848 if (rt->pBaseAddress == swr_surface->pBaseAddress &&
849 rt->format == fmt &&
850 rt->lod == sf->u.tex.level &&
851 rt->arrayIndex == sf->u.tex.first_layer)
852 return false;
853
854 bool need_fence = false;
855
856 /* StoreTile for changed target */
857 if (rt->pBaseAddress) {
858 /* If changing attachment to a new target, mark tiles as
859 * INVALID so they are reloaded from surface. */
860 swr_store_render_target(&ctx->pipe, attachment, SWR_TILE_INVALID);
861 need_fence = true;
862 }
863
864 /* Make new attachment */
865 *rt = *swr_surface;
866 rt->format = fmt;
867 rt->lod = sf->u.tex.level;
868 rt->arrayIndex = sf->u.tex.first_layer;
869
870 return need_fence;
871 }
872
873 void
874 swr_update_derived(struct pipe_context *pipe,
875 const struct pipe_draw_info *p_draw_info)
876 {
877 struct swr_context *ctx = swr_context(pipe);
878 struct swr_screen *screen = swr_screen(ctx->pipe.screen);
879
880 /* Update screen->pipe to current pipe context. */
881 if (screen->pipe != pipe)
882 screen->pipe = pipe;
883
884 /* Any state that requires dirty flags to be re-triggered sets this mask */
885 /* For example, user_buffer vertex and index buffers. */
886 unsigned post_update_dirty_flags = 0;
887
888 /* Render Targets */
889 if (ctx->dirty & SWR_NEW_FRAMEBUFFER) {
890 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
891 const struct util_format_description *desc = NULL;
892 bool need_fence = false;
893
894 /* colorbuffer targets */
895 if (fb->nr_cbufs) {
896 for (unsigned i = 0; i < fb->nr_cbufs; ++i)
897 need_fence |= swr_change_rt(
898 ctx, SWR_ATTACHMENT_COLOR0 + i, fb->cbufs[i]);
899 }
900 for (unsigned i = fb->nr_cbufs; i < SWR_NUM_RENDERTARGETS; ++i)
901 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_COLOR0 + i, NULL);
902
903 /* depth/stencil target */
904 if (fb->zsbuf)
905 desc = util_format_description(fb->zsbuf->format);
906 if (fb->zsbuf && util_format_has_depth(desc))
907 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_DEPTH, fb->zsbuf);
908 else
909 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_DEPTH, NULL);
910
911 if (fb->zsbuf && util_format_has_stencil(desc))
912 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_STENCIL, fb->zsbuf);
913 else
914 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_STENCIL, NULL);
915
916 /* This fence ensures any attachment changes are resolved before the
917 * next draw */
918 if (need_fence)
919 swr_fence_submit(ctx, screen->flush_fence);
920 }
921
922 /* Raster state */
923 if (ctx->dirty & (SWR_NEW_RASTERIZER |
924 SWR_NEW_VS | // clipping
925 SWR_NEW_FRAMEBUFFER)) {
926 pipe_rasterizer_state *rasterizer = ctx->rasterizer;
927 pipe_framebuffer_state *fb = &ctx->framebuffer;
928
929 SWR_RASTSTATE *rastState = &ctx->derived.rastState;
930 rastState->cullMode = swr_convert_cull_mode(rasterizer->cull_face);
931 rastState->frontWinding = rasterizer->front_ccw
932 ? SWR_FRONTWINDING_CCW
933 : SWR_FRONTWINDING_CW;
934 rastState->scissorEnable = rasterizer->scissor;
935 rastState->pointSize = rasterizer->point_size > 0.0f
936 ? rasterizer->point_size
937 : 1.0f;
938 rastState->lineWidth = rasterizer->line_width > 0.0f
939 ? rasterizer->line_width
940 : 1.0f;
941
942 rastState->pointParam = rasterizer->point_size_per_vertex;
943
944 rastState->pointSpriteEnable = rasterizer->sprite_coord_enable;
945 rastState->pointSpriteTopOrigin =
946 rasterizer->sprite_coord_mode == PIPE_SPRITE_COORD_UPPER_LEFT;
947
948 /* XXX TODO: Add multisample */
949 rastState->msaaRastEnable = false;
950 rastState->rastMode = SWR_MSAA_RASTMODE_OFF_PIXEL;
951 rastState->sampleCount = SWR_MULTISAMPLE_1X;
952 rastState->forcedSampleCount = false;
953
954 bool do_offset = false;
955 switch (rasterizer->fill_front) {
956 case PIPE_POLYGON_MODE_FILL:
957 do_offset = rasterizer->offset_tri;
958 break;
959 case PIPE_POLYGON_MODE_LINE:
960 do_offset = rasterizer->offset_line;
961 break;
962 case PIPE_POLYGON_MODE_POINT:
963 do_offset = rasterizer->offset_point;
964 break;
965 }
966
967 if (do_offset) {
968 rastState->depthBias = rasterizer->offset_units;
969 rastState->slopeScaledDepthBias = rasterizer->offset_scale;
970 rastState->depthBiasClamp = rasterizer->offset_clamp;
971 } else {
972 rastState->depthBias = 0;
973 rastState->slopeScaledDepthBias = 0;
974 rastState->depthBiasClamp = 0;
975 }
976 struct pipe_surface *zb = fb->zsbuf;
977 if (zb && swr_resource(zb->texture)->has_depth)
978 rastState->depthFormat = swr_resource(zb->texture)->swr.format;
979
980 rastState->depthClipEnable = rasterizer->depth_clip;
981 rastState->clipHalfZ = rasterizer->clip_halfz;
982
983 rastState->clipDistanceMask =
984 ctx->vs->info.base.num_written_clipdistance ?
985 ctx->vs->info.base.clipdist_writemask & rasterizer->clip_plane_enable :
986 rasterizer->clip_plane_enable;
987
988 rastState->cullDistanceMask =
989 ctx->vs->info.base.culldist_writemask << ctx->vs->info.base.num_written_clipdistance;
990
991 SwrSetRastState(ctx->swrContext, rastState);
992 }
993
994 /* Scissor */
995 if (ctx->dirty & SWR_NEW_SCISSOR) {
996 SwrSetScissorRects(ctx->swrContext, 1, &ctx->swr_scissor);
997 }
998
999 /* Viewport */
1000 if (ctx->dirty & (SWR_NEW_VIEWPORT | SWR_NEW_FRAMEBUFFER
1001 | SWR_NEW_RASTERIZER)) {
1002 pipe_viewport_state *state = &ctx->viewport;
1003 pipe_framebuffer_state *fb = &ctx->framebuffer;
1004 pipe_rasterizer_state *rasterizer = ctx->rasterizer;
1005
1006 SWR_VIEWPORT *vp = &ctx->derived.vp;
1007 SWR_VIEWPORT_MATRICES *vpm = &ctx->derived.vpm;
1008
1009 vp->x = state->translate[0] - state->scale[0];
1010 vp->width = 2 * state->scale[0];
1011 vp->y = state->translate[1] - fabs(state->scale[1]);
1012 vp->height = 2 * fabs(state->scale[1]);
1013 util_viewport_zmin_zmax(state, rasterizer->clip_halfz,
1014 &vp->minZ, &vp->maxZ);
1015
1016 vpm->m00[0] = state->scale[0];
1017 vpm->m11[0] = state->scale[1];
1018 vpm->m22[0] = state->scale[2];
1019 vpm->m30[0] = state->translate[0];
1020 vpm->m31[0] = state->translate[1];
1021 vpm->m32[0] = state->translate[2];
1022
1023 /* Now that the matrix is calculated, clip the view coords to screen
1024 * size. OpenGL allows for -ve x,y in the viewport. */
1025 if (vp->x < 0.0f) {
1026 vp->width += vp->x;
1027 vp->x = 0.0f;
1028 }
1029 if (vp->y < 0.0f) {
1030 vp->height += vp->y;
1031 vp->y = 0.0f;
1032 }
1033 vp->width = std::min(vp->width, (float)fb->width - vp->x);
1034 vp->height = std::min(vp->height, (float)fb->height - vp->y);
1035
1036 SwrSetViewports(ctx->swrContext, 1, vp, vpm);
1037 }
1038
1039 /* Set vertex & index buffers */
1040 /* (using draw info if called by swr_draw_vbo) */
1041 if (ctx->dirty & SWR_NEW_VERTEX) {
1042 uint32_t size, pitch, max_vertex, partial_inbounds, scratch_total;
1043 const uint8_t *p_data;
1044 uint8_t *scratch = NULL;
1045
1046 /* If being called by swr_draw_vbo, copy draw details */
1047 struct pipe_draw_info info = {0};
1048 if (p_draw_info)
1049 info = *p_draw_info;
1050
1051 /* We must get all the scratch space in one go */
1052 scratch_total = 0;
1053 for (UINT i = 0; i < ctx->num_vertex_buffers; i++) {
1054 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
1055
1056 if (!vb->user_buffer)
1057 continue;
1058
1059 if (vb->stride) {
1060 size = (info.max_index - info.min_index + 1) * vb->stride;
1061 } else {
1062 /* pitch = 0, means constant value
1063 * set size to 1 vertex */
1064 size = ctx->velems->stream_pitch[i];
1065 }
1066
1067 scratch_total += AlignUp(size, 4);
1068 }
1069
1070 if (scratch_total) {
1071 scratch = (uint8_t *)swr_copy_to_scratch_space(
1072 ctx, &ctx->scratch->vertex_buffer, NULL, scratch_total);
1073 }
1074
1075 /* vertex buffers */
1076 SWR_VERTEX_BUFFER_STATE swrVertexBuffers[PIPE_MAX_ATTRIBS];
1077 for (UINT i = 0; i < ctx->num_vertex_buffers; i++) {
1078 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
1079
1080 pitch = vb->stride;
1081 if (!vb->user_buffer) {
1082 /* VBO
1083 * size is based on buffer->width0 rather than info.max_index
1084 * to prevent having to validate VBO on each draw */
1085 size = vb->buffer->width0;
1086 max_vertex = size / pitch;
1087 partial_inbounds = size % pitch;
1088
1089 p_data = swr_resource_data(vb->buffer) + vb->buffer_offset;
1090 } else {
1091 /* Client buffer
1092 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
1093 * revalidate on each draw */
1094 post_update_dirty_flags |= SWR_NEW_VERTEX;
1095
1096 if (pitch) {
1097 size = (info.max_index - info.min_index + 1) * pitch;
1098 } else {
1099 /* pitch = 0, means constant value
1100 * set size to 1 vertex */
1101 size = ctx->velems->stream_pitch[i];
1102 }
1103
1104 max_vertex = info.max_index + 1;
1105 partial_inbounds = 0;
1106
1107 /* Copy only needed vertices to scratch space */
1108 size = AlignUp(size, 4);
1109 const void *ptr = (const uint8_t *) vb->user_buffer
1110 + info.min_index * pitch;
1111 memcpy(scratch, ptr, size);
1112 ptr = scratch;
1113 scratch += size;
1114 p_data = (const uint8_t *)ptr - info.min_index * pitch;
1115 }
1116
1117 swrVertexBuffers[i] = {0};
1118 swrVertexBuffers[i].index = i;
1119 swrVertexBuffers[i].pitch = pitch;
1120 swrVertexBuffers[i].pData = p_data;
1121 swrVertexBuffers[i].size = size;
1122 swrVertexBuffers[i].maxVertex = max_vertex;
1123 swrVertexBuffers[i].partialInboundsSize = partial_inbounds;
1124 }
1125
1126 SwrSetVertexBuffers(
1127 ctx->swrContext, ctx->num_vertex_buffers, swrVertexBuffers);
1128
1129 /* index buffer, if required (info passed in by swr_draw_vbo) */
1130 SWR_FORMAT index_type = R32_UINT; /* Default for non-indexed draws */
1131 if (info.indexed) {
1132 struct pipe_index_buffer *ib = &ctx->index_buffer;
1133
1134 pitch = ib->index_size ? ib->index_size : sizeof(uint32_t);
1135 index_type = swr_convert_index_type(pitch);
1136
1137 if (!ib->user_buffer) {
1138 /* VBO
1139 * size is based on buffer->width0 rather than info.count
1140 * to prevent having to validate VBO on each draw */
1141 size = ib->buffer->width0;
1142 p_data = swr_resource_data(ib->buffer) + ib->offset;
1143 } else {
1144 /* Client buffer
1145 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
1146 * revalidate on each draw */
1147 post_update_dirty_flags |= SWR_NEW_VERTEX;
1148
1149 size = info.count * pitch;
1150 size = AlignUp(size, 4);
1151
1152 /* Copy indices to scratch space */
1153 const void *ptr = ib->user_buffer;
1154 ptr = swr_copy_to_scratch_space(
1155 ctx, &ctx->scratch->index_buffer, ptr, size);
1156 p_data = (const uint8_t *)ptr;
1157 }
1158
1159 SWR_INDEX_BUFFER_STATE swrIndexBuffer;
1160 swrIndexBuffer.format = swr_convert_index_type(ib->index_size);
1161 swrIndexBuffer.pIndices = p_data;
1162 swrIndexBuffer.size = size;
1163
1164 SwrSetIndexBuffer(ctx->swrContext, &swrIndexBuffer);
1165 }
1166
1167 struct swr_vertex_element_state *velems = ctx->velems;
1168 if (velems && velems->fsState.indexType != index_type) {
1169 velems->fsFunc = NULL;
1170 velems->fsState.indexType = index_type;
1171 }
1172 }
1173
1174 /* VertexShader */
1175 if (ctx->dirty & (SWR_NEW_VS |
1176 SWR_NEW_RASTERIZER | // for clip planes
1177 SWR_NEW_SAMPLER |
1178 SWR_NEW_SAMPLER_VIEW |
1179 SWR_NEW_FRAMEBUFFER)) {
1180 swr_jit_vs_key key;
1181 swr_generate_vs_key(key, ctx, ctx->vs);
1182 auto search = ctx->vs->map.find(key);
1183 PFN_VERTEX_FUNC func;
1184 if (search != ctx->vs->map.end()) {
1185 func = search->second->shader;
1186 } else {
1187 func = swr_compile_vs(ctx, key);
1188 }
1189 SwrSetVertexFunc(ctx->swrContext, func);
1190
1191 /* JIT sampler state */
1192 if (ctx->dirty & SWR_NEW_SAMPLER) {
1193 swr_update_sampler_state(ctx,
1194 PIPE_SHADER_VERTEX,
1195 key.nr_samplers,
1196 ctx->swrDC.samplersVS);
1197 }
1198
1199 /* JIT sampler view state */
1200 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1201 swr_update_texture_state(ctx,
1202 PIPE_SHADER_VERTEX,
1203 key.nr_sampler_views,
1204 ctx->swrDC.texturesVS);
1205 }
1206 }
1207
1208 /* FragmentShader */
1209 if (ctx->dirty & (SWR_NEW_FS | SWR_NEW_SAMPLER | SWR_NEW_SAMPLER_VIEW
1210 | SWR_NEW_RASTERIZER | SWR_NEW_FRAMEBUFFER)) {
1211 swr_jit_fs_key key;
1212 swr_generate_fs_key(key, ctx, ctx->fs);
1213 auto search = ctx->fs->map.find(key);
1214 PFN_PIXEL_KERNEL func;
1215 if (search != ctx->fs->map.end()) {
1216 func = search->second->shader;
1217 } else {
1218 func = swr_compile_fs(ctx, key);
1219 }
1220 SWR_PS_STATE psState = {0};
1221 psState.pfnPixelShader = func;
1222 psState.killsPixel = ctx->fs->info.base.uses_kill;
1223 psState.inputCoverage = SWR_INPUT_COVERAGE_NORMAL;
1224 psState.writesODepth = ctx->fs->info.base.writes_z;
1225 psState.usesSourceDepth = ctx->fs->info.base.reads_z;
1226 psState.shadingRate = SWR_SHADING_RATE_PIXEL; // XXX
1227 psState.numRenderTargets = ctx->framebuffer.nr_cbufs;
1228 psState.posOffset = SWR_PS_POSITION_SAMPLE_NONE; // XXX msaa
1229 uint32_t barycentricsMask = 0;
1230 #if 0
1231 // when we switch to mesa-master
1232 if (ctx->fs->info.base.uses_persp_center ||
1233 ctx->fs->info.base.uses_linear_center)
1234 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1235 if (ctx->fs->info.base.uses_persp_centroid ||
1236 ctx->fs->info.base.uses_linear_centroid)
1237 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1238 if (ctx->fs->info.base.uses_persp_sample ||
1239 ctx->fs->info.base.uses_linear_sample)
1240 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1241 #else
1242 for (unsigned i = 0; i < ctx->fs->info.base.num_inputs; i++) {
1243 switch (ctx->fs->info.base.input_interpolate_loc[i]) {
1244 case TGSI_INTERPOLATE_LOC_CENTER:
1245 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1246 break;
1247 case TGSI_INTERPOLATE_LOC_CENTROID:
1248 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1249 break;
1250 case TGSI_INTERPOLATE_LOC_SAMPLE:
1251 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1252 break;
1253 }
1254 }
1255 #endif
1256 psState.barycentricsMask = barycentricsMask;
1257 psState.usesUAV = false; // XXX
1258 psState.forceEarlyZ = false;
1259 SwrSetPixelShaderState(ctx->swrContext, &psState);
1260
1261 /* JIT sampler state */
1262 if (ctx->dirty & SWR_NEW_SAMPLER) {
1263 swr_update_sampler_state(ctx,
1264 PIPE_SHADER_FRAGMENT,
1265 key.nr_samplers,
1266 ctx->swrDC.samplersFS);
1267 }
1268
1269 /* JIT sampler view state */
1270 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1271 swr_update_texture_state(ctx,
1272 PIPE_SHADER_FRAGMENT,
1273 key.nr_sampler_views,
1274 ctx->swrDC.texturesFS);
1275 }
1276 }
1277
1278
1279 /* VertexShader Constants */
1280 if (ctx->dirty & SWR_NEW_VSCONSTANTS) {
1281 swr_update_constants(ctx, PIPE_SHADER_VERTEX);
1282 }
1283
1284 /* FragmentShader Constants */
1285 if (ctx->dirty & SWR_NEW_FSCONSTANTS) {
1286 swr_update_constants(ctx, PIPE_SHADER_FRAGMENT);
1287 }
1288
1289 /* Depth/stencil state */
1290 if (ctx->dirty & (SWR_NEW_DEPTH_STENCIL_ALPHA | SWR_NEW_FRAMEBUFFER)) {
1291 struct pipe_depth_state *depth = &(ctx->depth_stencil->depth);
1292 struct pipe_stencil_state *stencil = ctx->depth_stencil->stencil;
1293 SWR_DEPTH_STENCIL_STATE depthStencilState = {{0}};
1294 SWR_DEPTH_BOUNDS_STATE depthBoundsState = {0};
1295
1296 /* XXX, incomplete. Need to flesh out stencil & alpha test state
1297 struct pipe_stencil_state *front_stencil =
1298 ctx->depth_stencil.stencil[0];
1299 struct pipe_stencil_state *back_stencil = ctx->depth_stencil.stencil[1];
1300 struct pipe_alpha_state alpha;
1301 */
1302 if (stencil[0].enabled) {
1303 depthStencilState.stencilWriteEnable = 1;
1304 depthStencilState.stencilTestEnable = 1;
1305 depthStencilState.stencilTestFunc =
1306 swr_convert_depth_func(stencil[0].func);
1307
1308 depthStencilState.stencilPassDepthPassOp =
1309 swr_convert_stencil_op(stencil[0].zpass_op);
1310 depthStencilState.stencilPassDepthFailOp =
1311 swr_convert_stencil_op(stencil[0].zfail_op);
1312 depthStencilState.stencilFailOp =
1313 swr_convert_stencil_op(stencil[0].fail_op);
1314 depthStencilState.stencilWriteMask = stencil[0].writemask;
1315 depthStencilState.stencilTestMask = stencil[0].valuemask;
1316 depthStencilState.stencilRefValue = ctx->stencil_ref.ref_value[0];
1317 }
1318 if (stencil[1].enabled) {
1319 depthStencilState.doubleSidedStencilTestEnable = 1;
1320
1321 depthStencilState.backfaceStencilTestFunc =
1322 swr_convert_depth_func(stencil[1].func);
1323
1324 depthStencilState.backfaceStencilPassDepthPassOp =
1325 swr_convert_stencil_op(stencil[1].zpass_op);
1326 depthStencilState.backfaceStencilPassDepthFailOp =
1327 swr_convert_stencil_op(stencil[1].zfail_op);
1328 depthStencilState.backfaceStencilFailOp =
1329 swr_convert_stencil_op(stencil[1].fail_op);
1330 depthStencilState.backfaceStencilWriteMask = stencil[1].writemask;
1331 depthStencilState.backfaceStencilTestMask = stencil[1].valuemask;
1332
1333 depthStencilState.backfaceStencilRefValue =
1334 ctx->stencil_ref.ref_value[1];
1335 }
1336
1337 depthStencilState.depthTestEnable = depth->enabled;
1338 depthStencilState.depthTestFunc = swr_convert_depth_func(depth->func);
1339 depthStencilState.depthWriteEnable = depth->writemask;
1340 SwrSetDepthStencilState(ctx->swrContext, &depthStencilState);
1341
1342 depthBoundsState.depthBoundsTestEnable = depth->bounds_test;
1343 depthBoundsState.depthBoundsTestMinValue = depth->bounds_min;
1344 depthBoundsState.depthBoundsTestMaxValue = depth->bounds_max;
1345 SwrSetDepthBoundsState(ctx->swrContext, &depthBoundsState);
1346 }
1347
1348 /* Blend State */
1349 if (ctx->dirty & (SWR_NEW_BLEND |
1350 SWR_NEW_FRAMEBUFFER |
1351 SWR_NEW_DEPTH_STENCIL_ALPHA)) {
1352 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
1353
1354 SWR_BLEND_STATE blendState;
1355 memcpy(&blendState, &ctx->blend->blendState, sizeof(blendState));
1356 blendState.constantColor[0] = ctx->blend_color.color[0];
1357 blendState.constantColor[1] = ctx->blend_color.color[1];
1358 blendState.constantColor[2] = ctx->blend_color.color[2];
1359 blendState.constantColor[3] = ctx->blend_color.color[3];
1360 blendState.alphaTestReference =
1361 *((uint32_t*)&ctx->depth_stencil->alpha.ref_value);
1362
1363 // XXX MSAA
1364 blendState.sampleMask = 0;
1365 blendState.sampleCount = SWR_MULTISAMPLE_1X;
1366
1367 /* If there are no color buffers bound, disable writes on RT0
1368 * and skip loop */
1369 if (fb->nr_cbufs == 0) {
1370 blendState.renderTarget[0].writeDisableRed = 1;
1371 blendState.renderTarget[0].writeDisableGreen = 1;
1372 blendState.renderTarget[0].writeDisableBlue = 1;
1373 blendState.renderTarget[0].writeDisableAlpha = 1;
1374 SwrSetBlendFunc(ctx->swrContext, 0, NULL);
1375 }
1376 else
1377 for (int target = 0;
1378 target < std::min(SWR_NUM_RENDERTARGETS,
1379 PIPE_MAX_COLOR_BUFS);
1380 target++) {
1381 if (!fb->cbufs[target])
1382 continue;
1383
1384 struct swr_resource *colorBuffer =
1385 swr_resource(fb->cbufs[target]->texture);
1386
1387 BLEND_COMPILE_STATE compileState;
1388 memset(&compileState, 0, sizeof(compileState));
1389 compileState.format = colorBuffer->swr.format;
1390 memcpy(&compileState.blendState,
1391 &ctx->blend->compileState[target],
1392 sizeof(compileState.blendState));
1393
1394 const SWR_FORMAT_INFO& info = GetFormatInfo(compileState.format);
1395 if (compileState.blendState.logicOpEnable &&
1396 ((info.type[0] == SWR_TYPE_FLOAT) || info.isSRGB)) {
1397 compileState.blendState.logicOpEnable = false;
1398 }
1399
1400 if (info.type[0] == SWR_TYPE_SINT || info.type[0] == SWR_TYPE_UINT)
1401 compileState.blendState.blendEnable = false;
1402
1403 if (compileState.blendState.blendEnable == false &&
1404 compileState.blendState.logicOpEnable == false &&
1405 ctx->depth_stencil->alpha.enabled == 0) {
1406 SwrSetBlendFunc(ctx->swrContext, target, NULL);
1407 continue;
1408 }
1409
1410 compileState.desc.alphaTestEnable =
1411 ctx->depth_stencil->alpha.enabled;
1412 compileState.desc.independentAlphaBlendEnable =
1413 (compileState.blendState.sourceBlendFactor !=
1414 compileState.blendState.sourceAlphaBlendFactor) ||
1415 (compileState.blendState.destBlendFactor !=
1416 compileState.blendState.destAlphaBlendFactor) ||
1417 (compileState.blendState.colorBlendFunc !=
1418 compileState.blendState.alphaBlendFunc);
1419 compileState.desc.alphaToCoverageEnable =
1420 ctx->blend->pipe.alpha_to_coverage;
1421 compileState.desc.sampleMaskEnable = 0; // XXX
1422 compileState.desc.numSamples = 1; // XXX
1423
1424 compileState.alphaTestFunction =
1425 swr_convert_depth_func(ctx->depth_stencil->alpha.func);
1426 compileState.alphaTestFormat = ALPHA_TEST_FLOAT32; // xxx
1427
1428 compileState.Canonicalize();
1429
1430 PFN_BLEND_JIT_FUNC func = NULL;
1431 auto search = ctx->blendJIT->find(compileState);
1432 if (search != ctx->blendJIT->end()) {
1433 func = search->second;
1434 } else {
1435 HANDLE hJitMgr = screen->hJitMgr;
1436 func = JitCompileBlend(hJitMgr, compileState);
1437 debug_printf("BLEND shader %p\n", func);
1438 assert(func && "Error: BlendShader = NULL");
1439
1440 ctx->blendJIT->insert(std::make_pair(compileState, func));
1441 }
1442 SwrSetBlendFunc(ctx->swrContext, target, func);
1443 }
1444
1445 SwrSetBlendState(ctx->swrContext, &blendState);
1446 }
1447
1448 if (ctx->dirty & SWR_NEW_STIPPLE) {
1449 /* XXX What to do with this one??? SWR doesn't stipple */
1450 }
1451
1452 if (ctx->dirty & (SWR_NEW_VS | SWR_NEW_SO | SWR_NEW_RASTERIZER)) {
1453 ctx->vs->soState.rasterizerDisable =
1454 ctx->rasterizer->rasterizer_discard;
1455 SwrSetSoState(ctx->swrContext, &ctx->vs->soState);
1456
1457 pipe_stream_output_info *stream_output = &ctx->vs->pipe.stream_output;
1458
1459 for (uint32_t i = 0; i < ctx->num_so_targets; i++) {
1460 SWR_STREAMOUT_BUFFER buffer = {0};
1461 if (!ctx->so_targets[i])
1462 continue;
1463 buffer.enable = true;
1464 buffer.pBuffer =
1465 (uint32_t *)swr_resource_data(ctx->so_targets[i]->buffer);
1466 buffer.bufferSize = ctx->so_targets[i]->buffer_size >> 2;
1467 buffer.pitch = stream_output->stride[i];
1468 buffer.streamOffset = ctx->so_targets[i]->buffer_offset >> 2;
1469
1470 SwrSetSoBuffers(ctx->swrContext, &buffer, i);
1471 }
1472 }
1473
1474 if (ctx->dirty & SWR_NEW_CLIP) {
1475 // shader exporting clip distances overrides all user clip planes
1476 if (ctx->rasterizer->clip_plane_enable &&
1477 !ctx->vs->info.base.num_written_clipdistance)
1478 {
1479 swr_draw_context *pDC = &ctx->swrDC;
1480 memcpy(pDC->userClipPlanes,
1481 ctx->clip.ucp,
1482 sizeof(pDC->userClipPlanes));
1483 }
1484 }
1485
1486 // set up backend state
1487 SWR_BACKEND_STATE backendState = {0};
1488 backendState.numAttributes =
1489 ctx->vs->info.base.num_outputs - 1 +
1490 (ctx->rasterizer->sprite_coord_enable ? 1 : 0);
1491 for (unsigned i = 0; i < backendState.numAttributes; i++)
1492 backendState.numComponents[i] = 4;
1493 backendState.constantInterpolationMask = ctx->fs->constantMask |
1494 (ctx->rasterizer->flatshade ? ctx->fs->flatConstantMask : 0);
1495 backendState.pointSpriteTexCoordMask = ctx->fs->pointSpriteMask;
1496
1497 SwrSetBackendState(ctx->swrContext, &backendState);
1498
1499 /* Ensure that any in-progress attachment change StoreTiles finish */
1500 if (swr_is_fence_pending(screen->flush_fence))
1501 swr_fence_finish(pipe->screen, NULL, screen->flush_fence, 0);
1502
1503 /* Finally, update the in-use status of all resources involved in draw */
1504 swr_update_resource_status(pipe, p_draw_info);
1505
1506 ctx->dirty = post_update_dirty_flags;
1507 }
1508
1509
1510 static struct pipe_stream_output_target *
1511 swr_create_so_target(struct pipe_context *pipe,
1512 struct pipe_resource *buffer,
1513 unsigned buffer_offset,
1514 unsigned buffer_size)
1515 {
1516 struct pipe_stream_output_target *target;
1517
1518 target = CALLOC_STRUCT(pipe_stream_output_target);
1519 if (!target)
1520 return NULL;
1521
1522 target->context = pipe;
1523 target->reference.count = 1;
1524 pipe_resource_reference(&target->buffer, buffer);
1525 target->buffer_offset = buffer_offset;
1526 target->buffer_size = buffer_size;
1527 return target;
1528 }
1529
1530 static void
1531 swr_destroy_so_target(struct pipe_context *pipe,
1532 struct pipe_stream_output_target *target)
1533 {
1534 pipe_resource_reference(&target->buffer, NULL);
1535 FREE(target);
1536 }
1537
1538 static void
1539 swr_set_so_targets(struct pipe_context *pipe,
1540 unsigned num_targets,
1541 struct pipe_stream_output_target **targets,
1542 const unsigned *offsets)
1543 {
1544 struct swr_context *swr = swr_context(pipe);
1545 uint32_t i;
1546
1547 assert(num_targets < MAX_SO_STREAMS);
1548
1549 for (i = 0; i < num_targets; i++) {
1550 pipe_so_target_reference(
1551 (struct pipe_stream_output_target **)&swr->so_targets[i],
1552 targets[i]);
1553 }
1554
1555 for (/* fall-through */; i < swr->num_so_targets; i++) {
1556 pipe_so_target_reference(
1557 (struct pipe_stream_output_target **)&swr->so_targets[i], NULL);
1558 }
1559
1560 swr->num_so_targets = num_targets;
1561
1562 swr->dirty |= SWR_NEW_SO;
1563 }
1564
1565
1566 void
1567 swr_state_init(struct pipe_context *pipe)
1568 {
1569 pipe->create_blend_state = swr_create_blend_state;
1570 pipe->bind_blend_state = swr_bind_blend_state;
1571 pipe->delete_blend_state = swr_delete_blend_state;
1572
1573 pipe->create_depth_stencil_alpha_state = swr_create_depth_stencil_state;
1574 pipe->bind_depth_stencil_alpha_state = swr_bind_depth_stencil_state;
1575 pipe->delete_depth_stencil_alpha_state = swr_delete_depth_stencil_state;
1576
1577 pipe->create_rasterizer_state = swr_create_rasterizer_state;
1578 pipe->bind_rasterizer_state = swr_bind_rasterizer_state;
1579 pipe->delete_rasterizer_state = swr_delete_rasterizer_state;
1580
1581 pipe->create_sampler_state = swr_create_sampler_state;
1582 pipe->bind_sampler_states = swr_bind_sampler_states;
1583 pipe->delete_sampler_state = swr_delete_sampler_state;
1584
1585 pipe->create_sampler_view = swr_create_sampler_view;
1586 pipe->set_sampler_views = swr_set_sampler_views;
1587 pipe->sampler_view_destroy = swr_sampler_view_destroy;
1588
1589 pipe->create_vs_state = swr_create_vs_state;
1590 pipe->bind_vs_state = swr_bind_vs_state;
1591 pipe->delete_vs_state = swr_delete_vs_state;
1592
1593 pipe->create_fs_state = swr_create_fs_state;
1594 pipe->bind_fs_state = swr_bind_fs_state;
1595 pipe->delete_fs_state = swr_delete_fs_state;
1596
1597 pipe->set_constant_buffer = swr_set_constant_buffer;
1598
1599 pipe->create_vertex_elements_state = swr_create_vertex_elements_state;
1600 pipe->bind_vertex_elements_state = swr_bind_vertex_elements_state;
1601 pipe->delete_vertex_elements_state = swr_delete_vertex_elements_state;
1602
1603 pipe->set_vertex_buffers = swr_set_vertex_buffers;
1604 pipe->set_index_buffer = swr_set_index_buffer;
1605
1606 pipe->set_polygon_stipple = swr_set_polygon_stipple;
1607 pipe->set_clip_state = swr_set_clip_state;
1608 pipe->set_scissor_states = swr_set_scissor_states;
1609 pipe->set_viewport_states = swr_set_viewport_states;
1610
1611 pipe->set_framebuffer_state = swr_set_framebuffer_state;
1612
1613 pipe->set_blend_color = swr_set_blend_color;
1614 pipe->set_stencil_ref = swr_set_stencil_ref;
1615
1616 pipe->set_sample_mask = swr_set_sample_mask;
1617
1618 pipe->create_stream_output_target = swr_create_so_target;
1619 pipe->stream_output_target_destroy = swr_destroy_so_target;
1620 pipe->set_stream_output_targets = swr_set_so_targets;
1621 }