f9326f352308cdcb641290556010453a623ef9a5
[mesa.git] / src / gallium / drivers / swr / swr_state.cpp
1 /****************************************************************************
2 * Copyright (C) 2015 Intel Corporation. All Rights Reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 ***************************************************************************/
23
24 #include "common/os.h"
25 #include "jit_api.h"
26 #include "JitManager.h"
27 #include "state_llvm.h"
28
29 #include "gallivm/lp_bld_tgsi.h"
30 #include "util/u_format.h"
31
32 #include "util/u_memory.h"
33 #include "util/u_inlines.h"
34 #include "util/u_helpers.h"
35 #include "util/u_framebuffer.h"
36
37 #include "swr_state.h"
38 #include "swr_context.h"
39 #include "swr_context_llvm.h"
40 #include "swr_screen.h"
41 #include "swr_resource.h"
42 #include "swr_tex_sample.h"
43 #include "swr_scratch.h"
44 #include "swr_shader.h"
45 #include "swr_fence.h"
46
47 /* These should be pulled out into separate files as necessary
48 * Just initializing everything here to get going. */
49
50 static void *
51 swr_create_blend_state(struct pipe_context *pipe,
52 const struct pipe_blend_state *blend)
53 {
54 struct swr_blend_state *state = CALLOC_STRUCT(swr_blend_state);
55
56 memcpy(&state->pipe, blend, sizeof(*blend));
57
58 struct pipe_blend_state *pipe_blend = &state->pipe;
59
60 for (int target = 0;
61 target < std::min(SWR_NUM_RENDERTARGETS, PIPE_MAX_COLOR_BUFS);
62 target++) {
63
64 struct pipe_rt_blend_state *rt_blend = &pipe_blend->rt[target];
65 SWR_RENDER_TARGET_BLEND_STATE &blendState =
66 state->blendState.renderTarget[target];
67 RENDER_TARGET_BLEND_COMPILE_STATE &compileState =
68 state->compileState[target];
69
70 if (target != 0 && !pipe_blend->independent_blend_enable) {
71 memcpy(&compileState,
72 &state->compileState[0],
73 sizeof(RENDER_TARGET_BLEND_COMPILE_STATE));
74 continue;
75 }
76
77 compileState.blendEnable = rt_blend->blend_enable;
78 if (compileState.blendEnable) {
79 compileState.sourceAlphaBlendFactor =
80 swr_convert_blend_factor(rt_blend->alpha_src_factor);
81 compileState.destAlphaBlendFactor =
82 swr_convert_blend_factor(rt_blend->alpha_dst_factor);
83 compileState.sourceBlendFactor =
84 swr_convert_blend_factor(rt_blend->rgb_src_factor);
85 compileState.destBlendFactor =
86 swr_convert_blend_factor(rt_blend->rgb_dst_factor);
87
88 compileState.colorBlendFunc =
89 swr_convert_blend_func(rt_blend->rgb_func);
90 compileState.alphaBlendFunc =
91 swr_convert_blend_func(rt_blend->alpha_func);
92 }
93 compileState.logicOpEnable = state->pipe.logicop_enable;
94 if (compileState.logicOpEnable) {
95 compileState.logicOpFunc =
96 swr_convert_logic_op(state->pipe.logicop_func);
97 }
98
99 blendState.writeDisableRed =
100 (rt_blend->colormask & PIPE_MASK_R) ? 0 : 1;
101 blendState.writeDisableGreen =
102 (rt_blend->colormask & PIPE_MASK_G) ? 0 : 1;
103 blendState.writeDisableBlue =
104 (rt_blend->colormask & PIPE_MASK_B) ? 0 : 1;
105 blendState.writeDisableAlpha =
106 (rt_blend->colormask & PIPE_MASK_A) ? 0 : 1;
107
108 if (rt_blend->colormask == 0)
109 compileState.blendEnable = false;
110 }
111
112 return state;
113 }
114
115 static void
116 swr_bind_blend_state(struct pipe_context *pipe, void *blend)
117 {
118 struct swr_context *ctx = swr_context(pipe);
119
120 if (ctx->blend == blend)
121 return;
122
123 ctx->blend = (swr_blend_state *)blend;
124
125 ctx->dirty |= SWR_NEW_BLEND;
126 }
127
128 static void
129 swr_delete_blend_state(struct pipe_context *pipe, void *blend)
130 {
131 FREE(blend);
132 }
133
134 static void
135 swr_set_blend_color(struct pipe_context *pipe,
136 const struct pipe_blend_color *color)
137 {
138 struct swr_context *ctx = swr_context(pipe);
139
140 ctx->blend_color = *color;
141
142 ctx->dirty |= SWR_NEW_BLEND;
143 }
144
145 static void
146 swr_set_stencil_ref(struct pipe_context *pipe,
147 const struct pipe_stencil_ref *ref)
148 {
149 struct swr_context *ctx = swr_context(pipe);
150
151 ctx->stencil_ref = *ref;
152
153 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
154 }
155
156 static void *
157 swr_create_depth_stencil_state(
158 struct pipe_context *pipe,
159 const struct pipe_depth_stencil_alpha_state *depth_stencil)
160 {
161 struct pipe_depth_stencil_alpha_state *state;
162
163 state = (pipe_depth_stencil_alpha_state *)mem_dup(depth_stencil,
164 sizeof *depth_stencil);
165
166 return state;
167 }
168
169 static void
170 swr_bind_depth_stencil_state(struct pipe_context *pipe, void *depth_stencil)
171 {
172 struct swr_context *ctx = swr_context(pipe);
173
174 if (ctx->depth_stencil == (pipe_depth_stencil_alpha_state *)depth_stencil)
175 return;
176
177 ctx->depth_stencil = (pipe_depth_stencil_alpha_state *)depth_stencil;
178
179 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
180 }
181
182 static void
183 swr_delete_depth_stencil_state(struct pipe_context *pipe, void *depth)
184 {
185 FREE(depth);
186 }
187
188
189 static void *
190 swr_create_rasterizer_state(struct pipe_context *pipe,
191 const struct pipe_rasterizer_state *rast)
192 {
193 struct pipe_rasterizer_state *state;
194 state = (pipe_rasterizer_state *)mem_dup(rast, sizeof *rast);
195
196 return state;
197 }
198
199 static void
200 swr_bind_rasterizer_state(struct pipe_context *pipe, void *handle)
201 {
202 struct swr_context *ctx = swr_context(pipe);
203 const struct pipe_rasterizer_state *rasterizer =
204 (const struct pipe_rasterizer_state *)handle;
205
206 if (ctx->rasterizer == (pipe_rasterizer_state *)rasterizer)
207 return;
208
209 ctx->rasterizer = (pipe_rasterizer_state *)rasterizer;
210
211 ctx->dirty |= SWR_NEW_RASTERIZER;
212 }
213
214 static void
215 swr_delete_rasterizer_state(struct pipe_context *pipe, void *rasterizer)
216 {
217 FREE(rasterizer);
218 }
219
220
221 static void *
222 swr_create_sampler_state(struct pipe_context *pipe,
223 const struct pipe_sampler_state *sampler)
224 {
225 struct pipe_sampler_state *state =
226 (pipe_sampler_state *)mem_dup(sampler, sizeof *sampler);
227
228 return state;
229 }
230
231 static void
232 swr_bind_sampler_states(struct pipe_context *pipe,
233 unsigned shader,
234 unsigned start,
235 unsigned num,
236 void **samplers)
237 {
238 struct swr_context *ctx = swr_context(pipe);
239 unsigned i;
240
241 assert(shader < PIPE_SHADER_TYPES);
242 assert(start + num <= ARRAY_SIZE(ctx->samplers[shader]));
243
244 /* set the new samplers */
245 ctx->num_samplers[shader] = num;
246 for (i = 0; i < num; i++) {
247 ctx->samplers[shader][start + i] = (pipe_sampler_state *)samplers[i];
248 }
249
250 ctx->dirty |= SWR_NEW_SAMPLER;
251 }
252
253 static void
254 swr_delete_sampler_state(struct pipe_context *pipe, void *sampler)
255 {
256 FREE(sampler);
257 }
258
259
260 static struct pipe_sampler_view *
261 swr_create_sampler_view(struct pipe_context *pipe,
262 struct pipe_resource *texture,
263 const struct pipe_sampler_view *templ)
264 {
265 struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view);
266
267 if (view) {
268 *view = *templ;
269 view->reference.count = 1;
270 view->texture = NULL;
271 pipe_resource_reference(&view->texture, texture);
272 view->context = pipe;
273 }
274
275 return view;
276 }
277
278 static void
279 swr_set_sampler_views(struct pipe_context *pipe,
280 unsigned shader,
281 unsigned start,
282 unsigned num,
283 struct pipe_sampler_view **views)
284 {
285 struct swr_context *ctx = swr_context(pipe);
286 uint i;
287
288 assert(num <= PIPE_MAX_SHADER_SAMPLER_VIEWS);
289
290 assert(shader < PIPE_SHADER_TYPES);
291 assert(start + num <= ARRAY_SIZE(ctx->sampler_views[shader]));
292
293 /* set the new sampler views */
294 ctx->num_sampler_views[shader] = num;
295 for (i = 0; i < num; i++) {
296 /* Note: we're using pipe_sampler_view_release() here to work around
297 * a possible crash when the old view belongs to another context that
298 * was already destroyed.
299 */
300 pipe_sampler_view_release(pipe, &ctx->sampler_views[shader][start + i]);
301 pipe_sampler_view_reference(&ctx->sampler_views[shader][start + i],
302 views[i]);
303 }
304
305 ctx->dirty |= SWR_NEW_SAMPLER_VIEW;
306 }
307
308 static void
309 swr_sampler_view_destroy(struct pipe_context *pipe,
310 struct pipe_sampler_view *view)
311 {
312 pipe_resource_reference(&view->texture, NULL);
313 FREE(view);
314 }
315
316 static void *
317 swr_create_vs_state(struct pipe_context *pipe,
318 const struct pipe_shader_state *vs)
319 {
320 struct swr_vertex_shader *swr_vs = new swr_vertex_shader;
321 if (!swr_vs)
322 return NULL;
323
324 swr_vs->pipe.tokens = tgsi_dup_tokens(vs->tokens);
325 swr_vs->pipe.stream_output = vs->stream_output;
326
327 lp_build_tgsi_info(vs->tokens, &swr_vs->info);
328
329 swr_vs->soState = {0};
330
331 if (swr_vs->pipe.stream_output.num_outputs) {
332 pipe_stream_output_info *stream_output = &swr_vs->pipe.stream_output;
333
334 swr_vs->soState.soEnable = true;
335 // soState.rasterizerDisable set on state dirty
336 // soState.streamToRasterizer not used
337
338 for (uint32_t i = 0; i < stream_output->num_outputs; i++) {
339 swr_vs->soState.streamMasks[stream_output->output[i].stream] |=
340 1 << (stream_output->output[i].register_index - 1);
341 }
342 for (uint32_t i = 0; i < MAX_SO_STREAMS; i++) {
343 swr_vs->soState.streamNumEntries[i] =
344 _mm_popcnt_u32(swr_vs->soState.streamMasks[i]);
345 }
346 }
347
348 return swr_vs;
349 }
350
351 static void
352 swr_bind_vs_state(struct pipe_context *pipe, void *vs)
353 {
354 struct swr_context *ctx = swr_context(pipe);
355
356 if (ctx->vs == vs)
357 return;
358
359 ctx->vs = (swr_vertex_shader *)vs;
360 ctx->dirty |= SWR_NEW_VS;
361 }
362
363 static void
364 swr_delete_vs_state(struct pipe_context *pipe, void *vs)
365 {
366 struct swr_vertex_shader *swr_vs = (swr_vertex_shader *)vs;
367 FREE((void *)swr_vs->pipe.tokens);
368 delete swr_vs;
369 }
370
371 static void *
372 swr_create_fs_state(struct pipe_context *pipe,
373 const struct pipe_shader_state *fs)
374 {
375 struct swr_fragment_shader *swr_fs = new swr_fragment_shader;
376 if (!swr_fs)
377 return NULL;
378
379 swr_fs->pipe.tokens = tgsi_dup_tokens(fs->tokens);
380
381 lp_build_tgsi_info(fs->tokens, &swr_fs->info);
382
383 return swr_fs;
384 }
385
386
387 static void
388 swr_bind_fs_state(struct pipe_context *pipe, void *fs)
389 {
390 struct swr_context *ctx = swr_context(pipe);
391
392 if (ctx->fs == fs)
393 return;
394
395 ctx->fs = (swr_fragment_shader *)fs;
396 ctx->dirty |= SWR_NEW_FS;
397 }
398
399 static void
400 swr_delete_fs_state(struct pipe_context *pipe, void *fs)
401 {
402 struct swr_fragment_shader *swr_fs = (swr_fragment_shader *)fs;
403 FREE((void *)swr_fs->pipe.tokens);
404 delete swr_fs;
405 }
406
407
408 static void
409 swr_set_constant_buffer(struct pipe_context *pipe,
410 uint shader,
411 uint index,
412 struct pipe_constant_buffer *cb)
413 {
414 struct swr_context *ctx = swr_context(pipe);
415 struct pipe_resource *constants = cb ? cb->buffer : NULL;
416
417 assert(shader < PIPE_SHADER_TYPES);
418 assert(index < ARRAY_SIZE(ctx->constants[shader]));
419
420 /* note: reference counting */
421 util_copy_constant_buffer(&ctx->constants[shader][index], cb);
422
423 if (shader == PIPE_SHADER_VERTEX || shader == PIPE_SHADER_GEOMETRY) {
424 ctx->dirty |= SWR_NEW_VSCONSTANTS;
425 } else if (shader == PIPE_SHADER_FRAGMENT) {
426 ctx->dirty |= SWR_NEW_FSCONSTANTS;
427 }
428
429 if (cb && cb->user_buffer) {
430 pipe_resource_reference(&constants, NULL);
431 }
432 }
433
434
435 static void *
436 swr_create_vertex_elements_state(struct pipe_context *pipe,
437 unsigned num_elements,
438 const struct pipe_vertex_element *attribs)
439 {
440 struct swr_vertex_element_state *velems;
441 assert(num_elements <= PIPE_MAX_ATTRIBS);
442 velems = CALLOC_STRUCT(swr_vertex_element_state);
443 if (velems) {
444 velems->fsState.numAttribs = num_elements;
445 for (unsigned i = 0; i < num_elements; i++) {
446 // XXX: we should do this keyed on the VS usage info
447
448 const struct util_format_description *desc =
449 util_format_description(attribs[i].src_format);
450
451 velems->fsState.layout[i].AlignedByteOffset = attribs[i].src_offset;
452 velems->fsState.layout[i].Format =
453 mesa_to_swr_format(attribs[i].src_format);
454 velems->fsState.layout[i].StreamIndex =
455 attribs[i].vertex_buffer_index;
456 velems->fsState.layout[i].InstanceEnable =
457 attribs[i].instance_divisor != 0;
458 velems->fsState.layout[i].ComponentControl0 =
459 desc->channel[0].type != UTIL_FORMAT_TYPE_VOID
460 ? ComponentControl::StoreSrc
461 : ComponentControl::Store0;
462 velems->fsState.layout[i].ComponentControl1 =
463 desc->channel[1].type != UTIL_FORMAT_TYPE_VOID
464 ? ComponentControl::StoreSrc
465 : ComponentControl::Store0;
466 velems->fsState.layout[i].ComponentControl2 =
467 desc->channel[2].type != UTIL_FORMAT_TYPE_VOID
468 ? ComponentControl::StoreSrc
469 : ComponentControl::Store0;
470 velems->fsState.layout[i].ComponentControl3 =
471 desc->channel[3].type != UTIL_FORMAT_TYPE_VOID
472 ? ComponentControl::StoreSrc
473 : ComponentControl::Store1Fp;
474 velems->fsState.layout[i].ComponentPacking = ComponentEnable::XYZW;
475 velems->fsState.layout[i].InstanceDataStepRate =
476 attribs[i].instance_divisor;
477
478 /* Calculate the pitch of each stream */
479 const SWR_FORMAT_INFO &swr_desc = GetFormatInfo(
480 mesa_to_swr_format(attribs[i].src_format));
481 velems->stream_pitch[attribs[i].vertex_buffer_index] += swr_desc.Bpp;
482 }
483 }
484
485 return velems;
486 }
487
488 static void
489 swr_bind_vertex_elements_state(struct pipe_context *pipe, void *velems)
490 {
491 struct swr_context *ctx = swr_context(pipe);
492 struct swr_vertex_element_state *swr_velems =
493 (struct swr_vertex_element_state *)velems;
494
495 ctx->velems = swr_velems;
496 ctx->dirty |= SWR_NEW_VERTEX;
497 }
498
499 static void
500 swr_delete_vertex_elements_state(struct pipe_context *pipe, void *velems)
501 {
502 /* XXX Need to destroy fetch shader? */
503 FREE(velems);
504 }
505
506
507 static void
508 swr_set_vertex_buffers(struct pipe_context *pipe,
509 unsigned start_slot,
510 unsigned num_elements,
511 const struct pipe_vertex_buffer *buffers)
512 {
513 struct swr_context *ctx = swr_context(pipe);
514
515 assert(num_elements <= PIPE_MAX_ATTRIBS);
516
517 util_set_vertex_buffers_count(ctx->vertex_buffer,
518 &ctx->num_vertex_buffers,
519 buffers,
520 start_slot,
521 num_elements);
522
523 ctx->dirty |= SWR_NEW_VERTEX;
524 }
525
526
527 static void
528 swr_set_index_buffer(struct pipe_context *pipe,
529 const struct pipe_index_buffer *ib)
530 {
531 struct swr_context *ctx = swr_context(pipe);
532
533 if (ib)
534 memcpy(&ctx->index_buffer, ib, sizeof(ctx->index_buffer));
535 else
536 memset(&ctx->index_buffer, 0, sizeof(ctx->index_buffer));
537
538 ctx->dirty |= SWR_NEW_VERTEX;
539 }
540
541 static void
542 swr_set_polygon_stipple(struct pipe_context *pipe,
543 const struct pipe_poly_stipple *stipple)
544 {
545 struct swr_context *ctx = swr_context(pipe);
546
547 ctx->poly_stipple = *stipple; /* struct copy */
548 ctx->dirty |= SWR_NEW_STIPPLE;
549 }
550
551 static void
552 swr_set_clip_state(struct pipe_context *pipe,
553 const struct pipe_clip_state *clip)
554 {
555 struct swr_context *ctx = swr_context(pipe);
556
557 ctx->clip = *clip;
558 /* XXX Unimplemented, but prevents crash */
559
560 ctx->dirty |= SWR_NEW_CLIP;
561 }
562
563
564 static void
565 swr_set_scissor_states(struct pipe_context *pipe,
566 unsigned start_slot,
567 unsigned num_viewports,
568 const struct pipe_scissor_state *scissor)
569 {
570 struct swr_context *ctx = swr_context(pipe);
571
572 ctx->scissor = *scissor;
573 ctx->dirty |= SWR_NEW_SCISSOR;
574 }
575
576 static void
577 swr_set_viewport_states(struct pipe_context *pipe,
578 unsigned start_slot,
579 unsigned num_viewports,
580 const struct pipe_viewport_state *vpt)
581 {
582 struct swr_context *ctx = swr_context(pipe);
583
584 ctx->viewport = *vpt;
585 ctx->dirty |= SWR_NEW_VIEWPORT;
586 }
587
588
589 static void
590 swr_set_framebuffer_state(struct pipe_context *pipe,
591 const struct pipe_framebuffer_state *fb)
592 {
593 struct swr_context *ctx = swr_context(pipe);
594
595 boolean changed = !util_framebuffer_state_equal(&ctx->framebuffer, fb);
596
597 assert(fb->width <= KNOB_GUARDBAND_WIDTH);
598 assert(fb->height <= KNOB_GUARDBAND_HEIGHT);
599
600 if (changed) {
601 unsigned i;
602 for (i = 0; i < fb->nr_cbufs; ++i)
603 pipe_surface_reference(&ctx->framebuffer.cbufs[i], fb->cbufs[i]);
604 for (; i < ctx->framebuffer.nr_cbufs; ++i)
605 pipe_surface_reference(&ctx->framebuffer.cbufs[i], NULL);
606
607 ctx->framebuffer.nr_cbufs = fb->nr_cbufs;
608
609 ctx->framebuffer.width = fb->width;
610 ctx->framebuffer.height = fb->height;
611
612 pipe_surface_reference(&ctx->framebuffer.zsbuf, fb->zsbuf);
613
614 ctx->dirty |= SWR_NEW_FRAMEBUFFER;
615 }
616 }
617
618
619 static void
620 swr_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
621 {
622 struct swr_context *ctx = swr_context(pipe);
623
624 if (sample_mask != ctx->sample_mask) {
625 ctx->sample_mask = sample_mask;
626 ctx->dirty |= SWR_NEW_RASTERIZER;
627 }
628 }
629
630 /*
631 * Update resource in-use status
632 * All resources bound to color or depth targets marked as WRITE resources.
633 * VBO Vertex/index buffers and texture views marked as READ resources.
634 */
635 void
636 swr_update_resource_status(struct pipe_context *pipe,
637 const struct pipe_draw_info *p_draw_info)
638 {
639 struct swr_context *ctx = swr_context(pipe);
640 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
641
642 /* colorbuffer targets */
643 if (fb->nr_cbufs)
644 for (uint32_t i = 0; i < fb->nr_cbufs; ++i)
645 if (fb->cbufs[i])
646 swr_resource_write(fb->cbufs[i]->texture);
647
648 /* depth/stencil target */
649 if (fb->zsbuf)
650 swr_resource_write(fb->zsbuf->texture);
651
652 /* VBO vertex buffers */
653 for (uint32_t i = 0; i < ctx->num_vertex_buffers; i++) {
654 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
655 if (!vb->user_buffer)
656 swr_resource_read(vb->buffer);
657 }
658
659 /* VBO index buffer */
660 if (p_draw_info && p_draw_info->indexed) {
661 struct pipe_index_buffer *ib = &ctx->index_buffer;
662 if (!ib->user_buffer)
663 swr_resource_read(ib->buffer);
664 }
665
666 /* texture sampler views */
667 for (uint32_t i = 0; i < PIPE_MAX_SHADER_SAMPLER_VIEWS; i++) {
668 struct pipe_sampler_view *view =
669 ctx->sampler_views[PIPE_SHADER_FRAGMENT][i];
670 if (view)
671 swr_resource_read(view->texture);
672 }
673 }
674
675 static void
676 swr_update_texture_state(struct swr_context *ctx,
677 unsigned shader_type,
678 unsigned num_sampler_views,
679 swr_jit_texture *textures)
680 {
681 for (unsigned i = 0; i < num_sampler_views; i++) {
682 struct pipe_sampler_view *view =
683 ctx->sampler_views[shader_type][i];
684
685 if (view) {
686 struct pipe_resource *res = view->texture;
687 struct swr_resource *swr_res = swr_resource(res);
688 struct swr_jit_texture *jit_tex = &textures[i];
689 memset(jit_tex, 0, sizeof(*jit_tex));
690 jit_tex->width = res->width0;
691 jit_tex->height = res->height0;
692 jit_tex->depth = res->depth0;
693 jit_tex->first_level = view->u.tex.first_level;
694 jit_tex->last_level = view->u.tex.last_level;
695 jit_tex->base_ptr = swr_res->swr.pBaseAddress;
696
697 for (unsigned level = jit_tex->first_level;
698 level <= jit_tex->last_level;
699 level++) {
700 jit_tex->row_stride[level] = swr_res->row_stride[level];
701 jit_tex->img_stride[level] = swr_res->img_stride[level];
702 jit_tex->mip_offsets[level] = swr_res->mip_offsets[level];
703 }
704 }
705 }
706 }
707
708 static void
709 swr_update_sampler_state(struct swr_context *ctx,
710 unsigned shader_type,
711 unsigned num_samplers,
712 swr_jit_sampler *samplers)
713 {
714 for (unsigned i = 0; i < num_samplers; i++) {
715 const struct pipe_sampler_state *sampler =
716 ctx->samplers[shader_type][i];
717
718 if (sampler) {
719 samplers[i].min_lod = sampler->min_lod;
720 samplers[i].max_lod = sampler->max_lod;
721 samplers[i].lod_bias = sampler->lod_bias;
722 COPY_4V(samplers[i].border_color, sampler->border_color.f);
723 }
724 }
725 }
726
727 static void
728 swr_update_constants(struct swr_context *ctx, enum pipe_shader_type shaderType)
729 {
730 swr_draw_context *pDC = &ctx->swrDC;
731
732 const float **constant;
733 uint32_t *num_constants;
734 struct swr_scratch_space *scratch;
735
736 switch (shaderType) {
737 case PIPE_SHADER_VERTEX:
738 constant = pDC->constantVS;
739 num_constants = pDC->num_constantsVS;
740 scratch = &ctx->scratch->vs_constants;
741 break;
742 case PIPE_SHADER_FRAGMENT:
743 constant = pDC->constantFS;
744 num_constants = pDC->num_constantsFS;
745 scratch = &ctx->scratch->fs_constants;
746 break;
747 default:
748 debug_printf("Unsupported shader type constants\n");
749 return;
750 }
751
752 for (UINT i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
753 const pipe_constant_buffer *cb = &ctx->constants[shaderType][i];
754 num_constants[i] = cb->buffer_size;
755 if (cb->buffer) {
756 constant[i] =
757 (const float *)(swr_resource_data(cb->buffer) +
758 cb->buffer_offset);
759 } else {
760 /* Need to copy these constants to scratch space */
761 if (cb->user_buffer && cb->buffer_size) {
762 const void *ptr =
763 ((const uint8_t *)cb->user_buffer + cb->buffer_offset);
764 uint32_t size = AlignUp(cb->buffer_size, 4);
765 ptr = swr_copy_to_scratch_space(ctx, scratch, ptr, size);
766 constant[i] = (const float *)ptr;
767 }
768 }
769 }
770 }
771
772 void
773 swr_update_derived(struct pipe_context *pipe,
774 const struct pipe_draw_info *p_draw_info)
775 {
776 struct swr_context *ctx = swr_context(pipe);
777 struct swr_screen *screen = swr_screen(ctx->pipe.screen);
778
779 /* Any state that requires dirty flags to be re-triggered sets this mask */
780 /* For example, user_buffer vertex and index buffers. */
781 unsigned post_update_dirty_flags = 0;
782
783 /* Render Targets */
784 if (ctx->dirty & SWR_NEW_FRAMEBUFFER) {
785 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
786 SWR_SURFACE_STATE *new_attachment[SWR_NUM_ATTACHMENTS] = {0};
787 UINT i;
788
789 /* colorbuffer targets */
790 if (fb->nr_cbufs)
791 for (i = 0; i < fb->nr_cbufs; ++i)
792 if (fb->cbufs[i]) {
793 struct swr_resource *colorBuffer =
794 swr_resource(fb->cbufs[i]->texture);
795 new_attachment[SWR_ATTACHMENT_COLOR0 + i] = &colorBuffer->swr;
796 }
797
798 /* depth/stencil target */
799 if (fb->zsbuf) {
800 struct swr_resource *depthStencilBuffer =
801 swr_resource(fb->zsbuf->texture);
802 if (depthStencilBuffer->has_depth) {
803 new_attachment[SWR_ATTACHMENT_DEPTH] = &depthStencilBuffer->swr;
804
805 if (depthStencilBuffer->has_stencil)
806 new_attachment[SWR_ATTACHMENT_STENCIL] =
807 &depthStencilBuffer->secondary;
808
809 } else if (depthStencilBuffer->has_stencil)
810 new_attachment[SWR_ATTACHMENT_STENCIL] = &depthStencilBuffer->swr;
811 }
812
813 /* Make the attachment updates */
814 swr_draw_context *pDC = &ctx->swrDC;
815 SWR_SURFACE_STATE *renderTargets = pDC->renderTargets;
816 unsigned need_fence = FALSE;
817 for (i = 0; i < SWR_NUM_ATTACHMENTS; i++) {
818 void *new_base = nullptr;
819 if (new_attachment[i])
820 new_base = new_attachment[i]->pBaseAddress;
821
822 /* StoreTile for changed target */
823 if (renderTargets[i].pBaseAddress != new_base) {
824 if (renderTargets[i].pBaseAddress) {
825 /* If changing attachment to a new target, mark tiles as
826 * INVALID so they are reloaded from surface.
827 * If detaching attachment, mark tiles as RESOLVED so core
828 * won't try to load from non-existent target. */
829 enum SWR_TILE_STATE post_state = (new_attachment[i]
830 ? SWR_TILE_INVALID : SWR_TILE_RESOLVED);
831 swr_store_render_target(pipe, i, post_state);
832
833 need_fence |= TRUE;
834 }
835
836 /* Make new attachment */
837 if (new_attachment[i])
838 renderTargets[i] = *new_attachment[i];
839 else
840 if (renderTargets[i].pBaseAddress)
841 renderTargets[i] = {0};
842 }
843 }
844
845 /* This fence ensures any attachment changes are resolved before the
846 * next draw */
847 if (need_fence)
848 swr_fence_submit(ctx, screen->flush_fence);
849 }
850
851 /* Raster state */
852 if (ctx->dirty & (SWR_NEW_RASTERIZER | SWR_NEW_FRAMEBUFFER)) {
853 pipe_rasterizer_state *rasterizer = ctx->rasterizer;
854 pipe_framebuffer_state *fb = &ctx->framebuffer;
855
856 SWR_RASTSTATE *rastState = &ctx->derived.rastState;
857 rastState->cullMode = swr_convert_cull_mode(rasterizer->cull_face);
858 rastState->frontWinding = rasterizer->front_ccw
859 ? SWR_FRONTWINDING_CCW
860 : SWR_FRONTWINDING_CW;
861 rastState->scissorEnable = rasterizer->scissor;
862 rastState->pointSize = rasterizer->point_size > 0.0f
863 ? rasterizer->point_size
864 : 1.0f;
865 rastState->lineWidth = rasterizer->line_width > 0.0f
866 ? rasterizer->line_width
867 : 1.0f;
868
869 rastState->pointParam = rasterizer->point_size_per_vertex;
870
871 rastState->pointSpriteEnable = rasterizer->sprite_coord_enable;
872 rastState->pointSpriteTopOrigin =
873 rasterizer->sprite_coord_mode == PIPE_SPRITE_COORD_UPPER_LEFT;
874
875 /* XXX TODO: Add multisample */
876 rastState->msaaRastEnable = false;
877 rastState->rastMode = SWR_MSAA_RASTMODE_OFF_PIXEL;
878 rastState->sampleCount = SWR_MULTISAMPLE_1X;
879 rastState->forcedSampleCount = false;
880
881 bool do_offset = false;
882 switch (rasterizer->fill_front) {
883 case PIPE_POLYGON_MODE_FILL:
884 do_offset = rasterizer->offset_tri;
885 break;
886 case PIPE_POLYGON_MODE_LINE:
887 do_offset = rasterizer->offset_line;
888 break;
889 case PIPE_POLYGON_MODE_POINT:
890 do_offset = rasterizer->offset_point;
891 break;
892 }
893
894 if (do_offset) {
895 rastState->depthBias = rasterizer->offset_units;
896 rastState->slopeScaledDepthBias = rasterizer->offset_scale;
897 rastState->depthBiasClamp = rasterizer->offset_clamp;
898 } else {
899 rastState->depthBias = 0;
900 rastState->slopeScaledDepthBias = 0;
901 rastState->depthBiasClamp = 0;
902 }
903 struct pipe_surface *zb = fb->zsbuf;
904 if (zb && swr_resource(zb->texture)->has_depth)
905 rastState->depthFormat = swr_resource(zb->texture)->swr.format;
906
907 rastState->depthClipEnable = rasterizer->depth_clip;
908
909 SwrSetRastState(ctx->swrContext, rastState);
910 }
911
912 /* Scissor */
913 if (ctx->dirty & SWR_NEW_SCISSOR) {
914 pipe_scissor_state *scissor = &ctx->scissor;
915 BBOX bbox(scissor->miny, scissor->maxy,
916 scissor->minx, scissor->maxx);
917 SwrSetScissorRects(ctx->swrContext, 1, &bbox);
918 }
919
920 /* Viewport */
921 if (ctx->dirty & (SWR_NEW_VIEWPORT | SWR_NEW_FRAMEBUFFER
922 | SWR_NEW_RASTERIZER)) {
923 pipe_viewport_state *state = &ctx->viewport;
924 pipe_framebuffer_state *fb = &ctx->framebuffer;
925 pipe_rasterizer_state *rasterizer = ctx->rasterizer;
926
927 SWR_VIEWPORT *vp = &ctx->derived.vp;
928 SWR_VIEWPORT_MATRIX *vpm = &ctx->derived.vpm;
929
930 vp->x = state->translate[0] - state->scale[0];
931 vp->width = state->translate[0] + state->scale[0];
932 vp->y = state->translate[1] - fabs(state->scale[1]);
933 vp->height = state->translate[1] + fabs(state->scale[1]);
934 if (rasterizer->clip_halfz == 0) {
935 vp->minZ = state->translate[2] - state->scale[2];
936 vp->maxZ = state->translate[2] + state->scale[2];
937 } else {
938 vp->minZ = state->translate[2];
939 vp->maxZ = state->translate[2] + state->scale[2];
940 }
941
942 vpm->m00 = state->scale[0];
943 vpm->m11 = state->scale[1];
944 vpm->m22 = state->scale[2];
945 vpm->m30 = state->translate[0];
946 vpm->m31 = state->translate[1];
947 vpm->m32 = state->translate[2];
948
949 /* Now that the matrix is calculated, clip the view coords to screen
950 * size. OpenGL allows for -ve x,y in the viewport. */
951 vp->x = std::max(vp->x, 0.0f);
952 vp->y = std::max(vp->y, 0.0f);
953 vp->width = std::min(vp->width, (float)fb->width);
954 vp->height = std::min(vp->height, (float)fb->height);
955
956 SwrSetViewports(ctx->swrContext, 1, vp, vpm);
957 }
958
959 /* Set vertex & index buffers */
960 /* (using draw info if called by swr_draw_vbo) */
961 if (ctx->dirty & SWR_NEW_VERTEX) {
962 uint32_t size, pitch, max_vertex, partial_inbounds;
963 const uint8_t *p_data;
964
965 /* If being called by swr_draw_vbo, copy draw details */
966 struct pipe_draw_info info = {0};
967 if (p_draw_info)
968 info = *p_draw_info;
969
970 /* vertex buffers */
971 SWR_VERTEX_BUFFER_STATE swrVertexBuffers[PIPE_MAX_ATTRIBS];
972 for (UINT i = 0; i < ctx->num_vertex_buffers; i++) {
973 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
974
975 pitch = vb->stride;
976 if (!vb->user_buffer) {
977 /* VBO
978 * size is based on buffer->width0 rather than info.max_index
979 * to prevent having to validate VBO on each draw */
980 size = vb->buffer->width0;
981 max_vertex = size / pitch;
982 partial_inbounds = size % pitch;
983
984 p_data = swr_resource_data(vb->buffer) + vb->buffer_offset;
985 } else {
986 /* Client buffer
987 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
988 * revalidate on each draw */
989 post_update_dirty_flags |= SWR_NEW_VERTEX;
990
991 if (pitch) {
992 size = (info.max_index - info.min_index + 1) * pitch;
993 } else {
994 /* pitch = 0, means constant value
995 * set size to 1 vertex */
996 size = ctx->velems->stream_pitch[i];
997 }
998
999 max_vertex = info.max_index + 1;
1000 partial_inbounds = 0;
1001
1002 /* Copy only needed vertices to scratch space */
1003 size = AlignUp(size, 4);
1004 const void *ptr = (const uint8_t *) vb->user_buffer
1005 + info.min_index * pitch;
1006 ptr = swr_copy_to_scratch_space(
1007 ctx, &ctx->scratch->vertex_buffer, ptr, size);
1008 p_data = (const uint8_t *)ptr - info.min_index * pitch;
1009 }
1010
1011 swrVertexBuffers[i] = {0};
1012 swrVertexBuffers[i].index = i;
1013 swrVertexBuffers[i].pitch = pitch;
1014 swrVertexBuffers[i].pData = p_data;
1015 swrVertexBuffers[i].size = size;
1016 swrVertexBuffers[i].maxVertex = max_vertex;
1017 swrVertexBuffers[i].partialInboundsSize = partial_inbounds;
1018 }
1019
1020 SwrSetVertexBuffers(
1021 ctx->swrContext, ctx->num_vertex_buffers, swrVertexBuffers);
1022
1023 /* index buffer, if required (info passed in by swr_draw_vbo) */
1024 SWR_FORMAT index_type = R32_UINT; /* Default for non-indexed draws */
1025 if (info.indexed) {
1026 struct pipe_index_buffer *ib = &ctx->index_buffer;
1027
1028 pitch = ib->index_size ? ib->index_size : sizeof(uint32_t);
1029 index_type = swr_convert_index_type(pitch);
1030
1031 if (!ib->user_buffer) {
1032 /* VBO
1033 * size is based on buffer->width0 rather than info.count
1034 * to prevent having to validate VBO on each draw */
1035 size = ib->buffer->width0;
1036 p_data = swr_resource_data(ib->buffer) + ib->offset;
1037 } else {
1038 /* Client buffer
1039 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
1040 * revalidate on each draw */
1041 post_update_dirty_flags |= SWR_NEW_VERTEX;
1042
1043 size = info.count * pitch;
1044 size = AlignUp(size, 4);
1045
1046 /* Copy indices to scratch space */
1047 const void *ptr = ib->user_buffer;
1048 ptr = swr_copy_to_scratch_space(
1049 ctx, &ctx->scratch->index_buffer, ptr, size);
1050 p_data = (const uint8_t *)ptr;
1051 }
1052
1053 SWR_INDEX_BUFFER_STATE swrIndexBuffer;
1054 swrIndexBuffer.format = swr_convert_index_type(ib->index_size);
1055 swrIndexBuffer.pIndices = p_data;
1056 swrIndexBuffer.size = size;
1057
1058 SwrSetIndexBuffer(ctx->swrContext, &swrIndexBuffer);
1059 }
1060
1061 struct swr_vertex_element_state *velems = ctx->velems;
1062 if (velems && velems->fsState.indexType != index_type) {
1063 velems->fsFunc = NULL;
1064 velems->fsState.indexType = index_type;
1065 }
1066 }
1067
1068 /* VertexShader */
1069 if (ctx->dirty & (SWR_NEW_VS |
1070 SWR_NEW_SAMPLER |
1071 SWR_NEW_SAMPLER_VIEW |
1072 SWR_NEW_FRAMEBUFFER)) {
1073 swr_jit_vs_key key;
1074 swr_generate_vs_key(key, ctx, ctx->vs);
1075 auto search = ctx->vs->map.find(key);
1076 PFN_VERTEX_FUNC func;
1077 if (search != ctx->vs->map.end()) {
1078 func = search->second->shader;
1079 } else {
1080 func = swr_compile_vs(ctx, key);
1081 }
1082 SwrSetVertexFunc(ctx->swrContext, func);
1083
1084 /* JIT sampler state */
1085 if (ctx->dirty & SWR_NEW_SAMPLER) {
1086 swr_update_sampler_state(ctx,
1087 PIPE_SHADER_VERTEX,
1088 key.nr_samplers,
1089 ctx->swrDC.samplersVS);
1090 }
1091
1092 /* JIT sampler view state */
1093 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1094 swr_update_texture_state(ctx,
1095 PIPE_SHADER_VERTEX,
1096 key.nr_sampler_views,
1097 ctx->swrDC.texturesVS);
1098 }
1099 }
1100
1101 /* FragmentShader */
1102 if (ctx->dirty & (SWR_NEW_FS | SWR_NEW_SAMPLER | SWR_NEW_SAMPLER_VIEW
1103 | SWR_NEW_RASTERIZER | SWR_NEW_FRAMEBUFFER)) {
1104 swr_jit_fs_key key;
1105 swr_generate_fs_key(key, ctx, ctx->fs);
1106 auto search = ctx->fs->map.find(key);
1107 PFN_PIXEL_KERNEL func;
1108 if (search != ctx->fs->map.end()) {
1109 func = search->second->shader;
1110 } else {
1111 func = swr_compile_fs(ctx, key);
1112 }
1113 SWR_PS_STATE psState = {0};
1114 psState.pfnPixelShader = func;
1115 psState.killsPixel = ctx->fs->info.base.uses_kill;
1116 psState.inputCoverage = SWR_INPUT_COVERAGE_NORMAL;
1117 psState.writesODepth = ctx->fs->info.base.writes_z;
1118 psState.usesSourceDepth = ctx->fs->info.base.reads_z;
1119 psState.shadingRate = SWR_SHADING_RATE_PIXEL; // XXX
1120 psState.numRenderTargets = ctx->framebuffer.nr_cbufs;
1121 psState.posOffset = SWR_PS_POSITION_SAMPLE_NONE; // XXX msaa
1122 uint32_t barycentricsMask = 0;
1123 #if 0
1124 // when we switch to mesa-master
1125 if (ctx->fs->info.base.uses_persp_center ||
1126 ctx->fs->info.base.uses_linear_center)
1127 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1128 if (ctx->fs->info.base.uses_persp_centroid ||
1129 ctx->fs->info.base.uses_linear_centroid)
1130 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1131 if (ctx->fs->info.base.uses_persp_sample ||
1132 ctx->fs->info.base.uses_linear_sample)
1133 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1134 #else
1135 for (unsigned i = 0; i < ctx->fs->info.base.num_inputs; i++) {
1136 switch (ctx->fs->info.base.input_interpolate_loc[i]) {
1137 case TGSI_INTERPOLATE_LOC_CENTER:
1138 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1139 break;
1140 case TGSI_INTERPOLATE_LOC_CENTROID:
1141 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1142 break;
1143 case TGSI_INTERPOLATE_LOC_SAMPLE:
1144 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1145 break;
1146 }
1147 }
1148 #endif
1149 psState.barycentricsMask = barycentricsMask;
1150 psState.usesUAV = false; // XXX
1151 psState.forceEarlyZ = false;
1152 SwrSetPixelShaderState(ctx->swrContext, &psState);
1153
1154 /* JIT sampler state */
1155 if (ctx->dirty & SWR_NEW_SAMPLER) {
1156 swr_update_sampler_state(ctx,
1157 PIPE_SHADER_FRAGMENT,
1158 key.nr_samplers,
1159 ctx->swrDC.samplersFS);
1160 }
1161
1162 /* JIT sampler view state */
1163 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1164 swr_update_texture_state(ctx,
1165 PIPE_SHADER_FRAGMENT,
1166 key.nr_sampler_views,
1167 ctx->swrDC.texturesFS);
1168 }
1169 }
1170
1171
1172 /* VertexShader Constants */
1173 if (ctx->dirty & SWR_NEW_VSCONSTANTS) {
1174 swr_update_constants(ctx, PIPE_SHADER_VERTEX);
1175 }
1176
1177 /* FragmentShader Constants */
1178 if (ctx->dirty & SWR_NEW_FSCONSTANTS) {
1179 swr_update_constants(ctx, PIPE_SHADER_FRAGMENT);
1180 }
1181
1182 /* Depth/stencil state */
1183 if (ctx->dirty & (SWR_NEW_DEPTH_STENCIL_ALPHA | SWR_NEW_FRAMEBUFFER)) {
1184 struct pipe_depth_state *depth = &(ctx->depth_stencil->depth);
1185 struct pipe_stencil_state *stencil = ctx->depth_stencil->stencil;
1186 SWR_DEPTH_STENCIL_STATE depthStencilState = {{0}};
1187
1188 /* XXX, incomplete. Need to flesh out stencil & alpha test state
1189 struct pipe_stencil_state *front_stencil =
1190 ctx->depth_stencil.stencil[0];
1191 struct pipe_stencil_state *back_stencil = ctx->depth_stencil.stencil[1];
1192 struct pipe_alpha_state alpha;
1193 */
1194 if (stencil[0].enabled) {
1195 depthStencilState.stencilWriteEnable = 1;
1196 depthStencilState.stencilTestEnable = 1;
1197 depthStencilState.stencilTestFunc =
1198 swr_convert_depth_func(stencil[0].func);
1199
1200 depthStencilState.stencilPassDepthPassOp =
1201 swr_convert_stencil_op(stencil[0].zpass_op);
1202 depthStencilState.stencilPassDepthFailOp =
1203 swr_convert_stencil_op(stencil[0].zfail_op);
1204 depthStencilState.stencilFailOp =
1205 swr_convert_stencil_op(stencil[0].fail_op);
1206 depthStencilState.stencilWriteMask = stencil[0].writemask;
1207 depthStencilState.stencilTestMask = stencil[0].valuemask;
1208 depthStencilState.stencilRefValue = ctx->stencil_ref.ref_value[0];
1209 }
1210 if (stencil[1].enabled) {
1211 depthStencilState.doubleSidedStencilTestEnable = 1;
1212
1213 depthStencilState.backfaceStencilTestFunc =
1214 swr_convert_depth_func(stencil[1].func);
1215
1216 depthStencilState.backfaceStencilPassDepthPassOp =
1217 swr_convert_stencil_op(stencil[1].zpass_op);
1218 depthStencilState.backfaceStencilPassDepthFailOp =
1219 swr_convert_stencil_op(stencil[1].zfail_op);
1220 depthStencilState.backfaceStencilFailOp =
1221 swr_convert_stencil_op(stencil[1].fail_op);
1222 depthStencilState.backfaceStencilWriteMask = stencil[1].writemask;
1223 depthStencilState.backfaceStencilTestMask = stencil[1].valuemask;
1224
1225 depthStencilState.backfaceStencilRefValue =
1226 ctx->stencil_ref.ref_value[1];
1227 }
1228
1229 depthStencilState.depthTestEnable = depth->enabled;
1230 depthStencilState.depthTestFunc = swr_convert_depth_func(depth->func);
1231 depthStencilState.depthWriteEnable = depth->writemask;
1232 SwrSetDepthStencilState(ctx->swrContext, &depthStencilState);
1233 }
1234
1235 /* Blend State */
1236 if (ctx->dirty & (SWR_NEW_BLEND |
1237 SWR_NEW_FRAMEBUFFER |
1238 SWR_NEW_DEPTH_STENCIL_ALPHA)) {
1239 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
1240
1241 SWR_BLEND_STATE blendState;
1242 memcpy(&blendState, &ctx->blend->blendState, sizeof(blendState));
1243 blendState.constantColor[0] = ctx->blend_color.color[0];
1244 blendState.constantColor[1] = ctx->blend_color.color[1];
1245 blendState.constantColor[2] = ctx->blend_color.color[2];
1246 blendState.constantColor[3] = ctx->blend_color.color[3];
1247 blendState.alphaTestReference =
1248 *((uint32_t*)&ctx->depth_stencil->alpha.ref_value);
1249
1250 // XXX MSAA
1251 blendState.sampleMask = 0;
1252 blendState.sampleCount = SWR_MULTISAMPLE_1X;
1253
1254 /* If there are no color buffers bound, disable writes on RT0
1255 * and skip loop */
1256 if (fb->nr_cbufs == 0) {
1257 blendState.renderTarget[0].writeDisableRed = 1;
1258 blendState.renderTarget[0].writeDisableGreen = 1;
1259 blendState.renderTarget[0].writeDisableBlue = 1;
1260 blendState.renderTarget[0].writeDisableAlpha = 1;
1261 SwrSetBlendFunc(ctx->swrContext, 0, NULL);
1262 }
1263 else
1264 for (int target = 0;
1265 target < std::min(SWR_NUM_RENDERTARGETS,
1266 PIPE_MAX_COLOR_BUFS);
1267 target++) {
1268 if (!fb->cbufs[target])
1269 continue;
1270
1271 struct swr_resource *colorBuffer =
1272 swr_resource(fb->cbufs[target]->texture);
1273
1274 BLEND_COMPILE_STATE compileState;
1275 memset(&compileState, 0, sizeof(compileState));
1276 compileState.format = colorBuffer->swr.format;
1277 memcpy(&compileState.blendState,
1278 &ctx->blend->compileState[target],
1279 sizeof(compileState.blendState));
1280
1281 if (compileState.blendState.blendEnable == false &&
1282 compileState.blendState.logicOpEnable == false) {
1283 SwrSetBlendFunc(ctx->swrContext, target, NULL);
1284 continue;
1285 }
1286
1287 compileState.desc.alphaTestEnable =
1288 ctx->depth_stencil->alpha.enabled;
1289 compileState.desc.independentAlphaBlendEnable =
1290 ctx->blend->pipe.independent_blend_enable;
1291 compileState.desc.alphaToCoverageEnable =
1292 ctx->blend->pipe.alpha_to_coverage;
1293 compileState.desc.sampleMaskEnable = 0; // XXX
1294 compileState.desc.numSamples = 1; // XXX
1295
1296 compileState.alphaTestFunction =
1297 swr_convert_depth_func(ctx->depth_stencil->alpha.func);
1298 compileState.alphaTestFormat = ALPHA_TEST_FLOAT32; // xxx
1299
1300 PFN_BLEND_JIT_FUNC func = NULL;
1301 auto search = ctx->blendJIT->find(compileState);
1302 if (search != ctx->blendJIT->end()) {
1303 func = search->second;
1304 } else {
1305 HANDLE hJitMgr = screen->hJitMgr;
1306 func = JitCompileBlend(hJitMgr, compileState);
1307 debug_printf("BLEND shader %p\n", func);
1308 assert(func && "Error: BlendShader = NULL");
1309
1310 ctx->blendJIT->insert(std::make_pair(compileState, func));
1311 }
1312 SwrSetBlendFunc(ctx->swrContext, target, func);
1313 }
1314
1315 SwrSetBlendState(ctx->swrContext, &blendState);
1316 }
1317
1318 if (ctx->dirty & SWR_NEW_STIPPLE) {
1319 /* XXX What to do with this one??? SWR doesn't stipple */
1320 }
1321
1322 if (ctx->dirty & (SWR_NEW_VS | SWR_NEW_SO | SWR_NEW_RASTERIZER)) {
1323 ctx->vs->soState.rasterizerDisable =
1324 ctx->rasterizer->rasterizer_discard;
1325 SwrSetSoState(ctx->swrContext, &ctx->vs->soState);
1326
1327 pipe_stream_output_info *stream_output = &ctx->vs->pipe.stream_output;
1328
1329 for (uint32_t i = 0; i < ctx->num_so_targets; i++) {
1330 SWR_STREAMOUT_BUFFER buffer = {0};
1331 if (!ctx->so_targets[i])
1332 continue;
1333 buffer.enable = true;
1334 buffer.pBuffer =
1335 (uint32_t *)swr_resource_data(ctx->so_targets[i]->buffer);
1336 buffer.bufferSize = ctx->so_targets[i]->buffer_size >> 2;
1337 buffer.pitch = stream_output->stride[i];
1338 buffer.streamOffset = ctx->so_targets[i]->buffer_offset >> 2;
1339
1340 SwrSetSoBuffers(ctx->swrContext, &buffer, i);
1341 }
1342 }
1343
1344 uint32_t linkage = ctx->vs->linkageMask;
1345 if (ctx->rasterizer->sprite_coord_enable)
1346 linkage |= (1 << ctx->vs->info.base.num_outputs);
1347
1348 SwrSetLinkage(ctx->swrContext, linkage, NULL);
1349
1350 // set up backend state
1351 SWR_BACKEND_STATE backendState = {0};
1352 backendState.numAttributes = 1;
1353 backendState.numComponents[0] = 4;
1354 backendState.constantInterpolationMask = ctx->fs->constantMask;
1355 backendState.pointSpriteTexCoordMask = ctx->fs->pointSpriteMask;
1356
1357 SwrSetBackendState(ctx->swrContext, &backendState);
1358
1359 /* Ensure that any in-progress attachment change StoreTiles finish */
1360 if (swr_is_fence_pending(screen->flush_fence))
1361 swr_fence_finish(pipe->screen, screen->flush_fence, 0);
1362
1363 /* Finally, update the in-use status of all resources involved in draw */
1364 swr_update_resource_status(pipe, p_draw_info);
1365
1366 ctx->dirty = post_update_dirty_flags;
1367 }
1368
1369
1370 static struct pipe_stream_output_target *
1371 swr_create_so_target(struct pipe_context *pipe,
1372 struct pipe_resource *buffer,
1373 unsigned buffer_offset,
1374 unsigned buffer_size)
1375 {
1376 struct pipe_stream_output_target *target;
1377
1378 target = CALLOC_STRUCT(pipe_stream_output_target);
1379 if (!target)
1380 return NULL;
1381
1382 target->context = pipe;
1383 target->reference.count = 1;
1384 pipe_resource_reference(&target->buffer, buffer);
1385 target->buffer_offset = buffer_offset;
1386 target->buffer_size = buffer_size;
1387 return target;
1388 }
1389
1390 static void
1391 swr_destroy_so_target(struct pipe_context *pipe,
1392 struct pipe_stream_output_target *target)
1393 {
1394 pipe_resource_reference(&target->buffer, NULL);
1395 FREE(target);
1396 }
1397
1398 static void
1399 swr_set_so_targets(struct pipe_context *pipe,
1400 unsigned num_targets,
1401 struct pipe_stream_output_target **targets,
1402 const unsigned *offsets)
1403 {
1404 struct swr_context *swr = swr_context(pipe);
1405 uint32_t i;
1406
1407 assert(num_targets < MAX_SO_STREAMS);
1408
1409 for (i = 0; i < num_targets; i++) {
1410 pipe_so_target_reference(
1411 (struct pipe_stream_output_target **)&swr->so_targets[i],
1412 targets[i]);
1413 }
1414
1415 for (/* fall-through */; i < swr->num_so_targets; i++) {
1416 pipe_so_target_reference(
1417 (struct pipe_stream_output_target **)&swr->so_targets[i], NULL);
1418 }
1419
1420 swr->num_so_targets = num_targets;
1421
1422 swr->dirty = SWR_NEW_SO;
1423 }
1424
1425
1426 void
1427 swr_state_init(struct pipe_context *pipe)
1428 {
1429 pipe->create_blend_state = swr_create_blend_state;
1430 pipe->bind_blend_state = swr_bind_blend_state;
1431 pipe->delete_blend_state = swr_delete_blend_state;
1432
1433 pipe->create_depth_stencil_alpha_state = swr_create_depth_stencil_state;
1434 pipe->bind_depth_stencil_alpha_state = swr_bind_depth_stencil_state;
1435 pipe->delete_depth_stencil_alpha_state = swr_delete_depth_stencil_state;
1436
1437 pipe->create_rasterizer_state = swr_create_rasterizer_state;
1438 pipe->bind_rasterizer_state = swr_bind_rasterizer_state;
1439 pipe->delete_rasterizer_state = swr_delete_rasterizer_state;
1440
1441 pipe->create_sampler_state = swr_create_sampler_state;
1442 pipe->bind_sampler_states = swr_bind_sampler_states;
1443 pipe->delete_sampler_state = swr_delete_sampler_state;
1444
1445 pipe->create_sampler_view = swr_create_sampler_view;
1446 pipe->set_sampler_views = swr_set_sampler_views;
1447 pipe->sampler_view_destroy = swr_sampler_view_destroy;
1448
1449 pipe->create_vs_state = swr_create_vs_state;
1450 pipe->bind_vs_state = swr_bind_vs_state;
1451 pipe->delete_vs_state = swr_delete_vs_state;
1452
1453 pipe->create_fs_state = swr_create_fs_state;
1454 pipe->bind_fs_state = swr_bind_fs_state;
1455 pipe->delete_fs_state = swr_delete_fs_state;
1456
1457 pipe->set_constant_buffer = swr_set_constant_buffer;
1458
1459 pipe->create_vertex_elements_state = swr_create_vertex_elements_state;
1460 pipe->bind_vertex_elements_state = swr_bind_vertex_elements_state;
1461 pipe->delete_vertex_elements_state = swr_delete_vertex_elements_state;
1462
1463 pipe->set_vertex_buffers = swr_set_vertex_buffers;
1464 pipe->set_index_buffer = swr_set_index_buffer;
1465
1466 pipe->set_polygon_stipple = swr_set_polygon_stipple;
1467 pipe->set_clip_state = swr_set_clip_state;
1468 pipe->set_scissor_states = swr_set_scissor_states;
1469 pipe->set_viewport_states = swr_set_viewport_states;
1470
1471 pipe->set_framebuffer_state = swr_set_framebuffer_state;
1472
1473 pipe->set_blend_color = swr_set_blend_color;
1474 pipe->set_stencil_ref = swr_set_stencil_ref;
1475
1476 pipe->set_sample_mask = swr_set_sample_mask;
1477
1478 pipe->create_stream_output_target = swr_create_so_target;
1479 pipe->stream_output_target_destroy = swr_destroy_so_target;
1480 pipe->set_stream_output_targets = swr_set_so_targets;
1481 }