swr: conditionally validate vertex buffer state
[mesa.git] / src / gallium / drivers / swr / swr_state.cpp
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23
24 // llvm redefines DEBUG
25 #pragma push_macro("DEBUG")
26 #undef DEBUG
27 #include "JitManager.h"
28 #pragma pop_macro("DEBUG")
29
30 #include "common/os.h"
31 #include "jit_api.h"
32 #include "gen_state_llvm.h"
33 #include "core/multisample.h"
34 #include "core/state_funcs.h"
35
36 #include "gallivm/lp_bld_tgsi.h"
37 #include "util/u_format.h"
38
39 #include "util/u_memory.h"
40 #include "util/u_inlines.h"
41 #include "util/u_helpers.h"
42 #include "util/u_framebuffer.h"
43 #include "util/u_viewport.h"
44 #include "util/u_prim.h"
45
46 #include "swr_state.h"
47 #include "swr_context.h"
48 #include "gen_swr_context_llvm.h"
49 #include "swr_screen.h"
50 #include "swr_resource.h"
51 #include "swr_tex_sample.h"
52 #include "swr_scratch.h"
53 #include "swr_shader.h"
54 #include "swr_fence.h"
55
56 /* These should be pulled out into separate files as necessary
57 * Just initializing everything here to get going. */
58
59 static void *
60 swr_create_blend_state(struct pipe_context *pipe,
61 const struct pipe_blend_state *blend)
62 {
63 struct swr_blend_state *state = CALLOC_STRUCT(swr_blend_state);
64
65 memcpy(&state->pipe, blend, sizeof(*blend));
66
67 struct pipe_blend_state *pipe_blend = &state->pipe;
68
69 for (int target = 0;
70 target < std::min(SWR_NUM_RENDERTARGETS, PIPE_MAX_COLOR_BUFS);
71 target++) {
72
73 struct pipe_rt_blend_state *rt_blend = &pipe_blend->rt[target];
74 SWR_RENDER_TARGET_BLEND_STATE &blendState =
75 state->blendState.renderTarget[target];
76 RENDER_TARGET_BLEND_COMPILE_STATE &compileState =
77 state->compileState[target];
78
79 if (target != 0 && !pipe_blend->independent_blend_enable) {
80 memcpy(&compileState,
81 &state->compileState[0],
82 sizeof(RENDER_TARGET_BLEND_COMPILE_STATE));
83 continue;
84 }
85
86 compileState.blendEnable = rt_blend->blend_enable;
87 if (compileState.blendEnable) {
88 compileState.sourceAlphaBlendFactor =
89 swr_convert_blend_factor(rt_blend->alpha_src_factor);
90 compileState.destAlphaBlendFactor =
91 swr_convert_blend_factor(rt_blend->alpha_dst_factor);
92 compileState.sourceBlendFactor =
93 swr_convert_blend_factor(rt_blend->rgb_src_factor);
94 compileState.destBlendFactor =
95 swr_convert_blend_factor(rt_blend->rgb_dst_factor);
96
97 compileState.colorBlendFunc =
98 swr_convert_blend_func(rt_blend->rgb_func);
99 compileState.alphaBlendFunc =
100 swr_convert_blend_func(rt_blend->alpha_func);
101 }
102 compileState.logicOpEnable = state->pipe.logicop_enable;
103 if (compileState.logicOpEnable) {
104 compileState.logicOpFunc =
105 swr_convert_logic_op(state->pipe.logicop_func);
106 }
107
108 blendState.writeDisableRed =
109 (rt_blend->colormask & PIPE_MASK_R) ? 0 : 1;
110 blendState.writeDisableGreen =
111 (rt_blend->colormask & PIPE_MASK_G) ? 0 : 1;
112 blendState.writeDisableBlue =
113 (rt_blend->colormask & PIPE_MASK_B) ? 0 : 1;
114 blendState.writeDisableAlpha =
115 (rt_blend->colormask & PIPE_MASK_A) ? 0 : 1;
116
117 if (rt_blend->colormask == 0)
118 compileState.blendEnable = false;
119 }
120
121 return state;
122 }
123
124 static void
125 swr_bind_blend_state(struct pipe_context *pipe, void *blend)
126 {
127 struct swr_context *ctx = swr_context(pipe);
128
129 if (ctx->blend == blend)
130 return;
131
132 ctx->blend = (swr_blend_state *)blend;
133
134 ctx->dirty |= SWR_NEW_BLEND;
135 }
136
137 static void
138 swr_delete_blend_state(struct pipe_context *pipe, void *blend)
139 {
140 FREE(blend);
141 }
142
143 static void
144 swr_set_blend_color(struct pipe_context *pipe,
145 const struct pipe_blend_color *color)
146 {
147 struct swr_context *ctx = swr_context(pipe);
148
149 ctx->blend_color = *color;
150
151 ctx->dirty |= SWR_NEW_BLEND;
152 }
153
154 static void
155 swr_set_stencil_ref(struct pipe_context *pipe,
156 const struct pipe_stencil_ref *ref)
157 {
158 struct swr_context *ctx = swr_context(pipe);
159
160 ctx->stencil_ref = *ref;
161
162 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
163 }
164
165 static void *
166 swr_create_depth_stencil_state(
167 struct pipe_context *pipe,
168 const struct pipe_depth_stencil_alpha_state *depth_stencil)
169 {
170 struct pipe_depth_stencil_alpha_state *state;
171
172 state = (pipe_depth_stencil_alpha_state *)mem_dup(depth_stencil,
173 sizeof *depth_stencil);
174
175 return state;
176 }
177
178 static void
179 swr_bind_depth_stencil_state(struct pipe_context *pipe, void *depth_stencil)
180 {
181 struct swr_context *ctx = swr_context(pipe);
182
183 if (ctx->depth_stencil == (pipe_depth_stencil_alpha_state *)depth_stencil)
184 return;
185
186 ctx->depth_stencil = (pipe_depth_stencil_alpha_state *)depth_stencil;
187
188 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
189 }
190
191 static void
192 swr_delete_depth_stencil_state(struct pipe_context *pipe, void *depth)
193 {
194 FREE(depth);
195 }
196
197
198 static void *
199 swr_create_rasterizer_state(struct pipe_context *pipe,
200 const struct pipe_rasterizer_state *rast)
201 {
202 struct pipe_rasterizer_state *state;
203 state = (pipe_rasterizer_state *)mem_dup(rast, sizeof *rast);
204
205 return state;
206 }
207
208 static void
209 swr_bind_rasterizer_state(struct pipe_context *pipe, void *handle)
210 {
211 struct swr_context *ctx = swr_context(pipe);
212 const struct pipe_rasterizer_state *rasterizer =
213 (const struct pipe_rasterizer_state *)handle;
214
215 if (ctx->rasterizer == (pipe_rasterizer_state *)rasterizer)
216 return;
217
218 ctx->rasterizer = (pipe_rasterizer_state *)rasterizer;
219
220 ctx->dirty |= SWR_NEW_RASTERIZER;
221 }
222
223 static void
224 swr_delete_rasterizer_state(struct pipe_context *pipe, void *rasterizer)
225 {
226 FREE(rasterizer);
227 }
228
229
230 static void *
231 swr_create_sampler_state(struct pipe_context *pipe,
232 const struct pipe_sampler_state *sampler)
233 {
234 struct pipe_sampler_state *state =
235 (pipe_sampler_state *)mem_dup(sampler, sizeof *sampler);
236
237 return state;
238 }
239
240 static void
241 swr_bind_sampler_states(struct pipe_context *pipe,
242 enum pipe_shader_type shader,
243 unsigned start,
244 unsigned num,
245 void **samplers)
246 {
247 struct swr_context *ctx = swr_context(pipe);
248 unsigned i;
249
250 assert(shader < PIPE_SHADER_TYPES);
251 assert(start + num <= ARRAY_SIZE(ctx->samplers[shader]));
252
253 /* set the new samplers */
254 ctx->num_samplers[shader] = num;
255 for (i = 0; i < num; i++) {
256 ctx->samplers[shader][start + i] = (pipe_sampler_state *)samplers[i];
257 }
258
259 ctx->dirty |= SWR_NEW_SAMPLER;
260 }
261
262 static void
263 swr_delete_sampler_state(struct pipe_context *pipe, void *sampler)
264 {
265 FREE(sampler);
266 }
267
268
269 static struct pipe_sampler_view *
270 swr_create_sampler_view(struct pipe_context *pipe,
271 struct pipe_resource *texture,
272 const struct pipe_sampler_view *templ)
273 {
274 struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view);
275
276 if (view) {
277 *view = *templ;
278 view->reference.count = 1;
279 view->texture = NULL;
280 pipe_resource_reference(&view->texture, texture);
281 view->context = pipe;
282 }
283
284 return view;
285 }
286
287 static void
288 swr_set_sampler_views(struct pipe_context *pipe,
289 enum pipe_shader_type shader,
290 unsigned start,
291 unsigned num,
292 struct pipe_sampler_view **views)
293 {
294 struct swr_context *ctx = swr_context(pipe);
295 uint i;
296
297 assert(num <= PIPE_MAX_SHADER_SAMPLER_VIEWS);
298
299 assert(shader < PIPE_SHADER_TYPES);
300 assert(start + num <= ARRAY_SIZE(ctx->sampler_views[shader]));
301
302 /* set the new sampler views */
303 ctx->num_sampler_views[shader] = num;
304 for (i = 0; i < num; i++) {
305 /* Note: we're using pipe_sampler_view_release() here to work around
306 * a possible crash when the old view belongs to another context that
307 * was already destroyed.
308 */
309 pipe_sampler_view_release(pipe, &ctx->sampler_views[shader][start + i]);
310 pipe_sampler_view_reference(&ctx->sampler_views[shader][start + i],
311 views[i]);
312 }
313
314 ctx->dirty |= SWR_NEW_SAMPLER_VIEW;
315 }
316
317 static void
318 swr_sampler_view_destroy(struct pipe_context *pipe,
319 struct pipe_sampler_view *view)
320 {
321 pipe_resource_reference(&view->texture, NULL);
322 FREE(view);
323 }
324
325 static void *
326 swr_create_vs_state(struct pipe_context *pipe,
327 const struct pipe_shader_state *vs)
328 {
329 struct swr_vertex_shader *swr_vs = new swr_vertex_shader;
330 if (!swr_vs)
331 return NULL;
332
333 swr_vs->pipe.tokens = tgsi_dup_tokens(vs->tokens);
334 swr_vs->pipe.stream_output = vs->stream_output;
335
336 lp_build_tgsi_info(vs->tokens, &swr_vs->info);
337
338 swr_vs->soState = {0};
339
340 if (swr_vs->pipe.stream_output.num_outputs) {
341 pipe_stream_output_info *stream_output = &swr_vs->pipe.stream_output;
342
343 swr_vs->soState.soEnable = true;
344 // soState.rasterizerDisable set on state dirty
345 // soState.streamToRasterizer not used
346
347 for (uint32_t i = 0; i < stream_output->num_outputs; i++) {
348 swr_vs->soState.streamMasks[stream_output->output[i].stream] |=
349 1 << (stream_output->output[i].register_index - 1);
350 }
351 for (uint32_t i = 0; i < MAX_SO_STREAMS; i++) {
352 swr_vs->soState.streamNumEntries[i] =
353 _mm_popcnt_u32(swr_vs->soState.streamMasks[i]);
354 }
355 }
356
357 return swr_vs;
358 }
359
360 static void
361 swr_bind_vs_state(struct pipe_context *pipe, void *vs)
362 {
363 struct swr_context *ctx = swr_context(pipe);
364
365 if (ctx->vs == vs)
366 return;
367
368 ctx->vs = (swr_vertex_shader *)vs;
369 ctx->dirty |= SWR_NEW_VS;
370 }
371
372 static void
373 swr_delete_vs_state(struct pipe_context *pipe, void *vs)
374 {
375 struct swr_vertex_shader *swr_vs = (swr_vertex_shader *)vs;
376 FREE((void *)swr_vs->pipe.tokens);
377 struct swr_screen *screen = swr_screen(pipe->screen);
378
379 /* Defer deletion of vs state */
380 swr_fence_work_delete_vs(screen->flush_fence, swr_vs);
381 }
382
383 static void *
384 swr_create_fs_state(struct pipe_context *pipe,
385 const struct pipe_shader_state *fs)
386 {
387 struct swr_fragment_shader *swr_fs = new swr_fragment_shader;
388 if (!swr_fs)
389 return NULL;
390
391 swr_fs->pipe.tokens = tgsi_dup_tokens(fs->tokens);
392
393 lp_build_tgsi_info(fs->tokens, &swr_fs->info);
394
395 return swr_fs;
396 }
397
398
399 static void
400 swr_bind_fs_state(struct pipe_context *pipe, void *fs)
401 {
402 struct swr_context *ctx = swr_context(pipe);
403
404 if (ctx->fs == fs)
405 return;
406
407 ctx->fs = (swr_fragment_shader *)fs;
408 ctx->dirty |= SWR_NEW_FS;
409 }
410
411 static void
412 swr_delete_fs_state(struct pipe_context *pipe, void *fs)
413 {
414 struct swr_fragment_shader *swr_fs = (swr_fragment_shader *)fs;
415 FREE((void *)swr_fs->pipe.tokens);
416 struct swr_screen *screen = swr_screen(pipe->screen);
417
418 /* Defer deleton of fs state */
419 swr_fence_work_delete_fs(screen->flush_fence, swr_fs);
420 }
421
422 static void *
423 swr_create_gs_state(struct pipe_context *pipe,
424 const struct pipe_shader_state *gs)
425 {
426 struct swr_geometry_shader *swr_gs = new swr_geometry_shader;
427 if (!swr_gs)
428 return NULL;
429
430 swr_gs->pipe.tokens = tgsi_dup_tokens(gs->tokens);
431
432 lp_build_tgsi_info(gs->tokens, &swr_gs->info);
433
434 return swr_gs;
435 }
436
437
438 static void
439 swr_bind_gs_state(struct pipe_context *pipe, void *gs)
440 {
441 struct swr_context *ctx = swr_context(pipe);
442
443 if (ctx->gs == gs)
444 return;
445
446 ctx->gs = (swr_geometry_shader *)gs;
447 ctx->dirty |= SWR_NEW_GS;
448 }
449
450 static void
451 swr_delete_gs_state(struct pipe_context *pipe, void *gs)
452 {
453 struct swr_geometry_shader *swr_gs = (swr_geometry_shader *)gs;
454 FREE((void *)swr_gs->pipe.tokens);
455 struct swr_screen *screen = swr_screen(pipe->screen);
456
457 /* Defer deleton of fs state */
458 swr_fence_work_delete_gs(screen->flush_fence, swr_gs);
459 }
460
461 static void
462 swr_set_constant_buffer(struct pipe_context *pipe,
463 enum pipe_shader_type shader,
464 uint index,
465 const struct pipe_constant_buffer *cb)
466 {
467 struct swr_context *ctx = swr_context(pipe);
468 struct pipe_resource *constants = cb ? cb->buffer : NULL;
469
470 assert(shader < PIPE_SHADER_TYPES);
471 assert(index < ARRAY_SIZE(ctx->constants[shader]));
472
473 /* note: reference counting */
474 util_copy_constant_buffer(&ctx->constants[shader][index], cb);
475
476 if (shader == PIPE_SHADER_VERTEX) {
477 ctx->dirty |= SWR_NEW_VSCONSTANTS;
478 } else if (shader == PIPE_SHADER_FRAGMENT) {
479 ctx->dirty |= SWR_NEW_FSCONSTANTS;
480 } else if (shader == PIPE_SHADER_GEOMETRY) {
481 ctx->dirty |= SWR_NEW_GSCONSTANTS;
482 }
483
484 if (cb && cb->user_buffer) {
485 pipe_resource_reference(&constants, NULL);
486 }
487 }
488
489
490 static void *
491 swr_create_vertex_elements_state(struct pipe_context *pipe,
492 unsigned num_elements,
493 const struct pipe_vertex_element *attribs)
494 {
495 struct swr_vertex_element_state *velems;
496 assert(num_elements <= PIPE_MAX_ATTRIBS);
497 velems = new swr_vertex_element_state;
498 if (velems) {
499 memset(&velems->fsState, 0, sizeof(velems->fsState));
500 velems->fsState.bVertexIDOffsetEnable = true;
501 velems->fsState.numAttribs = num_elements;
502 for (unsigned i = 0; i < num_elements; i++) {
503 // XXX: we should do this keyed on the VS usage info
504
505 const struct util_format_description *desc =
506 util_format_description(attribs[i].src_format);
507
508 velems->fsState.layout[i].AlignedByteOffset = attribs[i].src_offset;
509 velems->fsState.layout[i].Format =
510 mesa_to_swr_format(attribs[i].src_format);
511 velems->fsState.layout[i].StreamIndex =
512 attribs[i].vertex_buffer_index;
513 velems->fsState.layout[i].InstanceEnable =
514 attribs[i].instance_divisor != 0;
515 velems->fsState.layout[i].ComponentControl0 =
516 desc->channel[0].type != UTIL_FORMAT_TYPE_VOID
517 ? ComponentControl::StoreSrc
518 : ComponentControl::Store0;
519 velems->fsState.layout[i].ComponentControl1 =
520 desc->channel[1].type != UTIL_FORMAT_TYPE_VOID
521 ? ComponentControl::StoreSrc
522 : ComponentControl::Store0;
523 velems->fsState.layout[i].ComponentControl2 =
524 desc->channel[2].type != UTIL_FORMAT_TYPE_VOID
525 ? ComponentControl::StoreSrc
526 : ComponentControl::Store0;
527 velems->fsState.layout[i].ComponentControl3 =
528 desc->channel[3].type != UTIL_FORMAT_TYPE_VOID
529 ? ComponentControl::StoreSrc
530 : ComponentControl::Store1Fp;
531 velems->fsState.layout[i].ComponentPacking = ComponentEnable::XYZW;
532 velems->fsState.layout[i].InstanceDataStepRate =
533 attribs[i].instance_divisor;
534
535 /* Calculate the pitch of each stream */
536 const SWR_FORMAT_INFO &swr_desc = GetFormatInfo(
537 mesa_to_swr_format(attribs[i].src_format));
538 velems->stream_pitch[attribs[i].vertex_buffer_index] += swr_desc.Bpp;
539
540 if (attribs[i].instance_divisor != 0) {
541 velems->instanced_bufs |= 1U << attribs[i].vertex_buffer_index;
542 uint32_t *min_instance_div =
543 &velems->min_instance_div[attribs[i].vertex_buffer_index];
544 if (!*min_instance_div ||
545 attribs[i].instance_divisor < *min_instance_div)
546 *min_instance_div = attribs[i].instance_divisor;
547 }
548 }
549 }
550
551 return velems;
552 }
553
554 static void
555 swr_bind_vertex_elements_state(struct pipe_context *pipe, void *velems)
556 {
557 struct swr_context *ctx = swr_context(pipe);
558 struct swr_vertex_element_state *swr_velems =
559 (struct swr_vertex_element_state *)velems;
560
561 ctx->velems = swr_velems;
562 ctx->dirty |= SWR_NEW_VERTEX;
563 }
564
565 static void
566 swr_delete_vertex_elements_state(struct pipe_context *pipe, void *velems)
567 {
568 struct swr_vertex_element_state *swr_velems =
569 (struct swr_vertex_element_state *) velems;
570 /* XXX Need to destroy fetch shader? */
571 delete swr_velems;
572 }
573
574
575 static void
576 swr_set_vertex_buffers(struct pipe_context *pipe,
577 unsigned start_slot,
578 unsigned num_elements,
579 const struct pipe_vertex_buffer *buffers)
580 {
581 struct swr_context *ctx = swr_context(pipe);
582
583 assert(num_elements <= PIPE_MAX_ATTRIBS);
584
585 util_set_vertex_buffers_count(ctx->vertex_buffer,
586 &ctx->num_vertex_buffers,
587 buffers,
588 start_slot,
589 num_elements);
590
591 ctx->dirty |= SWR_NEW_VERTEX;
592 }
593
594
595 static void
596 swr_set_polygon_stipple(struct pipe_context *pipe,
597 const struct pipe_poly_stipple *stipple)
598 {
599 struct swr_context *ctx = swr_context(pipe);
600
601 ctx->poly_stipple.pipe = *stipple; /* struct copy */
602 ctx->dirty |= SWR_NEW_STIPPLE;
603 }
604
605 static void
606 swr_set_clip_state(struct pipe_context *pipe,
607 const struct pipe_clip_state *clip)
608 {
609 struct swr_context *ctx = swr_context(pipe);
610
611 ctx->clip = *clip;
612 /* XXX Unimplemented, but prevents crash */
613
614 ctx->dirty |= SWR_NEW_CLIP;
615 }
616
617
618 static void
619 swr_set_scissor_states(struct pipe_context *pipe,
620 unsigned start_slot,
621 unsigned num_viewports,
622 const struct pipe_scissor_state *scissor)
623 {
624 struct swr_context *ctx = swr_context(pipe);
625
626 ctx->scissor = *scissor;
627 ctx->swr_scissor.xmin = scissor->minx;
628 ctx->swr_scissor.xmax = scissor->maxx;
629 ctx->swr_scissor.ymin = scissor->miny;
630 ctx->swr_scissor.ymax = scissor->maxy;
631 ctx->dirty |= SWR_NEW_SCISSOR;
632 }
633
634 static void
635 swr_set_viewport_states(struct pipe_context *pipe,
636 unsigned start_slot,
637 unsigned num_viewports,
638 const struct pipe_viewport_state *vpt)
639 {
640 struct swr_context *ctx = swr_context(pipe);
641
642 ctx->viewport = *vpt;
643 ctx->dirty |= SWR_NEW_VIEWPORT;
644 }
645
646
647 static void
648 swr_set_framebuffer_state(struct pipe_context *pipe,
649 const struct pipe_framebuffer_state *fb)
650 {
651 struct swr_context *ctx = swr_context(pipe);
652
653 boolean changed = !util_framebuffer_state_equal(&ctx->framebuffer, fb);
654
655 assert(fb->width <= KNOB_GUARDBAND_WIDTH);
656 assert(fb->height <= KNOB_GUARDBAND_HEIGHT);
657
658 if (changed) {
659 util_copy_framebuffer_state(&ctx->framebuffer, fb);
660
661 /* 0 and 1 both indicate no msaa. Core doesn't understand 0 samples */
662 ctx->framebuffer.samples = std::max((ubyte)1, ctx->framebuffer.samples);
663
664 ctx->dirty |= SWR_NEW_FRAMEBUFFER;
665 }
666 }
667
668
669 static void
670 swr_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
671 {
672 struct swr_context *ctx = swr_context(pipe);
673
674 if (sample_mask != ctx->sample_mask) {
675 ctx->sample_mask = sample_mask;
676 ctx->dirty |= SWR_NEW_RASTERIZER;
677 }
678 }
679
680 /*
681 * MSAA fixed sample position table
682 * used by update_derived and get_sample_position
683 * (integer locations on a 16x16 grid)
684 */
685 static const uint8_t swr_sample_positions[][2] =
686 { /* 1x*/ { 8, 8},
687 /* 2x*/ {12,12},{ 4, 4},
688 /* 4x*/ { 6, 2},{14, 6},{ 2,10},{10,14},
689 /* 8x*/ { 9, 5},{ 7,11},{13, 9},{ 5, 3},
690 { 3,13},{ 1, 7},{11,15},{15, 1},
691 /*16x*/ { 9, 9},{ 7, 5},{ 5,10},{12, 7},
692 { 3, 6},{10,13},{13,11},{11, 3},
693 { 6,14},{ 8, 1},{ 4, 2},{ 2,12},
694 { 0, 8},{15, 4},{14,15},{ 1, 0} };
695
696 static void
697 swr_get_sample_position(struct pipe_context *pipe,
698 unsigned sample_count, unsigned sample_index,
699 float *out_value)
700 {
701 /* validate sample_count */
702 sample_count = GetNumSamples(GetSampleCount(sample_count));
703
704 const uint8_t *sample = swr_sample_positions[sample_count-1 + sample_index];
705 out_value[0] = sample[0] / 16.0f;
706 out_value[1] = sample[1] / 16.0f;
707 }
708
709
710 /*
711 * Update resource in-use status
712 * All resources bound to color or depth targets marked as WRITE resources.
713 * VBO Vertex/index buffers and texture views marked as READ resources.
714 */
715 void
716 swr_update_resource_status(struct pipe_context *pipe,
717 const struct pipe_draw_info *p_draw_info)
718 {
719 struct swr_context *ctx = swr_context(pipe);
720 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
721
722 /* colorbuffer targets */
723 if (fb->nr_cbufs)
724 for (uint32_t i = 0; i < fb->nr_cbufs; ++i)
725 if (fb->cbufs[i])
726 swr_resource_write(fb->cbufs[i]->texture);
727
728 /* depth/stencil target */
729 if (fb->zsbuf)
730 swr_resource_write(fb->zsbuf->texture);
731
732 /* VBO vertex buffers */
733 for (uint32_t i = 0; i < ctx->num_vertex_buffers; i++) {
734 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
735 if (!vb->is_user_buffer)
736 swr_resource_read(vb->buffer.resource);
737 }
738
739 /* VBO index buffer */
740 if (p_draw_info && p_draw_info->index_size) {
741 if (!p_draw_info->has_user_indices)
742 swr_resource_read(p_draw_info->index.resource);
743 }
744
745 /* transform feedback buffers */
746 for (uint32_t i = 0; i < ctx->num_so_targets; i++) {
747 struct pipe_stream_output_target *target = ctx->so_targets[i];
748 if (target && target->buffer)
749 swr_resource_write(target->buffer);
750 }
751
752 /* texture sampler views */
753 for (uint32_t j : {PIPE_SHADER_VERTEX, PIPE_SHADER_FRAGMENT}) {
754 for (uint32_t i = 0; i < ctx->num_sampler_views[j]; i++) {
755 struct pipe_sampler_view *view = ctx->sampler_views[j][i];
756 if (view)
757 swr_resource_read(view->texture);
758 }
759 }
760
761 /* constant buffers */
762 for (uint32_t j : {PIPE_SHADER_VERTEX, PIPE_SHADER_FRAGMENT}) {
763 for (uint32_t i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
764 struct pipe_constant_buffer *cb = &ctx->constants[j][i];
765 if (cb->buffer)
766 swr_resource_read(cb->buffer);
767 }
768 }
769 }
770
771 static void
772 swr_update_texture_state(struct swr_context *ctx,
773 enum pipe_shader_type shader_type,
774 unsigned num_sampler_views,
775 swr_jit_texture *textures)
776 {
777 for (unsigned i = 0; i < num_sampler_views; i++) {
778 struct pipe_sampler_view *view =
779 ctx->sampler_views[shader_type][i];
780 struct swr_jit_texture *jit_tex = &textures[i];
781
782 memset(jit_tex, 0, sizeof(*jit_tex));
783 if (view) {
784 struct pipe_resource *res = view->texture;
785 struct swr_resource *swr_res = swr_resource(res);
786 SWR_SURFACE_STATE *swr = &swr_res->swr;
787 size_t *mip_offsets = swr_res->mip_offsets;
788 if (swr_res->has_depth && swr_res->has_stencil &&
789 !util_format_has_depth(util_format_description(view->format))) {
790 swr = &swr_res->secondary;
791 mip_offsets = swr_res->secondary_mip_offsets;
792 }
793
794 jit_tex->width = res->width0;
795 jit_tex->height = res->height0;
796 jit_tex->base_ptr = swr->pBaseAddress;
797 if (view->target != PIPE_BUFFER) {
798 jit_tex->first_level = view->u.tex.first_level;
799 jit_tex->last_level = view->u.tex.last_level;
800 if (view->target == PIPE_TEXTURE_3D)
801 jit_tex->depth = res->depth0;
802 else
803 jit_tex->depth =
804 view->u.tex.last_layer - view->u.tex.first_layer + 1;
805 jit_tex->base_ptr += view->u.tex.first_layer *
806 swr->qpitch * swr->pitch;
807 } else {
808 unsigned view_blocksize = util_format_get_blocksize(view->format);
809 jit_tex->base_ptr += view->u.buf.offset;
810 jit_tex->width = view->u.buf.size / view_blocksize;
811 jit_tex->depth = 1;
812 }
813
814 for (unsigned level = jit_tex->first_level;
815 level <= jit_tex->last_level;
816 level++) {
817 jit_tex->row_stride[level] = swr->pitch;
818 jit_tex->img_stride[level] = swr->qpitch * swr->pitch;
819 jit_tex->mip_offsets[level] = mip_offsets[level];
820 }
821 }
822 }
823 }
824
825 static void
826 swr_update_sampler_state(struct swr_context *ctx,
827 enum pipe_shader_type shader_type,
828 unsigned num_samplers,
829 swr_jit_sampler *samplers)
830 {
831 for (unsigned i = 0; i < num_samplers; i++) {
832 const struct pipe_sampler_state *sampler =
833 ctx->samplers[shader_type][i];
834
835 if (sampler) {
836 samplers[i].min_lod = sampler->min_lod;
837 samplers[i].max_lod = sampler->max_lod;
838 samplers[i].lod_bias = sampler->lod_bias;
839 COPY_4V(samplers[i].border_color, sampler->border_color.f);
840 }
841 }
842 }
843
844 static void
845 swr_update_constants(struct swr_context *ctx, enum pipe_shader_type shaderType)
846 {
847 swr_draw_context *pDC = &ctx->swrDC;
848
849 const float **constant;
850 uint32_t *num_constants;
851 struct swr_scratch_space *scratch;
852
853 switch (shaderType) {
854 case PIPE_SHADER_VERTEX:
855 constant = pDC->constantVS;
856 num_constants = pDC->num_constantsVS;
857 scratch = &ctx->scratch->vs_constants;
858 break;
859 case PIPE_SHADER_FRAGMENT:
860 constant = pDC->constantFS;
861 num_constants = pDC->num_constantsFS;
862 scratch = &ctx->scratch->fs_constants;
863 break;
864 case PIPE_SHADER_GEOMETRY:
865 constant = pDC->constantGS;
866 num_constants = pDC->num_constantsGS;
867 scratch = &ctx->scratch->gs_constants;
868 break;
869 default:
870 debug_printf("Unsupported shader type constants\n");
871 return;
872 }
873
874 for (UINT i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
875 const pipe_constant_buffer *cb = &ctx->constants[shaderType][i];
876 num_constants[i] = cb->buffer_size;
877 if (cb->buffer) {
878 constant[i] =
879 (const float *)(swr_resource_data(cb->buffer) +
880 cb->buffer_offset);
881 } else {
882 /* Need to copy these constants to scratch space */
883 if (cb->user_buffer && cb->buffer_size) {
884 const void *ptr =
885 ((const uint8_t *)cb->user_buffer + cb->buffer_offset);
886 uint32_t size = AlignUp(cb->buffer_size, 4);
887 ptr = swr_copy_to_scratch_space(ctx, scratch, ptr, size);
888 constant[i] = (const float *)ptr;
889 }
890 }
891 }
892 }
893
894 static bool
895 swr_change_rt(struct swr_context *ctx,
896 unsigned attachment,
897 const struct pipe_surface *sf)
898 {
899 swr_draw_context *pDC = &ctx->swrDC;
900 struct SWR_SURFACE_STATE *rt = &pDC->renderTargets[attachment];
901
902 /* Do nothing if the render target hasn't changed */
903 if ((!sf || !sf->texture) && rt->pBaseAddress == nullptr)
904 return false;
905
906 /* Deal with disabling RT up front */
907 if (!sf || !sf->texture) {
908 /* If detaching attachment, mark tiles as RESOLVED so core
909 * won't try to load from non-existent target. */
910 swr_store_render_target(&ctx->pipe, attachment, SWR_TILE_RESOLVED);
911 *rt = {0};
912 return true;
913 }
914
915 const struct swr_resource *swr = swr_resource(sf->texture);
916 const SWR_SURFACE_STATE *swr_surface = &swr->swr;
917 SWR_FORMAT fmt = mesa_to_swr_format(sf->format);
918
919 if (attachment == SWR_ATTACHMENT_STENCIL && swr->secondary.pBaseAddress) {
920 swr_surface = &swr->secondary;
921 fmt = swr_surface->format;
922 }
923
924 if (rt->pBaseAddress == swr_surface->pBaseAddress &&
925 rt->format == fmt &&
926 rt->lod == sf->u.tex.level &&
927 rt->arrayIndex == sf->u.tex.first_layer)
928 return false;
929
930 bool need_fence = false;
931
932 /* StoreTile for changed target */
933 if (rt->pBaseAddress) {
934 /* If changing attachment to a new target, mark tiles as
935 * INVALID so they are reloaded from surface. */
936 swr_store_render_target(&ctx->pipe, attachment, SWR_TILE_INVALID);
937 need_fence = true;
938 } else {
939 /* if no previous attachment, invalidate tiles that may be marked
940 * RESOLVED because of an old attachment */
941 swr_invalidate_render_target(&ctx->pipe, attachment, sf->width, sf->height);
942 /* no need to set fence here */
943 }
944
945 /* Make new attachment */
946 *rt = *swr_surface;
947 rt->format = fmt;
948 rt->lod = sf->u.tex.level;
949 rt->arrayIndex = sf->u.tex.first_layer;
950
951 return need_fence;
952 }
953
954 static inline void
955 swr_user_vbuf_range(const struct pipe_draw_info *info,
956 const struct swr_vertex_element_state *velems,
957 const struct pipe_vertex_buffer *vb,
958 uint32_t i,
959 uint32_t *totelems,
960 uint32_t *base,
961 uint32_t *size)
962 {
963 /* FIXME: The size is too large - we don't access the full extra stride. */
964 unsigned elems;
965 if (velems->instanced_bufs & (1U << i)) {
966 elems = info->instance_count / velems->min_instance_div[i] + 1;
967 *totelems = info->start_instance + elems;
968 *base = info->start_instance * vb->stride;
969 *size = elems * vb->stride;
970 } else if (vb->stride) {
971 elems = info->max_index - info->min_index + 1;
972 *totelems = info->max_index + 1;
973 *base = info->min_index * vb->stride;
974 *size = elems * vb->stride;
975 } else {
976 *totelems = 1;
977 *base = 0;
978 *size = velems->stream_pitch[i];
979 }
980 }
981
982 static void
983 swr_update_poly_stipple(struct swr_context *ctx)
984 {
985 struct swr_draw_context *pDC = &ctx->swrDC;
986
987 assert(sizeof(ctx->poly_stipple.pipe.stipple) == sizeof(pDC->polyStipple));
988 memcpy(pDC->polyStipple,
989 ctx->poly_stipple.pipe.stipple,
990 sizeof(ctx->poly_stipple.pipe.stipple));
991 }
992
993 void
994 swr_update_derived(struct pipe_context *pipe,
995 const struct pipe_draw_info *p_draw_info)
996 {
997 struct swr_context *ctx = swr_context(pipe);
998 struct swr_screen *screen = swr_screen(pipe->screen);
999
1000 /* When called from swr_clear (p_draw_info = null), set any null
1001 * state-objects to the dummy state objects to prevent nullptr dereference
1002 * in validation below.
1003 *
1004 * Important that this remains static for zero initialization. These
1005 * aren't meant to be proper state objects, just empty structs. They will
1006 * not be written to.
1007 *
1008 * Shaders can't be part of the union since they contain std::unordered_map
1009 */
1010 static struct {
1011 union {
1012 struct pipe_rasterizer_state rasterizer;
1013 struct pipe_depth_stencil_alpha_state depth_stencil;
1014 struct swr_blend_state blend;
1015 } state;
1016 struct swr_vertex_shader vs;
1017 struct swr_fragment_shader fs;
1018 } swr_dummy;
1019
1020 if (!p_draw_info) {
1021 if (!ctx->rasterizer)
1022 ctx->rasterizer = &swr_dummy.state.rasterizer;
1023 if (!ctx->depth_stencil)
1024 ctx->depth_stencil = &swr_dummy.state.depth_stencil;
1025 if (!ctx->blend)
1026 ctx->blend = &swr_dummy.state.blend;
1027 if (!ctx->vs)
1028 ctx->vs = &swr_dummy.vs;
1029 if (!ctx->fs)
1030 ctx->fs = &swr_dummy.fs;
1031 }
1032
1033 /* Update screen->pipe to current pipe context. */
1034 if (screen->pipe != pipe)
1035 screen->pipe = pipe;
1036
1037 /* Any state that requires dirty flags to be re-triggered sets this mask */
1038 /* For example, user_buffer vertex and index buffers. */
1039 unsigned post_update_dirty_flags = 0;
1040
1041 /* Render Targets */
1042 if (ctx->dirty & SWR_NEW_FRAMEBUFFER) {
1043 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
1044 const struct util_format_description *desc = NULL;
1045 bool need_fence = false;
1046
1047 /* colorbuffer targets */
1048 if (fb->nr_cbufs) {
1049 for (unsigned i = 0; i < fb->nr_cbufs; ++i)
1050 need_fence |= swr_change_rt(
1051 ctx, SWR_ATTACHMENT_COLOR0 + i, fb->cbufs[i]);
1052 }
1053 for (unsigned i = fb->nr_cbufs; i < SWR_NUM_RENDERTARGETS; ++i)
1054 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_COLOR0 + i, NULL);
1055
1056 /* depth/stencil target */
1057 if (fb->zsbuf)
1058 desc = util_format_description(fb->zsbuf->format);
1059 if (fb->zsbuf && util_format_has_depth(desc))
1060 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_DEPTH, fb->zsbuf);
1061 else
1062 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_DEPTH, NULL);
1063
1064 if (fb->zsbuf && util_format_has_stencil(desc))
1065 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_STENCIL, fb->zsbuf);
1066 else
1067 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_STENCIL, NULL);
1068
1069 /* This fence ensures any attachment changes are resolved before the
1070 * next draw */
1071 if (need_fence)
1072 swr_fence_submit(ctx, screen->flush_fence);
1073 }
1074
1075 /* Raster state */
1076 if (ctx->dirty & (SWR_NEW_RASTERIZER |
1077 SWR_NEW_VS | // clipping
1078 SWR_NEW_FRAMEBUFFER)) {
1079 pipe_rasterizer_state *rasterizer = ctx->rasterizer;
1080 pipe_framebuffer_state *fb = &ctx->framebuffer;
1081
1082 SWR_RASTSTATE *rastState = &ctx->derived.rastState;
1083 rastState->cullMode = swr_convert_cull_mode(rasterizer->cull_face);
1084 rastState->frontWinding = rasterizer->front_ccw
1085 ? SWR_FRONTWINDING_CCW
1086 : SWR_FRONTWINDING_CW;
1087 rastState->scissorEnable = rasterizer->scissor;
1088 rastState->pointSize = rasterizer->point_size > 0.0f
1089 ? rasterizer->point_size
1090 : 1.0f;
1091 rastState->lineWidth = rasterizer->line_width > 0.0f
1092 ? rasterizer->line_width
1093 : 1.0f;
1094
1095 rastState->pointParam = rasterizer->point_size_per_vertex;
1096
1097 rastState->pointSpriteEnable = rasterizer->sprite_coord_enable;
1098 rastState->pointSpriteTopOrigin =
1099 rasterizer->sprite_coord_mode == PIPE_SPRITE_COORD_UPPER_LEFT;
1100
1101 /* If SWR_MSAA_FORCE_ENABLE is set, turn msaa on */
1102 if (screen->msaa_force_enable && !rasterizer->multisample) {
1103 /* Force enable and use the value the surface was created with */
1104 rasterizer->multisample = true;
1105 fb->samples = swr_resource(fb->cbufs[0]->texture)->swr.numSamples;
1106 fprintf(stderr,"msaa force enable: %d samples\n", fb->samples);
1107 }
1108
1109 rastState->sampleCount = GetSampleCount(fb->samples);
1110 rastState->forcedSampleCount = false;
1111 rastState->bIsCenterPattern = !rasterizer->multisample;
1112 rastState->pixelLocation = SWR_PIXEL_LOCATION_CENTER;
1113
1114 /* Only initialize sample positions if msaa is enabled */
1115 if (rasterizer->multisample) {
1116 for (uint32_t i = 0; i < fb->samples; i++) {
1117 const uint8_t *sample = swr_sample_positions[fb->samples-1 + i];
1118 rastState->samplePositions.SetXi(i, sample[0] << 4);
1119 rastState->samplePositions.SetYi(i, sample[1] << 4);
1120 rastState->samplePositions.SetX (i, sample[0] / 16.0f);
1121 rastState->samplePositions.SetY (i, sample[1] / 16.0f);
1122 }
1123 rastState->samplePositions.PrecalcSampleData(fb->samples);
1124 }
1125
1126 bool do_offset = false;
1127 switch (rasterizer->fill_front) {
1128 case PIPE_POLYGON_MODE_FILL:
1129 do_offset = rasterizer->offset_tri;
1130 break;
1131 case PIPE_POLYGON_MODE_LINE:
1132 do_offset = rasterizer->offset_line;
1133 break;
1134 case PIPE_POLYGON_MODE_POINT:
1135 do_offset = rasterizer->offset_point;
1136 break;
1137 }
1138
1139 if (do_offset) {
1140 rastState->depthBias = rasterizer->offset_units;
1141 rastState->slopeScaledDepthBias = rasterizer->offset_scale;
1142 rastState->depthBiasClamp = rasterizer->offset_clamp;
1143 } else {
1144 rastState->depthBias = 0;
1145 rastState->slopeScaledDepthBias = 0;
1146 rastState->depthBiasClamp = 0;
1147 }
1148
1149 /* translate polygon mode, at least for the front==back case */
1150 rastState->fillMode = swr_convert_fill_mode(rasterizer->fill_front);
1151
1152 struct pipe_surface *zb = fb->zsbuf;
1153 if (zb && swr_resource(zb->texture)->has_depth)
1154 rastState->depthFormat = swr_resource(zb->texture)->swr.format;
1155
1156 rastState->depthClipEnable = rasterizer->depth_clip;
1157 rastState->clipHalfZ = rasterizer->clip_halfz;
1158
1159 rastState->clipDistanceMask =
1160 ctx->vs->info.base.num_written_clipdistance ?
1161 ctx->vs->info.base.clipdist_writemask & rasterizer->clip_plane_enable :
1162 rasterizer->clip_plane_enable;
1163
1164 rastState->cullDistanceMask =
1165 ctx->vs->info.base.culldist_writemask << ctx->vs->info.base.num_written_clipdistance;
1166
1167 SwrSetRastState(ctx->swrContext, rastState);
1168 }
1169
1170 /* Scissor */
1171 if (ctx->dirty & SWR_NEW_SCISSOR) {
1172 SwrSetScissorRects(ctx->swrContext, 1, &ctx->swr_scissor);
1173 }
1174
1175 /* Viewport */
1176 if (ctx->dirty & (SWR_NEW_VIEWPORT | SWR_NEW_FRAMEBUFFER
1177 | SWR_NEW_RASTERIZER)) {
1178 pipe_viewport_state *state = &ctx->viewport;
1179 pipe_framebuffer_state *fb = &ctx->framebuffer;
1180 pipe_rasterizer_state *rasterizer = ctx->rasterizer;
1181
1182 SWR_VIEWPORT *vp = &ctx->derived.vp;
1183 SWR_VIEWPORT_MATRICES *vpm = &ctx->derived.vpm;
1184
1185 vp->x = state->translate[0] - state->scale[0];
1186 vp->width = 2 * state->scale[0];
1187 vp->y = state->translate[1] - fabs(state->scale[1]);
1188 vp->height = 2 * fabs(state->scale[1]);
1189 util_viewport_zmin_zmax(state, rasterizer->clip_halfz,
1190 &vp->minZ, &vp->maxZ);
1191
1192 vpm->m00[0] = state->scale[0];
1193 vpm->m11[0] = state->scale[1];
1194 vpm->m22[0] = state->scale[2];
1195 vpm->m30[0] = state->translate[0];
1196 vpm->m31[0] = state->translate[1];
1197 vpm->m32[0] = state->translate[2];
1198
1199 /* Now that the matrix is calculated, clip the view coords to screen
1200 * size. OpenGL allows for -ve x,y in the viewport. */
1201 if (vp->x < 0.0f) {
1202 vp->width += vp->x;
1203 vp->x = 0.0f;
1204 }
1205 if (vp->y < 0.0f) {
1206 vp->height += vp->y;
1207 vp->y = 0.0f;
1208 }
1209 vp->width = std::min(vp->width, (float)fb->width - vp->x);
1210 vp->height = std::min(vp->height, (float)fb->height - vp->y);
1211
1212 SwrSetViewports(ctx->swrContext, 1, vp, vpm);
1213 }
1214
1215 /* Set vertex & index buffers
1216 * (using draw info if called by swr_draw_vbo)
1217 * If indexed draw, revalidate since index buffer comes from
1218 * pipe_draw_info.
1219 */
1220 if (ctx->dirty & SWR_NEW_VERTEX ||
1221 (p_draw_info && p_draw_info->index_size)) {
1222 uint32_t scratch_total;
1223 uint8_t *scratch = NULL;
1224
1225 /* If being called by swr_draw_vbo, copy draw details */
1226 struct pipe_draw_info info = {0};
1227 if (p_draw_info)
1228 info = *p_draw_info;
1229
1230 /* We must get all the scratch space in one go */
1231 scratch_total = 0;
1232 for (UINT i = 0; i < ctx->num_vertex_buffers; i++) {
1233 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
1234
1235 if (!vb->is_user_buffer)
1236 continue;
1237
1238 uint32_t elems, base, size;
1239 swr_user_vbuf_range(&info, ctx->velems, vb, i, &elems, &base, &size);
1240 scratch_total += AlignUp(size, 4);
1241 }
1242
1243 if (scratch_total) {
1244 scratch = (uint8_t *)swr_copy_to_scratch_space(
1245 ctx, &ctx->scratch->vertex_buffer, NULL, scratch_total);
1246 }
1247
1248 /* vertex buffers */
1249 SWR_VERTEX_BUFFER_STATE swrVertexBuffers[PIPE_MAX_ATTRIBS];
1250 for (UINT i = 0; i < ctx->num_vertex_buffers; i++) {
1251 uint32_t size, pitch, elems, partial_inbounds;
1252 uint32_t min_vertex_index;
1253 const uint8_t *p_data;
1254 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
1255
1256 pitch = vb->stride;
1257 if (!vb->is_user_buffer) {
1258 /* VBO */
1259 if (!pitch) {
1260 /* If pitch=0 (ie vb->stride), buffer contains a single
1261 * constant attribute. Use the stream_pitch which was
1262 * calculated during creation of vertex_elements_state for the
1263 * size of the attribute. */
1264 size = ctx->velems->stream_pitch[i];
1265 elems = 1;
1266 partial_inbounds = 0;
1267 min_vertex_index = 0;
1268 } else {
1269 /* size is based on buffer->width0 rather than info.max_index
1270 * to prevent having to validate VBO on each draw. */
1271 size = vb->buffer.resource->width0;
1272 elems = size / pitch;
1273 partial_inbounds = size % pitch;
1274 min_vertex_index = 0;
1275 }
1276
1277 p_data = swr_resource_data(vb->buffer.resource) + vb->buffer_offset;
1278 } else {
1279 /* Client buffer
1280 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
1281 * revalidate on each draw */
1282 post_update_dirty_flags |= SWR_NEW_VERTEX;
1283
1284 uint32_t base;
1285 swr_user_vbuf_range(&info, ctx->velems, vb, i, &elems, &base, &size);
1286 partial_inbounds = 0;
1287 min_vertex_index = info.min_index;
1288
1289 /* Copy only needed vertices to scratch space */
1290 size = AlignUp(size, 4);
1291 const void *ptr = (const uint8_t *) vb->buffer.user + base;
1292 memcpy(scratch, ptr, size);
1293 ptr = scratch;
1294 scratch += size;
1295 p_data = (const uint8_t *)ptr - base;
1296 }
1297
1298 swrVertexBuffers[i] = {0};
1299 swrVertexBuffers[i].index = i;
1300 swrVertexBuffers[i].pitch = pitch;
1301 swrVertexBuffers[i].pData = p_data;
1302 swrVertexBuffers[i].size = size;
1303 swrVertexBuffers[i].minVertex = min_vertex_index;
1304 swrVertexBuffers[i].maxVertex = elems;
1305 swrVertexBuffers[i].partialInboundsSize = partial_inbounds;
1306 }
1307
1308 SwrSetVertexBuffers(
1309 ctx->swrContext, ctx->num_vertex_buffers, swrVertexBuffers);
1310
1311 /* index buffer, if required (info passed in by swr_draw_vbo) */
1312 SWR_FORMAT index_type = R32_UINT; /* Default for non-indexed draws */
1313 if (info.index_size) {
1314 const uint8_t *p_data;
1315 uint32_t size, pitch;
1316
1317 pitch = p_draw_info->index_size ? p_draw_info->index_size : sizeof(uint32_t);
1318 index_type = swr_convert_index_type(pitch);
1319
1320 if (!info.has_user_indices) {
1321 /* VBO
1322 * size is based on buffer->width0 rather than info.count
1323 * to prevent having to validate VBO on each draw */
1324 size = info.index.resource->width0;
1325 p_data = swr_resource_data(info.index.resource);
1326 } else {
1327 /* Client buffer
1328 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
1329 * revalidate on each draw */
1330 post_update_dirty_flags |= SWR_NEW_VERTEX;
1331
1332 size = info.count * pitch;
1333 size = AlignUp(size, 4);
1334
1335 /* Copy indices to scratch space */
1336 const void *ptr = info.index.user;
1337 ptr = swr_copy_to_scratch_space(
1338 ctx, &ctx->scratch->index_buffer, ptr, size);
1339 p_data = (const uint8_t *)ptr;
1340 }
1341
1342 SWR_INDEX_BUFFER_STATE swrIndexBuffer;
1343 swrIndexBuffer.format = swr_convert_index_type(p_draw_info->index_size);
1344 swrIndexBuffer.pIndices = p_data;
1345 swrIndexBuffer.size = size;
1346
1347 SwrSetIndexBuffer(ctx->swrContext, &swrIndexBuffer);
1348 }
1349
1350 struct swr_vertex_element_state *velems = ctx->velems;
1351 if (velems && velems->fsState.indexType != index_type) {
1352 velems->fsFunc = NULL;
1353 velems->fsState.indexType = index_type;
1354 }
1355 }
1356
1357 /* GeometryShader */
1358 if (ctx->dirty & (SWR_NEW_GS |
1359 SWR_NEW_VS |
1360 SWR_NEW_SAMPLER |
1361 SWR_NEW_SAMPLER_VIEW)) {
1362 if (ctx->gs) {
1363 swr_jit_gs_key key;
1364 swr_generate_gs_key(key, ctx, ctx->gs);
1365 auto search = ctx->gs->map.find(key);
1366 PFN_GS_FUNC func;
1367 if (search != ctx->gs->map.end()) {
1368 func = search->second->shader;
1369 } else {
1370 func = swr_compile_gs(ctx, key);
1371 }
1372 SwrSetGsFunc(ctx->swrContext, func);
1373
1374 /* JIT sampler state */
1375 if (ctx->dirty & SWR_NEW_SAMPLER) {
1376 swr_update_sampler_state(ctx,
1377 PIPE_SHADER_GEOMETRY,
1378 key.nr_samplers,
1379 ctx->swrDC.samplersGS);
1380 }
1381
1382 /* JIT sampler view state */
1383 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1384 swr_update_texture_state(ctx,
1385 PIPE_SHADER_GEOMETRY,
1386 key.nr_sampler_views,
1387 ctx->swrDC.texturesGS);
1388 }
1389
1390 SwrSetGsState(ctx->swrContext, &ctx->gs->gsState);
1391 } else {
1392 SWR_GS_STATE state = { 0 };
1393 SwrSetGsState(ctx->swrContext, &state);
1394 SwrSetGsFunc(ctx->swrContext, NULL);
1395 }
1396 }
1397
1398 /* VertexShader */
1399 if (ctx->dirty & (SWR_NEW_VS |
1400 SWR_NEW_RASTERIZER | // for clip planes
1401 SWR_NEW_SAMPLER |
1402 SWR_NEW_SAMPLER_VIEW |
1403 SWR_NEW_FRAMEBUFFER)) {
1404 swr_jit_vs_key key;
1405 swr_generate_vs_key(key, ctx, ctx->vs);
1406 auto search = ctx->vs->map.find(key);
1407 PFN_VERTEX_FUNC func;
1408 if (search != ctx->vs->map.end()) {
1409 func = search->second->shader;
1410 } else {
1411 func = swr_compile_vs(ctx, key);
1412 }
1413 SwrSetVertexFunc(ctx->swrContext, func);
1414
1415 /* JIT sampler state */
1416 if (ctx->dirty & SWR_NEW_SAMPLER) {
1417 swr_update_sampler_state(ctx,
1418 PIPE_SHADER_VERTEX,
1419 key.nr_samplers,
1420 ctx->swrDC.samplersVS);
1421 }
1422
1423 /* JIT sampler view state */
1424 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1425 swr_update_texture_state(ctx,
1426 PIPE_SHADER_VERTEX,
1427 key.nr_sampler_views,
1428 ctx->swrDC.texturesVS);
1429 }
1430 }
1431
1432 /* work around the fact that poly stipple also affects lines */
1433 /* and points, since we rasterize them as triangles, too */
1434 /* Has to be before fragment shader, since it sets SWR_NEW_FS */
1435 if (p_draw_info) {
1436 bool new_prim_is_poly =
1437 (u_reduced_prim(p_draw_info->mode) == PIPE_PRIM_TRIANGLES) &&
1438 (ctx->derived.rastState.fillMode == SWR_FILLMODE_SOLID);
1439 if (new_prim_is_poly != ctx->poly_stipple.prim_is_poly) {
1440 ctx->dirty |= SWR_NEW_FS;
1441 ctx->poly_stipple.prim_is_poly = new_prim_is_poly;
1442 }
1443 }
1444
1445 /* FragmentShader */
1446 if (ctx->dirty & (SWR_NEW_FS |
1447 SWR_NEW_VS |
1448 SWR_NEW_GS |
1449 SWR_NEW_RASTERIZER |
1450 SWR_NEW_SAMPLER |
1451 SWR_NEW_SAMPLER_VIEW |
1452 SWR_NEW_FRAMEBUFFER)) {
1453 swr_jit_fs_key key;
1454 swr_generate_fs_key(key, ctx, ctx->fs);
1455 auto search = ctx->fs->map.find(key);
1456 PFN_PIXEL_KERNEL func;
1457 if (search != ctx->fs->map.end()) {
1458 func = search->second->shader;
1459 } else {
1460 func = swr_compile_fs(ctx, key);
1461 }
1462 SWR_PS_STATE psState = {0};
1463 psState.pfnPixelShader = func;
1464 psState.killsPixel = ctx->fs->info.base.uses_kill;
1465 psState.inputCoverage = SWR_INPUT_COVERAGE_NORMAL;
1466 psState.writesODepth = ctx->fs->info.base.writes_z;
1467 psState.usesSourceDepth = ctx->fs->info.base.reads_z;
1468 psState.shadingRate = SWR_SHADING_RATE_PIXEL;
1469 psState.numRenderTargets = ctx->framebuffer.nr_cbufs;
1470 psState.posOffset = SWR_PS_POSITION_SAMPLE_NONE;
1471 uint32_t barycentricsMask = 0;
1472 #if 0
1473 // when we switch to mesa-master
1474 if (ctx->fs->info.base.uses_persp_center ||
1475 ctx->fs->info.base.uses_linear_center)
1476 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1477 if (ctx->fs->info.base.uses_persp_centroid ||
1478 ctx->fs->info.base.uses_linear_centroid)
1479 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1480 if (ctx->fs->info.base.uses_persp_sample ||
1481 ctx->fs->info.base.uses_linear_sample)
1482 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1483 #else
1484 for (unsigned i = 0; i < ctx->fs->info.base.num_inputs; i++) {
1485 switch (ctx->fs->info.base.input_interpolate_loc[i]) {
1486 case TGSI_INTERPOLATE_LOC_CENTER:
1487 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1488 break;
1489 case TGSI_INTERPOLATE_LOC_CENTROID:
1490 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1491 break;
1492 case TGSI_INTERPOLATE_LOC_SAMPLE:
1493 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1494 break;
1495 }
1496 }
1497 #endif
1498 psState.barycentricsMask = barycentricsMask;
1499 psState.usesUAV = false; // XXX
1500 psState.forceEarlyZ = false;
1501 SwrSetPixelShaderState(ctx->swrContext, &psState);
1502
1503 /* JIT sampler state */
1504 if (ctx->dirty & (SWR_NEW_SAMPLER |
1505 SWR_NEW_FS)) {
1506 swr_update_sampler_state(ctx,
1507 PIPE_SHADER_FRAGMENT,
1508 key.nr_samplers,
1509 ctx->swrDC.samplersFS);
1510 }
1511
1512 /* JIT sampler view state */
1513 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW |
1514 SWR_NEW_FRAMEBUFFER |
1515 SWR_NEW_FS)) {
1516 swr_update_texture_state(ctx,
1517 PIPE_SHADER_FRAGMENT,
1518 key.nr_sampler_views,
1519 ctx->swrDC.texturesFS);
1520 }
1521 }
1522
1523
1524 /* VertexShader Constants */
1525 if (ctx->dirty & SWR_NEW_VSCONSTANTS) {
1526 swr_update_constants(ctx, PIPE_SHADER_VERTEX);
1527 }
1528
1529 /* FragmentShader Constants */
1530 if (ctx->dirty & SWR_NEW_FSCONSTANTS) {
1531 swr_update_constants(ctx, PIPE_SHADER_FRAGMENT);
1532 }
1533
1534 /* GeometryShader Constants */
1535 if (ctx->dirty & SWR_NEW_GSCONSTANTS) {
1536 swr_update_constants(ctx, PIPE_SHADER_GEOMETRY);
1537 }
1538
1539 /* Depth/stencil state */
1540 if (ctx->dirty & (SWR_NEW_DEPTH_STENCIL_ALPHA | SWR_NEW_FRAMEBUFFER)) {
1541 struct pipe_depth_state *depth = &(ctx->depth_stencil->depth);
1542 struct pipe_stencil_state *stencil = ctx->depth_stencil->stencil;
1543 SWR_DEPTH_STENCIL_STATE depthStencilState = {{0}};
1544 SWR_DEPTH_BOUNDS_STATE depthBoundsState = {0};
1545
1546 /* XXX, incomplete. Need to flesh out stencil & alpha test state
1547 struct pipe_stencil_state *front_stencil =
1548 ctx->depth_stencil.stencil[0];
1549 struct pipe_stencil_state *back_stencil = ctx->depth_stencil.stencil[1];
1550 struct pipe_alpha_state alpha;
1551 */
1552 if (stencil[0].enabled) {
1553 depthStencilState.stencilWriteEnable = 1;
1554 depthStencilState.stencilTestEnable = 1;
1555 depthStencilState.stencilTestFunc =
1556 swr_convert_depth_func(stencil[0].func);
1557
1558 depthStencilState.stencilPassDepthPassOp =
1559 swr_convert_stencil_op(stencil[0].zpass_op);
1560 depthStencilState.stencilPassDepthFailOp =
1561 swr_convert_stencil_op(stencil[0].zfail_op);
1562 depthStencilState.stencilFailOp =
1563 swr_convert_stencil_op(stencil[0].fail_op);
1564 depthStencilState.stencilWriteMask = stencil[0].writemask;
1565 depthStencilState.stencilTestMask = stencil[0].valuemask;
1566 depthStencilState.stencilRefValue = ctx->stencil_ref.ref_value[0];
1567 }
1568 if (stencil[1].enabled) {
1569 depthStencilState.doubleSidedStencilTestEnable = 1;
1570
1571 depthStencilState.backfaceStencilTestFunc =
1572 swr_convert_depth_func(stencil[1].func);
1573
1574 depthStencilState.backfaceStencilPassDepthPassOp =
1575 swr_convert_stencil_op(stencil[1].zpass_op);
1576 depthStencilState.backfaceStencilPassDepthFailOp =
1577 swr_convert_stencil_op(stencil[1].zfail_op);
1578 depthStencilState.backfaceStencilFailOp =
1579 swr_convert_stencil_op(stencil[1].fail_op);
1580 depthStencilState.backfaceStencilWriteMask = stencil[1].writemask;
1581 depthStencilState.backfaceStencilTestMask = stencil[1].valuemask;
1582
1583 depthStencilState.backfaceStencilRefValue =
1584 ctx->stencil_ref.ref_value[1];
1585 }
1586
1587 depthStencilState.depthTestEnable = depth->enabled;
1588 depthStencilState.depthTestFunc = swr_convert_depth_func(depth->func);
1589 depthStencilState.depthWriteEnable = depth->writemask;
1590 SwrSetDepthStencilState(ctx->swrContext, &depthStencilState);
1591
1592 depthBoundsState.depthBoundsTestEnable = depth->bounds_test;
1593 depthBoundsState.depthBoundsTestMinValue = depth->bounds_min;
1594 depthBoundsState.depthBoundsTestMaxValue = depth->bounds_max;
1595 SwrSetDepthBoundsState(ctx->swrContext, &depthBoundsState);
1596 }
1597
1598 /* Blend State */
1599 if (ctx->dirty & (SWR_NEW_BLEND |
1600 SWR_NEW_RASTERIZER |
1601 SWR_NEW_FRAMEBUFFER |
1602 SWR_NEW_DEPTH_STENCIL_ALPHA)) {
1603 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
1604
1605 SWR_BLEND_STATE blendState;
1606 memcpy(&blendState, &ctx->blend->blendState, sizeof(blendState));
1607 blendState.constantColor[0] = ctx->blend_color.color[0];
1608 blendState.constantColor[1] = ctx->blend_color.color[1];
1609 blendState.constantColor[2] = ctx->blend_color.color[2];
1610 blendState.constantColor[3] = ctx->blend_color.color[3];
1611 blendState.alphaTestReference =
1612 *((uint32_t*)&ctx->depth_stencil->alpha.ref_value);
1613
1614 blendState.sampleMask = ctx->sample_mask;
1615 blendState.sampleCount = GetSampleCount(fb->samples);
1616
1617 /* If there are no color buffers bound, disable writes on RT0
1618 * and skip loop */
1619 if (fb->nr_cbufs == 0) {
1620 blendState.renderTarget[0].writeDisableRed = 1;
1621 blendState.renderTarget[0].writeDisableGreen = 1;
1622 blendState.renderTarget[0].writeDisableBlue = 1;
1623 blendState.renderTarget[0].writeDisableAlpha = 1;
1624 SwrSetBlendFunc(ctx->swrContext, 0, NULL);
1625 }
1626 else
1627 for (int target = 0;
1628 target < std::min(SWR_NUM_RENDERTARGETS,
1629 PIPE_MAX_COLOR_BUFS);
1630 target++) {
1631 if (!fb->cbufs[target])
1632 continue;
1633
1634 struct swr_resource *colorBuffer =
1635 swr_resource(fb->cbufs[target]->texture);
1636
1637 BLEND_COMPILE_STATE compileState;
1638 memset(&compileState, 0, sizeof(compileState));
1639 compileState.format = colorBuffer->swr.format;
1640 memcpy(&compileState.blendState,
1641 &ctx->blend->compileState[target],
1642 sizeof(compileState.blendState));
1643
1644 const SWR_FORMAT_INFO& info = GetFormatInfo(compileState.format);
1645 if (compileState.blendState.logicOpEnable &&
1646 ((info.type[0] == SWR_TYPE_FLOAT) || info.isSRGB)) {
1647 compileState.blendState.logicOpEnable = false;
1648 }
1649
1650 if (info.type[0] == SWR_TYPE_SINT || info.type[0] == SWR_TYPE_UINT)
1651 compileState.blendState.blendEnable = false;
1652
1653 if (compileState.blendState.blendEnable == false &&
1654 compileState.blendState.logicOpEnable == false &&
1655 ctx->depth_stencil->alpha.enabled == 0) {
1656 SwrSetBlendFunc(ctx->swrContext, target, NULL);
1657 continue;
1658 }
1659
1660 compileState.desc.alphaTestEnable =
1661 ctx->depth_stencil->alpha.enabled;
1662 compileState.desc.independentAlphaBlendEnable =
1663 (compileState.blendState.sourceBlendFactor !=
1664 compileState.blendState.sourceAlphaBlendFactor) ||
1665 (compileState.blendState.destBlendFactor !=
1666 compileState.blendState.destAlphaBlendFactor) ||
1667 (compileState.blendState.colorBlendFunc !=
1668 compileState.blendState.alphaBlendFunc);
1669 compileState.desc.alphaToCoverageEnable =
1670 ctx->blend->pipe.alpha_to_coverage;
1671 compileState.desc.sampleMaskEnable = (blendState.sampleMask != 0);
1672 compileState.desc.numSamples = fb->samples;
1673
1674 compileState.alphaTestFunction =
1675 swr_convert_depth_func(ctx->depth_stencil->alpha.func);
1676 compileState.alphaTestFormat = ALPHA_TEST_FLOAT32; // xxx
1677
1678 compileState.Canonicalize();
1679
1680 PFN_BLEND_JIT_FUNC func = NULL;
1681 auto search = ctx->blendJIT->find(compileState);
1682 if (search != ctx->blendJIT->end()) {
1683 func = search->second;
1684 } else {
1685 HANDLE hJitMgr = screen->hJitMgr;
1686 func = JitCompileBlend(hJitMgr, compileState);
1687 debug_printf("BLEND shader %p\n", func);
1688 assert(func && "Error: BlendShader = NULL");
1689
1690 ctx->blendJIT->insert(std::make_pair(compileState, func));
1691 }
1692 SwrSetBlendFunc(ctx->swrContext, target, func);
1693 }
1694
1695 SwrSetBlendState(ctx->swrContext, &blendState);
1696 }
1697
1698 if (ctx->dirty & SWR_NEW_STIPPLE) {
1699 swr_update_poly_stipple(ctx);
1700 }
1701
1702 if (ctx->dirty & (SWR_NEW_VS | SWR_NEW_SO | SWR_NEW_RASTERIZER)) {
1703 ctx->vs->soState.rasterizerDisable =
1704 ctx->rasterizer->rasterizer_discard;
1705 SwrSetSoState(ctx->swrContext, &ctx->vs->soState);
1706
1707 pipe_stream_output_info *stream_output = &ctx->vs->pipe.stream_output;
1708
1709 for (uint32_t i = 0; i < ctx->num_so_targets; i++) {
1710 SWR_STREAMOUT_BUFFER buffer = {0};
1711 if (!ctx->so_targets[i])
1712 continue;
1713 buffer.enable = true;
1714 buffer.pBuffer =
1715 (uint32_t *)(swr_resource_data(ctx->so_targets[i]->buffer) +
1716 ctx->so_targets[i]->buffer_offset);
1717 buffer.bufferSize = ctx->so_targets[i]->buffer_size >> 2;
1718 buffer.pitch = stream_output->stride[i];
1719 buffer.streamOffset = 0;
1720
1721 SwrSetSoBuffers(ctx->swrContext, &buffer, i);
1722 }
1723 }
1724
1725 if (ctx->dirty & (SWR_NEW_CLIP | SWR_NEW_RASTERIZER | SWR_NEW_VS)) {
1726 // shader exporting clip distances overrides all user clip planes
1727 if (ctx->rasterizer->clip_plane_enable &&
1728 !ctx->vs->info.base.num_written_clipdistance)
1729 {
1730 swr_draw_context *pDC = &ctx->swrDC;
1731 memcpy(pDC->userClipPlanes,
1732 ctx->clip.ucp,
1733 sizeof(pDC->userClipPlanes));
1734 }
1735 }
1736
1737 // set up backend state
1738 SWR_BACKEND_STATE backendState = {0};
1739 if (ctx->gs) {
1740 backendState.numAttributes = ctx->gs->info.base.num_outputs - 1;
1741 } else {
1742 backendState.numAttributes = ctx->vs->info.base.num_outputs - 1;
1743 if (ctx->fs->info.base.uses_primid) {
1744 backendState.numAttributes++;
1745 backendState.swizzleEnable = true;
1746 for (unsigned i = 0; i < sizeof(backendState.numComponents); i++) {
1747 backendState.swizzleMap[i].sourceAttrib = i;
1748 }
1749 backendState.swizzleMap[ctx->vs->info.base.num_outputs - 1].constantSource =
1750 SWR_CONSTANT_SOURCE_PRIM_ID;
1751 backendState.swizzleMap[ctx->vs->info.base.num_outputs - 1].componentOverrideMask = 1;
1752 }
1753 }
1754 if (ctx->rasterizer->sprite_coord_enable)
1755 backendState.numAttributes++;
1756
1757 backendState.numAttributes = std::min((size_t)backendState.numAttributes,
1758 sizeof(backendState.numComponents));
1759 for (unsigned i = 0; i < backendState.numAttributes; i++)
1760 backendState.numComponents[i] = 4;
1761 backendState.constantInterpolationMask = ctx->fs->constantMask |
1762 (ctx->rasterizer->flatshade ? ctx->fs->flatConstantMask : 0);
1763 backendState.pointSpriteTexCoordMask = ctx->fs->pointSpriteMask;
1764
1765 struct tgsi_shader_info *pLastFE =
1766 ctx->gs ?
1767 &ctx->gs->info.base :
1768 &ctx->vs->info.base;
1769 backendState.readRenderTargetArrayIndex = pLastFE->writes_layer;
1770 backendState.readViewportArrayIndex = pLastFE->writes_viewport_index;
1771
1772 SwrSetBackendState(ctx->swrContext, &backendState);
1773
1774 /* Ensure that any in-progress attachment change StoreTiles finish */
1775 if (swr_is_fence_pending(screen->flush_fence))
1776 swr_fence_finish(pipe->screen, NULL, screen->flush_fence, 0);
1777
1778 /* Finally, update the in-use status of all resources involved in draw */
1779 swr_update_resource_status(pipe, p_draw_info);
1780
1781 ctx->dirty = post_update_dirty_flags;
1782 }
1783
1784
1785 static struct pipe_stream_output_target *
1786 swr_create_so_target(struct pipe_context *pipe,
1787 struct pipe_resource *buffer,
1788 unsigned buffer_offset,
1789 unsigned buffer_size)
1790 {
1791 struct pipe_stream_output_target *target;
1792
1793 target = CALLOC_STRUCT(pipe_stream_output_target);
1794 if (!target)
1795 return NULL;
1796
1797 target->context = pipe;
1798 target->reference.count = 1;
1799 pipe_resource_reference(&target->buffer, buffer);
1800 target->buffer_offset = buffer_offset;
1801 target->buffer_size = buffer_size;
1802 return target;
1803 }
1804
1805 static void
1806 swr_destroy_so_target(struct pipe_context *pipe,
1807 struct pipe_stream_output_target *target)
1808 {
1809 pipe_resource_reference(&target->buffer, NULL);
1810 FREE(target);
1811 }
1812
1813 static void
1814 swr_set_so_targets(struct pipe_context *pipe,
1815 unsigned num_targets,
1816 struct pipe_stream_output_target **targets,
1817 const unsigned *offsets)
1818 {
1819 struct swr_context *swr = swr_context(pipe);
1820 uint32_t i;
1821
1822 assert(num_targets <= MAX_SO_STREAMS);
1823
1824 for (i = 0; i < num_targets; i++) {
1825 pipe_so_target_reference(
1826 (struct pipe_stream_output_target **)&swr->so_targets[i],
1827 targets[i]);
1828 }
1829
1830 for (/* fall-through */; i < swr->num_so_targets; i++) {
1831 pipe_so_target_reference(
1832 (struct pipe_stream_output_target **)&swr->so_targets[i], NULL);
1833 }
1834
1835 swr->num_so_targets = num_targets;
1836
1837 swr->dirty |= SWR_NEW_SO;
1838 }
1839
1840
1841 void
1842 swr_state_init(struct pipe_context *pipe)
1843 {
1844 pipe->create_blend_state = swr_create_blend_state;
1845 pipe->bind_blend_state = swr_bind_blend_state;
1846 pipe->delete_blend_state = swr_delete_blend_state;
1847
1848 pipe->create_depth_stencil_alpha_state = swr_create_depth_stencil_state;
1849 pipe->bind_depth_stencil_alpha_state = swr_bind_depth_stencil_state;
1850 pipe->delete_depth_stencil_alpha_state = swr_delete_depth_stencil_state;
1851
1852 pipe->create_rasterizer_state = swr_create_rasterizer_state;
1853 pipe->bind_rasterizer_state = swr_bind_rasterizer_state;
1854 pipe->delete_rasterizer_state = swr_delete_rasterizer_state;
1855
1856 pipe->create_sampler_state = swr_create_sampler_state;
1857 pipe->bind_sampler_states = swr_bind_sampler_states;
1858 pipe->delete_sampler_state = swr_delete_sampler_state;
1859
1860 pipe->create_sampler_view = swr_create_sampler_view;
1861 pipe->set_sampler_views = swr_set_sampler_views;
1862 pipe->sampler_view_destroy = swr_sampler_view_destroy;
1863
1864 pipe->create_vs_state = swr_create_vs_state;
1865 pipe->bind_vs_state = swr_bind_vs_state;
1866 pipe->delete_vs_state = swr_delete_vs_state;
1867
1868 pipe->create_fs_state = swr_create_fs_state;
1869 pipe->bind_fs_state = swr_bind_fs_state;
1870 pipe->delete_fs_state = swr_delete_fs_state;
1871
1872 pipe->create_gs_state = swr_create_gs_state;
1873 pipe->bind_gs_state = swr_bind_gs_state;
1874 pipe->delete_gs_state = swr_delete_gs_state;
1875
1876 pipe->set_constant_buffer = swr_set_constant_buffer;
1877
1878 pipe->create_vertex_elements_state = swr_create_vertex_elements_state;
1879 pipe->bind_vertex_elements_state = swr_bind_vertex_elements_state;
1880 pipe->delete_vertex_elements_state = swr_delete_vertex_elements_state;
1881
1882 pipe->set_vertex_buffers = swr_set_vertex_buffers;
1883
1884 pipe->set_polygon_stipple = swr_set_polygon_stipple;
1885 pipe->set_clip_state = swr_set_clip_state;
1886 pipe->set_scissor_states = swr_set_scissor_states;
1887 pipe->set_viewport_states = swr_set_viewport_states;
1888
1889 pipe->set_framebuffer_state = swr_set_framebuffer_state;
1890
1891 pipe->set_blend_color = swr_set_blend_color;
1892 pipe->set_stencil_ref = swr_set_stencil_ref;
1893
1894 pipe->set_sample_mask = swr_set_sample_mask;
1895 pipe->get_sample_position = swr_get_sample_position;
1896
1897 pipe->create_stream_output_target = swr_create_so_target;
1898 pipe->stream_output_target_destroy = swr_destroy_so_target;
1899 pipe->set_stream_output_targets = swr_set_so_targets;
1900 }