swr: disable blending for integer formats
[mesa.git] / src / gallium / drivers / swr / swr_state.cpp
1 /****************************************************************************
2 * Copyright (C) 2015 Intel Corporation. All Rights Reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
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9 * Software is furnished to do so, subject to the following conditions:
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11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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23
24 // llvm redefines DEBUG
25 #pragma push_macro("DEBUG")
26 #undef DEBUG
27 #include "JitManager.h"
28 #pragma pop_macro("DEBUG")
29
30 #include "common/os.h"
31 #include "jit_api.h"
32 #include "state_llvm.h"
33
34 #include "gallivm/lp_bld_tgsi.h"
35 #include "util/u_format.h"
36
37 #include "util/u_memory.h"
38 #include "util/u_inlines.h"
39 #include "util/u_helpers.h"
40 #include "util/u_framebuffer.h"
41 #include "util/u_viewport.h"
42
43 #include "swr_state.h"
44 #include "swr_context.h"
45 #include "swr_context_llvm.h"
46 #include "swr_screen.h"
47 #include "swr_resource.h"
48 #include "swr_tex_sample.h"
49 #include "swr_scratch.h"
50 #include "swr_shader.h"
51 #include "swr_fence.h"
52
53 /* These should be pulled out into separate files as necessary
54 * Just initializing everything here to get going. */
55
56 static void *
57 swr_create_blend_state(struct pipe_context *pipe,
58 const struct pipe_blend_state *blend)
59 {
60 struct swr_blend_state *state = CALLOC_STRUCT(swr_blend_state);
61
62 memcpy(&state->pipe, blend, sizeof(*blend));
63
64 struct pipe_blend_state *pipe_blend = &state->pipe;
65
66 for (int target = 0;
67 target < std::min(SWR_NUM_RENDERTARGETS, PIPE_MAX_COLOR_BUFS);
68 target++) {
69
70 struct pipe_rt_blend_state *rt_blend = &pipe_blend->rt[target];
71 SWR_RENDER_TARGET_BLEND_STATE &blendState =
72 state->blendState.renderTarget[target];
73 RENDER_TARGET_BLEND_COMPILE_STATE &compileState =
74 state->compileState[target];
75
76 if (target != 0 && !pipe_blend->independent_blend_enable) {
77 memcpy(&compileState,
78 &state->compileState[0],
79 sizeof(RENDER_TARGET_BLEND_COMPILE_STATE));
80 continue;
81 }
82
83 compileState.blendEnable = rt_blend->blend_enable;
84 if (compileState.blendEnable) {
85 compileState.sourceAlphaBlendFactor =
86 swr_convert_blend_factor(rt_blend->alpha_src_factor);
87 compileState.destAlphaBlendFactor =
88 swr_convert_blend_factor(rt_blend->alpha_dst_factor);
89 compileState.sourceBlendFactor =
90 swr_convert_blend_factor(rt_blend->rgb_src_factor);
91 compileState.destBlendFactor =
92 swr_convert_blend_factor(rt_blend->rgb_dst_factor);
93
94 compileState.colorBlendFunc =
95 swr_convert_blend_func(rt_blend->rgb_func);
96 compileState.alphaBlendFunc =
97 swr_convert_blend_func(rt_blend->alpha_func);
98 }
99 compileState.logicOpEnable = state->pipe.logicop_enable;
100 if (compileState.logicOpEnable) {
101 compileState.logicOpFunc =
102 swr_convert_logic_op(state->pipe.logicop_func);
103 }
104
105 blendState.writeDisableRed =
106 (rt_blend->colormask & PIPE_MASK_R) ? 0 : 1;
107 blendState.writeDisableGreen =
108 (rt_blend->colormask & PIPE_MASK_G) ? 0 : 1;
109 blendState.writeDisableBlue =
110 (rt_blend->colormask & PIPE_MASK_B) ? 0 : 1;
111 blendState.writeDisableAlpha =
112 (rt_blend->colormask & PIPE_MASK_A) ? 0 : 1;
113
114 if (rt_blend->colormask == 0)
115 compileState.blendEnable = false;
116 }
117
118 return state;
119 }
120
121 static void
122 swr_bind_blend_state(struct pipe_context *pipe, void *blend)
123 {
124 struct swr_context *ctx = swr_context(pipe);
125
126 if (ctx->blend == blend)
127 return;
128
129 ctx->blend = (swr_blend_state *)blend;
130
131 ctx->dirty |= SWR_NEW_BLEND;
132 }
133
134 static void
135 swr_delete_blend_state(struct pipe_context *pipe, void *blend)
136 {
137 FREE(blend);
138 }
139
140 static void
141 swr_set_blend_color(struct pipe_context *pipe,
142 const struct pipe_blend_color *color)
143 {
144 struct swr_context *ctx = swr_context(pipe);
145
146 ctx->blend_color = *color;
147
148 ctx->dirty |= SWR_NEW_BLEND;
149 }
150
151 static void
152 swr_set_stencil_ref(struct pipe_context *pipe,
153 const struct pipe_stencil_ref *ref)
154 {
155 struct swr_context *ctx = swr_context(pipe);
156
157 ctx->stencil_ref = *ref;
158
159 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
160 }
161
162 static void *
163 swr_create_depth_stencil_state(
164 struct pipe_context *pipe,
165 const struct pipe_depth_stencil_alpha_state *depth_stencil)
166 {
167 struct pipe_depth_stencil_alpha_state *state;
168
169 state = (pipe_depth_stencil_alpha_state *)mem_dup(depth_stencil,
170 sizeof *depth_stencil);
171
172 return state;
173 }
174
175 static void
176 swr_bind_depth_stencil_state(struct pipe_context *pipe, void *depth_stencil)
177 {
178 struct swr_context *ctx = swr_context(pipe);
179
180 if (ctx->depth_stencil == (pipe_depth_stencil_alpha_state *)depth_stencil)
181 return;
182
183 ctx->depth_stencil = (pipe_depth_stencil_alpha_state *)depth_stencil;
184
185 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
186 }
187
188 static void
189 swr_delete_depth_stencil_state(struct pipe_context *pipe, void *depth)
190 {
191 FREE(depth);
192 }
193
194
195 static void *
196 swr_create_rasterizer_state(struct pipe_context *pipe,
197 const struct pipe_rasterizer_state *rast)
198 {
199 struct pipe_rasterizer_state *state;
200 state = (pipe_rasterizer_state *)mem_dup(rast, sizeof *rast);
201
202 return state;
203 }
204
205 static void
206 swr_bind_rasterizer_state(struct pipe_context *pipe, void *handle)
207 {
208 struct swr_context *ctx = swr_context(pipe);
209 const struct pipe_rasterizer_state *rasterizer =
210 (const struct pipe_rasterizer_state *)handle;
211
212 if (ctx->rasterizer == (pipe_rasterizer_state *)rasterizer)
213 return;
214
215 ctx->rasterizer = (pipe_rasterizer_state *)rasterizer;
216
217 ctx->dirty |= SWR_NEW_RASTERIZER;
218 }
219
220 static void
221 swr_delete_rasterizer_state(struct pipe_context *pipe, void *rasterizer)
222 {
223 FREE(rasterizer);
224 }
225
226
227 static void *
228 swr_create_sampler_state(struct pipe_context *pipe,
229 const struct pipe_sampler_state *sampler)
230 {
231 struct pipe_sampler_state *state =
232 (pipe_sampler_state *)mem_dup(sampler, sizeof *sampler);
233
234 return state;
235 }
236
237 static void
238 swr_bind_sampler_states(struct pipe_context *pipe,
239 enum pipe_shader_type shader,
240 unsigned start,
241 unsigned num,
242 void **samplers)
243 {
244 struct swr_context *ctx = swr_context(pipe);
245 unsigned i;
246
247 assert(shader < PIPE_SHADER_TYPES);
248 assert(start + num <= ARRAY_SIZE(ctx->samplers[shader]));
249
250 /* set the new samplers */
251 ctx->num_samplers[shader] = num;
252 for (i = 0; i < num; i++) {
253 ctx->samplers[shader][start + i] = (pipe_sampler_state *)samplers[i];
254 }
255
256 ctx->dirty |= SWR_NEW_SAMPLER;
257 }
258
259 static void
260 swr_delete_sampler_state(struct pipe_context *pipe, void *sampler)
261 {
262 FREE(sampler);
263 }
264
265
266 static struct pipe_sampler_view *
267 swr_create_sampler_view(struct pipe_context *pipe,
268 struct pipe_resource *texture,
269 const struct pipe_sampler_view *templ)
270 {
271 struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view);
272
273 if (view) {
274 *view = *templ;
275 view->reference.count = 1;
276 view->texture = NULL;
277 pipe_resource_reference(&view->texture, texture);
278 view->context = pipe;
279 }
280
281 return view;
282 }
283
284 static void
285 swr_set_sampler_views(struct pipe_context *pipe,
286 enum pipe_shader_type shader,
287 unsigned start,
288 unsigned num,
289 struct pipe_sampler_view **views)
290 {
291 struct swr_context *ctx = swr_context(pipe);
292 uint i;
293
294 assert(num <= PIPE_MAX_SHADER_SAMPLER_VIEWS);
295
296 assert(shader < PIPE_SHADER_TYPES);
297 assert(start + num <= ARRAY_SIZE(ctx->sampler_views[shader]));
298
299 /* set the new sampler views */
300 ctx->num_sampler_views[shader] = num;
301 for (i = 0; i < num; i++) {
302 /* Note: we're using pipe_sampler_view_release() here to work around
303 * a possible crash when the old view belongs to another context that
304 * was already destroyed.
305 */
306 pipe_sampler_view_release(pipe, &ctx->sampler_views[shader][start + i]);
307 pipe_sampler_view_reference(&ctx->sampler_views[shader][start + i],
308 views[i]);
309 }
310
311 ctx->dirty |= SWR_NEW_SAMPLER_VIEW;
312 }
313
314 static void
315 swr_sampler_view_destroy(struct pipe_context *pipe,
316 struct pipe_sampler_view *view)
317 {
318 pipe_resource_reference(&view->texture, NULL);
319 FREE(view);
320 }
321
322 static void *
323 swr_create_vs_state(struct pipe_context *pipe,
324 const struct pipe_shader_state *vs)
325 {
326 struct swr_vertex_shader *swr_vs = new swr_vertex_shader;
327 if (!swr_vs)
328 return NULL;
329
330 swr_vs->pipe.tokens = tgsi_dup_tokens(vs->tokens);
331 swr_vs->pipe.stream_output = vs->stream_output;
332
333 lp_build_tgsi_info(vs->tokens, &swr_vs->info);
334
335 swr_vs->soState = {0};
336
337 if (swr_vs->pipe.stream_output.num_outputs) {
338 pipe_stream_output_info *stream_output = &swr_vs->pipe.stream_output;
339
340 swr_vs->soState.soEnable = true;
341 // soState.rasterizerDisable set on state dirty
342 // soState.streamToRasterizer not used
343
344 for (uint32_t i = 0; i < stream_output->num_outputs; i++) {
345 swr_vs->soState.streamMasks[stream_output->output[i].stream] |=
346 1 << (stream_output->output[i].register_index - 1);
347 }
348 for (uint32_t i = 0; i < MAX_SO_STREAMS; i++) {
349 swr_vs->soState.streamNumEntries[i] =
350 _mm_popcnt_u32(swr_vs->soState.streamMasks[i]);
351 }
352 }
353
354 return swr_vs;
355 }
356
357 static void
358 swr_bind_vs_state(struct pipe_context *pipe, void *vs)
359 {
360 struct swr_context *ctx = swr_context(pipe);
361
362 if (ctx->vs == vs)
363 return;
364
365 ctx->vs = (swr_vertex_shader *)vs;
366 ctx->dirty |= SWR_NEW_VS;
367 }
368
369 static void
370 swr_delete_vs_state(struct pipe_context *pipe, void *vs)
371 {
372 struct swr_vertex_shader *swr_vs = (swr_vertex_shader *)vs;
373 FREE((void *)swr_vs->pipe.tokens);
374 delete swr_vs;
375 }
376
377 static void *
378 swr_create_fs_state(struct pipe_context *pipe,
379 const struct pipe_shader_state *fs)
380 {
381 struct swr_fragment_shader *swr_fs = new swr_fragment_shader;
382 if (!swr_fs)
383 return NULL;
384
385 swr_fs->pipe.tokens = tgsi_dup_tokens(fs->tokens);
386
387 lp_build_tgsi_info(fs->tokens, &swr_fs->info);
388
389 return swr_fs;
390 }
391
392
393 static void
394 swr_bind_fs_state(struct pipe_context *pipe, void *fs)
395 {
396 struct swr_context *ctx = swr_context(pipe);
397
398 if (ctx->fs == fs)
399 return;
400
401 ctx->fs = (swr_fragment_shader *)fs;
402 ctx->dirty |= SWR_NEW_FS;
403 }
404
405 static void
406 swr_delete_fs_state(struct pipe_context *pipe, void *fs)
407 {
408 struct swr_fragment_shader *swr_fs = (swr_fragment_shader *)fs;
409 FREE((void *)swr_fs->pipe.tokens);
410 delete swr_fs;
411 }
412
413
414 static void
415 swr_set_constant_buffer(struct pipe_context *pipe,
416 uint shader,
417 uint index,
418 const struct pipe_constant_buffer *cb)
419 {
420 struct swr_context *ctx = swr_context(pipe);
421 struct pipe_resource *constants = cb ? cb->buffer : NULL;
422
423 assert(shader < PIPE_SHADER_TYPES);
424 assert(index < ARRAY_SIZE(ctx->constants[shader]));
425
426 /* note: reference counting */
427 util_copy_constant_buffer(&ctx->constants[shader][index], cb);
428
429 if (shader == PIPE_SHADER_VERTEX || shader == PIPE_SHADER_GEOMETRY) {
430 ctx->dirty |= SWR_NEW_VSCONSTANTS;
431 } else if (shader == PIPE_SHADER_FRAGMENT) {
432 ctx->dirty |= SWR_NEW_FSCONSTANTS;
433 }
434
435 if (cb && cb->user_buffer) {
436 pipe_resource_reference(&constants, NULL);
437 }
438 }
439
440
441 static void *
442 swr_create_vertex_elements_state(struct pipe_context *pipe,
443 unsigned num_elements,
444 const struct pipe_vertex_element *attribs)
445 {
446 struct swr_vertex_element_state *velems;
447 assert(num_elements <= PIPE_MAX_ATTRIBS);
448 velems = CALLOC_STRUCT(swr_vertex_element_state);
449 if (velems) {
450 velems->fsState.numAttribs = num_elements;
451 for (unsigned i = 0; i < num_elements; i++) {
452 // XXX: we should do this keyed on the VS usage info
453
454 const struct util_format_description *desc =
455 util_format_description(attribs[i].src_format);
456
457 velems->fsState.layout[i].AlignedByteOffset = attribs[i].src_offset;
458 velems->fsState.layout[i].Format =
459 mesa_to_swr_format(attribs[i].src_format);
460 velems->fsState.layout[i].StreamIndex =
461 attribs[i].vertex_buffer_index;
462 velems->fsState.layout[i].InstanceEnable =
463 attribs[i].instance_divisor != 0;
464 velems->fsState.layout[i].ComponentControl0 =
465 desc->channel[0].type != UTIL_FORMAT_TYPE_VOID
466 ? ComponentControl::StoreSrc
467 : ComponentControl::Store0;
468 velems->fsState.layout[i].ComponentControl1 =
469 desc->channel[1].type != UTIL_FORMAT_TYPE_VOID
470 ? ComponentControl::StoreSrc
471 : ComponentControl::Store0;
472 velems->fsState.layout[i].ComponentControl2 =
473 desc->channel[2].type != UTIL_FORMAT_TYPE_VOID
474 ? ComponentControl::StoreSrc
475 : ComponentControl::Store0;
476 velems->fsState.layout[i].ComponentControl3 =
477 desc->channel[3].type != UTIL_FORMAT_TYPE_VOID
478 ? ComponentControl::StoreSrc
479 : ComponentControl::Store1Fp;
480 velems->fsState.layout[i].ComponentPacking = ComponentEnable::XYZW;
481 velems->fsState.layout[i].InstanceDataStepRate =
482 attribs[i].instance_divisor;
483
484 /* Calculate the pitch of each stream */
485 const SWR_FORMAT_INFO &swr_desc = GetFormatInfo(
486 mesa_to_swr_format(attribs[i].src_format));
487 velems->stream_pitch[attribs[i].vertex_buffer_index] += swr_desc.Bpp;
488 }
489 }
490
491 return velems;
492 }
493
494 static void
495 swr_bind_vertex_elements_state(struct pipe_context *pipe, void *velems)
496 {
497 struct swr_context *ctx = swr_context(pipe);
498 struct swr_vertex_element_state *swr_velems =
499 (struct swr_vertex_element_state *)velems;
500
501 ctx->velems = swr_velems;
502 ctx->dirty |= SWR_NEW_VERTEX;
503 }
504
505 static void
506 swr_delete_vertex_elements_state(struct pipe_context *pipe, void *velems)
507 {
508 /* XXX Need to destroy fetch shader? */
509 FREE(velems);
510 }
511
512
513 static void
514 swr_set_vertex_buffers(struct pipe_context *pipe,
515 unsigned start_slot,
516 unsigned num_elements,
517 const struct pipe_vertex_buffer *buffers)
518 {
519 struct swr_context *ctx = swr_context(pipe);
520
521 assert(num_elements <= PIPE_MAX_ATTRIBS);
522
523 util_set_vertex_buffers_count(ctx->vertex_buffer,
524 &ctx->num_vertex_buffers,
525 buffers,
526 start_slot,
527 num_elements);
528
529 ctx->dirty |= SWR_NEW_VERTEX;
530 }
531
532
533 static void
534 swr_set_index_buffer(struct pipe_context *pipe,
535 const struct pipe_index_buffer *ib)
536 {
537 struct swr_context *ctx = swr_context(pipe);
538
539 if (ib)
540 memcpy(&ctx->index_buffer, ib, sizeof(ctx->index_buffer));
541 else
542 memset(&ctx->index_buffer, 0, sizeof(ctx->index_buffer));
543
544 ctx->dirty |= SWR_NEW_VERTEX;
545 }
546
547 static void
548 swr_set_polygon_stipple(struct pipe_context *pipe,
549 const struct pipe_poly_stipple *stipple)
550 {
551 struct swr_context *ctx = swr_context(pipe);
552
553 ctx->poly_stipple = *stipple; /* struct copy */
554 ctx->dirty |= SWR_NEW_STIPPLE;
555 }
556
557 static void
558 swr_set_clip_state(struct pipe_context *pipe,
559 const struct pipe_clip_state *clip)
560 {
561 struct swr_context *ctx = swr_context(pipe);
562
563 ctx->clip = *clip;
564 /* XXX Unimplemented, but prevents crash */
565
566 ctx->dirty |= SWR_NEW_CLIP;
567 }
568
569
570 static void
571 swr_set_scissor_states(struct pipe_context *pipe,
572 unsigned start_slot,
573 unsigned num_viewports,
574 const struct pipe_scissor_state *scissor)
575 {
576 struct swr_context *ctx = swr_context(pipe);
577
578 ctx->scissor = *scissor;
579 ctx->swr_scissor.xmin = scissor->minx;
580 ctx->swr_scissor.xmax = scissor->maxx;
581 ctx->swr_scissor.ymin = scissor->miny;
582 ctx->swr_scissor.ymax = scissor->maxy;
583 ctx->dirty |= SWR_NEW_SCISSOR;
584 }
585
586 static void
587 swr_set_viewport_states(struct pipe_context *pipe,
588 unsigned start_slot,
589 unsigned num_viewports,
590 const struct pipe_viewport_state *vpt)
591 {
592 struct swr_context *ctx = swr_context(pipe);
593
594 ctx->viewport = *vpt;
595 ctx->dirty |= SWR_NEW_VIEWPORT;
596 }
597
598
599 static void
600 swr_set_framebuffer_state(struct pipe_context *pipe,
601 const struct pipe_framebuffer_state *fb)
602 {
603 struct swr_context *ctx = swr_context(pipe);
604
605 boolean changed = !util_framebuffer_state_equal(&ctx->framebuffer, fb);
606
607 assert(fb->width <= KNOB_GUARDBAND_WIDTH);
608 assert(fb->height <= KNOB_GUARDBAND_HEIGHT);
609
610 if (changed) {
611 unsigned i;
612 for (i = 0; i < fb->nr_cbufs; ++i)
613 pipe_surface_reference(&ctx->framebuffer.cbufs[i], fb->cbufs[i]);
614 for (; i < ctx->framebuffer.nr_cbufs; ++i)
615 pipe_surface_reference(&ctx->framebuffer.cbufs[i], NULL);
616
617 ctx->framebuffer.nr_cbufs = fb->nr_cbufs;
618
619 ctx->framebuffer.width = fb->width;
620 ctx->framebuffer.height = fb->height;
621
622 pipe_surface_reference(&ctx->framebuffer.zsbuf, fb->zsbuf);
623
624 ctx->dirty |= SWR_NEW_FRAMEBUFFER;
625 }
626 }
627
628
629 static void
630 swr_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
631 {
632 struct swr_context *ctx = swr_context(pipe);
633
634 if (sample_mask != ctx->sample_mask) {
635 ctx->sample_mask = sample_mask;
636 ctx->dirty |= SWR_NEW_RASTERIZER;
637 }
638 }
639
640 /*
641 * Update resource in-use status
642 * All resources bound to color or depth targets marked as WRITE resources.
643 * VBO Vertex/index buffers and texture views marked as READ resources.
644 */
645 void
646 swr_update_resource_status(struct pipe_context *pipe,
647 const struct pipe_draw_info *p_draw_info)
648 {
649 struct swr_context *ctx = swr_context(pipe);
650 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
651
652 /* colorbuffer targets */
653 if (fb->nr_cbufs)
654 for (uint32_t i = 0; i < fb->nr_cbufs; ++i)
655 if (fb->cbufs[i])
656 swr_resource_write(fb->cbufs[i]->texture);
657
658 /* depth/stencil target */
659 if (fb->zsbuf)
660 swr_resource_write(fb->zsbuf->texture);
661
662 /* VBO vertex buffers */
663 for (uint32_t i = 0; i < ctx->num_vertex_buffers; i++) {
664 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
665 if (!vb->user_buffer)
666 swr_resource_read(vb->buffer);
667 }
668
669 /* VBO index buffer */
670 if (p_draw_info && p_draw_info->indexed) {
671 struct pipe_index_buffer *ib = &ctx->index_buffer;
672 if (!ib->user_buffer)
673 swr_resource_read(ib->buffer);
674 }
675
676 /* texture sampler views */
677 for (uint32_t j : {PIPE_SHADER_VERTEX, PIPE_SHADER_FRAGMENT}) {
678 for (uint32_t i = 0; i < ctx->num_sampler_views[j]; i++) {
679 struct pipe_sampler_view *view = ctx->sampler_views[j][i];
680 if (view)
681 swr_resource_read(view->texture);
682 }
683 }
684
685 /* constant buffers */
686 for (uint32_t j : {PIPE_SHADER_VERTEX, PIPE_SHADER_FRAGMENT}) {
687 for (uint32_t i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
688 struct pipe_constant_buffer *cb = &ctx->constants[j][i];
689 if (cb->buffer)
690 swr_resource_read(cb->buffer);
691 }
692 }
693 }
694
695 static void
696 swr_update_texture_state(struct swr_context *ctx,
697 unsigned shader_type,
698 unsigned num_sampler_views,
699 swr_jit_texture *textures)
700 {
701 for (unsigned i = 0; i < num_sampler_views; i++) {
702 struct pipe_sampler_view *view =
703 ctx->sampler_views[shader_type][i];
704
705 if (view) {
706 struct pipe_resource *res = view->texture;
707 struct swr_resource *swr_res = swr_resource(res);
708 struct swr_jit_texture *jit_tex = &textures[i];
709 memset(jit_tex, 0, sizeof(*jit_tex));
710 jit_tex->width = res->width0;
711 jit_tex->height = res->height0;
712 jit_tex->depth = res->depth0;
713 jit_tex->first_level = view->u.tex.first_level;
714 jit_tex->last_level = view->u.tex.last_level;
715 jit_tex->base_ptr = swr_res->swr.pBaseAddress;
716
717 for (unsigned level = jit_tex->first_level;
718 level <= jit_tex->last_level;
719 level++) {
720 jit_tex->row_stride[level] = swr_res->row_stride[level];
721 jit_tex->img_stride[level] = swr_res->img_stride[level];
722 jit_tex->mip_offsets[level] = swr_res->mip_offsets[level];
723 }
724 }
725 }
726 }
727
728 static void
729 swr_update_sampler_state(struct swr_context *ctx,
730 unsigned shader_type,
731 unsigned num_samplers,
732 swr_jit_sampler *samplers)
733 {
734 for (unsigned i = 0; i < num_samplers; i++) {
735 const struct pipe_sampler_state *sampler =
736 ctx->samplers[shader_type][i];
737
738 if (sampler) {
739 samplers[i].min_lod = sampler->min_lod;
740 samplers[i].max_lod = sampler->max_lod;
741 samplers[i].lod_bias = sampler->lod_bias;
742 COPY_4V(samplers[i].border_color, sampler->border_color.f);
743 }
744 }
745 }
746
747 static void
748 swr_update_constants(struct swr_context *ctx, enum pipe_shader_type shaderType)
749 {
750 swr_draw_context *pDC = &ctx->swrDC;
751
752 const float **constant;
753 uint32_t *num_constants;
754 struct swr_scratch_space *scratch;
755
756 switch (shaderType) {
757 case PIPE_SHADER_VERTEX:
758 constant = pDC->constantVS;
759 num_constants = pDC->num_constantsVS;
760 scratch = &ctx->scratch->vs_constants;
761 break;
762 case PIPE_SHADER_FRAGMENT:
763 constant = pDC->constantFS;
764 num_constants = pDC->num_constantsFS;
765 scratch = &ctx->scratch->fs_constants;
766 break;
767 default:
768 debug_printf("Unsupported shader type constants\n");
769 return;
770 }
771
772 for (UINT i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
773 const pipe_constant_buffer *cb = &ctx->constants[shaderType][i];
774 num_constants[i] = cb->buffer_size;
775 if (cb->buffer) {
776 constant[i] =
777 (const float *)(swr_resource_data(cb->buffer) +
778 cb->buffer_offset);
779 } else {
780 /* Need to copy these constants to scratch space */
781 if (cb->user_buffer && cb->buffer_size) {
782 const void *ptr =
783 ((const uint8_t *)cb->user_buffer + cb->buffer_offset);
784 uint32_t size = AlignUp(cb->buffer_size, 4);
785 ptr = swr_copy_to_scratch_space(ctx, scratch, ptr, size);
786 constant[i] = (const float *)ptr;
787 }
788 }
789 }
790 }
791
792 void
793 swr_update_derived(struct pipe_context *pipe,
794 const struct pipe_draw_info *p_draw_info)
795 {
796 struct swr_context *ctx = swr_context(pipe);
797 struct swr_screen *screen = swr_screen(ctx->pipe.screen);
798
799 /* Update screen->pipe to current pipe context. */
800 if (screen->pipe != pipe)
801 screen->pipe = pipe;
802
803 /* Any state that requires dirty flags to be re-triggered sets this mask */
804 /* For example, user_buffer vertex and index buffers. */
805 unsigned post_update_dirty_flags = 0;
806
807 /* Render Targets */
808 if (ctx->dirty & SWR_NEW_FRAMEBUFFER) {
809 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
810 SWR_SURFACE_STATE *new_attachment[SWR_NUM_ATTACHMENTS] = {0};
811 UINT i;
812
813 /* colorbuffer targets */
814 if (fb->nr_cbufs)
815 for (i = 0; i < fb->nr_cbufs; ++i)
816 if (fb->cbufs[i]) {
817 struct swr_resource *colorBuffer =
818 swr_resource(fb->cbufs[i]->texture);
819 new_attachment[SWR_ATTACHMENT_COLOR0 + i] = &colorBuffer->swr;
820 }
821
822 /* depth/stencil target */
823 if (fb->zsbuf) {
824 struct swr_resource *depthStencilBuffer =
825 swr_resource(fb->zsbuf->texture);
826 if (depthStencilBuffer->has_depth) {
827 new_attachment[SWR_ATTACHMENT_DEPTH] = &depthStencilBuffer->swr;
828
829 if (depthStencilBuffer->has_stencil)
830 new_attachment[SWR_ATTACHMENT_STENCIL] =
831 &depthStencilBuffer->secondary;
832
833 } else if (depthStencilBuffer->has_stencil)
834 new_attachment[SWR_ATTACHMENT_STENCIL] = &depthStencilBuffer->swr;
835 }
836
837 /* Make the attachment updates */
838 swr_draw_context *pDC = &ctx->swrDC;
839 SWR_SURFACE_STATE *renderTargets = pDC->renderTargets;
840 unsigned need_fence = FALSE;
841 for (i = 0; i < SWR_NUM_ATTACHMENTS; i++) {
842 void *new_base = nullptr;
843 if (new_attachment[i])
844 new_base = new_attachment[i]->pBaseAddress;
845
846 /* StoreTile for changed target */
847 if (renderTargets[i].pBaseAddress != new_base) {
848 if (renderTargets[i].pBaseAddress) {
849 /* If changing attachment to a new target, mark tiles as
850 * INVALID so they are reloaded from surface.
851 * If detaching attachment, mark tiles as RESOLVED so core
852 * won't try to load from non-existent target. */
853 enum SWR_TILE_STATE post_state = (new_attachment[i]
854 ? SWR_TILE_INVALID : SWR_TILE_RESOLVED);
855 swr_store_render_target(pipe, i, post_state);
856
857 need_fence |= TRUE;
858 }
859
860 /* Make new attachment */
861 if (new_attachment[i])
862 renderTargets[i] = *new_attachment[i];
863 else
864 if (renderTargets[i].pBaseAddress)
865 renderTargets[i] = {0};
866 }
867 }
868
869 /* This fence ensures any attachment changes are resolved before the
870 * next draw */
871 if (need_fence)
872 swr_fence_submit(ctx, screen->flush_fence);
873 }
874
875 /* Raster state */
876 if (ctx->dirty & (SWR_NEW_RASTERIZER |
877 SWR_NEW_VS | // clipping
878 SWR_NEW_FRAMEBUFFER)) {
879 pipe_rasterizer_state *rasterizer = ctx->rasterizer;
880 pipe_framebuffer_state *fb = &ctx->framebuffer;
881
882 SWR_RASTSTATE *rastState = &ctx->derived.rastState;
883 rastState->cullMode = swr_convert_cull_mode(rasterizer->cull_face);
884 rastState->frontWinding = rasterizer->front_ccw
885 ? SWR_FRONTWINDING_CCW
886 : SWR_FRONTWINDING_CW;
887 rastState->scissorEnable = rasterizer->scissor;
888 rastState->pointSize = rasterizer->point_size > 0.0f
889 ? rasterizer->point_size
890 : 1.0f;
891 rastState->lineWidth = rasterizer->line_width > 0.0f
892 ? rasterizer->line_width
893 : 1.0f;
894
895 rastState->pointParam = rasterizer->point_size_per_vertex;
896
897 rastState->pointSpriteEnable = rasterizer->sprite_coord_enable;
898 rastState->pointSpriteTopOrigin =
899 rasterizer->sprite_coord_mode == PIPE_SPRITE_COORD_UPPER_LEFT;
900
901 /* XXX TODO: Add multisample */
902 rastState->msaaRastEnable = false;
903 rastState->rastMode = SWR_MSAA_RASTMODE_OFF_PIXEL;
904 rastState->sampleCount = SWR_MULTISAMPLE_1X;
905 rastState->forcedSampleCount = false;
906
907 bool do_offset = false;
908 switch (rasterizer->fill_front) {
909 case PIPE_POLYGON_MODE_FILL:
910 do_offset = rasterizer->offset_tri;
911 break;
912 case PIPE_POLYGON_MODE_LINE:
913 do_offset = rasterizer->offset_line;
914 break;
915 case PIPE_POLYGON_MODE_POINT:
916 do_offset = rasterizer->offset_point;
917 break;
918 }
919
920 if (do_offset) {
921 rastState->depthBias = rasterizer->offset_units;
922 rastState->slopeScaledDepthBias = rasterizer->offset_scale;
923 rastState->depthBiasClamp = rasterizer->offset_clamp;
924 } else {
925 rastState->depthBias = 0;
926 rastState->slopeScaledDepthBias = 0;
927 rastState->depthBiasClamp = 0;
928 }
929 struct pipe_surface *zb = fb->zsbuf;
930 if (zb && swr_resource(zb->texture)->has_depth)
931 rastState->depthFormat = swr_resource(zb->texture)->swr.format;
932
933 rastState->depthClipEnable = rasterizer->depth_clip;
934 rastState->clipHalfZ = rasterizer->clip_halfz;
935
936 rastState->clipDistanceMask =
937 ctx->vs->info.base.num_written_clipdistance ?
938 ctx->vs->info.base.clipdist_writemask & rasterizer->clip_plane_enable :
939 rasterizer->clip_plane_enable;
940
941 rastState->cullDistanceMask =
942 ctx->vs->info.base.culldist_writemask << ctx->vs->info.base.num_written_clipdistance;
943
944 SwrSetRastState(ctx->swrContext, rastState);
945 }
946
947 /* Scissor */
948 if (ctx->dirty & SWR_NEW_SCISSOR) {
949 SwrSetScissorRects(ctx->swrContext, 1, &ctx->swr_scissor);
950 }
951
952 /* Viewport */
953 if (ctx->dirty & (SWR_NEW_VIEWPORT | SWR_NEW_FRAMEBUFFER
954 | SWR_NEW_RASTERIZER)) {
955 pipe_viewport_state *state = &ctx->viewport;
956 pipe_framebuffer_state *fb = &ctx->framebuffer;
957 pipe_rasterizer_state *rasterizer = ctx->rasterizer;
958
959 SWR_VIEWPORT *vp = &ctx->derived.vp;
960 SWR_VIEWPORT_MATRICES *vpm = &ctx->derived.vpm;
961
962 vp->x = state->translate[0] - state->scale[0];
963 vp->width = state->translate[0] + state->scale[0];
964 vp->y = state->translate[1] - fabs(state->scale[1]);
965 vp->height = state->translate[1] + fabs(state->scale[1]);
966 util_viewport_zmin_zmax(state, rasterizer->clip_halfz,
967 &vp->minZ, &vp->maxZ);
968
969 vpm->m00[0] = state->scale[0];
970 vpm->m11[0] = state->scale[1];
971 vpm->m22[0] = state->scale[2];
972 vpm->m30[0] = state->translate[0];
973 vpm->m31[0] = state->translate[1];
974 vpm->m32[0] = state->translate[2];
975
976 /* Now that the matrix is calculated, clip the view coords to screen
977 * size. OpenGL allows for -ve x,y in the viewport. */
978 vp->x = std::max(vp->x, 0.0f);
979 vp->y = std::max(vp->y, 0.0f);
980 vp->width = std::min(vp->width, (float)fb->width);
981 vp->height = std::min(vp->height, (float)fb->height);
982
983 SwrSetViewports(ctx->swrContext, 1, vp, vpm);
984 }
985
986 /* Set vertex & index buffers */
987 /* (using draw info if called by swr_draw_vbo) */
988 if (ctx->dirty & SWR_NEW_VERTEX) {
989 uint32_t size, pitch, max_vertex, partial_inbounds;
990 const uint8_t *p_data;
991
992 /* If being called by swr_draw_vbo, copy draw details */
993 struct pipe_draw_info info = {0};
994 if (p_draw_info)
995 info = *p_draw_info;
996
997 /* vertex buffers */
998 SWR_VERTEX_BUFFER_STATE swrVertexBuffers[PIPE_MAX_ATTRIBS];
999 for (UINT i = 0; i < ctx->num_vertex_buffers; i++) {
1000 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
1001
1002 pitch = vb->stride;
1003 if (!vb->user_buffer) {
1004 /* VBO
1005 * size is based on buffer->width0 rather than info.max_index
1006 * to prevent having to validate VBO on each draw */
1007 size = vb->buffer->width0;
1008 max_vertex = size / pitch;
1009 partial_inbounds = size % pitch;
1010
1011 p_data = swr_resource_data(vb->buffer) + vb->buffer_offset;
1012 } else {
1013 /* Client buffer
1014 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
1015 * revalidate on each draw */
1016 post_update_dirty_flags |= SWR_NEW_VERTEX;
1017
1018 if (pitch) {
1019 size = (info.max_index - info.min_index + 1) * pitch;
1020 } else {
1021 /* pitch = 0, means constant value
1022 * set size to 1 vertex */
1023 size = ctx->velems->stream_pitch[i];
1024 }
1025
1026 max_vertex = info.max_index + 1;
1027 partial_inbounds = 0;
1028
1029 /* Copy only needed vertices to scratch space */
1030 size = AlignUp(size, 4);
1031 const void *ptr = (const uint8_t *) vb->user_buffer
1032 + info.min_index * pitch;
1033 ptr = swr_copy_to_scratch_space(
1034 ctx, &ctx->scratch->vertex_buffer, ptr, size);
1035 p_data = (const uint8_t *)ptr - info.min_index * pitch;
1036 }
1037
1038 swrVertexBuffers[i] = {0};
1039 swrVertexBuffers[i].index = i;
1040 swrVertexBuffers[i].pitch = pitch;
1041 swrVertexBuffers[i].pData = p_data;
1042 swrVertexBuffers[i].size = size;
1043 swrVertexBuffers[i].maxVertex = max_vertex;
1044 swrVertexBuffers[i].partialInboundsSize = partial_inbounds;
1045 }
1046
1047 SwrSetVertexBuffers(
1048 ctx->swrContext, ctx->num_vertex_buffers, swrVertexBuffers);
1049
1050 /* index buffer, if required (info passed in by swr_draw_vbo) */
1051 SWR_FORMAT index_type = R32_UINT; /* Default for non-indexed draws */
1052 if (info.indexed) {
1053 struct pipe_index_buffer *ib = &ctx->index_buffer;
1054
1055 pitch = ib->index_size ? ib->index_size : sizeof(uint32_t);
1056 index_type = swr_convert_index_type(pitch);
1057
1058 if (!ib->user_buffer) {
1059 /* VBO
1060 * size is based on buffer->width0 rather than info.count
1061 * to prevent having to validate VBO on each draw */
1062 size = ib->buffer->width0;
1063 p_data = swr_resource_data(ib->buffer) + ib->offset;
1064 } else {
1065 /* Client buffer
1066 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
1067 * revalidate on each draw */
1068 post_update_dirty_flags |= SWR_NEW_VERTEX;
1069
1070 size = info.count * pitch;
1071 size = AlignUp(size, 4);
1072
1073 /* Copy indices to scratch space */
1074 const void *ptr = ib->user_buffer;
1075 ptr = swr_copy_to_scratch_space(
1076 ctx, &ctx->scratch->index_buffer, ptr, size);
1077 p_data = (const uint8_t *)ptr;
1078 }
1079
1080 SWR_INDEX_BUFFER_STATE swrIndexBuffer;
1081 swrIndexBuffer.format = swr_convert_index_type(ib->index_size);
1082 swrIndexBuffer.pIndices = p_data;
1083 swrIndexBuffer.size = size;
1084
1085 SwrSetIndexBuffer(ctx->swrContext, &swrIndexBuffer);
1086 }
1087
1088 struct swr_vertex_element_state *velems = ctx->velems;
1089 if (velems && velems->fsState.indexType != index_type) {
1090 velems->fsFunc = NULL;
1091 velems->fsState.indexType = index_type;
1092 }
1093 }
1094
1095 /* VertexShader */
1096 if (ctx->dirty & (SWR_NEW_VS |
1097 SWR_NEW_RASTERIZER | // for clip planes
1098 SWR_NEW_SAMPLER |
1099 SWR_NEW_SAMPLER_VIEW |
1100 SWR_NEW_FRAMEBUFFER)) {
1101 swr_jit_vs_key key;
1102 swr_generate_vs_key(key, ctx, ctx->vs);
1103 auto search = ctx->vs->map.find(key);
1104 PFN_VERTEX_FUNC func;
1105 if (search != ctx->vs->map.end()) {
1106 func = search->second->shader;
1107 } else {
1108 func = swr_compile_vs(ctx, key);
1109 }
1110 SwrSetVertexFunc(ctx->swrContext, func);
1111
1112 /* JIT sampler state */
1113 if (ctx->dirty & SWR_NEW_SAMPLER) {
1114 swr_update_sampler_state(ctx,
1115 PIPE_SHADER_VERTEX,
1116 key.nr_samplers,
1117 ctx->swrDC.samplersVS);
1118 }
1119
1120 /* JIT sampler view state */
1121 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1122 swr_update_texture_state(ctx,
1123 PIPE_SHADER_VERTEX,
1124 key.nr_sampler_views,
1125 ctx->swrDC.texturesVS);
1126 }
1127 }
1128
1129 /* FragmentShader */
1130 if (ctx->dirty & (SWR_NEW_FS | SWR_NEW_SAMPLER | SWR_NEW_SAMPLER_VIEW
1131 | SWR_NEW_RASTERIZER | SWR_NEW_FRAMEBUFFER)) {
1132 swr_jit_fs_key key;
1133 swr_generate_fs_key(key, ctx, ctx->fs);
1134 auto search = ctx->fs->map.find(key);
1135 PFN_PIXEL_KERNEL func;
1136 if (search != ctx->fs->map.end()) {
1137 func = search->second->shader;
1138 } else {
1139 func = swr_compile_fs(ctx, key);
1140 }
1141 SWR_PS_STATE psState = {0};
1142 psState.pfnPixelShader = func;
1143 psState.killsPixel = ctx->fs->info.base.uses_kill;
1144 psState.inputCoverage = SWR_INPUT_COVERAGE_NORMAL;
1145 psState.writesODepth = ctx->fs->info.base.writes_z;
1146 psState.usesSourceDepth = ctx->fs->info.base.reads_z;
1147 psState.shadingRate = SWR_SHADING_RATE_PIXEL; // XXX
1148 psState.numRenderTargets = ctx->framebuffer.nr_cbufs;
1149 psState.posOffset = SWR_PS_POSITION_SAMPLE_NONE; // XXX msaa
1150 uint32_t barycentricsMask = 0;
1151 #if 0
1152 // when we switch to mesa-master
1153 if (ctx->fs->info.base.uses_persp_center ||
1154 ctx->fs->info.base.uses_linear_center)
1155 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1156 if (ctx->fs->info.base.uses_persp_centroid ||
1157 ctx->fs->info.base.uses_linear_centroid)
1158 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1159 if (ctx->fs->info.base.uses_persp_sample ||
1160 ctx->fs->info.base.uses_linear_sample)
1161 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1162 #else
1163 for (unsigned i = 0; i < ctx->fs->info.base.num_inputs; i++) {
1164 switch (ctx->fs->info.base.input_interpolate_loc[i]) {
1165 case TGSI_INTERPOLATE_LOC_CENTER:
1166 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1167 break;
1168 case TGSI_INTERPOLATE_LOC_CENTROID:
1169 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1170 break;
1171 case TGSI_INTERPOLATE_LOC_SAMPLE:
1172 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1173 break;
1174 }
1175 }
1176 #endif
1177 psState.barycentricsMask = barycentricsMask;
1178 psState.usesUAV = false; // XXX
1179 psState.forceEarlyZ = false;
1180 SwrSetPixelShaderState(ctx->swrContext, &psState);
1181
1182 /* JIT sampler state */
1183 if (ctx->dirty & SWR_NEW_SAMPLER) {
1184 swr_update_sampler_state(ctx,
1185 PIPE_SHADER_FRAGMENT,
1186 key.nr_samplers,
1187 ctx->swrDC.samplersFS);
1188 }
1189
1190 /* JIT sampler view state */
1191 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1192 swr_update_texture_state(ctx,
1193 PIPE_SHADER_FRAGMENT,
1194 key.nr_sampler_views,
1195 ctx->swrDC.texturesFS);
1196 }
1197 }
1198
1199
1200 /* VertexShader Constants */
1201 if (ctx->dirty & SWR_NEW_VSCONSTANTS) {
1202 swr_update_constants(ctx, PIPE_SHADER_VERTEX);
1203 }
1204
1205 /* FragmentShader Constants */
1206 if (ctx->dirty & SWR_NEW_FSCONSTANTS) {
1207 swr_update_constants(ctx, PIPE_SHADER_FRAGMENT);
1208 }
1209
1210 /* Depth/stencil state */
1211 if (ctx->dirty & (SWR_NEW_DEPTH_STENCIL_ALPHA | SWR_NEW_FRAMEBUFFER)) {
1212 struct pipe_depth_state *depth = &(ctx->depth_stencil->depth);
1213 struct pipe_stencil_state *stencil = ctx->depth_stencil->stencil;
1214 SWR_DEPTH_STENCIL_STATE depthStencilState = {{0}};
1215 SWR_DEPTH_BOUNDS_STATE depthBoundsState = {0};
1216
1217 /* XXX, incomplete. Need to flesh out stencil & alpha test state
1218 struct pipe_stencil_state *front_stencil =
1219 ctx->depth_stencil.stencil[0];
1220 struct pipe_stencil_state *back_stencil = ctx->depth_stencil.stencil[1];
1221 struct pipe_alpha_state alpha;
1222 */
1223 if (stencil[0].enabled) {
1224 depthStencilState.stencilWriteEnable = 1;
1225 depthStencilState.stencilTestEnable = 1;
1226 depthStencilState.stencilTestFunc =
1227 swr_convert_depth_func(stencil[0].func);
1228
1229 depthStencilState.stencilPassDepthPassOp =
1230 swr_convert_stencil_op(stencil[0].zpass_op);
1231 depthStencilState.stencilPassDepthFailOp =
1232 swr_convert_stencil_op(stencil[0].zfail_op);
1233 depthStencilState.stencilFailOp =
1234 swr_convert_stencil_op(stencil[0].fail_op);
1235 depthStencilState.stencilWriteMask = stencil[0].writemask;
1236 depthStencilState.stencilTestMask = stencil[0].valuemask;
1237 depthStencilState.stencilRefValue = ctx->stencil_ref.ref_value[0];
1238 }
1239 if (stencil[1].enabled) {
1240 depthStencilState.doubleSidedStencilTestEnable = 1;
1241
1242 depthStencilState.backfaceStencilTestFunc =
1243 swr_convert_depth_func(stencil[1].func);
1244
1245 depthStencilState.backfaceStencilPassDepthPassOp =
1246 swr_convert_stencil_op(stencil[1].zpass_op);
1247 depthStencilState.backfaceStencilPassDepthFailOp =
1248 swr_convert_stencil_op(stencil[1].zfail_op);
1249 depthStencilState.backfaceStencilFailOp =
1250 swr_convert_stencil_op(stencil[1].fail_op);
1251 depthStencilState.backfaceStencilWriteMask = stencil[1].writemask;
1252 depthStencilState.backfaceStencilTestMask = stencil[1].valuemask;
1253
1254 depthStencilState.backfaceStencilRefValue =
1255 ctx->stencil_ref.ref_value[1];
1256 }
1257
1258 depthStencilState.depthTestEnable = depth->enabled;
1259 depthStencilState.depthTestFunc = swr_convert_depth_func(depth->func);
1260 depthStencilState.depthWriteEnable = depth->writemask;
1261 SwrSetDepthStencilState(ctx->swrContext, &depthStencilState);
1262
1263 depthBoundsState.depthBoundsTestEnable = depth->bounds_test;
1264 depthBoundsState.depthBoundsTestMinValue = depth->bounds_min;
1265 depthBoundsState.depthBoundsTestMaxValue = depth->bounds_max;
1266 SwrSetDepthBoundsState(ctx->swrContext, &depthBoundsState);
1267 }
1268
1269 /* Blend State */
1270 if (ctx->dirty & (SWR_NEW_BLEND |
1271 SWR_NEW_FRAMEBUFFER |
1272 SWR_NEW_DEPTH_STENCIL_ALPHA)) {
1273 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
1274
1275 SWR_BLEND_STATE blendState;
1276 memcpy(&blendState, &ctx->blend->blendState, sizeof(blendState));
1277 blendState.constantColor[0] = ctx->blend_color.color[0];
1278 blendState.constantColor[1] = ctx->blend_color.color[1];
1279 blendState.constantColor[2] = ctx->blend_color.color[2];
1280 blendState.constantColor[3] = ctx->blend_color.color[3];
1281 blendState.alphaTestReference =
1282 *((uint32_t*)&ctx->depth_stencil->alpha.ref_value);
1283
1284 // XXX MSAA
1285 blendState.sampleMask = 0;
1286 blendState.sampleCount = SWR_MULTISAMPLE_1X;
1287
1288 /* If there are no color buffers bound, disable writes on RT0
1289 * and skip loop */
1290 if (fb->nr_cbufs == 0) {
1291 blendState.renderTarget[0].writeDisableRed = 1;
1292 blendState.renderTarget[0].writeDisableGreen = 1;
1293 blendState.renderTarget[0].writeDisableBlue = 1;
1294 blendState.renderTarget[0].writeDisableAlpha = 1;
1295 SwrSetBlendFunc(ctx->swrContext, 0, NULL);
1296 }
1297 else
1298 for (int target = 0;
1299 target < std::min(SWR_NUM_RENDERTARGETS,
1300 PIPE_MAX_COLOR_BUFS);
1301 target++) {
1302 if (!fb->cbufs[target])
1303 continue;
1304
1305 struct swr_resource *colorBuffer =
1306 swr_resource(fb->cbufs[target]->texture);
1307
1308 BLEND_COMPILE_STATE compileState;
1309 memset(&compileState, 0, sizeof(compileState));
1310 compileState.format = colorBuffer->swr.format;
1311 memcpy(&compileState.blendState,
1312 &ctx->blend->compileState[target],
1313 sizeof(compileState.blendState));
1314
1315 const SWR_FORMAT_INFO& info = GetFormatInfo(compileState.format);
1316 if (compileState.blendState.logicOpEnable &&
1317 ((info.type[0] == SWR_TYPE_FLOAT) || info.isSRGB)) {
1318 compileState.blendState.logicOpEnable = false;
1319 }
1320
1321 if (info.type[0] == SWR_TYPE_SINT || info.type[0] == SWR_TYPE_UINT)
1322 compileState.blendState.blendEnable = false;
1323
1324 if (compileState.blendState.blendEnable == false &&
1325 compileState.blendState.logicOpEnable == false &&
1326 ctx->depth_stencil->alpha.enabled == 0) {
1327 SwrSetBlendFunc(ctx->swrContext, target, NULL);
1328 continue;
1329 }
1330
1331 compileState.desc.alphaTestEnable =
1332 ctx->depth_stencil->alpha.enabled;
1333 compileState.desc.independentAlphaBlendEnable =
1334 (compileState.blendState.sourceBlendFactor !=
1335 compileState.blendState.sourceAlphaBlendFactor) ||
1336 (compileState.blendState.destBlendFactor !=
1337 compileState.blendState.destAlphaBlendFactor) ||
1338 (compileState.blendState.colorBlendFunc !=
1339 compileState.blendState.alphaBlendFunc);
1340 compileState.desc.alphaToCoverageEnable =
1341 ctx->blend->pipe.alpha_to_coverage;
1342 compileState.desc.sampleMaskEnable = 0; // XXX
1343 compileState.desc.numSamples = 1; // XXX
1344
1345 compileState.alphaTestFunction =
1346 swr_convert_depth_func(ctx->depth_stencil->alpha.func);
1347 compileState.alphaTestFormat = ALPHA_TEST_FLOAT32; // xxx
1348
1349 compileState.Canonicalize();
1350
1351 PFN_BLEND_JIT_FUNC func = NULL;
1352 auto search = ctx->blendJIT->find(compileState);
1353 if (search != ctx->blendJIT->end()) {
1354 func = search->second;
1355 } else {
1356 HANDLE hJitMgr = screen->hJitMgr;
1357 func = JitCompileBlend(hJitMgr, compileState);
1358 debug_printf("BLEND shader %p\n", func);
1359 assert(func && "Error: BlendShader = NULL");
1360
1361 ctx->blendJIT->insert(std::make_pair(compileState, func));
1362 }
1363 SwrSetBlendFunc(ctx->swrContext, target, func);
1364 }
1365
1366 SwrSetBlendState(ctx->swrContext, &blendState);
1367 }
1368
1369 if (ctx->dirty & SWR_NEW_STIPPLE) {
1370 /* XXX What to do with this one??? SWR doesn't stipple */
1371 }
1372
1373 if (ctx->dirty & (SWR_NEW_VS | SWR_NEW_SO | SWR_NEW_RASTERIZER)) {
1374 ctx->vs->soState.rasterizerDisable =
1375 ctx->rasterizer->rasterizer_discard;
1376 SwrSetSoState(ctx->swrContext, &ctx->vs->soState);
1377
1378 pipe_stream_output_info *stream_output = &ctx->vs->pipe.stream_output;
1379
1380 for (uint32_t i = 0; i < ctx->num_so_targets; i++) {
1381 SWR_STREAMOUT_BUFFER buffer = {0};
1382 if (!ctx->so_targets[i])
1383 continue;
1384 buffer.enable = true;
1385 buffer.pBuffer =
1386 (uint32_t *)swr_resource_data(ctx->so_targets[i]->buffer);
1387 buffer.bufferSize = ctx->so_targets[i]->buffer_size >> 2;
1388 buffer.pitch = stream_output->stride[i];
1389 buffer.streamOffset = ctx->so_targets[i]->buffer_offset >> 2;
1390
1391 SwrSetSoBuffers(ctx->swrContext, &buffer, i);
1392 }
1393 }
1394
1395 if (ctx->dirty & SWR_NEW_CLIP) {
1396 // shader exporting clip distances overrides all user clip planes
1397 if (ctx->rasterizer->clip_plane_enable &&
1398 !ctx->vs->info.base.num_written_clipdistance)
1399 {
1400 swr_draw_context *pDC = &ctx->swrDC;
1401 memcpy(pDC->userClipPlanes,
1402 ctx->clip.ucp,
1403 sizeof(pDC->userClipPlanes));
1404 }
1405 }
1406
1407 // set up backend state
1408 SWR_BACKEND_STATE backendState = {0};
1409 backendState.numAttributes =
1410 ctx->vs->info.base.num_outputs - 1 +
1411 (ctx->rasterizer->sprite_coord_enable ? 1 : 0);
1412 for (unsigned i = 0; i < backendState.numAttributes; i++)
1413 backendState.numComponents[i] = 4;
1414 backendState.constantInterpolationMask =
1415 ctx->rasterizer->flatshade ?
1416 ctx->fs->flatConstantMask :
1417 ctx->fs->constantMask;
1418 backendState.pointSpriteTexCoordMask = ctx->fs->pointSpriteMask;
1419
1420 SwrSetBackendState(ctx->swrContext, &backendState);
1421
1422 /* Ensure that any in-progress attachment change StoreTiles finish */
1423 if (swr_is_fence_pending(screen->flush_fence))
1424 swr_fence_finish(pipe->screen, NULL, screen->flush_fence, 0);
1425
1426 /* Finally, update the in-use status of all resources involved in draw */
1427 swr_update_resource_status(pipe, p_draw_info);
1428
1429 ctx->dirty = post_update_dirty_flags;
1430 }
1431
1432
1433 static struct pipe_stream_output_target *
1434 swr_create_so_target(struct pipe_context *pipe,
1435 struct pipe_resource *buffer,
1436 unsigned buffer_offset,
1437 unsigned buffer_size)
1438 {
1439 struct pipe_stream_output_target *target;
1440
1441 target = CALLOC_STRUCT(pipe_stream_output_target);
1442 if (!target)
1443 return NULL;
1444
1445 target->context = pipe;
1446 target->reference.count = 1;
1447 pipe_resource_reference(&target->buffer, buffer);
1448 target->buffer_offset = buffer_offset;
1449 target->buffer_size = buffer_size;
1450 return target;
1451 }
1452
1453 static void
1454 swr_destroy_so_target(struct pipe_context *pipe,
1455 struct pipe_stream_output_target *target)
1456 {
1457 pipe_resource_reference(&target->buffer, NULL);
1458 FREE(target);
1459 }
1460
1461 static void
1462 swr_set_so_targets(struct pipe_context *pipe,
1463 unsigned num_targets,
1464 struct pipe_stream_output_target **targets,
1465 const unsigned *offsets)
1466 {
1467 struct swr_context *swr = swr_context(pipe);
1468 uint32_t i;
1469
1470 assert(num_targets < MAX_SO_STREAMS);
1471
1472 for (i = 0; i < num_targets; i++) {
1473 pipe_so_target_reference(
1474 (struct pipe_stream_output_target **)&swr->so_targets[i],
1475 targets[i]);
1476 }
1477
1478 for (/* fall-through */; i < swr->num_so_targets; i++) {
1479 pipe_so_target_reference(
1480 (struct pipe_stream_output_target **)&swr->so_targets[i], NULL);
1481 }
1482
1483 swr->num_so_targets = num_targets;
1484
1485 swr->dirty = SWR_NEW_SO;
1486 }
1487
1488
1489 void
1490 swr_state_init(struct pipe_context *pipe)
1491 {
1492 pipe->create_blend_state = swr_create_blend_state;
1493 pipe->bind_blend_state = swr_bind_blend_state;
1494 pipe->delete_blend_state = swr_delete_blend_state;
1495
1496 pipe->create_depth_stencil_alpha_state = swr_create_depth_stencil_state;
1497 pipe->bind_depth_stencil_alpha_state = swr_bind_depth_stencil_state;
1498 pipe->delete_depth_stencil_alpha_state = swr_delete_depth_stencil_state;
1499
1500 pipe->create_rasterizer_state = swr_create_rasterizer_state;
1501 pipe->bind_rasterizer_state = swr_bind_rasterizer_state;
1502 pipe->delete_rasterizer_state = swr_delete_rasterizer_state;
1503
1504 pipe->create_sampler_state = swr_create_sampler_state;
1505 pipe->bind_sampler_states = swr_bind_sampler_states;
1506 pipe->delete_sampler_state = swr_delete_sampler_state;
1507
1508 pipe->create_sampler_view = swr_create_sampler_view;
1509 pipe->set_sampler_views = swr_set_sampler_views;
1510 pipe->sampler_view_destroy = swr_sampler_view_destroy;
1511
1512 pipe->create_vs_state = swr_create_vs_state;
1513 pipe->bind_vs_state = swr_bind_vs_state;
1514 pipe->delete_vs_state = swr_delete_vs_state;
1515
1516 pipe->create_fs_state = swr_create_fs_state;
1517 pipe->bind_fs_state = swr_bind_fs_state;
1518 pipe->delete_fs_state = swr_delete_fs_state;
1519
1520 pipe->set_constant_buffer = swr_set_constant_buffer;
1521
1522 pipe->create_vertex_elements_state = swr_create_vertex_elements_state;
1523 pipe->bind_vertex_elements_state = swr_bind_vertex_elements_state;
1524 pipe->delete_vertex_elements_state = swr_delete_vertex_elements_state;
1525
1526 pipe->set_vertex_buffers = swr_set_vertex_buffers;
1527 pipe->set_index_buffer = swr_set_index_buffer;
1528
1529 pipe->set_polygon_stipple = swr_set_polygon_stipple;
1530 pipe->set_clip_state = swr_set_clip_state;
1531 pipe->set_scissor_states = swr_set_scissor_states;
1532 pipe->set_viewport_states = swr_set_viewport_states;
1533
1534 pipe->set_framebuffer_state = swr_set_framebuffer_state;
1535
1536 pipe->set_blend_color = swr_set_blend_color;
1537 pipe->set_stencil_ref = swr_set_stencil_ref;
1538
1539 pipe->set_sample_mask = swr_set_sample_mask;
1540
1541 pipe->create_stream_output_target = swr_create_so_target;
1542 pipe->stream_output_target_destroy = swr_destroy_so_target;
1543 pipe->set_stream_output_targets = swr_set_so_targets;
1544 }