swr: calculate viewport width/height based on the scale
[mesa.git] / src / gallium / drivers / swr / swr_state.cpp
1 /****************************************************************************
2 * Copyright (C) 2015 Intel Corporation. All Rights Reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
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9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 ***************************************************************************/
23
24 // llvm redefines DEBUG
25 #pragma push_macro("DEBUG")
26 #undef DEBUG
27 #include "JitManager.h"
28 #pragma pop_macro("DEBUG")
29
30 #include "common/os.h"
31 #include "jit_api.h"
32 #include "state_llvm.h"
33
34 #include "gallivm/lp_bld_tgsi.h"
35 #include "util/u_format.h"
36
37 #include "util/u_memory.h"
38 #include "util/u_inlines.h"
39 #include "util/u_helpers.h"
40 #include "util/u_framebuffer.h"
41 #include "util/u_viewport.h"
42
43 #include "swr_state.h"
44 #include "swr_context.h"
45 #include "swr_context_llvm.h"
46 #include "swr_screen.h"
47 #include "swr_resource.h"
48 #include "swr_tex_sample.h"
49 #include "swr_scratch.h"
50 #include "swr_shader.h"
51 #include "swr_fence.h"
52
53 /* These should be pulled out into separate files as necessary
54 * Just initializing everything here to get going. */
55
56 static void *
57 swr_create_blend_state(struct pipe_context *pipe,
58 const struct pipe_blend_state *blend)
59 {
60 struct swr_blend_state *state = CALLOC_STRUCT(swr_blend_state);
61
62 memcpy(&state->pipe, blend, sizeof(*blend));
63
64 struct pipe_blend_state *pipe_blend = &state->pipe;
65
66 for (int target = 0;
67 target < std::min(SWR_NUM_RENDERTARGETS, PIPE_MAX_COLOR_BUFS);
68 target++) {
69
70 struct pipe_rt_blend_state *rt_blend = &pipe_blend->rt[target];
71 SWR_RENDER_TARGET_BLEND_STATE &blendState =
72 state->blendState.renderTarget[target];
73 RENDER_TARGET_BLEND_COMPILE_STATE &compileState =
74 state->compileState[target];
75
76 if (target != 0 && !pipe_blend->independent_blend_enable) {
77 memcpy(&compileState,
78 &state->compileState[0],
79 sizeof(RENDER_TARGET_BLEND_COMPILE_STATE));
80 continue;
81 }
82
83 compileState.blendEnable = rt_blend->blend_enable;
84 if (compileState.blendEnable) {
85 compileState.sourceAlphaBlendFactor =
86 swr_convert_blend_factor(rt_blend->alpha_src_factor);
87 compileState.destAlphaBlendFactor =
88 swr_convert_blend_factor(rt_blend->alpha_dst_factor);
89 compileState.sourceBlendFactor =
90 swr_convert_blend_factor(rt_blend->rgb_src_factor);
91 compileState.destBlendFactor =
92 swr_convert_blend_factor(rt_blend->rgb_dst_factor);
93
94 compileState.colorBlendFunc =
95 swr_convert_blend_func(rt_blend->rgb_func);
96 compileState.alphaBlendFunc =
97 swr_convert_blend_func(rt_blend->alpha_func);
98 }
99 compileState.logicOpEnable = state->pipe.logicop_enable;
100 if (compileState.logicOpEnable) {
101 compileState.logicOpFunc =
102 swr_convert_logic_op(state->pipe.logicop_func);
103 }
104
105 blendState.writeDisableRed =
106 (rt_blend->colormask & PIPE_MASK_R) ? 0 : 1;
107 blendState.writeDisableGreen =
108 (rt_blend->colormask & PIPE_MASK_G) ? 0 : 1;
109 blendState.writeDisableBlue =
110 (rt_blend->colormask & PIPE_MASK_B) ? 0 : 1;
111 blendState.writeDisableAlpha =
112 (rt_blend->colormask & PIPE_MASK_A) ? 0 : 1;
113
114 if (rt_blend->colormask == 0)
115 compileState.blendEnable = false;
116 }
117
118 return state;
119 }
120
121 static void
122 swr_bind_blend_state(struct pipe_context *pipe, void *blend)
123 {
124 struct swr_context *ctx = swr_context(pipe);
125
126 if (ctx->blend == blend)
127 return;
128
129 ctx->blend = (swr_blend_state *)blend;
130
131 ctx->dirty |= SWR_NEW_BLEND;
132 }
133
134 static void
135 swr_delete_blend_state(struct pipe_context *pipe, void *blend)
136 {
137 FREE(blend);
138 }
139
140 static void
141 swr_set_blend_color(struct pipe_context *pipe,
142 const struct pipe_blend_color *color)
143 {
144 struct swr_context *ctx = swr_context(pipe);
145
146 ctx->blend_color = *color;
147
148 ctx->dirty |= SWR_NEW_BLEND;
149 }
150
151 static void
152 swr_set_stencil_ref(struct pipe_context *pipe,
153 const struct pipe_stencil_ref *ref)
154 {
155 struct swr_context *ctx = swr_context(pipe);
156
157 ctx->stencil_ref = *ref;
158
159 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
160 }
161
162 static void *
163 swr_create_depth_stencil_state(
164 struct pipe_context *pipe,
165 const struct pipe_depth_stencil_alpha_state *depth_stencil)
166 {
167 struct pipe_depth_stencil_alpha_state *state;
168
169 state = (pipe_depth_stencil_alpha_state *)mem_dup(depth_stencil,
170 sizeof *depth_stencil);
171
172 return state;
173 }
174
175 static void
176 swr_bind_depth_stencil_state(struct pipe_context *pipe, void *depth_stencil)
177 {
178 struct swr_context *ctx = swr_context(pipe);
179
180 if (ctx->depth_stencil == (pipe_depth_stencil_alpha_state *)depth_stencil)
181 return;
182
183 ctx->depth_stencil = (pipe_depth_stencil_alpha_state *)depth_stencil;
184
185 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
186 }
187
188 static void
189 swr_delete_depth_stencil_state(struct pipe_context *pipe, void *depth)
190 {
191 FREE(depth);
192 }
193
194
195 static void *
196 swr_create_rasterizer_state(struct pipe_context *pipe,
197 const struct pipe_rasterizer_state *rast)
198 {
199 struct pipe_rasterizer_state *state;
200 state = (pipe_rasterizer_state *)mem_dup(rast, sizeof *rast);
201
202 return state;
203 }
204
205 static void
206 swr_bind_rasterizer_state(struct pipe_context *pipe, void *handle)
207 {
208 struct swr_context *ctx = swr_context(pipe);
209 const struct pipe_rasterizer_state *rasterizer =
210 (const struct pipe_rasterizer_state *)handle;
211
212 if (ctx->rasterizer == (pipe_rasterizer_state *)rasterizer)
213 return;
214
215 ctx->rasterizer = (pipe_rasterizer_state *)rasterizer;
216
217 ctx->dirty |= SWR_NEW_RASTERIZER;
218 }
219
220 static void
221 swr_delete_rasterizer_state(struct pipe_context *pipe, void *rasterizer)
222 {
223 FREE(rasterizer);
224 }
225
226
227 static void *
228 swr_create_sampler_state(struct pipe_context *pipe,
229 const struct pipe_sampler_state *sampler)
230 {
231 struct pipe_sampler_state *state =
232 (pipe_sampler_state *)mem_dup(sampler, sizeof *sampler);
233
234 return state;
235 }
236
237 static void
238 swr_bind_sampler_states(struct pipe_context *pipe,
239 enum pipe_shader_type shader,
240 unsigned start,
241 unsigned num,
242 void **samplers)
243 {
244 struct swr_context *ctx = swr_context(pipe);
245 unsigned i;
246
247 assert(shader < PIPE_SHADER_TYPES);
248 assert(start + num <= ARRAY_SIZE(ctx->samplers[shader]));
249
250 /* set the new samplers */
251 ctx->num_samplers[shader] = num;
252 for (i = 0; i < num; i++) {
253 ctx->samplers[shader][start + i] = (pipe_sampler_state *)samplers[i];
254 }
255
256 ctx->dirty |= SWR_NEW_SAMPLER;
257 }
258
259 static void
260 swr_delete_sampler_state(struct pipe_context *pipe, void *sampler)
261 {
262 FREE(sampler);
263 }
264
265
266 static struct pipe_sampler_view *
267 swr_create_sampler_view(struct pipe_context *pipe,
268 struct pipe_resource *texture,
269 const struct pipe_sampler_view *templ)
270 {
271 struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view);
272
273 if (view) {
274 *view = *templ;
275 view->reference.count = 1;
276 view->texture = NULL;
277 pipe_resource_reference(&view->texture, texture);
278 view->context = pipe;
279 }
280
281 return view;
282 }
283
284 static void
285 swr_set_sampler_views(struct pipe_context *pipe,
286 enum pipe_shader_type shader,
287 unsigned start,
288 unsigned num,
289 struct pipe_sampler_view **views)
290 {
291 struct swr_context *ctx = swr_context(pipe);
292 uint i;
293
294 assert(num <= PIPE_MAX_SHADER_SAMPLER_VIEWS);
295
296 assert(shader < PIPE_SHADER_TYPES);
297 assert(start + num <= ARRAY_SIZE(ctx->sampler_views[shader]));
298
299 /* set the new sampler views */
300 ctx->num_sampler_views[shader] = num;
301 for (i = 0; i < num; i++) {
302 /* Note: we're using pipe_sampler_view_release() here to work around
303 * a possible crash when the old view belongs to another context that
304 * was already destroyed.
305 */
306 pipe_sampler_view_release(pipe, &ctx->sampler_views[shader][start + i]);
307 pipe_sampler_view_reference(&ctx->sampler_views[shader][start + i],
308 views[i]);
309 }
310
311 ctx->dirty |= SWR_NEW_SAMPLER_VIEW;
312 }
313
314 static void
315 swr_sampler_view_destroy(struct pipe_context *pipe,
316 struct pipe_sampler_view *view)
317 {
318 pipe_resource_reference(&view->texture, NULL);
319 FREE(view);
320 }
321
322 static void *
323 swr_create_vs_state(struct pipe_context *pipe,
324 const struct pipe_shader_state *vs)
325 {
326 struct swr_vertex_shader *swr_vs = new swr_vertex_shader;
327 if (!swr_vs)
328 return NULL;
329
330 swr_vs->pipe.tokens = tgsi_dup_tokens(vs->tokens);
331 swr_vs->pipe.stream_output = vs->stream_output;
332
333 lp_build_tgsi_info(vs->tokens, &swr_vs->info);
334
335 swr_vs->soState = {0};
336
337 if (swr_vs->pipe.stream_output.num_outputs) {
338 pipe_stream_output_info *stream_output = &swr_vs->pipe.stream_output;
339
340 swr_vs->soState.soEnable = true;
341 // soState.rasterizerDisable set on state dirty
342 // soState.streamToRasterizer not used
343
344 for (uint32_t i = 0; i < stream_output->num_outputs; i++) {
345 swr_vs->soState.streamMasks[stream_output->output[i].stream] |=
346 1 << (stream_output->output[i].register_index - 1);
347 }
348 for (uint32_t i = 0; i < MAX_SO_STREAMS; i++) {
349 swr_vs->soState.streamNumEntries[i] =
350 _mm_popcnt_u32(swr_vs->soState.streamMasks[i]);
351 }
352 }
353
354 return swr_vs;
355 }
356
357 static void
358 swr_bind_vs_state(struct pipe_context *pipe, void *vs)
359 {
360 struct swr_context *ctx = swr_context(pipe);
361
362 if (ctx->vs == vs)
363 return;
364
365 ctx->vs = (swr_vertex_shader *)vs;
366 ctx->dirty |= SWR_NEW_VS;
367 }
368
369 static void
370 swr_delete_vs_state(struct pipe_context *pipe, void *vs)
371 {
372 struct swr_vertex_shader *swr_vs = (swr_vertex_shader *)vs;
373 FREE((void *)swr_vs->pipe.tokens);
374 struct swr_screen *screen = swr_screen(pipe->screen);
375 if (!swr_is_fence_pending(screen->flush_fence))
376 swr_fence_submit(swr_context(pipe), screen->flush_fence);
377 swr_fence_finish(pipe->screen, NULL, screen->flush_fence, 0);
378 delete swr_vs;
379 }
380
381 static void *
382 swr_create_fs_state(struct pipe_context *pipe,
383 const struct pipe_shader_state *fs)
384 {
385 struct swr_fragment_shader *swr_fs = new swr_fragment_shader;
386 if (!swr_fs)
387 return NULL;
388
389 swr_fs->pipe.tokens = tgsi_dup_tokens(fs->tokens);
390
391 lp_build_tgsi_info(fs->tokens, &swr_fs->info);
392
393 return swr_fs;
394 }
395
396
397 static void
398 swr_bind_fs_state(struct pipe_context *pipe, void *fs)
399 {
400 struct swr_context *ctx = swr_context(pipe);
401
402 if (ctx->fs == fs)
403 return;
404
405 ctx->fs = (swr_fragment_shader *)fs;
406 ctx->dirty |= SWR_NEW_FS;
407 }
408
409 static void
410 swr_delete_fs_state(struct pipe_context *pipe, void *fs)
411 {
412 struct swr_fragment_shader *swr_fs = (swr_fragment_shader *)fs;
413 FREE((void *)swr_fs->pipe.tokens);
414 struct swr_screen *screen = swr_screen(pipe->screen);
415 if (!swr_is_fence_pending(screen->flush_fence))
416 swr_fence_submit(swr_context(pipe), screen->flush_fence);
417 swr_fence_finish(pipe->screen, NULL, screen->flush_fence, 0);
418 delete swr_fs;
419 }
420
421
422 static void
423 swr_set_constant_buffer(struct pipe_context *pipe,
424 uint shader,
425 uint index,
426 const struct pipe_constant_buffer *cb)
427 {
428 struct swr_context *ctx = swr_context(pipe);
429 struct pipe_resource *constants = cb ? cb->buffer : NULL;
430
431 assert(shader < PIPE_SHADER_TYPES);
432 assert(index < ARRAY_SIZE(ctx->constants[shader]));
433
434 /* note: reference counting */
435 util_copy_constant_buffer(&ctx->constants[shader][index], cb);
436
437 if (shader == PIPE_SHADER_VERTEX || shader == PIPE_SHADER_GEOMETRY) {
438 ctx->dirty |= SWR_NEW_VSCONSTANTS;
439 } else if (shader == PIPE_SHADER_FRAGMENT) {
440 ctx->dirty |= SWR_NEW_FSCONSTANTS;
441 }
442
443 if (cb && cb->user_buffer) {
444 pipe_resource_reference(&constants, NULL);
445 }
446 }
447
448
449 static void *
450 swr_create_vertex_elements_state(struct pipe_context *pipe,
451 unsigned num_elements,
452 const struct pipe_vertex_element *attribs)
453 {
454 struct swr_vertex_element_state *velems;
455 assert(num_elements <= PIPE_MAX_ATTRIBS);
456 velems = CALLOC_STRUCT(swr_vertex_element_state);
457 if (velems) {
458 velems->fsState.bVertexIDOffsetEnable = true;
459 velems->fsState.numAttribs = num_elements;
460 for (unsigned i = 0; i < num_elements; i++) {
461 // XXX: we should do this keyed on the VS usage info
462
463 const struct util_format_description *desc =
464 util_format_description(attribs[i].src_format);
465
466 velems->fsState.layout[i].AlignedByteOffset = attribs[i].src_offset;
467 velems->fsState.layout[i].Format =
468 mesa_to_swr_format(attribs[i].src_format);
469 velems->fsState.layout[i].StreamIndex =
470 attribs[i].vertex_buffer_index;
471 velems->fsState.layout[i].InstanceEnable =
472 attribs[i].instance_divisor != 0;
473 velems->fsState.layout[i].ComponentControl0 =
474 desc->channel[0].type != UTIL_FORMAT_TYPE_VOID
475 ? ComponentControl::StoreSrc
476 : ComponentControl::Store0;
477 velems->fsState.layout[i].ComponentControl1 =
478 desc->channel[1].type != UTIL_FORMAT_TYPE_VOID
479 ? ComponentControl::StoreSrc
480 : ComponentControl::Store0;
481 velems->fsState.layout[i].ComponentControl2 =
482 desc->channel[2].type != UTIL_FORMAT_TYPE_VOID
483 ? ComponentControl::StoreSrc
484 : ComponentControl::Store0;
485 velems->fsState.layout[i].ComponentControl3 =
486 desc->channel[3].type != UTIL_FORMAT_TYPE_VOID
487 ? ComponentControl::StoreSrc
488 : ComponentControl::Store1Fp;
489 velems->fsState.layout[i].ComponentPacking = ComponentEnable::XYZW;
490 velems->fsState.layout[i].InstanceDataStepRate =
491 attribs[i].instance_divisor;
492
493 /* Calculate the pitch of each stream */
494 const SWR_FORMAT_INFO &swr_desc = GetFormatInfo(
495 mesa_to_swr_format(attribs[i].src_format));
496 velems->stream_pitch[attribs[i].vertex_buffer_index] += swr_desc.Bpp;
497 }
498 }
499
500 return velems;
501 }
502
503 static void
504 swr_bind_vertex_elements_state(struct pipe_context *pipe, void *velems)
505 {
506 struct swr_context *ctx = swr_context(pipe);
507 struct swr_vertex_element_state *swr_velems =
508 (struct swr_vertex_element_state *)velems;
509
510 ctx->velems = swr_velems;
511 ctx->dirty |= SWR_NEW_VERTEX;
512 }
513
514 static void
515 swr_delete_vertex_elements_state(struct pipe_context *pipe, void *velems)
516 {
517 /* XXX Need to destroy fetch shader? */
518 FREE(velems);
519 }
520
521
522 static void
523 swr_set_vertex_buffers(struct pipe_context *pipe,
524 unsigned start_slot,
525 unsigned num_elements,
526 const struct pipe_vertex_buffer *buffers)
527 {
528 struct swr_context *ctx = swr_context(pipe);
529
530 assert(num_elements <= PIPE_MAX_ATTRIBS);
531
532 util_set_vertex_buffers_count(ctx->vertex_buffer,
533 &ctx->num_vertex_buffers,
534 buffers,
535 start_slot,
536 num_elements);
537
538 ctx->dirty |= SWR_NEW_VERTEX;
539 }
540
541
542 static void
543 swr_set_index_buffer(struct pipe_context *pipe,
544 const struct pipe_index_buffer *ib)
545 {
546 struct swr_context *ctx = swr_context(pipe);
547
548 if (ib)
549 memcpy(&ctx->index_buffer, ib, sizeof(ctx->index_buffer));
550 else
551 memset(&ctx->index_buffer, 0, sizeof(ctx->index_buffer));
552
553 ctx->dirty |= SWR_NEW_VERTEX;
554 }
555
556 static void
557 swr_set_polygon_stipple(struct pipe_context *pipe,
558 const struct pipe_poly_stipple *stipple)
559 {
560 struct swr_context *ctx = swr_context(pipe);
561
562 ctx->poly_stipple = *stipple; /* struct copy */
563 ctx->dirty |= SWR_NEW_STIPPLE;
564 }
565
566 static void
567 swr_set_clip_state(struct pipe_context *pipe,
568 const struct pipe_clip_state *clip)
569 {
570 struct swr_context *ctx = swr_context(pipe);
571
572 ctx->clip = *clip;
573 /* XXX Unimplemented, but prevents crash */
574
575 ctx->dirty |= SWR_NEW_CLIP;
576 }
577
578
579 static void
580 swr_set_scissor_states(struct pipe_context *pipe,
581 unsigned start_slot,
582 unsigned num_viewports,
583 const struct pipe_scissor_state *scissor)
584 {
585 struct swr_context *ctx = swr_context(pipe);
586
587 ctx->scissor = *scissor;
588 ctx->swr_scissor.xmin = scissor->minx;
589 ctx->swr_scissor.xmax = scissor->maxx;
590 ctx->swr_scissor.ymin = scissor->miny;
591 ctx->swr_scissor.ymax = scissor->maxy;
592 ctx->dirty |= SWR_NEW_SCISSOR;
593 }
594
595 static void
596 swr_set_viewport_states(struct pipe_context *pipe,
597 unsigned start_slot,
598 unsigned num_viewports,
599 const struct pipe_viewport_state *vpt)
600 {
601 struct swr_context *ctx = swr_context(pipe);
602
603 ctx->viewport = *vpt;
604 ctx->dirty |= SWR_NEW_VIEWPORT;
605 }
606
607
608 static void
609 swr_set_framebuffer_state(struct pipe_context *pipe,
610 const struct pipe_framebuffer_state *fb)
611 {
612 struct swr_context *ctx = swr_context(pipe);
613
614 boolean changed = !util_framebuffer_state_equal(&ctx->framebuffer, fb);
615
616 assert(fb->width <= KNOB_GUARDBAND_WIDTH);
617 assert(fb->height <= KNOB_GUARDBAND_HEIGHT);
618
619 if (changed) {
620 unsigned i;
621 for (i = 0; i < fb->nr_cbufs; ++i)
622 pipe_surface_reference(&ctx->framebuffer.cbufs[i], fb->cbufs[i]);
623 for (; i < ctx->framebuffer.nr_cbufs; ++i)
624 pipe_surface_reference(&ctx->framebuffer.cbufs[i], NULL);
625
626 ctx->framebuffer.nr_cbufs = fb->nr_cbufs;
627
628 ctx->framebuffer.width = fb->width;
629 ctx->framebuffer.height = fb->height;
630
631 pipe_surface_reference(&ctx->framebuffer.zsbuf, fb->zsbuf);
632
633 ctx->dirty |= SWR_NEW_FRAMEBUFFER;
634 }
635 }
636
637
638 static void
639 swr_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
640 {
641 struct swr_context *ctx = swr_context(pipe);
642
643 if (sample_mask != ctx->sample_mask) {
644 ctx->sample_mask = sample_mask;
645 ctx->dirty |= SWR_NEW_RASTERIZER;
646 }
647 }
648
649 /*
650 * Update resource in-use status
651 * All resources bound to color or depth targets marked as WRITE resources.
652 * VBO Vertex/index buffers and texture views marked as READ resources.
653 */
654 void
655 swr_update_resource_status(struct pipe_context *pipe,
656 const struct pipe_draw_info *p_draw_info)
657 {
658 struct swr_context *ctx = swr_context(pipe);
659 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
660
661 /* colorbuffer targets */
662 if (fb->nr_cbufs)
663 for (uint32_t i = 0; i < fb->nr_cbufs; ++i)
664 if (fb->cbufs[i])
665 swr_resource_write(fb->cbufs[i]->texture);
666
667 /* depth/stencil target */
668 if (fb->zsbuf)
669 swr_resource_write(fb->zsbuf->texture);
670
671 /* VBO vertex buffers */
672 for (uint32_t i = 0; i < ctx->num_vertex_buffers; i++) {
673 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
674 if (!vb->user_buffer)
675 swr_resource_read(vb->buffer);
676 }
677
678 /* VBO index buffer */
679 if (p_draw_info && p_draw_info->indexed) {
680 struct pipe_index_buffer *ib = &ctx->index_buffer;
681 if (!ib->user_buffer)
682 swr_resource_read(ib->buffer);
683 }
684
685 /* transform feedback buffers */
686 for (uint32_t i = 0; i < ctx->num_so_targets; i++) {
687 struct pipe_stream_output_target *target = ctx->so_targets[i];
688 if (target && target->buffer)
689 swr_resource_write(target->buffer);
690 }
691
692 /* texture sampler views */
693 for (uint32_t j : {PIPE_SHADER_VERTEX, PIPE_SHADER_FRAGMENT}) {
694 for (uint32_t i = 0; i < ctx->num_sampler_views[j]; i++) {
695 struct pipe_sampler_view *view = ctx->sampler_views[j][i];
696 if (view)
697 swr_resource_read(view->texture);
698 }
699 }
700
701 /* constant buffers */
702 for (uint32_t j : {PIPE_SHADER_VERTEX, PIPE_SHADER_FRAGMENT}) {
703 for (uint32_t i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
704 struct pipe_constant_buffer *cb = &ctx->constants[j][i];
705 if (cb->buffer)
706 swr_resource_read(cb->buffer);
707 }
708 }
709 }
710
711 static void
712 swr_update_texture_state(struct swr_context *ctx,
713 unsigned shader_type,
714 unsigned num_sampler_views,
715 swr_jit_texture *textures)
716 {
717 for (unsigned i = 0; i < num_sampler_views; i++) {
718 struct pipe_sampler_view *view =
719 ctx->sampler_views[shader_type][i];
720
721 if (view) {
722 struct pipe_resource *res = view->texture;
723 struct swr_resource *swr_res = swr_resource(res);
724 struct swr_jit_texture *jit_tex = &textures[i];
725 memset(jit_tex, 0, sizeof(*jit_tex));
726 jit_tex->width = res->width0;
727 jit_tex->height = res->height0;
728 jit_tex->depth = res->depth0;
729 jit_tex->first_level = view->u.tex.first_level;
730 jit_tex->last_level = view->u.tex.last_level;
731 jit_tex->base_ptr = swr_res->swr.pBaseAddress;
732
733 for (unsigned level = jit_tex->first_level;
734 level <= jit_tex->last_level;
735 level++) {
736 jit_tex->row_stride[level] = swr_res->row_stride[level];
737 jit_tex->img_stride[level] = swr_res->img_stride[level];
738 jit_tex->mip_offsets[level] = swr_res->mip_offsets[level];
739 }
740 }
741 }
742 }
743
744 static void
745 swr_update_sampler_state(struct swr_context *ctx,
746 unsigned shader_type,
747 unsigned num_samplers,
748 swr_jit_sampler *samplers)
749 {
750 for (unsigned i = 0; i < num_samplers; i++) {
751 const struct pipe_sampler_state *sampler =
752 ctx->samplers[shader_type][i];
753
754 if (sampler) {
755 samplers[i].min_lod = sampler->min_lod;
756 samplers[i].max_lod = sampler->max_lod;
757 samplers[i].lod_bias = sampler->lod_bias;
758 COPY_4V(samplers[i].border_color, sampler->border_color.f);
759 }
760 }
761 }
762
763 static void
764 swr_update_constants(struct swr_context *ctx, enum pipe_shader_type shaderType)
765 {
766 swr_draw_context *pDC = &ctx->swrDC;
767
768 const float **constant;
769 uint32_t *num_constants;
770 struct swr_scratch_space *scratch;
771
772 switch (shaderType) {
773 case PIPE_SHADER_VERTEX:
774 constant = pDC->constantVS;
775 num_constants = pDC->num_constantsVS;
776 scratch = &ctx->scratch->vs_constants;
777 break;
778 case PIPE_SHADER_FRAGMENT:
779 constant = pDC->constantFS;
780 num_constants = pDC->num_constantsFS;
781 scratch = &ctx->scratch->fs_constants;
782 break;
783 default:
784 debug_printf("Unsupported shader type constants\n");
785 return;
786 }
787
788 for (UINT i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
789 const pipe_constant_buffer *cb = &ctx->constants[shaderType][i];
790 num_constants[i] = cb->buffer_size;
791 if (cb->buffer) {
792 constant[i] =
793 (const float *)(swr_resource_data(cb->buffer) +
794 cb->buffer_offset);
795 } else {
796 /* Need to copy these constants to scratch space */
797 if (cb->user_buffer && cb->buffer_size) {
798 const void *ptr =
799 ((const uint8_t *)cb->user_buffer + cb->buffer_offset);
800 uint32_t size = AlignUp(cb->buffer_size, 4);
801 ptr = swr_copy_to_scratch_space(ctx, scratch, ptr, size);
802 constant[i] = (const float *)ptr;
803 }
804 }
805 }
806 }
807
808 void
809 swr_update_derived(struct pipe_context *pipe,
810 const struct pipe_draw_info *p_draw_info)
811 {
812 struct swr_context *ctx = swr_context(pipe);
813 struct swr_screen *screen = swr_screen(ctx->pipe.screen);
814
815 /* Update screen->pipe to current pipe context. */
816 if (screen->pipe != pipe)
817 screen->pipe = pipe;
818
819 /* Any state that requires dirty flags to be re-triggered sets this mask */
820 /* For example, user_buffer vertex and index buffers. */
821 unsigned post_update_dirty_flags = 0;
822
823 /* Render Targets */
824 if (ctx->dirty & SWR_NEW_FRAMEBUFFER) {
825 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
826 SWR_SURFACE_STATE *new_attachment[SWR_NUM_ATTACHMENTS] = {0};
827 UINT i;
828
829 /* colorbuffer targets */
830 if (fb->nr_cbufs)
831 for (i = 0; i < fb->nr_cbufs; ++i)
832 if (fb->cbufs[i]) {
833 struct swr_resource *colorBuffer =
834 swr_resource(fb->cbufs[i]->texture);
835 new_attachment[SWR_ATTACHMENT_COLOR0 + i] = &colorBuffer->swr;
836 }
837
838 /* depth/stencil target */
839 if (fb->zsbuf) {
840 struct swr_resource *depthStencilBuffer =
841 swr_resource(fb->zsbuf->texture);
842 if (depthStencilBuffer->has_depth) {
843 new_attachment[SWR_ATTACHMENT_DEPTH] = &depthStencilBuffer->swr;
844
845 if (depthStencilBuffer->has_stencil)
846 new_attachment[SWR_ATTACHMENT_STENCIL] =
847 &depthStencilBuffer->secondary;
848
849 } else if (depthStencilBuffer->has_stencil)
850 new_attachment[SWR_ATTACHMENT_STENCIL] = &depthStencilBuffer->swr;
851 }
852
853 /* Make the attachment updates */
854 swr_draw_context *pDC = &ctx->swrDC;
855 SWR_SURFACE_STATE *renderTargets = pDC->renderTargets;
856 unsigned need_fence = FALSE;
857 for (i = 0; i < SWR_NUM_ATTACHMENTS; i++) {
858 void *new_base = nullptr;
859 if (new_attachment[i])
860 new_base = new_attachment[i]->pBaseAddress;
861
862 /* StoreTile for changed target */
863 if (renderTargets[i].pBaseAddress != new_base) {
864 if (renderTargets[i].pBaseAddress) {
865 /* If changing attachment to a new target, mark tiles as
866 * INVALID so they are reloaded from surface.
867 * If detaching attachment, mark tiles as RESOLVED so core
868 * won't try to load from non-existent target. */
869 enum SWR_TILE_STATE post_state = (new_attachment[i]
870 ? SWR_TILE_INVALID : SWR_TILE_RESOLVED);
871 swr_store_render_target(pipe, i, post_state);
872
873 need_fence |= TRUE;
874 }
875
876 /* Make new attachment */
877 if (new_attachment[i])
878 renderTargets[i] = *new_attachment[i];
879 else
880 if (renderTargets[i].pBaseAddress)
881 renderTargets[i] = {0};
882 }
883 }
884
885 /* This fence ensures any attachment changes are resolved before the
886 * next draw */
887 if (need_fence)
888 swr_fence_submit(ctx, screen->flush_fence);
889 }
890
891 /* Raster state */
892 if (ctx->dirty & (SWR_NEW_RASTERIZER |
893 SWR_NEW_VS | // clipping
894 SWR_NEW_FRAMEBUFFER)) {
895 pipe_rasterizer_state *rasterizer = ctx->rasterizer;
896 pipe_framebuffer_state *fb = &ctx->framebuffer;
897
898 SWR_RASTSTATE *rastState = &ctx->derived.rastState;
899 rastState->cullMode = swr_convert_cull_mode(rasterizer->cull_face);
900 rastState->frontWinding = rasterizer->front_ccw
901 ? SWR_FRONTWINDING_CCW
902 : SWR_FRONTWINDING_CW;
903 rastState->scissorEnable = rasterizer->scissor;
904 rastState->pointSize = rasterizer->point_size > 0.0f
905 ? rasterizer->point_size
906 : 1.0f;
907 rastState->lineWidth = rasterizer->line_width > 0.0f
908 ? rasterizer->line_width
909 : 1.0f;
910
911 rastState->pointParam = rasterizer->point_size_per_vertex;
912
913 rastState->pointSpriteEnable = rasterizer->sprite_coord_enable;
914 rastState->pointSpriteTopOrigin =
915 rasterizer->sprite_coord_mode == PIPE_SPRITE_COORD_UPPER_LEFT;
916
917 /* XXX TODO: Add multisample */
918 rastState->msaaRastEnable = false;
919 rastState->rastMode = SWR_MSAA_RASTMODE_OFF_PIXEL;
920 rastState->sampleCount = SWR_MULTISAMPLE_1X;
921 rastState->forcedSampleCount = false;
922
923 bool do_offset = false;
924 switch (rasterizer->fill_front) {
925 case PIPE_POLYGON_MODE_FILL:
926 do_offset = rasterizer->offset_tri;
927 break;
928 case PIPE_POLYGON_MODE_LINE:
929 do_offset = rasterizer->offset_line;
930 break;
931 case PIPE_POLYGON_MODE_POINT:
932 do_offset = rasterizer->offset_point;
933 break;
934 }
935
936 if (do_offset) {
937 rastState->depthBias = rasterizer->offset_units;
938 rastState->slopeScaledDepthBias = rasterizer->offset_scale;
939 rastState->depthBiasClamp = rasterizer->offset_clamp;
940 } else {
941 rastState->depthBias = 0;
942 rastState->slopeScaledDepthBias = 0;
943 rastState->depthBiasClamp = 0;
944 }
945 struct pipe_surface *zb = fb->zsbuf;
946 if (zb && swr_resource(zb->texture)->has_depth)
947 rastState->depthFormat = swr_resource(zb->texture)->swr.format;
948
949 rastState->depthClipEnable = rasterizer->depth_clip;
950 rastState->clipHalfZ = rasterizer->clip_halfz;
951
952 rastState->clipDistanceMask =
953 ctx->vs->info.base.num_written_clipdistance ?
954 ctx->vs->info.base.clipdist_writemask & rasterizer->clip_plane_enable :
955 rasterizer->clip_plane_enable;
956
957 rastState->cullDistanceMask =
958 ctx->vs->info.base.culldist_writemask << ctx->vs->info.base.num_written_clipdistance;
959
960 SwrSetRastState(ctx->swrContext, rastState);
961 }
962
963 /* Scissor */
964 if (ctx->dirty & SWR_NEW_SCISSOR) {
965 SwrSetScissorRects(ctx->swrContext, 1, &ctx->swr_scissor);
966 }
967
968 /* Viewport */
969 if (ctx->dirty & (SWR_NEW_VIEWPORT | SWR_NEW_FRAMEBUFFER
970 | SWR_NEW_RASTERIZER)) {
971 pipe_viewport_state *state = &ctx->viewport;
972 pipe_framebuffer_state *fb = &ctx->framebuffer;
973 pipe_rasterizer_state *rasterizer = ctx->rasterizer;
974
975 SWR_VIEWPORT *vp = &ctx->derived.vp;
976 SWR_VIEWPORT_MATRICES *vpm = &ctx->derived.vpm;
977
978 vp->x = state->translate[0] - state->scale[0];
979 vp->width = 2 * state->scale[0];
980 vp->y = state->translate[1] - fabs(state->scale[1]);
981 vp->height = 2 * fabs(state->scale[1]);
982 util_viewport_zmin_zmax(state, rasterizer->clip_halfz,
983 &vp->minZ, &vp->maxZ);
984
985 vpm->m00[0] = state->scale[0];
986 vpm->m11[0] = state->scale[1];
987 vpm->m22[0] = state->scale[2];
988 vpm->m30[0] = state->translate[0];
989 vpm->m31[0] = state->translate[1];
990 vpm->m32[0] = state->translate[2];
991
992 /* Now that the matrix is calculated, clip the view coords to screen
993 * size. OpenGL allows for -ve x,y in the viewport. */
994 if (vp->x < 0.0f) {
995 vp->width += vp->x;
996 vp->x = 0.0f;
997 }
998 if (vp->y < 0.0f) {
999 vp->height += vp->y;
1000 vp->y = 0.0f;
1001 }
1002 vp->width = std::min(vp->width, (float)fb->width - vp->x);
1003 vp->height = std::min(vp->height, (float)fb->height - vp->y);
1004
1005 SwrSetViewports(ctx->swrContext, 1, vp, vpm);
1006 }
1007
1008 /* Set vertex & index buffers */
1009 /* (using draw info if called by swr_draw_vbo) */
1010 if (ctx->dirty & SWR_NEW_VERTEX) {
1011 uint32_t size, pitch, max_vertex, partial_inbounds, scratch_total;
1012 const uint8_t *p_data;
1013 uint8_t *scratch = NULL;
1014
1015 /* If being called by swr_draw_vbo, copy draw details */
1016 struct pipe_draw_info info = {0};
1017 if (p_draw_info)
1018 info = *p_draw_info;
1019
1020 /* We must get all the scratch space in one go */
1021 scratch_total = 0;
1022 for (UINT i = 0; i < ctx->num_vertex_buffers; i++) {
1023 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
1024
1025 if (!vb->user_buffer)
1026 continue;
1027
1028 if (vb->stride) {
1029 size = (info.max_index - info.min_index + 1) * vb->stride;
1030 } else {
1031 /* pitch = 0, means constant value
1032 * set size to 1 vertex */
1033 size = ctx->velems->stream_pitch[i];
1034 }
1035
1036 scratch_total += AlignUp(size, 4);
1037 }
1038
1039 if (scratch_total) {
1040 scratch = (uint8_t *)swr_copy_to_scratch_space(
1041 ctx, &ctx->scratch->vertex_buffer, NULL, scratch_total);
1042 }
1043
1044 /* vertex buffers */
1045 SWR_VERTEX_BUFFER_STATE swrVertexBuffers[PIPE_MAX_ATTRIBS];
1046 for (UINT i = 0; i < ctx->num_vertex_buffers; i++) {
1047 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
1048
1049 pitch = vb->stride;
1050 if (!vb->user_buffer) {
1051 /* VBO
1052 * size is based on buffer->width0 rather than info.max_index
1053 * to prevent having to validate VBO on each draw */
1054 size = vb->buffer->width0;
1055 max_vertex = size / pitch;
1056 partial_inbounds = size % pitch;
1057
1058 p_data = swr_resource_data(vb->buffer) + vb->buffer_offset;
1059 } else {
1060 /* Client buffer
1061 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
1062 * revalidate on each draw */
1063 post_update_dirty_flags |= SWR_NEW_VERTEX;
1064
1065 if (pitch) {
1066 size = (info.max_index - info.min_index + 1) * pitch;
1067 } else {
1068 /* pitch = 0, means constant value
1069 * set size to 1 vertex */
1070 size = ctx->velems->stream_pitch[i];
1071 }
1072
1073 max_vertex = info.max_index + 1;
1074 partial_inbounds = 0;
1075
1076 /* Copy only needed vertices to scratch space */
1077 size = AlignUp(size, 4);
1078 const void *ptr = (const uint8_t *) vb->user_buffer
1079 + info.min_index * pitch;
1080 memcpy(scratch, ptr, size);
1081 ptr = scratch;
1082 scratch += size;
1083 p_data = (const uint8_t *)ptr - info.min_index * pitch;
1084 }
1085
1086 swrVertexBuffers[i] = {0};
1087 swrVertexBuffers[i].index = i;
1088 swrVertexBuffers[i].pitch = pitch;
1089 swrVertexBuffers[i].pData = p_data;
1090 swrVertexBuffers[i].size = size;
1091 swrVertexBuffers[i].maxVertex = max_vertex;
1092 swrVertexBuffers[i].partialInboundsSize = partial_inbounds;
1093 }
1094
1095 SwrSetVertexBuffers(
1096 ctx->swrContext, ctx->num_vertex_buffers, swrVertexBuffers);
1097
1098 /* index buffer, if required (info passed in by swr_draw_vbo) */
1099 SWR_FORMAT index_type = R32_UINT; /* Default for non-indexed draws */
1100 if (info.indexed) {
1101 struct pipe_index_buffer *ib = &ctx->index_buffer;
1102
1103 pitch = ib->index_size ? ib->index_size : sizeof(uint32_t);
1104 index_type = swr_convert_index_type(pitch);
1105
1106 if (!ib->user_buffer) {
1107 /* VBO
1108 * size is based on buffer->width0 rather than info.count
1109 * to prevent having to validate VBO on each draw */
1110 size = ib->buffer->width0;
1111 p_data = swr_resource_data(ib->buffer) + ib->offset;
1112 } else {
1113 /* Client buffer
1114 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
1115 * revalidate on each draw */
1116 post_update_dirty_flags |= SWR_NEW_VERTEX;
1117
1118 size = info.count * pitch;
1119 size = AlignUp(size, 4);
1120
1121 /* Copy indices to scratch space */
1122 const void *ptr = ib->user_buffer;
1123 ptr = swr_copy_to_scratch_space(
1124 ctx, &ctx->scratch->index_buffer, ptr, size);
1125 p_data = (const uint8_t *)ptr;
1126 }
1127
1128 SWR_INDEX_BUFFER_STATE swrIndexBuffer;
1129 swrIndexBuffer.format = swr_convert_index_type(ib->index_size);
1130 swrIndexBuffer.pIndices = p_data;
1131 swrIndexBuffer.size = size;
1132
1133 SwrSetIndexBuffer(ctx->swrContext, &swrIndexBuffer);
1134 }
1135
1136 struct swr_vertex_element_state *velems = ctx->velems;
1137 if (velems && velems->fsState.indexType != index_type) {
1138 velems->fsFunc = NULL;
1139 velems->fsState.indexType = index_type;
1140 }
1141 }
1142
1143 /* VertexShader */
1144 if (ctx->dirty & (SWR_NEW_VS |
1145 SWR_NEW_RASTERIZER | // for clip planes
1146 SWR_NEW_SAMPLER |
1147 SWR_NEW_SAMPLER_VIEW |
1148 SWR_NEW_FRAMEBUFFER)) {
1149 swr_jit_vs_key key;
1150 swr_generate_vs_key(key, ctx, ctx->vs);
1151 auto search = ctx->vs->map.find(key);
1152 PFN_VERTEX_FUNC func;
1153 if (search != ctx->vs->map.end()) {
1154 func = search->second->shader;
1155 } else {
1156 func = swr_compile_vs(ctx, key);
1157 }
1158 SwrSetVertexFunc(ctx->swrContext, func);
1159
1160 /* JIT sampler state */
1161 if (ctx->dirty & SWR_NEW_SAMPLER) {
1162 swr_update_sampler_state(ctx,
1163 PIPE_SHADER_VERTEX,
1164 key.nr_samplers,
1165 ctx->swrDC.samplersVS);
1166 }
1167
1168 /* JIT sampler view state */
1169 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1170 swr_update_texture_state(ctx,
1171 PIPE_SHADER_VERTEX,
1172 key.nr_sampler_views,
1173 ctx->swrDC.texturesVS);
1174 }
1175 }
1176
1177 /* FragmentShader */
1178 if (ctx->dirty & (SWR_NEW_FS | SWR_NEW_SAMPLER | SWR_NEW_SAMPLER_VIEW
1179 | SWR_NEW_RASTERIZER | SWR_NEW_FRAMEBUFFER)) {
1180 swr_jit_fs_key key;
1181 swr_generate_fs_key(key, ctx, ctx->fs);
1182 auto search = ctx->fs->map.find(key);
1183 PFN_PIXEL_KERNEL func;
1184 if (search != ctx->fs->map.end()) {
1185 func = search->second->shader;
1186 } else {
1187 func = swr_compile_fs(ctx, key);
1188 }
1189 SWR_PS_STATE psState = {0};
1190 psState.pfnPixelShader = func;
1191 psState.killsPixel = ctx->fs->info.base.uses_kill;
1192 psState.inputCoverage = SWR_INPUT_COVERAGE_NORMAL;
1193 psState.writesODepth = ctx->fs->info.base.writes_z;
1194 psState.usesSourceDepth = ctx->fs->info.base.reads_z;
1195 psState.shadingRate = SWR_SHADING_RATE_PIXEL; // XXX
1196 psState.numRenderTargets = ctx->framebuffer.nr_cbufs;
1197 psState.posOffset = SWR_PS_POSITION_SAMPLE_NONE; // XXX msaa
1198 uint32_t barycentricsMask = 0;
1199 #if 0
1200 // when we switch to mesa-master
1201 if (ctx->fs->info.base.uses_persp_center ||
1202 ctx->fs->info.base.uses_linear_center)
1203 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1204 if (ctx->fs->info.base.uses_persp_centroid ||
1205 ctx->fs->info.base.uses_linear_centroid)
1206 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1207 if (ctx->fs->info.base.uses_persp_sample ||
1208 ctx->fs->info.base.uses_linear_sample)
1209 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1210 #else
1211 for (unsigned i = 0; i < ctx->fs->info.base.num_inputs; i++) {
1212 switch (ctx->fs->info.base.input_interpolate_loc[i]) {
1213 case TGSI_INTERPOLATE_LOC_CENTER:
1214 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1215 break;
1216 case TGSI_INTERPOLATE_LOC_CENTROID:
1217 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1218 break;
1219 case TGSI_INTERPOLATE_LOC_SAMPLE:
1220 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1221 break;
1222 }
1223 }
1224 #endif
1225 psState.barycentricsMask = barycentricsMask;
1226 psState.usesUAV = false; // XXX
1227 psState.forceEarlyZ = false;
1228 SwrSetPixelShaderState(ctx->swrContext, &psState);
1229
1230 /* JIT sampler state */
1231 if (ctx->dirty & SWR_NEW_SAMPLER) {
1232 swr_update_sampler_state(ctx,
1233 PIPE_SHADER_FRAGMENT,
1234 key.nr_samplers,
1235 ctx->swrDC.samplersFS);
1236 }
1237
1238 /* JIT sampler view state */
1239 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1240 swr_update_texture_state(ctx,
1241 PIPE_SHADER_FRAGMENT,
1242 key.nr_sampler_views,
1243 ctx->swrDC.texturesFS);
1244 }
1245 }
1246
1247
1248 /* VertexShader Constants */
1249 if (ctx->dirty & SWR_NEW_VSCONSTANTS) {
1250 swr_update_constants(ctx, PIPE_SHADER_VERTEX);
1251 }
1252
1253 /* FragmentShader Constants */
1254 if (ctx->dirty & SWR_NEW_FSCONSTANTS) {
1255 swr_update_constants(ctx, PIPE_SHADER_FRAGMENT);
1256 }
1257
1258 /* Depth/stencil state */
1259 if (ctx->dirty & (SWR_NEW_DEPTH_STENCIL_ALPHA | SWR_NEW_FRAMEBUFFER)) {
1260 struct pipe_depth_state *depth = &(ctx->depth_stencil->depth);
1261 struct pipe_stencil_state *stencil = ctx->depth_stencil->stencil;
1262 SWR_DEPTH_STENCIL_STATE depthStencilState = {{0}};
1263 SWR_DEPTH_BOUNDS_STATE depthBoundsState = {0};
1264
1265 /* XXX, incomplete. Need to flesh out stencil & alpha test state
1266 struct pipe_stencil_state *front_stencil =
1267 ctx->depth_stencil.stencil[0];
1268 struct pipe_stencil_state *back_stencil = ctx->depth_stencil.stencil[1];
1269 struct pipe_alpha_state alpha;
1270 */
1271 if (stencil[0].enabled) {
1272 depthStencilState.stencilWriteEnable = 1;
1273 depthStencilState.stencilTestEnable = 1;
1274 depthStencilState.stencilTestFunc =
1275 swr_convert_depth_func(stencil[0].func);
1276
1277 depthStencilState.stencilPassDepthPassOp =
1278 swr_convert_stencil_op(stencil[0].zpass_op);
1279 depthStencilState.stencilPassDepthFailOp =
1280 swr_convert_stencil_op(stencil[0].zfail_op);
1281 depthStencilState.stencilFailOp =
1282 swr_convert_stencil_op(stencil[0].fail_op);
1283 depthStencilState.stencilWriteMask = stencil[0].writemask;
1284 depthStencilState.stencilTestMask = stencil[0].valuemask;
1285 depthStencilState.stencilRefValue = ctx->stencil_ref.ref_value[0];
1286 }
1287 if (stencil[1].enabled) {
1288 depthStencilState.doubleSidedStencilTestEnable = 1;
1289
1290 depthStencilState.backfaceStencilTestFunc =
1291 swr_convert_depth_func(stencil[1].func);
1292
1293 depthStencilState.backfaceStencilPassDepthPassOp =
1294 swr_convert_stencil_op(stencil[1].zpass_op);
1295 depthStencilState.backfaceStencilPassDepthFailOp =
1296 swr_convert_stencil_op(stencil[1].zfail_op);
1297 depthStencilState.backfaceStencilFailOp =
1298 swr_convert_stencil_op(stencil[1].fail_op);
1299 depthStencilState.backfaceStencilWriteMask = stencil[1].writemask;
1300 depthStencilState.backfaceStencilTestMask = stencil[1].valuemask;
1301
1302 depthStencilState.backfaceStencilRefValue =
1303 ctx->stencil_ref.ref_value[1];
1304 }
1305
1306 depthStencilState.depthTestEnable = depth->enabled;
1307 depthStencilState.depthTestFunc = swr_convert_depth_func(depth->func);
1308 depthStencilState.depthWriteEnable = depth->writemask;
1309 SwrSetDepthStencilState(ctx->swrContext, &depthStencilState);
1310
1311 depthBoundsState.depthBoundsTestEnable = depth->bounds_test;
1312 depthBoundsState.depthBoundsTestMinValue = depth->bounds_min;
1313 depthBoundsState.depthBoundsTestMaxValue = depth->bounds_max;
1314 SwrSetDepthBoundsState(ctx->swrContext, &depthBoundsState);
1315 }
1316
1317 /* Blend State */
1318 if (ctx->dirty & (SWR_NEW_BLEND |
1319 SWR_NEW_FRAMEBUFFER |
1320 SWR_NEW_DEPTH_STENCIL_ALPHA)) {
1321 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
1322
1323 SWR_BLEND_STATE blendState;
1324 memcpy(&blendState, &ctx->blend->blendState, sizeof(blendState));
1325 blendState.constantColor[0] = ctx->blend_color.color[0];
1326 blendState.constantColor[1] = ctx->blend_color.color[1];
1327 blendState.constantColor[2] = ctx->blend_color.color[2];
1328 blendState.constantColor[3] = ctx->blend_color.color[3];
1329 blendState.alphaTestReference =
1330 *((uint32_t*)&ctx->depth_stencil->alpha.ref_value);
1331
1332 // XXX MSAA
1333 blendState.sampleMask = 0;
1334 blendState.sampleCount = SWR_MULTISAMPLE_1X;
1335
1336 /* If there are no color buffers bound, disable writes on RT0
1337 * and skip loop */
1338 if (fb->nr_cbufs == 0) {
1339 blendState.renderTarget[0].writeDisableRed = 1;
1340 blendState.renderTarget[0].writeDisableGreen = 1;
1341 blendState.renderTarget[0].writeDisableBlue = 1;
1342 blendState.renderTarget[0].writeDisableAlpha = 1;
1343 SwrSetBlendFunc(ctx->swrContext, 0, NULL);
1344 }
1345 else
1346 for (int target = 0;
1347 target < std::min(SWR_NUM_RENDERTARGETS,
1348 PIPE_MAX_COLOR_BUFS);
1349 target++) {
1350 if (!fb->cbufs[target])
1351 continue;
1352
1353 struct swr_resource *colorBuffer =
1354 swr_resource(fb->cbufs[target]->texture);
1355
1356 BLEND_COMPILE_STATE compileState;
1357 memset(&compileState, 0, sizeof(compileState));
1358 compileState.format = colorBuffer->swr.format;
1359 memcpy(&compileState.blendState,
1360 &ctx->blend->compileState[target],
1361 sizeof(compileState.blendState));
1362
1363 const SWR_FORMAT_INFO& info = GetFormatInfo(compileState.format);
1364 if (compileState.blendState.logicOpEnable &&
1365 ((info.type[0] == SWR_TYPE_FLOAT) || info.isSRGB)) {
1366 compileState.blendState.logicOpEnable = false;
1367 }
1368
1369 if (info.type[0] == SWR_TYPE_SINT || info.type[0] == SWR_TYPE_UINT)
1370 compileState.blendState.blendEnable = false;
1371
1372 if (compileState.blendState.blendEnable == false &&
1373 compileState.blendState.logicOpEnable == false &&
1374 ctx->depth_stencil->alpha.enabled == 0) {
1375 SwrSetBlendFunc(ctx->swrContext, target, NULL);
1376 continue;
1377 }
1378
1379 compileState.desc.alphaTestEnable =
1380 ctx->depth_stencil->alpha.enabled;
1381 compileState.desc.independentAlphaBlendEnable =
1382 (compileState.blendState.sourceBlendFactor !=
1383 compileState.blendState.sourceAlphaBlendFactor) ||
1384 (compileState.blendState.destBlendFactor !=
1385 compileState.blendState.destAlphaBlendFactor) ||
1386 (compileState.blendState.colorBlendFunc !=
1387 compileState.blendState.alphaBlendFunc);
1388 compileState.desc.alphaToCoverageEnable =
1389 ctx->blend->pipe.alpha_to_coverage;
1390 compileState.desc.sampleMaskEnable = 0; // XXX
1391 compileState.desc.numSamples = 1; // XXX
1392
1393 compileState.alphaTestFunction =
1394 swr_convert_depth_func(ctx->depth_stencil->alpha.func);
1395 compileState.alphaTestFormat = ALPHA_TEST_FLOAT32; // xxx
1396
1397 compileState.Canonicalize();
1398
1399 PFN_BLEND_JIT_FUNC func = NULL;
1400 auto search = ctx->blendJIT->find(compileState);
1401 if (search != ctx->blendJIT->end()) {
1402 func = search->second;
1403 } else {
1404 HANDLE hJitMgr = screen->hJitMgr;
1405 func = JitCompileBlend(hJitMgr, compileState);
1406 debug_printf("BLEND shader %p\n", func);
1407 assert(func && "Error: BlendShader = NULL");
1408
1409 ctx->blendJIT->insert(std::make_pair(compileState, func));
1410 }
1411 SwrSetBlendFunc(ctx->swrContext, target, func);
1412 }
1413
1414 SwrSetBlendState(ctx->swrContext, &blendState);
1415 }
1416
1417 if (ctx->dirty & SWR_NEW_STIPPLE) {
1418 /* XXX What to do with this one??? SWR doesn't stipple */
1419 }
1420
1421 if (ctx->dirty & (SWR_NEW_VS | SWR_NEW_SO | SWR_NEW_RASTERIZER)) {
1422 ctx->vs->soState.rasterizerDisable =
1423 ctx->rasterizer->rasterizer_discard;
1424 SwrSetSoState(ctx->swrContext, &ctx->vs->soState);
1425
1426 pipe_stream_output_info *stream_output = &ctx->vs->pipe.stream_output;
1427
1428 for (uint32_t i = 0; i < ctx->num_so_targets; i++) {
1429 SWR_STREAMOUT_BUFFER buffer = {0};
1430 if (!ctx->so_targets[i])
1431 continue;
1432 buffer.enable = true;
1433 buffer.pBuffer =
1434 (uint32_t *)swr_resource_data(ctx->so_targets[i]->buffer);
1435 buffer.bufferSize = ctx->so_targets[i]->buffer_size >> 2;
1436 buffer.pitch = stream_output->stride[i];
1437 buffer.streamOffset = ctx->so_targets[i]->buffer_offset >> 2;
1438
1439 SwrSetSoBuffers(ctx->swrContext, &buffer, i);
1440 }
1441 }
1442
1443 if (ctx->dirty & SWR_NEW_CLIP) {
1444 // shader exporting clip distances overrides all user clip planes
1445 if (ctx->rasterizer->clip_plane_enable &&
1446 !ctx->vs->info.base.num_written_clipdistance)
1447 {
1448 swr_draw_context *pDC = &ctx->swrDC;
1449 memcpy(pDC->userClipPlanes,
1450 ctx->clip.ucp,
1451 sizeof(pDC->userClipPlanes));
1452 }
1453 }
1454
1455 // set up backend state
1456 SWR_BACKEND_STATE backendState = {0};
1457 backendState.numAttributes =
1458 ctx->vs->info.base.num_outputs - 1 +
1459 (ctx->rasterizer->sprite_coord_enable ? 1 : 0);
1460 for (unsigned i = 0; i < backendState.numAttributes; i++)
1461 backendState.numComponents[i] = 4;
1462 backendState.constantInterpolationMask =
1463 ctx->rasterizer->flatshade ?
1464 ctx->fs->flatConstantMask :
1465 ctx->fs->constantMask;
1466 backendState.pointSpriteTexCoordMask = ctx->fs->pointSpriteMask;
1467
1468 SwrSetBackendState(ctx->swrContext, &backendState);
1469
1470 /* Ensure that any in-progress attachment change StoreTiles finish */
1471 if (swr_is_fence_pending(screen->flush_fence))
1472 swr_fence_finish(pipe->screen, NULL, screen->flush_fence, 0);
1473
1474 /* Finally, update the in-use status of all resources involved in draw */
1475 swr_update_resource_status(pipe, p_draw_info);
1476
1477 ctx->dirty = post_update_dirty_flags;
1478 }
1479
1480
1481 static struct pipe_stream_output_target *
1482 swr_create_so_target(struct pipe_context *pipe,
1483 struct pipe_resource *buffer,
1484 unsigned buffer_offset,
1485 unsigned buffer_size)
1486 {
1487 struct pipe_stream_output_target *target;
1488
1489 target = CALLOC_STRUCT(pipe_stream_output_target);
1490 if (!target)
1491 return NULL;
1492
1493 target->context = pipe;
1494 target->reference.count = 1;
1495 pipe_resource_reference(&target->buffer, buffer);
1496 target->buffer_offset = buffer_offset;
1497 target->buffer_size = buffer_size;
1498 return target;
1499 }
1500
1501 static void
1502 swr_destroy_so_target(struct pipe_context *pipe,
1503 struct pipe_stream_output_target *target)
1504 {
1505 pipe_resource_reference(&target->buffer, NULL);
1506 FREE(target);
1507 }
1508
1509 static void
1510 swr_set_so_targets(struct pipe_context *pipe,
1511 unsigned num_targets,
1512 struct pipe_stream_output_target **targets,
1513 const unsigned *offsets)
1514 {
1515 struct swr_context *swr = swr_context(pipe);
1516 uint32_t i;
1517
1518 assert(num_targets < MAX_SO_STREAMS);
1519
1520 for (i = 0; i < num_targets; i++) {
1521 pipe_so_target_reference(
1522 (struct pipe_stream_output_target **)&swr->so_targets[i],
1523 targets[i]);
1524 }
1525
1526 for (/* fall-through */; i < swr->num_so_targets; i++) {
1527 pipe_so_target_reference(
1528 (struct pipe_stream_output_target **)&swr->so_targets[i], NULL);
1529 }
1530
1531 swr->num_so_targets = num_targets;
1532
1533 swr->dirty = SWR_NEW_SO;
1534 }
1535
1536
1537 void
1538 swr_state_init(struct pipe_context *pipe)
1539 {
1540 pipe->create_blend_state = swr_create_blend_state;
1541 pipe->bind_blend_state = swr_bind_blend_state;
1542 pipe->delete_blend_state = swr_delete_blend_state;
1543
1544 pipe->create_depth_stencil_alpha_state = swr_create_depth_stencil_state;
1545 pipe->bind_depth_stencil_alpha_state = swr_bind_depth_stencil_state;
1546 pipe->delete_depth_stencil_alpha_state = swr_delete_depth_stencil_state;
1547
1548 pipe->create_rasterizer_state = swr_create_rasterizer_state;
1549 pipe->bind_rasterizer_state = swr_bind_rasterizer_state;
1550 pipe->delete_rasterizer_state = swr_delete_rasterizer_state;
1551
1552 pipe->create_sampler_state = swr_create_sampler_state;
1553 pipe->bind_sampler_states = swr_bind_sampler_states;
1554 pipe->delete_sampler_state = swr_delete_sampler_state;
1555
1556 pipe->create_sampler_view = swr_create_sampler_view;
1557 pipe->set_sampler_views = swr_set_sampler_views;
1558 pipe->sampler_view_destroy = swr_sampler_view_destroy;
1559
1560 pipe->create_vs_state = swr_create_vs_state;
1561 pipe->bind_vs_state = swr_bind_vs_state;
1562 pipe->delete_vs_state = swr_delete_vs_state;
1563
1564 pipe->create_fs_state = swr_create_fs_state;
1565 pipe->bind_fs_state = swr_bind_fs_state;
1566 pipe->delete_fs_state = swr_delete_fs_state;
1567
1568 pipe->set_constant_buffer = swr_set_constant_buffer;
1569
1570 pipe->create_vertex_elements_state = swr_create_vertex_elements_state;
1571 pipe->bind_vertex_elements_state = swr_bind_vertex_elements_state;
1572 pipe->delete_vertex_elements_state = swr_delete_vertex_elements_state;
1573
1574 pipe->set_vertex_buffers = swr_set_vertex_buffers;
1575 pipe->set_index_buffer = swr_set_index_buffer;
1576
1577 pipe->set_polygon_stipple = swr_set_polygon_stipple;
1578 pipe->set_clip_state = swr_set_clip_state;
1579 pipe->set_scissor_states = swr_set_scissor_states;
1580 pipe->set_viewport_states = swr_set_viewport_states;
1581
1582 pipe->set_framebuffer_state = swr_set_framebuffer_state;
1583
1584 pipe->set_blend_color = swr_set_blend_color;
1585 pipe->set_stencil_ref = swr_set_stencil_ref;
1586
1587 pipe->set_sample_mask = swr_set_sample_mask;
1588
1589 pipe->create_stream_output_target = swr_create_so_target;
1590 pipe->stream_output_target_destroy = swr_destroy_so_target;
1591 pipe->set_stream_output_targets = swr_set_so_targets;
1592 }