swr/rast: Fix read-back of viewport array index
[mesa.git] / src / gallium / drivers / swr / swr_state.cpp
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16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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23
24 // llvm redefines DEBUG
25 #pragma push_macro("DEBUG")
26 #undef DEBUG
27 #include "JitManager.h"
28 #pragma pop_macro("DEBUG")
29
30 #include "common/os.h"
31 #include "jit_api.h"
32 #include "gen_state_llvm.h"
33 #include "core/multisample.h"
34
35 #include "gallivm/lp_bld_tgsi.h"
36 #include "util/u_format.h"
37
38 #include "util/u_memory.h"
39 #include "util/u_inlines.h"
40 #include "util/u_helpers.h"
41 #include "util/u_framebuffer.h"
42 #include "util/u_viewport.h"
43 #include "util/u_prim.h"
44
45 #include "swr_state.h"
46 #include "swr_context.h"
47 #include "gen_swr_context_llvm.h"
48 #include "swr_screen.h"
49 #include "swr_resource.h"
50 #include "swr_tex_sample.h"
51 #include "swr_scratch.h"
52 #include "swr_shader.h"
53 #include "swr_fence.h"
54
55 /* These should be pulled out into separate files as necessary
56 * Just initializing everything here to get going. */
57
58 static void *
59 swr_create_blend_state(struct pipe_context *pipe,
60 const struct pipe_blend_state *blend)
61 {
62 struct swr_blend_state *state = CALLOC_STRUCT(swr_blend_state);
63
64 memcpy(&state->pipe, blend, sizeof(*blend));
65
66 struct pipe_blend_state *pipe_blend = &state->pipe;
67
68 for (int target = 0;
69 target < std::min(SWR_NUM_RENDERTARGETS, PIPE_MAX_COLOR_BUFS);
70 target++) {
71
72 struct pipe_rt_blend_state *rt_blend = &pipe_blend->rt[target];
73 SWR_RENDER_TARGET_BLEND_STATE &blendState =
74 state->blendState.renderTarget[target];
75 RENDER_TARGET_BLEND_COMPILE_STATE &compileState =
76 state->compileState[target];
77
78 if (target != 0 && !pipe_blend->independent_blend_enable) {
79 memcpy(&compileState,
80 &state->compileState[0],
81 sizeof(RENDER_TARGET_BLEND_COMPILE_STATE));
82 continue;
83 }
84
85 compileState.blendEnable = rt_blend->blend_enable;
86 if (compileState.blendEnable) {
87 compileState.sourceAlphaBlendFactor =
88 swr_convert_blend_factor(rt_blend->alpha_src_factor);
89 compileState.destAlphaBlendFactor =
90 swr_convert_blend_factor(rt_blend->alpha_dst_factor);
91 compileState.sourceBlendFactor =
92 swr_convert_blend_factor(rt_blend->rgb_src_factor);
93 compileState.destBlendFactor =
94 swr_convert_blend_factor(rt_blend->rgb_dst_factor);
95
96 compileState.colorBlendFunc =
97 swr_convert_blend_func(rt_blend->rgb_func);
98 compileState.alphaBlendFunc =
99 swr_convert_blend_func(rt_blend->alpha_func);
100 }
101 compileState.logicOpEnable = state->pipe.logicop_enable;
102 if (compileState.logicOpEnable) {
103 compileState.logicOpFunc =
104 swr_convert_logic_op(state->pipe.logicop_func);
105 }
106
107 blendState.writeDisableRed =
108 (rt_blend->colormask & PIPE_MASK_R) ? 0 : 1;
109 blendState.writeDisableGreen =
110 (rt_blend->colormask & PIPE_MASK_G) ? 0 : 1;
111 blendState.writeDisableBlue =
112 (rt_blend->colormask & PIPE_MASK_B) ? 0 : 1;
113 blendState.writeDisableAlpha =
114 (rt_blend->colormask & PIPE_MASK_A) ? 0 : 1;
115
116 if (rt_blend->colormask == 0)
117 compileState.blendEnable = false;
118 }
119
120 return state;
121 }
122
123 static void
124 swr_bind_blend_state(struct pipe_context *pipe, void *blend)
125 {
126 struct swr_context *ctx = swr_context(pipe);
127
128 if (ctx->blend == blend)
129 return;
130
131 ctx->blend = (swr_blend_state *)blend;
132
133 ctx->dirty |= SWR_NEW_BLEND;
134 }
135
136 static void
137 swr_delete_blend_state(struct pipe_context *pipe, void *blend)
138 {
139 FREE(blend);
140 }
141
142 static void
143 swr_set_blend_color(struct pipe_context *pipe,
144 const struct pipe_blend_color *color)
145 {
146 struct swr_context *ctx = swr_context(pipe);
147
148 ctx->blend_color = *color;
149
150 ctx->dirty |= SWR_NEW_BLEND;
151 }
152
153 static void
154 swr_set_stencil_ref(struct pipe_context *pipe,
155 const struct pipe_stencil_ref *ref)
156 {
157 struct swr_context *ctx = swr_context(pipe);
158
159 ctx->stencil_ref = *ref;
160
161 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
162 }
163
164 static void *
165 swr_create_depth_stencil_state(
166 struct pipe_context *pipe,
167 const struct pipe_depth_stencil_alpha_state *depth_stencil)
168 {
169 struct pipe_depth_stencil_alpha_state *state;
170
171 state = (pipe_depth_stencil_alpha_state *)mem_dup(depth_stencil,
172 sizeof *depth_stencil);
173
174 return state;
175 }
176
177 static void
178 swr_bind_depth_stencil_state(struct pipe_context *pipe, void *depth_stencil)
179 {
180 struct swr_context *ctx = swr_context(pipe);
181
182 if (ctx->depth_stencil == (pipe_depth_stencil_alpha_state *)depth_stencil)
183 return;
184
185 ctx->depth_stencil = (pipe_depth_stencil_alpha_state *)depth_stencil;
186
187 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA;
188 }
189
190 static void
191 swr_delete_depth_stencil_state(struct pipe_context *pipe, void *depth)
192 {
193 FREE(depth);
194 }
195
196
197 static void *
198 swr_create_rasterizer_state(struct pipe_context *pipe,
199 const struct pipe_rasterizer_state *rast)
200 {
201 struct pipe_rasterizer_state *state;
202 state = (pipe_rasterizer_state *)mem_dup(rast, sizeof *rast);
203
204 return state;
205 }
206
207 static void
208 swr_bind_rasterizer_state(struct pipe_context *pipe, void *handle)
209 {
210 struct swr_context *ctx = swr_context(pipe);
211 const struct pipe_rasterizer_state *rasterizer =
212 (const struct pipe_rasterizer_state *)handle;
213
214 if (ctx->rasterizer == (pipe_rasterizer_state *)rasterizer)
215 return;
216
217 ctx->rasterizer = (pipe_rasterizer_state *)rasterizer;
218
219 ctx->dirty |= SWR_NEW_RASTERIZER;
220 }
221
222 static void
223 swr_delete_rasterizer_state(struct pipe_context *pipe, void *rasterizer)
224 {
225 FREE(rasterizer);
226 }
227
228
229 static void *
230 swr_create_sampler_state(struct pipe_context *pipe,
231 const struct pipe_sampler_state *sampler)
232 {
233 struct pipe_sampler_state *state =
234 (pipe_sampler_state *)mem_dup(sampler, sizeof *sampler);
235
236 return state;
237 }
238
239 static void
240 swr_bind_sampler_states(struct pipe_context *pipe,
241 enum pipe_shader_type shader,
242 unsigned start,
243 unsigned num,
244 void **samplers)
245 {
246 struct swr_context *ctx = swr_context(pipe);
247 unsigned i;
248
249 assert(shader < PIPE_SHADER_TYPES);
250 assert(start + num <= ARRAY_SIZE(ctx->samplers[shader]));
251
252 /* set the new samplers */
253 ctx->num_samplers[shader] = num;
254 for (i = 0; i < num; i++) {
255 ctx->samplers[shader][start + i] = (pipe_sampler_state *)samplers[i];
256 }
257
258 ctx->dirty |= SWR_NEW_SAMPLER;
259 }
260
261 static void
262 swr_delete_sampler_state(struct pipe_context *pipe, void *sampler)
263 {
264 FREE(sampler);
265 }
266
267
268 static struct pipe_sampler_view *
269 swr_create_sampler_view(struct pipe_context *pipe,
270 struct pipe_resource *texture,
271 const struct pipe_sampler_view *templ)
272 {
273 struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view);
274
275 if (view) {
276 *view = *templ;
277 view->reference.count = 1;
278 view->texture = NULL;
279 pipe_resource_reference(&view->texture, texture);
280 view->context = pipe;
281 }
282
283 return view;
284 }
285
286 static void
287 swr_set_sampler_views(struct pipe_context *pipe,
288 enum pipe_shader_type shader,
289 unsigned start,
290 unsigned num,
291 struct pipe_sampler_view **views)
292 {
293 struct swr_context *ctx = swr_context(pipe);
294 uint i;
295
296 assert(num <= PIPE_MAX_SHADER_SAMPLER_VIEWS);
297
298 assert(shader < PIPE_SHADER_TYPES);
299 assert(start + num <= ARRAY_SIZE(ctx->sampler_views[shader]));
300
301 /* set the new sampler views */
302 ctx->num_sampler_views[shader] = num;
303 for (i = 0; i < num; i++) {
304 /* Note: we're using pipe_sampler_view_release() here to work around
305 * a possible crash when the old view belongs to another context that
306 * was already destroyed.
307 */
308 pipe_sampler_view_release(pipe, &ctx->sampler_views[shader][start + i]);
309 pipe_sampler_view_reference(&ctx->sampler_views[shader][start + i],
310 views[i]);
311 }
312
313 ctx->dirty |= SWR_NEW_SAMPLER_VIEW;
314 }
315
316 static void
317 swr_sampler_view_destroy(struct pipe_context *pipe,
318 struct pipe_sampler_view *view)
319 {
320 pipe_resource_reference(&view->texture, NULL);
321 FREE(view);
322 }
323
324 static void *
325 swr_create_vs_state(struct pipe_context *pipe,
326 const struct pipe_shader_state *vs)
327 {
328 struct swr_vertex_shader *swr_vs = new swr_vertex_shader;
329 if (!swr_vs)
330 return NULL;
331
332 swr_vs->pipe.tokens = tgsi_dup_tokens(vs->tokens);
333 swr_vs->pipe.stream_output = vs->stream_output;
334
335 lp_build_tgsi_info(vs->tokens, &swr_vs->info);
336
337 swr_vs->soState = {0};
338
339 if (swr_vs->pipe.stream_output.num_outputs) {
340 pipe_stream_output_info *stream_output = &swr_vs->pipe.stream_output;
341
342 swr_vs->soState.soEnable = true;
343 // soState.rasterizerDisable set on state dirty
344 // soState.streamToRasterizer not used
345
346 for (uint32_t i = 0; i < stream_output->num_outputs; i++) {
347 swr_vs->soState.streamMasks[stream_output->output[i].stream] |=
348 1 << (stream_output->output[i].register_index - 1);
349 }
350 for (uint32_t i = 0; i < MAX_SO_STREAMS; i++) {
351 swr_vs->soState.streamNumEntries[i] =
352 _mm_popcnt_u32(swr_vs->soState.streamMasks[i]);
353 }
354 }
355
356 return swr_vs;
357 }
358
359 static void
360 swr_bind_vs_state(struct pipe_context *pipe, void *vs)
361 {
362 struct swr_context *ctx = swr_context(pipe);
363
364 if (ctx->vs == vs)
365 return;
366
367 ctx->vs = (swr_vertex_shader *)vs;
368 ctx->dirty |= SWR_NEW_VS;
369 }
370
371 static void
372 swr_delete_vs_state(struct pipe_context *pipe, void *vs)
373 {
374 struct swr_vertex_shader *swr_vs = (swr_vertex_shader *)vs;
375 FREE((void *)swr_vs->pipe.tokens);
376 struct swr_screen *screen = swr_screen(pipe->screen);
377
378 /* Defer deletion of vs state */
379 swr_fence_work_delete_vs(screen->flush_fence, swr_vs);
380 }
381
382 static void *
383 swr_create_fs_state(struct pipe_context *pipe,
384 const struct pipe_shader_state *fs)
385 {
386 struct swr_fragment_shader *swr_fs = new swr_fragment_shader;
387 if (!swr_fs)
388 return NULL;
389
390 swr_fs->pipe.tokens = tgsi_dup_tokens(fs->tokens);
391
392 lp_build_tgsi_info(fs->tokens, &swr_fs->info);
393
394 return swr_fs;
395 }
396
397
398 static void
399 swr_bind_fs_state(struct pipe_context *pipe, void *fs)
400 {
401 struct swr_context *ctx = swr_context(pipe);
402
403 if (ctx->fs == fs)
404 return;
405
406 ctx->fs = (swr_fragment_shader *)fs;
407 ctx->dirty |= SWR_NEW_FS;
408 }
409
410 static void
411 swr_delete_fs_state(struct pipe_context *pipe, void *fs)
412 {
413 struct swr_fragment_shader *swr_fs = (swr_fragment_shader *)fs;
414 FREE((void *)swr_fs->pipe.tokens);
415 struct swr_screen *screen = swr_screen(pipe->screen);
416
417 /* Defer deleton of fs state */
418 swr_fence_work_delete_fs(screen->flush_fence, swr_fs);
419 }
420
421 static void *
422 swr_create_gs_state(struct pipe_context *pipe,
423 const struct pipe_shader_state *gs)
424 {
425 struct swr_geometry_shader *swr_gs = new swr_geometry_shader;
426 if (!swr_gs)
427 return NULL;
428
429 swr_gs->pipe.tokens = tgsi_dup_tokens(gs->tokens);
430
431 lp_build_tgsi_info(gs->tokens, &swr_gs->info);
432
433 return swr_gs;
434 }
435
436
437 static void
438 swr_bind_gs_state(struct pipe_context *pipe, void *gs)
439 {
440 struct swr_context *ctx = swr_context(pipe);
441
442 if (ctx->gs == gs)
443 return;
444
445 ctx->gs = (swr_geometry_shader *)gs;
446 ctx->dirty |= SWR_NEW_GS;
447 }
448
449 static void
450 swr_delete_gs_state(struct pipe_context *pipe, void *gs)
451 {
452 struct swr_geometry_shader *swr_gs = (swr_geometry_shader *)gs;
453 FREE((void *)swr_gs->pipe.tokens);
454 struct swr_screen *screen = swr_screen(pipe->screen);
455
456 /* Defer deleton of fs state */
457 swr_fence_work_delete_gs(screen->flush_fence, swr_gs);
458 }
459
460 static void
461 swr_set_constant_buffer(struct pipe_context *pipe,
462 enum pipe_shader_type shader,
463 uint index,
464 const struct pipe_constant_buffer *cb)
465 {
466 struct swr_context *ctx = swr_context(pipe);
467 struct pipe_resource *constants = cb ? cb->buffer : NULL;
468
469 assert(shader < PIPE_SHADER_TYPES);
470 assert(index < ARRAY_SIZE(ctx->constants[shader]));
471
472 /* note: reference counting */
473 util_copy_constant_buffer(&ctx->constants[shader][index], cb);
474
475 if (shader == PIPE_SHADER_VERTEX) {
476 ctx->dirty |= SWR_NEW_VSCONSTANTS;
477 } else if (shader == PIPE_SHADER_FRAGMENT) {
478 ctx->dirty |= SWR_NEW_FSCONSTANTS;
479 } else if (shader == PIPE_SHADER_GEOMETRY) {
480 ctx->dirty |= SWR_NEW_GSCONSTANTS;
481 }
482
483 if (cb && cb->user_buffer) {
484 pipe_resource_reference(&constants, NULL);
485 }
486 }
487
488
489 static void *
490 swr_create_vertex_elements_state(struct pipe_context *pipe,
491 unsigned num_elements,
492 const struct pipe_vertex_element *attribs)
493 {
494 struct swr_vertex_element_state *velems;
495 assert(num_elements <= PIPE_MAX_ATTRIBS);
496 velems = new swr_vertex_element_state;
497 if (velems) {
498 memset(&velems->fsState, 0, sizeof(velems->fsState));
499 velems->fsState.bVertexIDOffsetEnable = true;
500 velems->fsState.numAttribs = num_elements;
501 for (unsigned i = 0; i < num_elements; i++) {
502 // XXX: we should do this keyed on the VS usage info
503
504 const struct util_format_description *desc =
505 util_format_description(attribs[i].src_format);
506
507 velems->fsState.layout[i].AlignedByteOffset = attribs[i].src_offset;
508 velems->fsState.layout[i].Format =
509 mesa_to_swr_format(attribs[i].src_format);
510 velems->fsState.layout[i].StreamIndex =
511 attribs[i].vertex_buffer_index;
512 velems->fsState.layout[i].InstanceEnable =
513 attribs[i].instance_divisor != 0;
514 velems->fsState.layout[i].ComponentControl0 =
515 desc->channel[0].type != UTIL_FORMAT_TYPE_VOID
516 ? ComponentControl::StoreSrc
517 : ComponentControl::Store0;
518 velems->fsState.layout[i].ComponentControl1 =
519 desc->channel[1].type != UTIL_FORMAT_TYPE_VOID
520 ? ComponentControl::StoreSrc
521 : ComponentControl::Store0;
522 velems->fsState.layout[i].ComponentControl2 =
523 desc->channel[2].type != UTIL_FORMAT_TYPE_VOID
524 ? ComponentControl::StoreSrc
525 : ComponentControl::Store0;
526 velems->fsState.layout[i].ComponentControl3 =
527 desc->channel[3].type != UTIL_FORMAT_TYPE_VOID
528 ? ComponentControl::StoreSrc
529 : ComponentControl::Store1Fp;
530 velems->fsState.layout[i].ComponentPacking = ComponentEnable::XYZW;
531 velems->fsState.layout[i].InstanceDataStepRate =
532 attribs[i].instance_divisor;
533
534 /* Calculate the pitch of each stream */
535 const SWR_FORMAT_INFO &swr_desc = GetFormatInfo(
536 mesa_to_swr_format(attribs[i].src_format));
537 velems->stream_pitch[attribs[i].vertex_buffer_index] += swr_desc.Bpp;
538
539 if (attribs[i].instance_divisor != 0) {
540 velems->instanced_bufs |= 1U << attribs[i].vertex_buffer_index;
541 uint32_t *min_instance_div =
542 &velems->min_instance_div[attribs[i].vertex_buffer_index];
543 if (!*min_instance_div ||
544 attribs[i].instance_divisor < *min_instance_div)
545 *min_instance_div = attribs[i].instance_divisor;
546 }
547 }
548 }
549
550 return velems;
551 }
552
553 static void
554 swr_bind_vertex_elements_state(struct pipe_context *pipe, void *velems)
555 {
556 struct swr_context *ctx = swr_context(pipe);
557 struct swr_vertex_element_state *swr_velems =
558 (struct swr_vertex_element_state *)velems;
559
560 ctx->velems = swr_velems;
561 ctx->dirty |= SWR_NEW_VERTEX;
562 }
563
564 static void
565 swr_delete_vertex_elements_state(struct pipe_context *pipe, void *velems)
566 {
567 struct swr_vertex_element_state *swr_velems =
568 (struct swr_vertex_element_state *) velems;
569 /* XXX Need to destroy fetch shader? */
570 delete swr_velems;
571 }
572
573
574 static void
575 swr_set_vertex_buffers(struct pipe_context *pipe,
576 unsigned start_slot,
577 unsigned num_elements,
578 const struct pipe_vertex_buffer *buffers)
579 {
580 struct swr_context *ctx = swr_context(pipe);
581
582 assert(num_elements <= PIPE_MAX_ATTRIBS);
583
584 util_set_vertex_buffers_count(ctx->vertex_buffer,
585 &ctx->num_vertex_buffers,
586 buffers,
587 start_slot,
588 num_elements);
589
590 ctx->dirty |= SWR_NEW_VERTEX;
591 }
592
593
594 static void
595 swr_set_polygon_stipple(struct pipe_context *pipe,
596 const struct pipe_poly_stipple *stipple)
597 {
598 struct swr_context *ctx = swr_context(pipe);
599
600 ctx->poly_stipple.pipe = *stipple; /* struct copy */
601 ctx->dirty |= SWR_NEW_STIPPLE;
602 }
603
604 static void
605 swr_set_clip_state(struct pipe_context *pipe,
606 const struct pipe_clip_state *clip)
607 {
608 struct swr_context *ctx = swr_context(pipe);
609
610 ctx->clip = *clip;
611 /* XXX Unimplemented, but prevents crash */
612
613 ctx->dirty |= SWR_NEW_CLIP;
614 }
615
616
617 static void
618 swr_set_scissor_states(struct pipe_context *pipe,
619 unsigned start_slot,
620 unsigned num_viewports,
621 const struct pipe_scissor_state *scissor)
622 {
623 struct swr_context *ctx = swr_context(pipe);
624
625 ctx->scissor = *scissor;
626 ctx->swr_scissor.xmin = scissor->minx;
627 ctx->swr_scissor.xmax = scissor->maxx;
628 ctx->swr_scissor.ymin = scissor->miny;
629 ctx->swr_scissor.ymax = scissor->maxy;
630 ctx->dirty |= SWR_NEW_SCISSOR;
631 }
632
633 static void
634 swr_set_viewport_states(struct pipe_context *pipe,
635 unsigned start_slot,
636 unsigned num_viewports,
637 const struct pipe_viewport_state *vpt)
638 {
639 struct swr_context *ctx = swr_context(pipe);
640
641 ctx->viewport = *vpt;
642 ctx->dirty |= SWR_NEW_VIEWPORT;
643 }
644
645
646 static void
647 swr_set_framebuffer_state(struct pipe_context *pipe,
648 const struct pipe_framebuffer_state *fb)
649 {
650 struct swr_context *ctx = swr_context(pipe);
651
652 boolean changed = !util_framebuffer_state_equal(&ctx->framebuffer, fb);
653
654 assert(fb->width <= KNOB_GUARDBAND_WIDTH);
655 assert(fb->height <= KNOB_GUARDBAND_HEIGHT);
656
657 if (changed) {
658 util_copy_framebuffer_state(&ctx->framebuffer, fb);
659
660 /* 0 and 1 both indicate no msaa. Core doesn't understand 0 samples */
661 ctx->framebuffer.samples = std::max((ubyte)1, ctx->framebuffer.samples);
662
663 ctx->dirty |= SWR_NEW_FRAMEBUFFER;
664 }
665 }
666
667
668 static void
669 swr_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
670 {
671 struct swr_context *ctx = swr_context(pipe);
672
673 if (sample_mask != ctx->sample_mask) {
674 ctx->sample_mask = sample_mask;
675 ctx->dirty |= SWR_NEW_RASTERIZER;
676 }
677 }
678
679 /*
680 * MSAA fixed sample position table
681 * used by update_derived and get_sample_position
682 * (integer locations on a 16x16 grid)
683 */
684 static const uint8_t swr_sample_positions[][2] =
685 { /* 1x*/ { 8, 8},
686 /* 2x*/ {12,12},{ 4, 4},
687 /* 4x*/ { 6, 2},{14, 6},{ 2,10},{10,14},
688 /* 8x*/ { 9, 5},{ 7,11},{13, 9},{ 5, 3},
689 { 3,13},{ 1, 7},{11,15},{15, 1},
690 /*16x*/ { 9, 9},{ 7, 5},{ 5,10},{12, 7},
691 { 3, 6},{10,13},{13,11},{11, 3},
692 { 6,14},{ 8, 1},{ 4, 2},{ 2,12},
693 { 0, 8},{15, 4},{14,15},{ 1, 0} };
694
695 static void
696 swr_get_sample_position(struct pipe_context *pipe,
697 unsigned sample_count, unsigned sample_index,
698 float *out_value)
699 {
700 /* validate sample_count */
701 sample_count = GetNumSamples(GetSampleCount(sample_count));
702
703 const uint8_t *sample = swr_sample_positions[sample_count-1 + sample_index];
704 out_value[0] = sample[0] / 16.0f;
705 out_value[1] = sample[1] / 16.0f;
706 }
707
708
709 /*
710 * Update resource in-use status
711 * All resources bound to color or depth targets marked as WRITE resources.
712 * VBO Vertex/index buffers and texture views marked as READ resources.
713 */
714 void
715 swr_update_resource_status(struct pipe_context *pipe,
716 const struct pipe_draw_info *p_draw_info)
717 {
718 struct swr_context *ctx = swr_context(pipe);
719 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
720
721 /* colorbuffer targets */
722 if (fb->nr_cbufs)
723 for (uint32_t i = 0; i < fb->nr_cbufs; ++i)
724 if (fb->cbufs[i])
725 swr_resource_write(fb->cbufs[i]->texture);
726
727 /* depth/stencil target */
728 if (fb->zsbuf)
729 swr_resource_write(fb->zsbuf->texture);
730
731 /* VBO vertex buffers */
732 for (uint32_t i = 0; i < ctx->num_vertex_buffers; i++) {
733 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
734 if (!vb->is_user_buffer)
735 swr_resource_read(vb->buffer.resource);
736 }
737
738 /* VBO index buffer */
739 if (p_draw_info && p_draw_info->index_size) {
740 if (!p_draw_info->has_user_indices)
741 swr_resource_read(p_draw_info->index.resource);
742 }
743
744 /* transform feedback buffers */
745 for (uint32_t i = 0; i < ctx->num_so_targets; i++) {
746 struct pipe_stream_output_target *target = ctx->so_targets[i];
747 if (target && target->buffer)
748 swr_resource_write(target->buffer);
749 }
750
751 /* texture sampler views */
752 for (uint32_t j : {PIPE_SHADER_VERTEX, PIPE_SHADER_FRAGMENT}) {
753 for (uint32_t i = 0; i < ctx->num_sampler_views[j]; i++) {
754 struct pipe_sampler_view *view = ctx->sampler_views[j][i];
755 if (view)
756 swr_resource_read(view->texture);
757 }
758 }
759
760 /* constant buffers */
761 for (uint32_t j : {PIPE_SHADER_VERTEX, PIPE_SHADER_FRAGMENT}) {
762 for (uint32_t i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
763 struct pipe_constant_buffer *cb = &ctx->constants[j][i];
764 if (cb->buffer)
765 swr_resource_read(cb->buffer);
766 }
767 }
768 }
769
770 static void
771 swr_update_texture_state(struct swr_context *ctx,
772 enum pipe_shader_type shader_type,
773 unsigned num_sampler_views,
774 swr_jit_texture *textures)
775 {
776 for (unsigned i = 0; i < num_sampler_views; i++) {
777 struct pipe_sampler_view *view =
778 ctx->sampler_views[shader_type][i];
779 struct swr_jit_texture *jit_tex = &textures[i];
780
781 memset(jit_tex, 0, sizeof(*jit_tex));
782 if (view) {
783 struct pipe_resource *res = view->texture;
784 struct swr_resource *swr_res = swr_resource(res);
785 SWR_SURFACE_STATE *swr = &swr_res->swr;
786 size_t *mip_offsets = swr_res->mip_offsets;
787 if (swr_res->has_depth && swr_res->has_stencil &&
788 !util_format_has_depth(util_format_description(view->format))) {
789 swr = &swr_res->secondary;
790 mip_offsets = swr_res->secondary_mip_offsets;
791 }
792
793 jit_tex->width = res->width0;
794 jit_tex->height = res->height0;
795 jit_tex->base_ptr = swr->pBaseAddress;
796 if (view->target != PIPE_BUFFER) {
797 jit_tex->first_level = view->u.tex.first_level;
798 jit_tex->last_level = view->u.tex.last_level;
799 if (view->target == PIPE_TEXTURE_3D)
800 jit_tex->depth = res->depth0;
801 else
802 jit_tex->depth =
803 view->u.tex.last_layer - view->u.tex.first_layer + 1;
804 jit_tex->base_ptr += view->u.tex.first_layer *
805 swr->qpitch * swr->pitch;
806 } else {
807 unsigned view_blocksize = util_format_get_blocksize(view->format);
808 jit_tex->base_ptr += view->u.buf.offset;
809 jit_tex->width = view->u.buf.size / view_blocksize;
810 jit_tex->depth = 1;
811 }
812
813 for (unsigned level = jit_tex->first_level;
814 level <= jit_tex->last_level;
815 level++) {
816 jit_tex->row_stride[level] = swr->pitch;
817 jit_tex->img_stride[level] = swr->qpitch * swr->pitch;
818 jit_tex->mip_offsets[level] = mip_offsets[level];
819 }
820 }
821 }
822 }
823
824 static void
825 swr_update_sampler_state(struct swr_context *ctx,
826 enum pipe_shader_type shader_type,
827 unsigned num_samplers,
828 swr_jit_sampler *samplers)
829 {
830 for (unsigned i = 0; i < num_samplers; i++) {
831 const struct pipe_sampler_state *sampler =
832 ctx->samplers[shader_type][i];
833
834 if (sampler) {
835 samplers[i].min_lod = sampler->min_lod;
836 samplers[i].max_lod = sampler->max_lod;
837 samplers[i].lod_bias = sampler->lod_bias;
838 COPY_4V(samplers[i].border_color, sampler->border_color.f);
839 }
840 }
841 }
842
843 static void
844 swr_update_constants(struct swr_context *ctx, enum pipe_shader_type shaderType)
845 {
846 swr_draw_context *pDC = &ctx->swrDC;
847
848 const float **constant;
849 uint32_t *num_constants;
850 struct swr_scratch_space *scratch;
851
852 switch (shaderType) {
853 case PIPE_SHADER_VERTEX:
854 constant = pDC->constantVS;
855 num_constants = pDC->num_constantsVS;
856 scratch = &ctx->scratch->vs_constants;
857 break;
858 case PIPE_SHADER_FRAGMENT:
859 constant = pDC->constantFS;
860 num_constants = pDC->num_constantsFS;
861 scratch = &ctx->scratch->fs_constants;
862 break;
863 case PIPE_SHADER_GEOMETRY:
864 constant = pDC->constantGS;
865 num_constants = pDC->num_constantsGS;
866 scratch = &ctx->scratch->gs_constants;
867 break;
868 default:
869 debug_printf("Unsupported shader type constants\n");
870 return;
871 }
872
873 for (UINT i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) {
874 const pipe_constant_buffer *cb = &ctx->constants[shaderType][i];
875 num_constants[i] = cb->buffer_size;
876 if (cb->buffer) {
877 constant[i] =
878 (const float *)(swr_resource_data(cb->buffer) +
879 cb->buffer_offset);
880 } else {
881 /* Need to copy these constants to scratch space */
882 if (cb->user_buffer && cb->buffer_size) {
883 const void *ptr =
884 ((const uint8_t *)cb->user_buffer + cb->buffer_offset);
885 uint32_t size = AlignUp(cb->buffer_size, 4);
886 ptr = swr_copy_to_scratch_space(ctx, scratch, ptr, size);
887 constant[i] = (const float *)ptr;
888 }
889 }
890 }
891 }
892
893 static bool
894 swr_change_rt(struct swr_context *ctx,
895 unsigned attachment,
896 const struct pipe_surface *sf)
897 {
898 swr_draw_context *pDC = &ctx->swrDC;
899 struct SWR_SURFACE_STATE *rt = &pDC->renderTargets[attachment];
900
901 /* Do nothing if the render target hasn't changed */
902 if ((!sf || !sf->texture) && rt->pBaseAddress == nullptr)
903 return false;
904
905 /* Deal with disabling RT up front */
906 if (!sf || !sf->texture) {
907 /* If detaching attachment, mark tiles as RESOLVED so core
908 * won't try to load from non-existent target. */
909 swr_store_render_target(&ctx->pipe, attachment, SWR_TILE_RESOLVED);
910 *rt = {0};
911 return true;
912 }
913
914 const struct swr_resource *swr = swr_resource(sf->texture);
915 const SWR_SURFACE_STATE *swr_surface = &swr->swr;
916 SWR_FORMAT fmt = mesa_to_swr_format(sf->format);
917
918 if (attachment == SWR_ATTACHMENT_STENCIL && swr->secondary.pBaseAddress) {
919 swr_surface = &swr->secondary;
920 fmt = swr_surface->format;
921 }
922
923 if (rt->pBaseAddress == swr_surface->pBaseAddress &&
924 rt->format == fmt &&
925 rt->lod == sf->u.tex.level &&
926 rt->arrayIndex == sf->u.tex.first_layer)
927 return false;
928
929 bool need_fence = false;
930
931 /* StoreTile for changed target */
932 if (rt->pBaseAddress) {
933 /* If changing attachment to a new target, mark tiles as
934 * INVALID so they are reloaded from surface. */
935 swr_store_render_target(&ctx->pipe, attachment, SWR_TILE_INVALID);
936 need_fence = true;
937 }
938
939 /* Make new attachment */
940 *rt = *swr_surface;
941 rt->format = fmt;
942 rt->lod = sf->u.tex.level;
943 rt->arrayIndex = sf->u.tex.first_layer;
944
945 return need_fence;
946 }
947
948 static inline void
949 swr_user_vbuf_range(const struct pipe_draw_info *info,
950 const struct swr_vertex_element_state *velems,
951 const struct pipe_vertex_buffer *vb,
952 uint32_t i,
953 uint32_t *totelems,
954 uint32_t *base,
955 uint32_t *size)
956 {
957 /* FIXME: The size is too large - we don't access the full extra stride. */
958 unsigned elems;
959 if (velems->instanced_bufs & (1U << i)) {
960 elems = info->instance_count / velems->min_instance_div[i] + 1;
961 *totelems = info->start_instance + elems;
962 *base = info->start_instance * vb->stride;
963 *size = elems * vb->stride;
964 } else if (vb->stride) {
965 elems = info->max_index - info->min_index + 1;
966 *totelems = info->max_index + 1;
967 *base = info->min_index * vb->stride;
968 *size = elems * vb->stride;
969 } else {
970 *totelems = 1;
971 *base = 0;
972 *size = velems->stream_pitch[i];
973 }
974 }
975
976 static void
977 swr_update_poly_stipple(struct swr_context *ctx)
978 {
979 struct swr_draw_context *pDC = &ctx->swrDC;
980
981 assert(sizeof(ctx->poly_stipple.pipe.stipple) == sizeof(pDC->polyStipple));
982 memcpy(pDC->polyStipple,
983 ctx->poly_stipple.pipe.stipple,
984 sizeof(ctx->poly_stipple.pipe.stipple));
985 }
986
987 void
988 swr_update_derived(struct pipe_context *pipe,
989 const struct pipe_draw_info *p_draw_info)
990 {
991 struct swr_context *ctx = swr_context(pipe);
992 struct swr_screen *screen = swr_screen(pipe->screen);
993
994 /* When called from swr_clear (p_draw_info = null), set any null
995 * state-objects to the dummy state objects to prevent nullptr dereference
996 * in validation below.
997 *
998 * Important that this remains static for zero initialization. These
999 * aren't meant to be proper state objects, just empty structs. They will
1000 * not be written to.
1001 *
1002 * Shaders can't be part of the union since they contain std::unordered_map
1003 */
1004 static struct {
1005 union {
1006 struct pipe_rasterizer_state rasterizer;
1007 struct pipe_depth_stencil_alpha_state depth_stencil;
1008 struct swr_blend_state blend;
1009 } state;
1010 struct swr_vertex_shader vs;
1011 struct swr_fragment_shader fs;
1012 } swr_dummy;
1013
1014 if (!p_draw_info) {
1015 if (!ctx->rasterizer)
1016 ctx->rasterizer = &swr_dummy.state.rasterizer;
1017 if (!ctx->depth_stencil)
1018 ctx->depth_stencil = &swr_dummy.state.depth_stencil;
1019 if (!ctx->blend)
1020 ctx->blend = &swr_dummy.state.blend;
1021 if (!ctx->vs)
1022 ctx->vs = &swr_dummy.vs;
1023 if (!ctx->fs)
1024 ctx->fs = &swr_dummy.fs;
1025 }
1026
1027 /* Update screen->pipe to current pipe context. */
1028 if (screen->pipe != pipe)
1029 screen->pipe = pipe;
1030
1031 /* Any state that requires dirty flags to be re-triggered sets this mask */
1032 /* For example, user_buffer vertex and index buffers. */
1033 unsigned post_update_dirty_flags = 0;
1034
1035 /* Render Targets */
1036 if (ctx->dirty & SWR_NEW_FRAMEBUFFER) {
1037 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
1038 const struct util_format_description *desc = NULL;
1039 bool need_fence = false;
1040
1041 /* colorbuffer targets */
1042 if (fb->nr_cbufs) {
1043 for (unsigned i = 0; i < fb->nr_cbufs; ++i)
1044 need_fence |= swr_change_rt(
1045 ctx, SWR_ATTACHMENT_COLOR0 + i, fb->cbufs[i]);
1046 }
1047 for (unsigned i = fb->nr_cbufs; i < SWR_NUM_RENDERTARGETS; ++i)
1048 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_COLOR0 + i, NULL);
1049
1050 /* depth/stencil target */
1051 if (fb->zsbuf)
1052 desc = util_format_description(fb->zsbuf->format);
1053 if (fb->zsbuf && util_format_has_depth(desc))
1054 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_DEPTH, fb->zsbuf);
1055 else
1056 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_DEPTH, NULL);
1057
1058 if (fb->zsbuf && util_format_has_stencil(desc))
1059 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_STENCIL, fb->zsbuf);
1060 else
1061 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_STENCIL, NULL);
1062
1063 /* This fence ensures any attachment changes are resolved before the
1064 * next draw */
1065 if (need_fence)
1066 swr_fence_submit(ctx, screen->flush_fence);
1067 }
1068
1069 /* Raster state */
1070 if (ctx->dirty & (SWR_NEW_RASTERIZER |
1071 SWR_NEW_VS | // clipping
1072 SWR_NEW_FRAMEBUFFER)) {
1073 pipe_rasterizer_state *rasterizer = ctx->rasterizer;
1074 pipe_framebuffer_state *fb = &ctx->framebuffer;
1075
1076 SWR_RASTSTATE *rastState = &ctx->derived.rastState;
1077 rastState->cullMode = swr_convert_cull_mode(rasterizer->cull_face);
1078 rastState->frontWinding = rasterizer->front_ccw
1079 ? SWR_FRONTWINDING_CCW
1080 : SWR_FRONTWINDING_CW;
1081 rastState->scissorEnable = rasterizer->scissor;
1082 rastState->pointSize = rasterizer->point_size > 0.0f
1083 ? rasterizer->point_size
1084 : 1.0f;
1085 rastState->lineWidth = rasterizer->line_width > 0.0f
1086 ? rasterizer->line_width
1087 : 1.0f;
1088
1089 rastState->pointParam = rasterizer->point_size_per_vertex;
1090
1091 rastState->pointSpriteEnable = rasterizer->sprite_coord_enable;
1092 rastState->pointSpriteTopOrigin =
1093 rasterizer->sprite_coord_mode == PIPE_SPRITE_COORD_UPPER_LEFT;
1094
1095 /* If SWR_MSAA_FORCE_ENABLE is set, turn msaa on */
1096 if (screen->msaa_force_enable && !rasterizer->multisample) {
1097 /* Force enable and use the value the surface was created with */
1098 rasterizer->multisample = true;
1099 fb->samples = swr_resource(fb->cbufs[0]->texture)->swr.numSamples;
1100 fprintf(stderr,"msaa force enable: %d samples\n", fb->samples);
1101 }
1102
1103 rastState->sampleCount = GetSampleCount(fb->samples);
1104 rastState->forcedSampleCount = false;
1105 rastState->bIsCenterPattern = !rasterizer->multisample;
1106 rastState->pixelLocation = SWR_PIXEL_LOCATION_CENTER;
1107
1108 /* Only initialize sample positions if msaa is enabled */
1109 if (rasterizer->multisample) {
1110 for (uint32_t i = 0; i < fb->samples; i++) {
1111 const uint8_t *sample = swr_sample_positions[fb->samples-1 + i];
1112 rastState->samplePositions.SetXi(i, sample[0] << 4);
1113 rastState->samplePositions.SetYi(i, sample[1] << 4);
1114 rastState->samplePositions.SetX (i, sample[0] / 16.0f);
1115 rastState->samplePositions.SetY (i, sample[1] / 16.0f);
1116 }
1117 rastState->samplePositions.PrecalcSampleData(fb->samples);
1118 }
1119
1120 bool do_offset = false;
1121 switch (rasterizer->fill_front) {
1122 case PIPE_POLYGON_MODE_FILL:
1123 do_offset = rasterizer->offset_tri;
1124 break;
1125 case PIPE_POLYGON_MODE_LINE:
1126 do_offset = rasterizer->offset_line;
1127 break;
1128 case PIPE_POLYGON_MODE_POINT:
1129 do_offset = rasterizer->offset_point;
1130 break;
1131 }
1132
1133 if (do_offset) {
1134 rastState->depthBias = rasterizer->offset_units;
1135 rastState->slopeScaledDepthBias = rasterizer->offset_scale;
1136 rastState->depthBiasClamp = rasterizer->offset_clamp;
1137 } else {
1138 rastState->depthBias = 0;
1139 rastState->slopeScaledDepthBias = 0;
1140 rastState->depthBiasClamp = 0;
1141 }
1142
1143 /* translate polygon mode, at least for the front==back case */
1144 rastState->fillMode = swr_convert_fill_mode(rasterizer->fill_front);
1145
1146 struct pipe_surface *zb = fb->zsbuf;
1147 if (zb && swr_resource(zb->texture)->has_depth)
1148 rastState->depthFormat = swr_resource(zb->texture)->swr.format;
1149
1150 rastState->depthClipEnable = rasterizer->depth_clip;
1151 rastState->clipHalfZ = rasterizer->clip_halfz;
1152
1153 rastState->clipDistanceMask =
1154 ctx->vs->info.base.num_written_clipdistance ?
1155 ctx->vs->info.base.clipdist_writemask & rasterizer->clip_plane_enable :
1156 rasterizer->clip_plane_enable;
1157
1158 rastState->cullDistanceMask =
1159 ctx->vs->info.base.culldist_writemask << ctx->vs->info.base.num_written_clipdistance;
1160
1161 SwrSetRastState(ctx->swrContext, rastState);
1162 }
1163
1164 /* Scissor */
1165 if (ctx->dirty & SWR_NEW_SCISSOR) {
1166 SwrSetScissorRects(ctx->swrContext, 1, &ctx->swr_scissor);
1167 }
1168
1169 /* Viewport */
1170 if (ctx->dirty & (SWR_NEW_VIEWPORT | SWR_NEW_FRAMEBUFFER
1171 | SWR_NEW_RASTERIZER)) {
1172 pipe_viewport_state *state = &ctx->viewport;
1173 pipe_framebuffer_state *fb = &ctx->framebuffer;
1174 pipe_rasterizer_state *rasterizer = ctx->rasterizer;
1175
1176 SWR_VIEWPORT *vp = &ctx->derived.vp;
1177 SWR_VIEWPORT_MATRICES *vpm = &ctx->derived.vpm;
1178
1179 vp->x = state->translate[0] - state->scale[0];
1180 vp->width = 2 * state->scale[0];
1181 vp->y = state->translate[1] - fabs(state->scale[1]);
1182 vp->height = 2 * fabs(state->scale[1]);
1183 util_viewport_zmin_zmax(state, rasterizer->clip_halfz,
1184 &vp->minZ, &vp->maxZ);
1185
1186 vpm->m00[0] = state->scale[0];
1187 vpm->m11[0] = state->scale[1];
1188 vpm->m22[0] = state->scale[2];
1189 vpm->m30[0] = state->translate[0];
1190 vpm->m31[0] = state->translate[1];
1191 vpm->m32[0] = state->translate[2];
1192
1193 /* Now that the matrix is calculated, clip the view coords to screen
1194 * size. OpenGL allows for -ve x,y in the viewport. */
1195 if (vp->x < 0.0f) {
1196 vp->width += vp->x;
1197 vp->x = 0.0f;
1198 }
1199 if (vp->y < 0.0f) {
1200 vp->height += vp->y;
1201 vp->y = 0.0f;
1202 }
1203 vp->width = std::min(vp->width, (float)fb->width - vp->x);
1204 vp->height = std::min(vp->height, (float)fb->height - vp->y);
1205
1206 SwrSetViewports(ctx->swrContext, 1, vp, vpm);
1207 }
1208
1209 /* Set vertex & index buffers */
1210 /* (using draw info if called by swr_draw_vbo) */
1211 /* TODO: This is always true, because the index buffer comes from
1212 * pipe_draw_info.
1213 */
1214 if (1 || ctx->dirty & SWR_NEW_VERTEX) {
1215 uint32_t scratch_total;
1216 uint8_t *scratch = NULL;
1217
1218 /* If being called by swr_draw_vbo, copy draw details */
1219 struct pipe_draw_info info = {0};
1220 if (p_draw_info)
1221 info = *p_draw_info;
1222
1223 /* We must get all the scratch space in one go */
1224 scratch_total = 0;
1225 for (UINT i = 0; i < ctx->num_vertex_buffers; i++) {
1226 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
1227
1228 if (!vb->is_user_buffer)
1229 continue;
1230
1231 uint32_t elems, base, size;
1232 swr_user_vbuf_range(&info, ctx->velems, vb, i, &elems, &base, &size);
1233 scratch_total += AlignUp(size, 4);
1234 }
1235
1236 if (scratch_total) {
1237 scratch = (uint8_t *)swr_copy_to_scratch_space(
1238 ctx, &ctx->scratch->vertex_buffer, NULL, scratch_total);
1239 }
1240
1241 /* vertex buffers */
1242 SWR_VERTEX_BUFFER_STATE swrVertexBuffers[PIPE_MAX_ATTRIBS];
1243 for (UINT i = 0; i < ctx->num_vertex_buffers; i++) {
1244 uint32_t size, pitch, elems, partial_inbounds;
1245 uint32_t min_vertex_index;
1246 const uint8_t *p_data;
1247 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i];
1248
1249 pitch = vb->stride;
1250 if (!vb->is_user_buffer) {
1251 /* VBO */
1252 if (!pitch) {
1253 /* If pitch=0 (ie vb->stride), buffer contains a single
1254 * constant attribute. Use the stream_pitch which was
1255 * calculated during creation of vertex_elements_state for the
1256 * size of the attribute. */
1257 size = ctx->velems->stream_pitch[i];
1258 elems = 1;
1259 partial_inbounds = 0;
1260 min_vertex_index = 0;
1261 } else {
1262 /* size is based on buffer->width0 rather than info.max_index
1263 * to prevent having to validate VBO on each draw. */
1264 size = vb->buffer.resource->width0;
1265 elems = size / pitch;
1266 partial_inbounds = size % pitch;
1267 min_vertex_index = 0;
1268 }
1269
1270 p_data = swr_resource_data(vb->buffer.resource) + vb->buffer_offset;
1271 } else {
1272 /* Client buffer
1273 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
1274 * revalidate on each draw */
1275 post_update_dirty_flags |= SWR_NEW_VERTEX;
1276
1277 uint32_t base;
1278 swr_user_vbuf_range(&info, ctx->velems, vb, i, &elems, &base, &size);
1279 partial_inbounds = 0;
1280 min_vertex_index = info.min_index;
1281
1282 /* Copy only needed vertices to scratch space */
1283 size = AlignUp(size, 4);
1284 const void *ptr = (const uint8_t *) vb->buffer.user + base;
1285 memcpy(scratch, ptr, size);
1286 ptr = scratch;
1287 scratch += size;
1288 p_data = (const uint8_t *)ptr - base;
1289 }
1290
1291 swrVertexBuffers[i] = {0};
1292 swrVertexBuffers[i].index = i;
1293 swrVertexBuffers[i].pitch = pitch;
1294 swrVertexBuffers[i].pData = p_data;
1295 swrVertexBuffers[i].size = size;
1296 swrVertexBuffers[i].minVertex = min_vertex_index;
1297 swrVertexBuffers[i].maxVertex = elems;
1298 swrVertexBuffers[i].partialInboundsSize = partial_inbounds;
1299 }
1300
1301 SwrSetVertexBuffers(
1302 ctx->swrContext, ctx->num_vertex_buffers, swrVertexBuffers);
1303
1304 /* index buffer, if required (info passed in by swr_draw_vbo) */
1305 SWR_FORMAT index_type = R32_UINT; /* Default for non-indexed draws */
1306 if (info.index_size) {
1307 const uint8_t *p_data;
1308 uint32_t size, pitch;
1309
1310 pitch = p_draw_info->index_size ? p_draw_info->index_size : sizeof(uint32_t);
1311 index_type = swr_convert_index_type(pitch);
1312
1313 if (!info.has_user_indices) {
1314 /* VBO
1315 * size is based on buffer->width0 rather than info.count
1316 * to prevent having to validate VBO on each draw */
1317 size = info.index.resource->width0;
1318 p_data = swr_resource_data(info.index.resource);
1319 } else {
1320 /* Client buffer
1321 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to
1322 * revalidate on each draw */
1323 post_update_dirty_flags |= SWR_NEW_VERTEX;
1324
1325 size = info.count * pitch;
1326 size = AlignUp(size, 4);
1327
1328 /* Copy indices to scratch space */
1329 const void *ptr = info.index.user;
1330 ptr = swr_copy_to_scratch_space(
1331 ctx, &ctx->scratch->index_buffer, ptr, size);
1332 p_data = (const uint8_t *)ptr;
1333 }
1334
1335 SWR_INDEX_BUFFER_STATE swrIndexBuffer;
1336 swrIndexBuffer.format = swr_convert_index_type(p_draw_info->index_size);
1337 swrIndexBuffer.pIndices = p_data;
1338 swrIndexBuffer.size = size;
1339
1340 SwrSetIndexBuffer(ctx->swrContext, &swrIndexBuffer);
1341 }
1342
1343 struct swr_vertex_element_state *velems = ctx->velems;
1344 if (velems && velems->fsState.indexType != index_type) {
1345 velems->fsFunc = NULL;
1346 velems->fsState.indexType = index_type;
1347 }
1348 }
1349
1350 /* GeometryShader */
1351 if (ctx->dirty & (SWR_NEW_GS |
1352 SWR_NEW_VS |
1353 SWR_NEW_SAMPLER |
1354 SWR_NEW_SAMPLER_VIEW)) {
1355 if (ctx->gs) {
1356 swr_jit_gs_key key;
1357 swr_generate_gs_key(key, ctx, ctx->gs);
1358 auto search = ctx->gs->map.find(key);
1359 PFN_GS_FUNC func;
1360 if (search != ctx->gs->map.end()) {
1361 func = search->second->shader;
1362 } else {
1363 func = swr_compile_gs(ctx, key);
1364 }
1365 SwrSetGsFunc(ctx->swrContext, func);
1366
1367 /* JIT sampler state */
1368 if (ctx->dirty & SWR_NEW_SAMPLER) {
1369 swr_update_sampler_state(ctx,
1370 PIPE_SHADER_GEOMETRY,
1371 key.nr_samplers,
1372 ctx->swrDC.samplersGS);
1373 }
1374
1375 /* JIT sampler view state */
1376 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1377 swr_update_texture_state(ctx,
1378 PIPE_SHADER_GEOMETRY,
1379 key.nr_sampler_views,
1380 ctx->swrDC.texturesGS);
1381 }
1382
1383 SwrSetGsState(ctx->swrContext, &ctx->gs->gsState);
1384 } else {
1385 SWR_GS_STATE state = { 0 };
1386 SwrSetGsState(ctx->swrContext, &state);
1387 SwrSetGsFunc(ctx->swrContext, NULL);
1388 }
1389 }
1390
1391 /* VertexShader */
1392 if (ctx->dirty & (SWR_NEW_VS |
1393 SWR_NEW_RASTERIZER | // for clip planes
1394 SWR_NEW_SAMPLER |
1395 SWR_NEW_SAMPLER_VIEW |
1396 SWR_NEW_FRAMEBUFFER)) {
1397 swr_jit_vs_key key;
1398 swr_generate_vs_key(key, ctx, ctx->vs);
1399 auto search = ctx->vs->map.find(key);
1400 PFN_VERTEX_FUNC func;
1401 if (search != ctx->vs->map.end()) {
1402 func = search->second->shader;
1403 } else {
1404 func = swr_compile_vs(ctx, key);
1405 }
1406 SwrSetVertexFunc(ctx->swrContext, func);
1407
1408 /* JIT sampler state */
1409 if (ctx->dirty & SWR_NEW_SAMPLER) {
1410 swr_update_sampler_state(ctx,
1411 PIPE_SHADER_VERTEX,
1412 key.nr_samplers,
1413 ctx->swrDC.samplersVS);
1414 }
1415
1416 /* JIT sampler view state */
1417 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) {
1418 swr_update_texture_state(ctx,
1419 PIPE_SHADER_VERTEX,
1420 key.nr_sampler_views,
1421 ctx->swrDC.texturesVS);
1422 }
1423 }
1424
1425 /* work around the fact that poly stipple also affects lines */
1426 /* and points, since we rasterize them as triangles, too */
1427 /* Has to be before fragment shader, since it sets SWR_NEW_FS */
1428 if (p_draw_info) {
1429 bool new_prim_is_poly =
1430 (u_reduced_prim(p_draw_info->mode) == PIPE_PRIM_TRIANGLES) &&
1431 (ctx->derived.rastState.fillMode == SWR_FILLMODE_SOLID);
1432 if (new_prim_is_poly != ctx->poly_stipple.prim_is_poly) {
1433 ctx->dirty |= SWR_NEW_FS;
1434 ctx->poly_stipple.prim_is_poly = new_prim_is_poly;
1435 }
1436 }
1437
1438 /* FragmentShader */
1439 if (ctx->dirty & (SWR_NEW_FS |
1440 SWR_NEW_VS |
1441 SWR_NEW_GS |
1442 SWR_NEW_RASTERIZER |
1443 SWR_NEW_SAMPLER |
1444 SWR_NEW_SAMPLER_VIEW |
1445 SWR_NEW_FRAMEBUFFER)) {
1446 swr_jit_fs_key key;
1447 swr_generate_fs_key(key, ctx, ctx->fs);
1448 auto search = ctx->fs->map.find(key);
1449 PFN_PIXEL_KERNEL func;
1450 if (search != ctx->fs->map.end()) {
1451 func = search->second->shader;
1452 } else {
1453 func = swr_compile_fs(ctx, key);
1454 }
1455 SWR_PS_STATE psState = {0};
1456 psState.pfnPixelShader = func;
1457 psState.killsPixel = ctx->fs->info.base.uses_kill;
1458 psState.inputCoverage = SWR_INPUT_COVERAGE_NORMAL;
1459 psState.writesODepth = ctx->fs->info.base.writes_z;
1460 psState.usesSourceDepth = ctx->fs->info.base.reads_z;
1461 psState.shadingRate = SWR_SHADING_RATE_PIXEL;
1462 psState.numRenderTargets = ctx->framebuffer.nr_cbufs;
1463 psState.posOffset = SWR_PS_POSITION_SAMPLE_NONE;
1464 uint32_t barycentricsMask = 0;
1465 #if 0
1466 // when we switch to mesa-master
1467 if (ctx->fs->info.base.uses_persp_center ||
1468 ctx->fs->info.base.uses_linear_center)
1469 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1470 if (ctx->fs->info.base.uses_persp_centroid ||
1471 ctx->fs->info.base.uses_linear_centroid)
1472 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1473 if (ctx->fs->info.base.uses_persp_sample ||
1474 ctx->fs->info.base.uses_linear_sample)
1475 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1476 #else
1477 for (unsigned i = 0; i < ctx->fs->info.base.num_inputs; i++) {
1478 switch (ctx->fs->info.base.input_interpolate_loc[i]) {
1479 case TGSI_INTERPOLATE_LOC_CENTER:
1480 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK;
1481 break;
1482 case TGSI_INTERPOLATE_LOC_CENTROID:
1483 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK;
1484 break;
1485 case TGSI_INTERPOLATE_LOC_SAMPLE:
1486 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK;
1487 break;
1488 }
1489 }
1490 #endif
1491 psState.barycentricsMask = barycentricsMask;
1492 psState.usesUAV = false; // XXX
1493 psState.forceEarlyZ = false;
1494 SwrSetPixelShaderState(ctx->swrContext, &psState);
1495
1496 /* JIT sampler state */
1497 if (ctx->dirty & (SWR_NEW_SAMPLER |
1498 SWR_NEW_FS)) {
1499 swr_update_sampler_state(ctx,
1500 PIPE_SHADER_FRAGMENT,
1501 key.nr_samplers,
1502 ctx->swrDC.samplersFS);
1503 }
1504
1505 /* JIT sampler view state */
1506 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW |
1507 SWR_NEW_FRAMEBUFFER |
1508 SWR_NEW_FS)) {
1509 swr_update_texture_state(ctx,
1510 PIPE_SHADER_FRAGMENT,
1511 key.nr_sampler_views,
1512 ctx->swrDC.texturesFS);
1513 }
1514 }
1515
1516
1517 /* VertexShader Constants */
1518 if (ctx->dirty & SWR_NEW_VSCONSTANTS) {
1519 swr_update_constants(ctx, PIPE_SHADER_VERTEX);
1520 }
1521
1522 /* FragmentShader Constants */
1523 if (ctx->dirty & SWR_NEW_FSCONSTANTS) {
1524 swr_update_constants(ctx, PIPE_SHADER_FRAGMENT);
1525 }
1526
1527 /* GeometryShader Constants */
1528 if (ctx->dirty & SWR_NEW_GSCONSTANTS) {
1529 swr_update_constants(ctx, PIPE_SHADER_GEOMETRY);
1530 }
1531
1532 /* Depth/stencil state */
1533 if (ctx->dirty & (SWR_NEW_DEPTH_STENCIL_ALPHA | SWR_NEW_FRAMEBUFFER)) {
1534 struct pipe_depth_state *depth = &(ctx->depth_stencil->depth);
1535 struct pipe_stencil_state *stencil = ctx->depth_stencil->stencil;
1536 SWR_DEPTH_STENCIL_STATE depthStencilState = {{0}};
1537 SWR_DEPTH_BOUNDS_STATE depthBoundsState = {0};
1538
1539 /* XXX, incomplete. Need to flesh out stencil & alpha test state
1540 struct pipe_stencil_state *front_stencil =
1541 ctx->depth_stencil.stencil[0];
1542 struct pipe_stencil_state *back_stencil = ctx->depth_stencil.stencil[1];
1543 struct pipe_alpha_state alpha;
1544 */
1545 if (stencil[0].enabled) {
1546 depthStencilState.stencilWriteEnable = 1;
1547 depthStencilState.stencilTestEnable = 1;
1548 depthStencilState.stencilTestFunc =
1549 swr_convert_depth_func(stencil[0].func);
1550
1551 depthStencilState.stencilPassDepthPassOp =
1552 swr_convert_stencil_op(stencil[0].zpass_op);
1553 depthStencilState.stencilPassDepthFailOp =
1554 swr_convert_stencil_op(stencil[0].zfail_op);
1555 depthStencilState.stencilFailOp =
1556 swr_convert_stencil_op(stencil[0].fail_op);
1557 depthStencilState.stencilWriteMask = stencil[0].writemask;
1558 depthStencilState.stencilTestMask = stencil[0].valuemask;
1559 depthStencilState.stencilRefValue = ctx->stencil_ref.ref_value[0];
1560 }
1561 if (stencil[1].enabled) {
1562 depthStencilState.doubleSidedStencilTestEnable = 1;
1563
1564 depthStencilState.backfaceStencilTestFunc =
1565 swr_convert_depth_func(stencil[1].func);
1566
1567 depthStencilState.backfaceStencilPassDepthPassOp =
1568 swr_convert_stencil_op(stencil[1].zpass_op);
1569 depthStencilState.backfaceStencilPassDepthFailOp =
1570 swr_convert_stencil_op(stencil[1].zfail_op);
1571 depthStencilState.backfaceStencilFailOp =
1572 swr_convert_stencil_op(stencil[1].fail_op);
1573 depthStencilState.backfaceStencilWriteMask = stencil[1].writemask;
1574 depthStencilState.backfaceStencilTestMask = stencil[1].valuemask;
1575
1576 depthStencilState.backfaceStencilRefValue =
1577 ctx->stencil_ref.ref_value[1];
1578 }
1579
1580 depthStencilState.depthTestEnable = depth->enabled;
1581 depthStencilState.depthTestFunc = swr_convert_depth_func(depth->func);
1582 depthStencilState.depthWriteEnable = depth->writemask;
1583 SwrSetDepthStencilState(ctx->swrContext, &depthStencilState);
1584
1585 depthBoundsState.depthBoundsTestEnable = depth->bounds_test;
1586 depthBoundsState.depthBoundsTestMinValue = depth->bounds_min;
1587 depthBoundsState.depthBoundsTestMaxValue = depth->bounds_max;
1588 SwrSetDepthBoundsState(ctx->swrContext, &depthBoundsState);
1589 }
1590
1591 /* Blend State */
1592 if (ctx->dirty & (SWR_NEW_BLEND |
1593 SWR_NEW_RASTERIZER |
1594 SWR_NEW_FRAMEBUFFER |
1595 SWR_NEW_DEPTH_STENCIL_ALPHA)) {
1596 struct pipe_framebuffer_state *fb = &ctx->framebuffer;
1597
1598 SWR_BLEND_STATE blendState;
1599 memcpy(&blendState, &ctx->blend->blendState, sizeof(blendState));
1600 blendState.constantColor[0] = ctx->blend_color.color[0];
1601 blendState.constantColor[1] = ctx->blend_color.color[1];
1602 blendState.constantColor[2] = ctx->blend_color.color[2];
1603 blendState.constantColor[3] = ctx->blend_color.color[3];
1604 blendState.alphaTestReference =
1605 *((uint32_t*)&ctx->depth_stencil->alpha.ref_value);
1606
1607 blendState.sampleMask = ctx->sample_mask;
1608 blendState.sampleCount = GetSampleCount(fb->samples);
1609
1610 /* If there are no color buffers bound, disable writes on RT0
1611 * and skip loop */
1612 if (fb->nr_cbufs == 0) {
1613 blendState.renderTarget[0].writeDisableRed = 1;
1614 blendState.renderTarget[0].writeDisableGreen = 1;
1615 blendState.renderTarget[0].writeDisableBlue = 1;
1616 blendState.renderTarget[0].writeDisableAlpha = 1;
1617 SwrSetBlendFunc(ctx->swrContext, 0, NULL);
1618 }
1619 else
1620 for (int target = 0;
1621 target < std::min(SWR_NUM_RENDERTARGETS,
1622 PIPE_MAX_COLOR_BUFS);
1623 target++) {
1624 if (!fb->cbufs[target])
1625 continue;
1626
1627 struct swr_resource *colorBuffer =
1628 swr_resource(fb->cbufs[target]->texture);
1629
1630 BLEND_COMPILE_STATE compileState;
1631 memset(&compileState, 0, sizeof(compileState));
1632 compileState.format = colorBuffer->swr.format;
1633 memcpy(&compileState.blendState,
1634 &ctx->blend->compileState[target],
1635 sizeof(compileState.blendState));
1636
1637 const SWR_FORMAT_INFO& info = GetFormatInfo(compileState.format);
1638 if (compileState.blendState.logicOpEnable &&
1639 ((info.type[0] == SWR_TYPE_FLOAT) || info.isSRGB)) {
1640 compileState.blendState.logicOpEnable = false;
1641 }
1642
1643 if (info.type[0] == SWR_TYPE_SINT || info.type[0] == SWR_TYPE_UINT)
1644 compileState.blendState.blendEnable = false;
1645
1646 if (compileState.blendState.blendEnable == false &&
1647 compileState.blendState.logicOpEnable == false &&
1648 ctx->depth_stencil->alpha.enabled == 0) {
1649 SwrSetBlendFunc(ctx->swrContext, target, NULL);
1650 continue;
1651 }
1652
1653 compileState.desc.alphaTestEnable =
1654 ctx->depth_stencil->alpha.enabled;
1655 compileState.desc.independentAlphaBlendEnable =
1656 (compileState.blendState.sourceBlendFactor !=
1657 compileState.blendState.sourceAlphaBlendFactor) ||
1658 (compileState.blendState.destBlendFactor !=
1659 compileState.blendState.destAlphaBlendFactor) ||
1660 (compileState.blendState.colorBlendFunc !=
1661 compileState.blendState.alphaBlendFunc);
1662 compileState.desc.alphaToCoverageEnable =
1663 ctx->blend->pipe.alpha_to_coverage;
1664 compileState.desc.sampleMaskEnable = (blendState.sampleMask != 0);
1665 compileState.desc.numSamples = fb->samples;
1666
1667 compileState.alphaTestFunction =
1668 swr_convert_depth_func(ctx->depth_stencil->alpha.func);
1669 compileState.alphaTestFormat = ALPHA_TEST_FLOAT32; // xxx
1670
1671 compileState.Canonicalize();
1672
1673 PFN_BLEND_JIT_FUNC func = NULL;
1674 auto search = ctx->blendJIT->find(compileState);
1675 if (search != ctx->blendJIT->end()) {
1676 func = search->second;
1677 } else {
1678 HANDLE hJitMgr = screen->hJitMgr;
1679 func = JitCompileBlend(hJitMgr, compileState);
1680 debug_printf("BLEND shader %p\n", func);
1681 assert(func && "Error: BlendShader = NULL");
1682
1683 ctx->blendJIT->insert(std::make_pair(compileState, func));
1684 }
1685 SwrSetBlendFunc(ctx->swrContext, target, func);
1686 }
1687
1688 SwrSetBlendState(ctx->swrContext, &blendState);
1689 }
1690
1691 if (ctx->dirty & SWR_NEW_STIPPLE) {
1692 swr_update_poly_stipple(ctx);
1693 }
1694
1695 if (ctx->dirty & (SWR_NEW_VS | SWR_NEW_SO | SWR_NEW_RASTERIZER)) {
1696 ctx->vs->soState.rasterizerDisable =
1697 ctx->rasterizer->rasterizer_discard;
1698 SwrSetSoState(ctx->swrContext, &ctx->vs->soState);
1699
1700 pipe_stream_output_info *stream_output = &ctx->vs->pipe.stream_output;
1701
1702 for (uint32_t i = 0; i < ctx->num_so_targets; i++) {
1703 SWR_STREAMOUT_BUFFER buffer = {0};
1704 if (!ctx->so_targets[i])
1705 continue;
1706 buffer.enable = true;
1707 buffer.pBuffer =
1708 (uint32_t *)(swr_resource_data(ctx->so_targets[i]->buffer) +
1709 ctx->so_targets[i]->buffer_offset);
1710 buffer.bufferSize = ctx->so_targets[i]->buffer_size >> 2;
1711 buffer.pitch = stream_output->stride[i];
1712 buffer.streamOffset = 0;
1713
1714 SwrSetSoBuffers(ctx->swrContext, &buffer, i);
1715 }
1716 }
1717
1718 if (ctx->dirty & (SWR_NEW_CLIP | SWR_NEW_RASTERIZER | SWR_NEW_VS)) {
1719 // shader exporting clip distances overrides all user clip planes
1720 if (ctx->rasterizer->clip_plane_enable &&
1721 !ctx->vs->info.base.num_written_clipdistance)
1722 {
1723 swr_draw_context *pDC = &ctx->swrDC;
1724 memcpy(pDC->userClipPlanes,
1725 ctx->clip.ucp,
1726 sizeof(pDC->userClipPlanes));
1727 }
1728 }
1729
1730 // set up backend state
1731 SWR_BACKEND_STATE backendState = {0};
1732 if (ctx->gs) {
1733 backendState.numAttributes = ctx->gs->info.base.num_outputs - 1;
1734 } else {
1735 backendState.numAttributes = ctx->vs->info.base.num_outputs - 1;
1736 if (ctx->fs->info.base.uses_primid) {
1737 backendState.numAttributes++;
1738 backendState.swizzleEnable = true;
1739 for (unsigned i = 0; i < sizeof(backendState.numComponents); i++) {
1740 backendState.swizzleMap[i].sourceAttrib = i;
1741 }
1742 backendState.swizzleMap[ctx->vs->info.base.num_outputs - 1].constantSource =
1743 SWR_CONSTANT_SOURCE_PRIM_ID;
1744 backendState.swizzleMap[ctx->vs->info.base.num_outputs - 1].componentOverrideMask = 1;
1745 }
1746 }
1747 if (ctx->rasterizer->sprite_coord_enable)
1748 backendState.numAttributes++;
1749
1750 backendState.numAttributes = std::min((size_t)backendState.numAttributes,
1751 sizeof(backendState.numComponents));
1752 for (unsigned i = 0; i < backendState.numAttributes; i++)
1753 backendState.numComponents[i] = 4;
1754 backendState.constantInterpolationMask = ctx->fs->constantMask |
1755 (ctx->rasterizer->flatshade ? ctx->fs->flatConstantMask : 0);
1756 backendState.pointSpriteTexCoordMask = ctx->fs->pointSpriteMask;
1757
1758 struct tgsi_shader_info *pLastFE =
1759 ctx->gs ?
1760 &ctx->gs->info.base :
1761 &ctx->vs->info.base;
1762 backendState.readRenderTargetArrayIndex = pLastFE->writes_layer;
1763 backendState.readViewportArrayIndex = pLastFE->writes_viewport_index;
1764
1765 SwrSetBackendState(ctx->swrContext, &backendState);
1766
1767 /* Ensure that any in-progress attachment change StoreTiles finish */
1768 if (swr_is_fence_pending(screen->flush_fence))
1769 swr_fence_finish(pipe->screen, NULL, screen->flush_fence, 0);
1770
1771 /* Finally, update the in-use status of all resources involved in draw */
1772 swr_update_resource_status(pipe, p_draw_info);
1773
1774 ctx->dirty = post_update_dirty_flags;
1775 }
1776
1777
1778 static struct pipe_stream_output_target *
1779 swr_create_so_target(struct pipe_context *pipe,
1780 struct pipe_resource *buffer,
1781 unsigned buffer_offset,
1782 unsigned buffer_size)
1783 {
1784 struct pipe_stream_output_target *target;
1785
1786 target = CALLOC_STRUCT(pipe_stream_output_target);
1787 if (!target)
1788 return NULL;
1789
1790 target->context = pipe;
1791 target->reference.count = 1;
1792 pipe_resource_reference(&target->buffer, buffer);
1793 target->buffer_offset = buffer_offset;
1794 target->buffer_size = buffer_size;
1795 return target;
1796 }
1797
1798 static void
1799 swr_destroy_so_target(struct pipe_context *pipe,
1800 struct pipe_stream_output_target *target)
1801 {
1802 pipe_resource_reference(&target->buffer, NULL);
1803 FREE(target);
1804 }
1805
1806 static void
1807 swr_set_so_targets(struct pipe_context *pipe,
1808 unsigned num_targets,
1809 struct pipe_stream_output_target **targets,
1810 const unsigned *offsets)
1811 {
1812 struct swr_context *swr = swr_context(pipe);
1813 uint32_t i;
1814
1815 assert(num_targets <= MAX_SO_STREAMS);
1816
1817 for (i = 0; i < num_targets; i++) {
1818 pipe_so_target_reference(
1819 (struct pipe_stream_output_target **)&swr->so_targets[i],
1820 targets[i]);
1821 }
1822
1823 for (/* fall-through */; i < swr->num_so_targets; i++) {
1824 pipe_so_target_reference(
1825 (struct pipe_stream_output_target **)&swr->so_targets[i], NULL);
1826 }
1827
1828 swr->num_so_targets = num_targets;
1829
1830 swr->dirty |= SWR_NEW_SO;
1831 }
1832
1833
1834 void
1835 swr_state_init(struct pipe_context *pipe)
1836 {
1837 pipe->create_blend_state = swr_create_blend_state;
1838 pipe->bind_blend_state = swr_bind_blend_state;
1839 pipe->delete_blend_state = swr_delete_blend_state;
1840
1841 pipe->create_depth_stencil_alpha_state = swr_create_depth_stencil_state;
1842 pipe->bind_depth_stencil_alpha_state = swr_bind_depth_stencil_state;
1843 pipe->delete_depth_stencil_alpha_state = swr_delete_depth_stencil_state;
1844
1845 pipe->create_rasterizer_state = swr_create_rasterizer_state;
1846 pipe->bind_rasterizer_state = swr_bind_rasterizer_state;
1847 pipe->delete_rasterizer_state = swr_delete_rasterizer_state;
1848
1849 pipe->create_sampler_state = swr_create_sampler_state;
1850 pipe->bind_sampler_states = swr_bind_sampler_states;
1851 pipe->delete_sampler_state = swr_delete_sampler_state;
1852
1853 pipe->create_sampler_view = swr_create_sampler_view;
1854 pipe->set_sampler_views = swr_set_sampler_views;
1855 pipe->sampler_view_destroy = swr_sampler_view_destroy;
1856
1857 pipe->create_vs_state = swr_create_vs_state;
1858 pipe->bind_vs_state = swr_bind_vs_state;
1859 pipe->delete_vs_state = swr_delete_vs_state;
1860
1861 pipe->create_fs_state = swr_create_fs_state;
1862 pipe->bind_fs_state = swr_bind_fs_state;
1863 pipe->delete_fs_state = swr_delete_fs_state;
1864
1865 pipe->create_gs_state = swr_create_gs_state;
1866 pipe->bind_gs_state = swr_bind_gs_state;
1867 pipe->delete_gs_state = swr_delete_gs_state;
1868
1869 pipe->set_constant_buffer = swr_set_constant_buffer;
1870
1871 pipe->create_vertex_elements_state = swr_create_vertex_elements_state;
1872 pipe->bind_vertex_elements_state = swr_bind_vertex_elements_state;
1873 pipe->delete_vertex_elements_state = swr_delete_vertex_elements_state;
1874
1875 pipe->set_vertex_buffers = swr_set_vertex_buffers;
1876
1877 pipe->set_polygon_stipple = swr_set_polygon_stipple;
1878 pipe->set_clip_state = swr_set_clip_state;
1879 pipe->set_scissor_states = swr_set_scissor_states;
1880 pipe->set_viewport_states = swr_set_viewport_states;
1881
1882 pipe->set_framebuffer_state = swr_set_framebuffer_state;
1883
1884 pipe->set_blend_color = swr_set_blend_color;
1885 pipe->set_stencil_ref = swr_set_stencil_ref;
1886
1887 pipe->set_sample_mask = swr_set_sample_mask;
1888 pipe->get_sample_position = swr_get_sample_position;
1889
1890 pipe->create_stream_output_target = swr_create_so_target;
1891 pipe->stream_output_target_destroy = swr_destroy_so_target;
1892 pipe->set_stream_output_targets = swr_set_so_targets;
1893 }