v3d: do not automatically flush current job for SSBOs and shader images
[mesa.git] / src / gallium / drivers / v3d / v3d_context.h
1 /*
2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #ifndef VC5_CONTEXT_H
26 #define VC5_CONTEXT_H
27
28 #ifdef V3D_VERSION
29 #include "broadcom/common/v3d_macros.h"
30 #endif
31
32 #include <stdio.h>
33
34 #include "pipe/p_context.h"
35 #include "pipe/p_state.h"
36 #include "util/bitset.h"
37 #include "util/slab.h"
38 #include "xf86drm.h"
39 #include "drm-uapi/v3d_drm.h"
40 #include "v3d_screen.h"
41 #include "broadcom/common/v3d_limits.h"
42
43 struct v3d_job;
44 struct v3d_bo;
45 void v3d_job_add_bo(struct v3d_job *job, struct v3d_bo *bo);
46
47 #include "v3d_bufmgr.h"
48 #include "v3d_resource.h"
49 #include "v3d_cl.h"
50
51 #ifdef USE_V3D_SIMULATOR
52 #define using_v3d_simulator true
53 #else
54 #define using_v3d_simulator false
55 #endif
56
57 #define VC5_DIRTY_BLEND (1 << 0)
58 #define VC5_DIRTY_RASTERIZER (1 << 1)
59 #define VC5_DIRTY_ZSA (1 << 2)
60 #define VC5_DIRTY_FRAGTEX (1 << 3)
61 #define VC5_DIRTY_VERTTEX (1 << 4)
62 #define VC5_DIRTY_SHADER_IMAGE (1 << 5)
63
64 #define VC5_DIRTY_BLEND_COLOR (1 << 7)
65 #define VC5_DIRTY_STENCIL_REF (1 << 8)
66 #define VC5_DIRTY_SAMPLE_STATE (1 << 9)
67 #define VC5_DIRTY_FRAMEBUFFER (1 << 10)
68 #define VC5_DIRTY_STIPPLE (1 << 11)
69 #define VC5_DIRTY_VIEWPORT (1 << 12)
70 #define VC5_DIRTY_CONSTBUF (1 << 13)
71 #define VC5_DIRTY_VTXSTATE (1 << 14)
72 #define VC5_DIRTY_VTXBUF (1 << 15)
73 #define VC5_DIRTY_SCISSOR (1 << 17)
74 #define VC5_DIRTY_FLAT_SHADE_FLAGS (1 << 18)
75 #define VC5_DIRTY_PRIM_MODE (1 << 19)
76 #define VC5_DIRTY_CLIP (1 << 20)
77 #define VC5_DIRTY_UNCOMPILED_VS (1 << 21)
78 #define VC5_DIRTY_UNCOMPILED_FS (1 << 22)
79 #define VC5_DIRTY_COMPILED_CS (1 << 23)
80 #define VC5_DIRTY_COMPILED_VS (1 << 24)
81 #define VC5_DIRTY_COMPILED_FS (1 << 25)
82 #define VC5_DIRTY_FS_INPUTS (1 << 26)
83 #define VC5_DIRTY_STREAMOUT (1 << 27)
84 #define VC5_DIRTY_OQ (1 << 28)
85 #define VC5_DIRTY_CENTROID_FLAGS (1 << 29)
86 #define VC5_DIRTY_NOPERSPECTIVE_FLAGS (1 << 30)
87 #define VC5_DIRTY_SSBO (1 << 31)
88
89 #define VC5_MAX_FS_INPUTS 64
90
91 enum v3d_sampler_state_variant {
92 V3D_SAMPLER_STATE_BORDER_0,
93 V3D_SAMPLER_STATE_F16,
94 V3D_SAMPLER_STATE_F16_UNORM,
95 V3D_SAMPLER_STATE_F16_SNORM,
96 V3D_SAMPLER_STATE_F16_BGRA,
97 V3D_SAMPLER_STATE_F16_BGRA_UNORM,
98 V3D_SAMPLER_STATE_F16_BGRA_SNORM,
99 V3D_SAMPLER_STATE_F16_A,
100 V3D_SAMPLER_STATE_F16_A_SNORM,
101 V3D_SAMPLER_STATE_F16_A_UNORM,
102 V3D_SAMPLER_STATE_F16_LA,
103 V3D_SAMPLER_STATE_F16_LA_UNORM,
104 V3D_SAMPLER_STATE_F16_LA_SNORM,
105 V3D_SAMPLER_STATE_32,
106 V3D_SAMPLER_STATE_32_UNORM,
107 V3D_SAMPLER_STATE_32_SNORM,
108 V3D_SAMPLER_STATE_32_A,
109 V3D_SAMPLER_STATE_32_A_UNORM,
110 V3D_SAMPLER_STATE_32_A_SNORM,
111 V3D_SAMPLER_STATE_1010102U,
112 V3D_SAMPLER_STATE_16U,
113 V3D_SAMPLER_STATE_16I,
114 V3D_SAMPLER_STATE_8I,
115 V3D_SAMPLER_STATE_8U,
116
117 V3D_SAMPLER_STATE_VARIANT_COUNT,
118 };
119
120 enum v3d_flush_cond {
121 /* Flush job unless we are flushing for transform feedback, where we
122 * handle flushing in the driver via the 'Wait for TF' packet.
123 */
124 V3D_FLUSH_DEFAULT,
125 /* Always flush the job, even for cases where we would normally not
126 * do it, such as transform feedback.
127 */
128 V3D_FLUSH_ALWAYS,
129 /* Flush job if it is not the current FBO job. This is intended to
130 * skip automatic flushes of the current job for resources that we
131 * expect to be externally synchronized by the application using
132 * glMemoryBarrier(), such as SSBOs and shader images.
133 */
134 V3D_FLUSH_NOT_CURRENT_JOB,
135 };
136
137 struct v3d_sampler_view {
138 struct pipe_sampler_view base;
139 uint32_t p0;
140 uint32_t p1;
141 /* Precomputed swizzles to pass in to the shader key. */
142 uint8_t swizzle[4];
143
144 uint8_t texture_shader_state[32];
145 /* V3D 4.x: Texture state struct. */
146 struct v3d_bo *bo;
147
148 enum v3d_sampler_state_variant sampler_variant;
149
150 /* Actual texture to be read by this sampler view. May be different
151 * from base.texture in the case of having a shadow tiled copy of a
152 * raster texture.
153 */
154 struct pipe_resource *texture;
155 };
156
157 struct v3d_sampler_state {
158 struct pipe_sampler_state base;
159 uint32_t p0;
160 uint32_t p1;
161
162 /* V3D 3.x: Packed texture state. */
163 uint8_t texture_shader_state[32];
164 /* V3D 4.x: Sampler state struct. */
165 struct pipe_resource *sampler_state;
166 uint32_t sampler_state_offset[V3D_SAMPLER_STATE_VARIANT_COUNT];
167
168 bool border_color_variants;
169 };
170
171 struct v3d_texture_stateobj {
172 struct pipe_sampler_view *textures[V3D_MAX_TEXTURE_SAMPLERS];
173 unsigned num_textures;
174 struct pipe_sampler_state *samplers[V3D_MAX_TEXTURE_SAMPLERS];
175 unsigned num_samplers;
176 struct v3d_cl_reloc texture_state[V3D_MAX_TEXTURE_SAMPLERS];
177 };
178
179 struct v3d_shader_uniform_info {
180 enum quniform_contents *contents;
181 uint32_t *data;
182 uint32_t count;
183 };
184
185 struct v3d_uncompiled_shader {
186 /** A name for this program, so you can track it in shader-db output. */
187 uint32_t program_id;
188 /** How many variants of this program were compiled, for shader-db. */
189 uint32_t compiled_variant_count;
190 struct pipe_shader_state base;
191 uint32_t num_tf_outputs;
192 struct v3d_varying_slot *tf_outputs;
193 uint16_t tf_specs[16];
194 uint16_t tf_specs_psiz[16];
195 uint32_t num_tf_specs;
196 };
197
198 struct v3d_compiled_shader {
199 struct pipe_resource *resource;
200 uint32_t offset;
201
202 union {
203 struct v3d_prog_data *base;
204 struct v3d_vs_prog_data *vs;
205 struct v3d_fs_prog_data *fs;
206 struct v3d_compute_prog_data *compute;
207 } prog_data;
208
209 /**
210 * VC5_DIRTY_* flags that, when set in v3d->dirty, mean that the
211 * uniforms have to be rewritten (and therefore the shader state
212 * reemitted).
213 */
214 uint32_t uniform_dirty_bits;
215 };
216
217 struct v3d_program_stateobj {
218 struct v3d_uncompiled_shader *bind_vs, *bind_fs, *bind_compute;
219 struct v3d_compiled_shader *cs, *vs, *fs, *compute;
220
221 struct hash_table *cache[MESA_SHADER_STAGES];
222
223 struct v3d_bo *spill_bo;
224 int spill_size_per_thread;
225 };
226
227 struct v3d_constbuf_stateobj {
228 struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS];
229 uint32_t enabled_mask;
230 uint32_t dirty_mask;
231 };
232
233 struct v3d_vertexbuf_stateobj {
234 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
235 unsigned count;
236 uint32_t enabled_mask;
237 uint32_t dirty_mask;
238 };
239
240 struct v3d_vertex_stateobj {
241 struct pipe_vertex_element pipe[V3D_MAX_VS_INPUTS / 4];
242 unsigned num_elements;
243
244 uint8_t attrs[16 * (V3D_MAX_VS_INPUTS / 4)];
245 struct pipe_resource *defaults;
246 uint32_t defaults_offset;
247 };
248
249 struct v3d_stream_output_target {
250 struct pipe_stream_output_target base;
251 /* Number of transform feedback vertices written to this target */
252 uint32_t recorded_vertex_count;
253 };
254
255 struct v3d_streamout_stateobj {
256 struct pipe_stream_output_target *targets[PIPE_MAX_SO_BUFFERS];
257 /* Number of vertices we've written into the buffer so far. */
258 uint32_t offsets[PIPE_MAX_SO_BUFFERS];
259 unsigned num_targets;
260 };
261
262 struct v3d_ssbo_stateobj {
263 struct pipe_shader_buffer sb[PIPE_MAX_SHADER_BUFFERS];
264 uint32_t enabled_mask;
265 };
266
267 /* Hash table key for v3d->jobs */
268 struct v3d_job_key {
269 struct pipe_surface *cbufs[4];
270 struct pipe_surface *zsbuf;
271 };
272
273 enum v3d_ez_state {
274 VC5_EZ_UNDECIDED = 0,
275 VC5_EZ_GT_GE,
276 VC5_EZ_LT_LE,
277 VC5_EZ_DISABLED,
278 };
279
280 struct v3d_image_view {
281 struct pipe_image_view base;
282 /* V3D 4.x texture shader state struct */
283 struct pipe_resource *tex_state;
284 uint32_t tex_state_offset;
285 };
286
287 struct v3d_shaderimg_stateobj {
288 struct v3d_image_view si[PIPE_MAX_SHADER_IMAGES];
289 uint32_t enabled_mask;
290 };
291
292 /**
293 * A complete bin/render job.
294 *
295 * This is all of the state necessary to submit a bin/render to the kernel.
296 * We want to be able to have multiple in progress at a time, so that we don't
297 * need to flush an existing CL just to switch to rendering to a new render
298 * target (which would mean reading back from the old render target when
299 * starting to render to it again).
300 */
301 struct v3d_job {
302 struct v3d_context *v3d;
303 struct v3d_cl bcl;
304 struct v3d_cl rcl;
305 struct v3d_cl indirect;
306 struct v3d_bo *tile_alloc;
307 struct v3d_bo *tile_state;
308 uint32_t shader_rec_count;
309
310 struct drm_v3d_submit_cl submit;
311
312 /**
313 * Set of all BOs referenced by the job. This will be used for making
314 * the list of BOs that the kernel will need to have paged in to
315 * execute our job.
316 */
317 struct set *bos;
318
319 /** Sum of the sizes of the BOs referenced by the job. */
320 uint32_t referenced_size;
321
322 struct set *write_prscs;
323 struct set *tf_write_prscs;
324
325 /* Size of the submit.bo_handles array. */
326 uint32_t bo_handles_size;
327
328 /** @{ Surfaces to submit rendering for. */
329 struct pipe_surface *cbufs[4];
330 struct pipe_surface *zsbuf;
331 /** @} */
332 /** @{
333 * Bounding box of the scissor across all queued drawing.
334 *
335 * Note that the max values are exclusive.
336 */
337 uint32_t draw_min_x;
338 uint32_t draw_min_y;
339 uint32_t draw_max_x;
340 uint32_t draw_max_y;
341 /** @} */
342 /** @{
343 * Width/height of the color framebuffer being rendered to,
344 * for VC5_TILE_RENDERING_MODE_CONFIG.
345 */
346 uint32_t draw_width;
347 uint32_t draw_height;
348 /** @} */
349 /** @{ Tile information, depending on MSAA and float color buffer. */
350 uint32_t draw_tiles_x; /** @< Number of tiles wide for framebuffer. */
351 uint32_t draw_tiles_y; /** @< Number of tiles high for framebuffer. */
352
353 uint32_t tile_width; /** @< Width of a tile. */
354 uint32_t tile_height; /** @< Height of a tile. */
355 /** maximum internal_bpp of all color render targets. */
356 uint32_t internal_bpp;
357
358 /** Whether the current rendering is in a 4X MSAA tile buffer. */
359 bool msaa;
360 /** @} */
361
362 /* Bitmask of PIPE_CLEAR_* of buffers that were cleared before the
363 * first rendering.
364 */
365 uint32_t clear;
366 /* Bitmask of PIPE_CLEAR_* of buffers that have been read by a draw
367 * call without having been cleared first.
368 */
369 uint32_t load;
370 /* Bitmask of PIPE_CLEAR_* of buffers that have been rendered to
371 * (either clears or draws) and should be stored.
372 */
373 uint32_t store;
374 uint32_t clear_color[4][4];
375 float clear_z;
376 uint8_t clear_s;
377
378 /**
379 * Set if some drawing (triangles, blits, or just a glClear()) has
380 * been done to the FBO, meaning that we need to
381 * DRM_IOCTL_VC5_SUBMIT_CL.
382 */
383 bool needs_flush;
384
385 /* Set if any shader has dirtied cachelines in the TMU that need to be
386 * flushed before job end.
387 */
388 bool tmu_dirty_rcl;
389
390 /**
391 * Set if a packet enabling TF has been emitted in the job (V3D 4.x).
392 */
393 bool tf_enabled;
394
395 /**
396 * Current EZ state for drawing. Updated at the start of draw after
397 * we've decided on the shader being rendered.
398 */
399 enum v3d_ez_state ez_state;
400 /**
401 * The first EZ state that was used for drawing with a decided EZ
402 * direction (so either UNDECIDED, GT, or LT).
403 */
404 enum v3d_ez_state first_ez_state;
405
406 /**
407 * Number of draw calls (not counting full buffer clears) queued in
408 * the current job.
409 */
410 uint32_t draw_calls_queued;
411
412 struct v3d_job_key key;
413 };
414
415 struct v3d_context {
416 struct pipe_context base;
417
418 int fd;
419 struct v3d_screen *screen;
420
421 /** The 3D rendering job for the currently bound FBO. */
422 struct v3d_job *job;
423
424 /* Map from struct v3d_job_key to the job for that FBO.
425 */
426 struct hash_table *jobs;
427
428 /**
429 * Map from v3d_resource to a job writing to that resource.
430 *
431 * Primarily for flushing jobs rendering to textures that are now
432 * being read from.
433 */
434 struct hash_table *write_jobs;
435
436 struct slab_child_pool transfer_pool;
437 struct blitter_context *blitter;
438
439 /** bitfield of VC5_DIRTY_* */
440 uint32_t dirty;
441
442 struct primconvert_context *primconvert;
443
444 uint32_t next_uncompiled_program_id;
445 uint64_t next_compiled_program_id;
446
447 struct v3d_compiler_state *compiler_state;
448
449 uint8_t prim_mode;
450
451 /** Maximum index buffer valid for the current shader_rec. */
452 uint32_t max_index;
453
454 /** Sync object that our RCL or TFU job will update as its out_sync. */
455 uint32_t out_sync;
456
457 /* Stream uploader used by gallium internals. This could also be used
458 * by driver internals, but we tend to use the v3d_cl.h interfaces
459 * instead.
460 */
461 struct u_upload_mgr *uploader;
462 /* State uploader used inside the driver. This is for packing bits of
463 * long-term state inside buffers, since the kernel interfaces
464 * allocate a page at a time.
465 */
466 struct u_upload_mgr *state_uploader;
467
468 /** @{ Current pipeline state objects */
469 struct pipe_scissor_state scissor;
470 struct v3d_blend_state *blend;
471 struct v3d_rasterizer_state *rasterizer;
472 struct v3d_depth_stencil_alpha_state *zsa;
473
474 struct v3d_program_stateobj prog;
475 uint32_t compute_num_workgroups[3];
476 struct v3d_bo *compute_shared_memory;
477
478 struct v3d_vertex_stateobj *vtx;
479
480 struct {
481 struct pipe_blend_color f;
482 uint16_t hf[4];
483 } blend_color;
484 struct pipe_stencil_ref stencil_ref;
485 unsigned sample_mask;
486 struct pipe_framebuffer_state framebuffer;
487
488 /* Per render target, whether we should swap the R and B fields in the
489 * shader's color output and in blending. If render targets disagree
490 * on the R/B swap and use the constant color, then we would need to
491 * fall back to in-shader blending.
492 */
493 uint8_t swap_color_rb;
494
495 /* Per render target, whether we should treat the dst alpha values as
496 * one in blending.
497 *
498 * For RGBX formats, the tile buffer's alpha channel will be
499 * undefined.
500 */
501 uint8_t blend_dst_alpha_one;
502
503 bool active_queries;
504
505 uint32_t tf_prims_generated;
506 uint32_t prims_generated;
507
508 struct pipe_poly_stipple stipple;
509 struct pipe_clip_state clip;
510 struct pipe_viewport_state viewport;
511 struct v3d_ssbo_stateobj ssbo[PIPE_SHADER_TYPES];
512 struct v3d_shaderimg_stateobj shaderimg[PIPE_SHADER_TYPES];
513 struct v3d_constbuf_stateobj constbuf[PIPE_SHADER_TYPES];
514 struct v3d_texture_stateobj tex[PIPE_SHADER_TYPES];
515 struct v3d_vertexbuf_stateobj vertexbuf;
516 struct v3d_streamout_stateobj streamout;
517 struct v3d_bo *current_oq;
518 struct pipe_resource *prim_counts;
519 uint32_t prim_counts_offset;
520 struct pipe_debug_callback debug;
521 /** @} */
522 };
523
524 struct v3d_rasterizer_state {
525 struct pipe_rasterizer_state base;
526
527 float point_size;
528
529 uint8_t depth_offset[9];
530 uint8_t depth_offset_z16[9];
531 };
532
533 struct v3d_depth_stencil_alpha_state {
534 struct pipe_depth_stencil_alpha_state base;
535
536 enum v3d_ez_state ez_state;
537
538 uint8_t stencil_front[6];
539 uint8_t stencil_back[6];
540 };
541
542 struct v3d_blend_state {
543 struct pipe_blend_state base;
544
545 /* Per-RT mask of whether blending is enabled. */
546 uint8_t blend_enables;
547 };
548
549 #define perf_debug(...) do { \
550 if (unlikely(V3D_DEBUG & V3D_DEBUG_PERF)) \
551 fprintf(stderr, __VA_ARGS__); \
552 if (unlikely(v3d->debug.debug_message)) \
553 pipe_debug_message(&v3d->debug, PERF_INFO, __VA_ARGS__); \
554 } while (0)
555
556 #define foreach_bit(b, mask) \
557 for (uint32_t _m = (mask), b; _m && ({(b) = u_bit_scan(&_m); 1;});)
558
559 static inline struct v3d_context *
560 v3d_context(struct pipe_context *pcontext)
561 {
562 return (struct v3d_context *)pcontext;
563 }
564
565 static inline struct v3d_sampler_view *
566 v3d_sampler_view(struct pipe_sampler_view *psview)
567 {
568 return (struct v3d_sampler_view *)psview;
569 }
570
571 static inline struct v3d_sampler_state *
572 v3d_sampler_state(struct pipe_sampler_state *psampler)
573 {
574 return (struct v3d_sampler_state *)psampler;
575 }
576
577 static inline struct v3d_stream_output_target *
578 v3d_stream_output_target(struct pipe_stream_output_target *ptarget)
579 {
580 return (struct v3d_stream_output_target *)ptarget;
581 }
582
583 static inline uint32_t
584 v3d_stream_output_target_get_vertex_count(struct pipe_stream_output_target *ptarget)
585 {
586 return v3d_stream_output_target(ptarget)->recorded_vertex_count;
587 }
588
589 struct pipe_context *v3d_context_create(struct pipe_screen *pscreen,
590 void *priv, unsigned flags);
591 void v3d_program_init(struct pipe_context *pctx);
592 void v3d_program_fini(struct pipe_context *pctx);
593 void v3d_query_init(struct pipe_context *pctx);
594
595 void v3d_simulator_init(struct v3d_screen *screen);
596 void v3d_simulator_destroy(struct v3d_screen *screen);
597 uint32_t v3d_simulator_get_spill(uint32_t spill_size);
598 int v3d_simulator_ioctl(int fd, unsigned long request, void *arg);
599 void v3d_simulator_open_from_handle(int fd, int handle, uint32_t size);
600
601 static inline int
602 v3d_ioctl(int fd, unsigned long request, void *arg)
603 {
604 if (using_v3d_simulator)
605 return v3d_simulator_ioctl(fd, request, arg);
606 else
607 return drmIoctl(fd, request, arg);
608 }
609
610 static inline bool
611 v3d_transform_feedback_enabled(struct v3d_context *v3d)
612 {
613 return v3d->prog.bind_vs->num_tf_specs != 0 &&
614 v3d->active_queries;
615 }
616
617 void v3d_set_shader_uniform_dirty_flags(struct v3d_compiled_shader *shader);
618 struct v3d_cl_reloc v3d_write_uniforms(struct v3d_context *v3d,
619 struct v3d_compiled_shader *shader,
620 enum pipe_shader_type stage);
621
622 void v3d_flush(struct pipe_context *pctx);
623 void v3d_job_init(struct v3d_context *v3d);
624 struct v3d_job *v3d_get_job(struct v3d_context *v3d,
625 struct pipe_surface **cbufs,
626 struct pipe_surface *zsbuf);
627 struct v3d_job *v3d_get_job_for_fbo(struct v3d_context *v3d);
628 void v3d_job_add_bo(struct v3d_job *job, struct v3d_bo *bo);
629 void v3d_job_add_write_resource(struct v3d_job *job, struct pipe_resource *prsc);
630 void v3d_job_add_tf_write_resource(struct v3d_job *job, struct pipe_resource *prsc);
631 void v3d_job_submit(struct v3d_context *v3d, struct v3d_job *job);
632 void v3d_flush_jobs_using_bo(struct v3d_context *v3d, struct v3d_bo *bo);
633 void v3d_flush_jobs_writing_resource(struct v3d_context *v3d,
634 struct pipe_resource *prsc,
635 enum v3d_flush_cond flush_cond);
636 void v3d_flush_jobs_reading_resource(struct v3d_context *v3d,
637 struct pipe_resource *prsc,
638 enum v3d_flush_cond flush_cond);
639 void v3d_update_compiled_shaders(struct v3d_context *v3d, uint8_t prim_mode);
640 void v3d_update_compiled_cs(struct v3d_context *v3d);
641
642 bool v3d_rt_format_supported(const struct v3d_device_info *devinfo,
643 enum pipe_format f);
644 bool v3d_tex_format_supported(const struct v3d_device_info *devinfo,
645 enum pipe_format f);
646 uint8_t v3d_get_rt_format(const struct v3d_device_info *devinfo, enum pipe_format f);
647 uint8_t v3d_get_tex_format(const struct v3d_device_info *devinfo, enum pipe_format f);
648 uint8_t v3d_get_tex_return_size(const struct v3d_device_info *devinfo,
649 enum pipe_format f,
650 enum pipe_tex_compare compare);
651 uint8_t v3d_get_tex_return_channels(const struct v3d_device_info *devinfo,
652 enum pipe_format f);
653 const uint8_t *v3d_get_format_swizzle(const struct v3d_device_info *devinfo,
654 enum pipe_format f);
655 void v3d_get_internal_type_bpp_for_output_format(const struct v3d_device_info *devinfo,
656 uint32_t format,
657 uint32_t *type,
658 uint32_t *bpp);
659 bool v3d_tfu_supports_tex_format(const struct v3d_device_info *devinfo,
660 uint32_t tex_format);
661
662 void v3d_init_query_functions(struct v3d_context *v3d);
663 void v3d_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info);
664 void v3d_blitter_save(struct v3d_context *v3d);
665 bool v3d_generate_mipmap(struct pipe_context *pctx,
666 struct pipe_resource *prsc,
667 enum pipe_format format,
668 unsigned int base_level,
669 unsigned int last_level,
670 unsigned int first_layer,
671 unsigned int last_layer);
672
673 struct v3d_fence *v3d_fence_create(struct v3d_context *v3d);
674
675 void v3d_tf_update_counters(struct v3d_context *v3d);
676
677 #ifdef v3dX
678 # include "v3dx_context.h"
679 #else
680 # define v3dX(x) v3d33_##x
681 # include "v3dx_context.h"
682 # undef v3dX
683
684 # define v3dX(x) v3d41_##x
685 # include "v3dx_context.h"
686 # undef v3dX
687 #endif
688
689 #endif /* VC5_CONTEXT_H */