1b37681c70268855e4678f091b135e7b117beb13
[mesa.git] / src / gallium / drivers / v3d / v3d_context.h
1 /*
2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #ifndef VC5_CONTEXT_H
26 #define VC5_CONTEXT_H
27
28 #ifdef V3D_VERSION
29 #include "broadcom/common/v3d_macros.h"
30 #endif
31
32 #include <stdio.h>
33
34 #include "pipe/p_context.h"
35 #include "pipe/p_state.h"
36 #include "util/bitset.h"
37 #include "util/slab.h"
38 #include "xf86drm.h"
39 #include "v3d_drm.h"
40 #include "v3d_screen.h"
41 #include "broadcom/common/v3d_limits.h"
42
43 struct v3d_job;
44 struct v3d_bo;
45 void v3d_job_add_bo(struct v3d_job *job, struct v3d_bo *bo);
46
47 #include "v3d_bufmgr.h"
48 #include "v3d_resource.h"
49 #include "v3d_cl.h"
50
51 #ifdef USE_V3D_SIMULATOR
52 #define using_v3d_simulator true
53 #else
54 #define using_v3d_simulator false
55 #endif
56
57 #define VC5_DIRTY_BLEND (1 << 0)
58 #define VC5_DIRTY_RASTERIZER (1 << 1)
59 #define VC5_DIRTY_ZSA (1 << 2)
60 #define VC5_DIRTY_FRAGTEX (1 << 3)
61 #define VC5_DIRTY_VERTTEX (1 << 4)
62 #define VC5_DIRTY_SHADER_IMAGE (1 << 5)
63
64 #define VC5_DIRTY_BLEND_COLOR (1 << 7)
65 #define VC5_DIRTY_STENCIL_REF (1 << 8)
66 #define VC5_DIRTY_SAMPLE_STATE (1 << 9)
67 #define VC5_DIRTY_FRAMEBUFFER (1 << 10)
68 #define VC5_DIRTY_STIPPLE (1 << 11)
69 #define VC5_DIRTY_VIEWPORT (1 << 12)
70 #define VC5_DIRTY_CONSTBUF (1 << 13)
71 #define VC5_DIRTY_VTXSTATE (1 << 14)
72 #define VC5_DIRTY_VTXBUF (1 << 15)
73 #define VC5_DIRTY_SCISSOR (1 << 17)
74 #define VC5_DIRTY_FLAT_SHADE_FLAGS (1 << 18)
75 #define VC5_DIRTY_PRIM_MODE (1 << 19)
76 #define VC5_DIRTY_CLIP (1 << 20)
77 #define VC5_DIRTY_UNCOMPILED_VS (1 << 21)
78 #define VC5_DIRTY_UNCOMPILED_FS (1 << 22)
79 #define VC5_DIRTY_COMPILED_CS (1 << 23)
80 #define VC5_DIRTY_COMPILED_VS (1 << 24)
81 #define VC5_DIRTY_COMPILED_FS (1 << 25)
82 #define VC5_DIRTY_FS_INPUTS (1 << 26)
83 #define VC5_DIRTY_STREAMOUT (1 << 27)
84 #define VC5_DIRTY_OQ (1 << 28)
85 #define VC5_DIRTY_CENTROID_FLAGS (1 << 29)
86 #define VC5_DIRTY_NOPERSPECTIVE_FLAGS (1 << 30)
87 #define VC5_DIRTY_SSBO (1 << 31)
88
89 #define VC5_MAX_FS_INPUTS 64
90
91 struct v3d_sampler_view {
92 struct pipe_sampler_view base;
93 uint32_t p0;
94 uint32_t p1;
95 /* Precomputed swizzles to pass in to the shader key. */
96 uint8_t swizzle[4];
97
98 uint8_t texture_shader_state[32];
99 /* V3D 4.x: Texture state struct. */
100 struct v3d_bo *bo;
101
102 /* Actual texture to be read by this sampler view. May be different
103 * from base.texture in the case of having a shadow tiled copy of a
104 * raster texture.
105 */
106 struct pipe_resource *texture;
107 };
108
109 struct v3d_sampler_state {
110 struct pipe_sampler_state base;
111 uint32_t p0;
112 uint32_t p1;
113
114 /* V3D 3.x: Packed texture state. */
115 uint8_t texture_shader_state[32];
116 /* V3D 4.x: Sampler state struct. */
117 struct pipe_resource *sampler_state;
118 uint32_t sampler_state_offset;
119 };
120
121 struct v3d_texture_stateobj {
122 struct pipe_sampler_view *textures[V3D_MAX_TEXTURE_SAMPLERS];
123 unsigned num_textures;
124 struct pipe_sampler_state *samplers[V3D_MAX_TEXTURE_SAMPLERS];
125 unsigned num_samplers;
126 struct v3d_cl_reloc texture_state[V3D_MAX_TEXTURE_SAMPLERS];
127 };
128
129 struct v3d_shader_uniform_info {
130 enum quniform_contents *contents;
131 uint32_t *data;
132 uint32_t count;
133 };
134
135 struct v3d_uncompiled_shader {
136 /** A name for this program, so you can track it in shader-db output. */
137 uint32_t program_id;
138 /** How many variants of this program were compiled, for shader-db. */
139 uint32_t compiled_variant_count;
140 struct pipe_shader_state base;
141 uint32_t num_tf_outputs;
142 struct v3d_varying_slot *tf_outputs;
143 uint16_t tf_specs[16];
144 uint16_t tf_specs_psiz[16];
145 uint32_t num_tf_specs;
146
147 /**
148 * Flag for if the NIR in this shader originally came from TGSI. If
149 * so, we need to do some fixups at compile time, due to missing
150 * information in TGSI that exists in NIR.
151 */
152 bool was_tgsi;
153 };
154
155 struct v3d_compiled_shader {
156 struct pipe_resource *resource;
157 uint32_t offset;
158
159 union {
160 struct v3d_prog_data *base;
161 struct v3d_vs_prog_data *vs;
162 struct v3d_fs_prog_data *fs;
163 } prog_data;
164
165 /**
166 * VC5_DIRTY_* flags that, when set in v3d->dirty, mean that the
167 * uniforms have to be rewritten (and therefore the shader state
168 * reemitted).
169 */
170 uint32_t uniform_dirty_bits;
171 };
172
173 struct v3d_program_stateobj {
174 struct v3d_uncompiled_shader *bind_vs, *bind_fs;
175 struct v3d_compiled_shader *cs, *vs, *fs;
176
177 struct v3d_bo *spill_bo;
178 int spill_size_per_thread;
179 };
180
181 struct v3d_constbuf_stateobj {
182 struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS];
183 uint32_t enabled_mask;
184 uint32_t dirty_mask;
185 };
186
187 struct v3d_vertexbuf_stateobj {
188 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
189 unsigned count;
190 uint32_t enabled_mask;
191 uint32_t dirty_mask;
192 };
193
194 struct v3d_vertex_stateobj {
195 struct pipe_vertex_element pipe[V3D_MAX_VS_INPUTS / 4];
196 unsigned num_elements;
197
198 uint8_t attrs[16 * (V3D_MAX_VS_INPUTS / 4)];
199 struct pipe_resource *defaults;
200 uint32_t defaults_offset;
201 };
202
203 struct v3d_streamout_stateobj {
204 struct pipe_stream_output_target *targets[PIPE_MAX_SO_BUFFERS];
205 /* Number of vertices we've written into the buffer so far. */
206 uint32_t offsets[PIPE_MAX_SO_BUFFERS];
207 unsigned num_targets;
208 };
209
210 struct v3d_ssbo_stateobj {
211 struct pipe_shader_buffer sb[PIPE_MAX_SHADER_BUFFERS];
212 uint32_t enabled_mask;
213 };
214
215 /* Hash table key for v3d->jobs */
216 struct v3d_job_key {
217 struct pipe_surface *cbufs[4];
218 struct pipe_surface *zsbuf;
219 };
220
221 enum v3d_ez_state {
222 VC5_EZ_UNDECIDED = 0,
223 VC5_EZ_GT_GE,
224 VC5_EZ_LT_LE,
225 VC5_EZ_DISABLED,
226 };
227
228 struct v3d_image_view {
229 struct pipe_image_view base;
230 /* V3D 4.x texture shader state struct */
231 struct pipe_resource *tex_state;
232 uint32_t tex_state_offset;
233 };
234
235 struct v3d_shaderimg_stateobj {
236 struct v3d_image_view si[PIPE_MAX_SHADER_IMAGES];
237 uint32_t enabled_mask;
238 };
239
240 /**
241 * A complete bin/render job.
242 *
243 * This is all of the state necessary to submit a bin/render to the kernel.
244 * We want to be able to have multiple in progress at a time, so that we don't
245 * need to flush an existing CL just to switch to rendering to a new render
246 * target (which would mean reading back from the old render target when
247 * starting to render to it again).
248 */
249 struct v3d_job {
250 struct v3d_context *v3d;
251 struct v3d_cl bcl;
252 struct v3d_cl rcl;
253 struct v3d_cl indirect;
254 struct v3d_bo *tile_alloc;
255 struct v3d_bo *tile_state;
256 uint32_t shader_rec_count;
257
258 struct drm_v3d_submit_cl submit;
259
260 /**
261 * Set of all BOs referenced by the job. This will be used for making
262 * the list of BOs that the kernel will need to have paged in to
263 * execute our job.
264 */
265 struct set *bos;
266
267 /** Sum of the sizes of the BOs referenced by the job. */
268 uint32_t referenced_size;
269
270 struct set *write_prscs;
271
272 /* Size of the submit.bo_handles array. */
273 uint32_t bo_handles_size;
274
275 /** @{ Surfaces to submit rendering for. */
276 struct pipe_surface *cbufs[4];
277 struct pipe_surface *zsbuf;
278 /** @} */
279 /** @{
280 * Bounding box of the scissor across all queued drawing.
281 *
282 * Note that the max values are exclusive.
283 */
284 uint32_t draw_min_x;
285 uint32_t draw_min_y;
286 uint32_t draw_max_x;
287 uint32_t draw_max_y;
288 /** @} */
289 /** @{
290 * Width/height of the color framebuffer being rendered to,
291 * for VC5_TILE_RENDERING_MODE_CONFIG.
292 */
293 uint32_t draw_width;
294 uint32_t draw_height;
295 /** @} */
296 /** @{ Tile information, depending on MSAA and float color buffer. */
297 uint32_t draw_tiles_x; /** @< Number of tiles wide for framebuffer. */
298 uint32_t draw_tiles_y; /** @< Number of tiles high for framebuffer. */
299
300 uint32_t tile_width; /** @< Width of a tile. */
301 uint32_t tile_height; /** @< Height of a tile. */
302 /** maximum internal_bpp of all color render targets. */
303 uint32_t internal_bpp;
304
305 /** Whether the current rendering is in a 4X MSAA tile buffer. */
306 bool msaa;
307 /** @} */
308
309 /* Bitmask of PIPE_CLEAR_* of buffers that were cleared before the
310 * first rendering.
311 */
312 uint32_t clear;
313 /* Bitmask of PIPE_CLEAR_* of buffers that have been read by a draw
314 * call without having been cleared first.
315 */
316 uint32_t load;
317 /* Bitmask of PIPE_CLEAR_* of buffers that have been rendered to
318 * (either clears or draws) and should be stored.
319 */
320 uint32_t store;
321 uint32_t clear_color[4][4];
322 float clear_z;
323 uint8_t clear_s;
324
325 /**
326 * Set if some drawing (triangles, blits, or just a glClear()) has
327 * been done to the FBO, meaning that we need to
328 * DRM_IOCTL_VC5_SUBMIT_CL.
329 */
330 bool needs_flush;
331
332 /* Set if any shader has dirtied cachelines in the TMU that need to be
333 * flushed before job end.
334 */
335 bool tmu_dirty_rcl;
336
337 /**
338 * Set if a packet enabling TF has been emitted in the job (V3D 4.x).
339 */
340 bool tf_enabled;
341
342 /**
343 * Current EZ state for drawing. Updated at the start of draw after
344 * we've decided on the shader being rendered.
345 */
346 enum v3d_ez_state ez_state;
347 /**
348 * The first EZ state that was used for drawing with a decided EZ
349 * direction (so either UNDECIDED, GT, or LT).
350 */
351 enum v3d_ez_state first_ez_state;
352
353 /**
354 * Number of draw calls (not counting full buffer clears) queued in
355 * the current job.
356 */
357 uint32_t draw_calls_queued;
358
359 struct v3d_job_key key;
360 };
361
362 struct v3d_context {
363 struct pipe_context base;
364
365 int fd;
366 struct v3d_screen *screen;
367
368 /** The 3D rendering job for the currently bound FBO. */
369 struct v3d_job *job;
370
371 /* Map from struct v3d_job_key to the job for that FBO.
372 */
373 struct hash_table *jobs;
374
375 /**
376 * Map from v3d_resource to a job writing to that resource.
377 *
378 * Primarily for flushing jobs rendering to textures that are now
379 * being read from.
380 */
381 struct hash_table *write_jobs;
382
383 struct slab_child_pool transfer_pool;
384 struct blitter_context *blitter;
385
386 /** bitfield of VC5_DIRTY_* */
387 uint32_t dirty;
388
389 struct primconvert_context *primconvert;
390
391 struct hash_table *fs_cache, *vs_cache;
392 uint32_t next_uncompiled_program_id;
393 uint64_t next_compiled_program_id;
394
395 struct v3d_compiler_state *compiler_state;
396
397 uint8_t prim_mode;
398
399 /** Maximum index buffer valid for the current shader_rec. */
400 uint32_t max_index;
401
402 /** Sync object that our RCL or TFU job will update as its out_sync. */
403 uint32_t out_sync;
404
405 /* Stream uploader used by gallium internals. This could also be used
406 * by driver internals, but we tend to use the v3d_cl.h interfaces
407 * instead.
408 */
409 struct u_upload_mgr *uploader;
410 /* State uploader used inside the driver. This is for packing bits of
411 * long-term state inside buffers, since the kernel interfaces
412 * allocate a page at a time.
413 */
414 struct u_upload_mgr *state_uploader;
415
416 /** @{ Current pipeline state objects */
417 struct pipe_scissor_state scissor;
418 struct v3d_blend_state *blend;
419 struct v3d_rasterizer_state *rasterizer;
420 struct v3d_depth_stencil_alpha_state *zsa;
421
422 struct v3d_program_stateobj prog;
423
424 struct v3d_vertex_stateobj *vtx;
425
426 struct {
427 struct pipe_blend_color f;
428 uint16_t hf[4];
429 } blend_color;
430 struct pipe_stencil_ref stencil_ref;
431 unsigned sample_mask;
432 struct pipe_framebuffer_state framebuffer;
433
434 /* Per render target, whether we should swap the R and B fields in the
435 * shader's color output and in blending. If render targets disagree
436 * on the R/B swap and use the constant color, then we would need to
437 * fall back to in-shader blending.
438 */
439 uint8_t swap_color_rb;
440
441 /* Per render target, whether we should treat the dst alpha values as
442 * one in blending.
443 *
444 * For RGBX formats, the tile buffer's alpha channel will be
445 * undefined.
446 */
447 uint8_t blend_dst_alpha_one;
448
449 bool active_queries;
450
451 uint32_t tf_prims_generated;
452 uint32_t prims_generated;
453
454 struct pipe_poly_stipple stipple;
455 struct pipe_clip_state clip;
456 struct pipe_viewport_state viewport;
457 struct v3d_ssbo_stateobj ssbo[PIPE_SHADER_TYPES];
458 struct v3d_shaderimg_stateobj shaderimg[PIPE_SHADER_TYPES];
459 struct v3d_constbuf_stateobj constbuf[PIPE_SHADER_TYPES];
460 struct v3d_texture_stateobj tex[PIPE_SHADER_TYPES];
461 struct v3d_vertexbuf_stateobj vertexbuf;
462 struct v3d_streamout_stateobj streamout;
463 struct v3d_bo *current_oq;
464 struct pipe_debug_callback debug;
465 /** @} */
466 };
467
468 struct v3d_rasterizer_state {
469 struct pipe_rasterizer_state base;
470
471 float point_size;
472
473 uint8_t depth_offset[9];
474 uint8_t depth_offset_z16[9];
475 };
476
477 struct v3d_depth_stencil_alpha_state {
478 struct pipe_depth_stencil_alpha_state base;
479
480 enum v3d_ez_state ez_state;
481
482 uint8_t stencil_front[6];
483 uint8_t stencil_back[6];
484 };
485
486 struct v3d_blend_state {
487 struct pipe_blend_state base;
488
489 /* Per-RT mask of whether blending is enabled. */
490 uint8_t blend_enables;
491 };
492
493 #define perf_debug(...) do { \
494 if (unlikely(V3D_DEBUG & V3D_DEBUG_PERF)) \
495 fprintf(stderr, __VA_ARGS__); \
496 if (unlikely(v3d->debug.debug_message)) \
497 pipe_debug_message(&v3d->debug, PERF_INFO, __VA_ARGS__); \
498 } while (0)
499
500 #define foreach_bit(b, mask) \
501 for (uint32_t _m = (mask), b; _m && ({(b) = u_bit_scan(&_m); 1;});)
502
503 static inline struct v3d_context *
504 v3d_context(struct pipe_context *pcontext)
505 {
506 return (struct v3d_context *)pcontext;
507 }
508
509 static inline struct v3d_sampler_view *
510 v3d_sampler_view(struct pipe_sampler_view *psview)
511 {
512 return (struct v3d_sampler_view *)psview;
513 }
514
515 static inline struct v3d_sampler_state *
516 v3d_sampler_state(struct pipe_sampler_state *psampler)
517 {
518 return (struct v3d_sampler_state *)psampler;
519 }
520
521 struct pipe_context *v3d_context_create(struct pipe_screen *pscreen,
522 void *priv, unsigned flags);
523 void v3d_program_init(struct pipe_context *pctx);
524 void v3d_program_fini(struct pipe_context *pctx);
525 void v3d_query_init(struct pipe_context *pctx);
526
527 void v3d_simulator_init(struct v3d_screen *screen);
528 void v3d_simulator_destroy(struct v3d_screen *screen);
529 int v3d_simulator_ioctl(int fd, unsigned long request, void *arg);
530 void v3d_simulator_open_from_handle(int fd, int handle, uint32_t size);
531
532 static inline int
533 v3d_ioctl(int fd, unsigned long request, void *arg)
534 {
535 if (using_v3d_simulator)
536 return v3d_simulator_ioctl(fd, request, arg);
537 else
538 return drmIoctl(fd, request, arg);
539 }
540
541 void v3d_set_shader_uniform_dirty_flags(struct v3d_compiled_shader *shader);
542 struct v3d_cl_reloc v3d_write_uniforms(struct v3d_context *v3d,
543 struct v3d_compiled_shader *shader,
544 enum pipe_shader_type stage);
545
546 void v3d_flush(struct pipe_context *pctx);
547 void v3d_job_init(struct v3d_context *v3d);
548 struct v3d_job *v3d_get_job(struct v3d_context *v3d,
549 struct pipe_surface **cbufs,
550 struct pipe_surface *zsbuf);
551 struct v3d_job *v3d_get_job_for_fbo(struct v3d_context *v3d);
552 void v3d_job_add_bo(struct v3d_job *job, struct v3d_bo *bo);
553 void v3d_job_add_write_resource(struct v3d_job *job, struct pipe_resource *prsc);
554 void v3d_job_submit(struct v3d_context *v3d, struct v3d_job *job);
555 void v3d_flush_jobs_writing_resource(struct v3d_context *v3d,
556 struct pipe_resource *prsc);
557 void v3d_flush_jobs_reading_resource(struct v3d_context *v3d,
558 struct pipe_resource *prsc);
559 void v3d_update_compiled_shaders(struct v3d_context *v3d, uint8_t prim_mode);
560
561 bool v3d_rt_format_supported(const struct v3d_device_info *devinfo,
562 enum pipe_format f);
563 bool v3d_tex_format_supported(const struct v3d_device_info *devinfo,
564 enum pipe_format f);
565 uint8_t v3d_get_rt_format(const struct v3d_device_info *devinfo, enum pipe_format f);
566 uint8_t v3d_get_tex_format(const struct v3d_device_info *devinfo, enum pipe_format f);
567 uint8_t v3d_get_tex_return_size(const struct v3d_device_info *devinfo,
568 enum pipe_format f,
569 enum pipe_tex_compare compare);
570 uint8_t v3d_get_tex_return_channels(const struct v3d_device_info *devinfo,
571 enum pipe_format f);
572 const uint8_t *v3d_get_format_swizzle(const struct v3d_device_info *devinfo,
573 enum pipe_format f);
574 void v3d_get_internal_type_bpp_for_output_format(const struct v3d_device_info *devinfo,
575 uint32_t format,
576 uint32_t *type,
577 uint32_t *bpp);
578 bool v3d_tfu_supports_tex_format(const struct v3d_device_info *devinfo,
579 uint32_t tex_format);
580
581 void v3d_init_query_functions(struct v3d_context *v3d);
582 void v3d_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info);
583 void v3d_blitter_save(struct v3d_context *v3d);
584 boolean v3d_generate_mipmap(struct pipe_context *pctx,
585 struct pipe_resource *prsc,
586 enum pipe_format format,
587 unsigned int base_level,
588 unsigned int last_level,
589 unsigned int first_layer,
590 unsigned int last_layer);
591
592 struct v3d_fence *v3d_fence_create(struct v3d_context *v3d);
593
594 #ifdef v3dX
595 # include "v3dx_context.h"
596 #else
597 # define v3dX(x) v3d33_##x
598 # include "v3dx_context.h"
599 # undef v3dX
600
601 # define v3dX(x) v3d41_##x
602 # include "v3dx_context.h"
603 # undef v3dX
604 #endif
605
606 #endif /* VC5_CONTEXT_H */