src/gallium/drivers/v3d/v3d_context.h

   1 /*
   2  * Copyright © 2014-2017 Broadcom
   3  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22  * IN THE SOFTWARE.
  23  */
  24
  25 #ifndef VC5_CONTEXT_H
  26 #define VC5_CONTEXT_H
  27
  28 #ifdef V3D_VERSION
  29 #include "broadcom/common/v3d_macros.h"
  30 #endif
  31
  32 #include <stdio.h>
  33
  34 #include "pipe/p_context.h"
  35 #include "pipe/p_state.h"
  36 #include "util/bitset.h"
  37 #include "util/slab.h"
  38 #include "xf86drm.h"
  39 #include "drm-uapi/v3d_drm.h"
  40 #include "v3d_screen.h"
  41 #include "broadcom/common/v3d_limits.h"
  42
  43 struct v3d_job;
  44 struct v3d_bo;
  45 void v3d_job_add_bo(struct v3d_job *job, struct v3d_bo *bo);
  46
  47 #include "v3d_bufmgr.h"
  48 #include "v3d_resource.h"
  49 #include "v3d_cl.h"
  50
  51 #ifdef USE_V3D_SIMULATOR
  52 #define using_v3d_simulator true
  53 #else
  54 #define using_v3d_simulator false
  55 #endif
  56
  57 #define VC5_DIRTY_BLEND         (1 <<  0)
  58 #define VC5_DIRTY_RASTERIZER    (1 <<  1)
  59 #define VC5_DIRTY_ZSA           (1 <<  2)
  60 #define VC5_DIRTY_FRAGTEX       (1 <<  3)
  61 #define VC5_DIRTY_VERTTEX       (1 <<  4)
  62 #define VC5_DIRTY_SHADER_IMAGE  (1 <<  5)
  63
  64 #define VC5_DIRTY_BLEND_COLOR   (1 <<  7)
  65 #define VC5_DIRTY_STENCIL_REF   (1 <<  8)
  66 #define VC5_DIRTY_SAMPLE_STATE  (1 <<  9)
  67 #define VC5_DIRTY_FRAMEBUFFER   (1 << 10)
  68 #define VC5_DIRTY_STIPPLE       (1 << 11)
  69 #define VC5_DIRTY_VIEWPORT      (1 << 12)
  70 #define VC5_DIRTY_CONSTBUF      (1 << 13)
  71 #define VC5_DIRTY_VTXSTATE      (1 << 14)
  72 #define VC5_DIRTY_VTXBUF        (1 << 15)
  73 #define VC5_DIRTY_SCISSOR       (1 << 17)
  74 #define VC5_DIRTY_FLAT_SHADE_FLAGS (1 << 18)
  75 #define VC5_DIRTY_PRIM_MODE     (1 << 19)
  76 #define VC5_DIRTY_CLIP          (1 << 20)
  77 #define VC5_DIRTY_UNCOMPILED_VS (1 << 21)
  78 #define VC5_DIRTY_UNCOMPILED_FS (1 << 22)
  79 #define VC5_DIRTY_COMPILED_CS   (1 << 23)
  80 #define VC5_DIRTY_COMPILED_VS   (1 << 24)
  81 #define VC5_DIRTY_COMPILED_FS   (1 << 25)
  82 #define VC5_DIRTY_FS_INPUTS     (1 << 26)
  83 #define VC5_DIRTY_STREAMOUT     (1 << 27)
  84 #define VC5_DIRTY_OQ            (1 << 28)
  85 #define VC5_DIRTY_CENTROID_FLAGS (1 << 29)
  86 #define VC5_DIRTY_NOPERSPECTIVE_FLAGS (1 << 30)
  87 #define VC5_DIRTY_SSBO          (1 << 31)
  88
  89 #define VC5_MAX_FS_INPUTS 64
  90
  91 enum v3d_sampler_state_variant {
  92         V3D_SAMPLER_STATE_BORDER_0,
  93         V3D_SAMPLER_STATE_F16,
  94         V3D_SAMPLER_STATE_F16_UNORM,
  95         V3D_SAMPLER_STATE_F16_SNORM,
  96         V3D_SAMPLER_STATE_F16_BGRA,
  97         V3D_SAMPLER_STATE_F16_BGRA_UNORM,
  98         V3D_SAMPLER_STATE_F16_BGRA_SNORM,
  99         V3D_SAMPLER_STATE_F16_A,
 100         V3D_SAMPLER_STATE_F16_A_SNORM,
 101         V3D_SAMPLER_STATE_F16_A_UNORM,
 102         V3D_SAMPLER_STATE_F16_LA,
 103         V3D_SAMPLER_STATE_F16_LA_UNORM,
 104         V3D_SAMPLER_STATE_F16_LA_SNORM,
 105         V3D_SAMPLER_STATE_32,
 106         V3D_SAMPLER_STATE_32_UNORM,
 107         V3D_SAMPLER_STATE_32_SNORM,
 108         V3D_SAMPLER_STATE_32_A,
 109         V3D_SAMPLER_STATE_32_A_UNORM,
 110         V3D_SAMPLER_STATE_32_A_SNORM,
 111         V3D_SAMPLER_STATE_1010102U,
 112         V3D_SAMPLER_STATE_16U,
 113         V3D_SAMPLER_STATE_16I,
 114         V3D_SAMPLER_STATE_8I,
 115         V3D_SAMPLER_STATE_8U,
 116
 117         V3D_SAMPLER_STATE_VARIANT_COUNT,
 118 };
 119
 120 struct v3d_sampler_view {
 121         struct pipe_sampler_view base;
 122         uint32_t p0;
 123         uint32_t p1;
 124         /* Precomputed swizzles to pass in to the shader key. */
 125         uint8_t swizzle[4];
 126
 127         uint8_t texture_shader_state[32];
 128         /* V3D 4.x: Texture state struct. */
 129         struct v3d_bo *bo;
 130
 131         enum v3d_sampler_state_variant sampler_variant;
 132
 133         /* Actual texture to be read by this sampler view.  May be different
 134          * from base.texture in the case of having a shadow tiled copy of a
 135          * raster texture.
 136          */
 137         struct pipe_resource *texture;
 138 };
 139
 140 struct v3d_sampler_state {
 141         struct pipe_sampler_state base;
 142         uint32_t p0;
 143         uint32_t p1;
 144
 145         /* V3D 3.x: Packed texture state. */
 146         uint8_t texture_shader_state[32];
 147         /* V3D 4.x: Sampler state struct. */
 148         struct pipe_resource *sampler_state;
 149         uint32_t sampler_state_offset[V3D_SAMPLER_STATE_VARIANT_COUNT];
 150
 151         bool border_color_variants;
 152 };
 153
 154 struct v3d_texture_stateobj {
 155         struct pipe_sampler_view *textures[V3D_MAX_TEXTURE_SAMPLERS];
 156         unsigned num_textures;
 157         struct pipe_sampler_state *samplers[V3D_MAX_TEXTURE_SAMPLERS];
 158         unsigned num_samplers;
 159         struct v3d_cl_reloc texture_state[V3D_MAX_TEXTURE_SAMPLERS];
 160 };
 161
 162 struct v3d_shader_uniform_info {
 163         enum quniform_contents *contents;
 164         uint32_t *data;
 165         uint32_t count;
 166 };
 167
 168 struct v3d_uncompiled_shader {
 169         /** A name for this program, so you can track it in shader-db output. */
 170         uint32_t program_id;
 171         /** How many variants of this program were compiled, for shader-db. */
 172         uint32_t compiled_variant_count;
 173         struct pipe_shader_state base;
 174         uint32_t num_tf_outputs;
 175         struct v3d_varying_slot *tf_outputs;
 176         uint16_t tf_specs[16];
 177         uint16_t tf_specs_psiz[16];
 178         uint32_t num_tf_specs;
 179 };
 180
 181 struct v3d_compiled_shader {
 182         struct pipe_resource *resource;
 183         uint32_t offset;
 184
 185         union {
 186                 struct v3d_prog_data *base;
 187                 struct v3d_vs_prog_data *vs;
 188                 struct v3d_fs_prog_data *fs;
 189                 struct v3d_compute_prog_data *compute;
 190         } prog_data;
 191
 192         /**
 193          * VC5_DIRTY_* flags that, when set in v3d->dirty, mean that the
 194          * uniforms have to be rewritten (and therefore the shader state
 195          * reemitted).
 196          */
 197         uint32_t uniform_dirty_bits;
 198 };
 199
 200 struct v3d_program_stateobj {
 201         struct v3d_uncompiled_shader *bind_vs, *bind_fs, *bind_compute;
 202         struct v3d_compiled_shader *cs, *vs, *fs, *compute;
 203
 204         struct hash_table *cache[MESA_SHADER_STAGES];
 205
 206         struct v3d_bo *spill_bo;
 207         int spill_size_per_thread;
 208 };
 209
 210 struct v3d_constbuf_stateobj {
 211         struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS];
 212         uint32_t enabled_mask;
 213         uint32_t dirty_mask;
 214 };
 215
 216 struct v3d_vertexbuf_stateobj {
 217         struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
 218         unsigned count;
 219         uint32_t enabled_mask;
 220         uint32_t dirty_mask;
 221 };
 222
 223 struct v3d_vertex_stateobj {
 224         struct pipe_vertex_element pipe[V3D_MAX_VS_INPUTS / 4];
 225         unsigned num_elements;
 226
 227         uint8_t attrs[16 * (V3D_MAX_VS_INPUTS / 4)];
 228         struct pipe_resource *defaults;
 229         uint32_t defaults_offset;
 230 };
 231
 232 struct v3d_streamout_stateobj {
 233         struct pipe_stream_output_target *targets[PIPE_MAX_SO_BUFFERS];
 234         /* Number of vertices we've written into the buffer so far. */
 235         uint32_t offsets[PIPE_MAX_SO_BUFFERS];
 236         unsigned num_targets;
 237 };
 238
 239 struct v3d_ssbo_stateobj {
 240         struct pipe_shader_buffer sb[PIPE_MAX_SHADER_BUFFERS];
 241         uint32_t enabled_mask;
 242 };
 243
 244 /* Hash table key for v3d->jobs */
 245 struct v3d_job_key {
 246         struct pipe_surface *cbufs[4];
 247         struct pipe_surface *zsbuf;
 248 };
 249
 250 enum v3d_ez_state {
 251         VC5_EZ_UNDECIDED = 0,
 252         VC5_EZ_GT_GE,
 253         VC5_EZ_LT_LE,
 254         VC5_EZ_DISABLED,
 255 };
 256
 257 struct v3d_image_view {
 258         struct pipe_image_view base;
 259         /* V3D 4.x texture shader state struct */
 260         struct pipe_resource *tex_state;
 261         uint32_t tex_state_offset;
 262 };
 263
 264 struct v3d_shaderimg_stateobj {
 265         struct v3d_image_view si[PIPE_MAX_SHADER_IMAGES];
 266         uint32_t enabled_mask;
 267 };
 268
 269 /**
 270  * A complete bin/render job.
 271  *
 272  * This is all of the state necessary to submit a bin/render to the kernel.
 273  * We want to be able to have multiple in progress at a time, so that we don't
 274  * need to flush an existing CL just to switch to rendering to a new render
 275  * target (which would mean reading back from the old render target when
 276  * starting to render to it again).
 277  */
 278 struct v3d_job {
 279         struct v3d_context *v3d;
 280         struct v3d_cl bcl;
 281         struct v3d_cl rcl;
 282         struct v3d_cl indirect;
 283         struct v3d_bo *tile_alloc;
 284         struct v3d_bo *tile_state;
 285         uint32_t shader_rec_count;
 286
 287         struct drm_v3d_submit_cl submit;
 288
 289         /**
 290          * Set of all BOs referenced by the job.  This will be used for making
 291          * the list of BOs that the kernel will need to have paged in to
 292          * execute our job.
 293          */
 294         struct set *bos;
 295
 296         /** Sum of the sizes of the BOs referenced by the job. */
 297         uint32_t referenced_size;
 298
 299         struct set *write_prscs;
 300
 301         /* Size of the submit.bo_handles array. */
 302         uint32_t bo_handles_size;
 303
 304         /** @{ Surfaces to submit rendering for. */
 305         struct pipe_surface *cbufs[4];
 306         struct pipe_surface *zsbuf;
 307         /** @} */
 308         /** @{
 309          * Bounding box of the scissor across all queued drawing.
 310          *
 311          * Note that the max values are exclusive.
 312          */
 313         uint32_t draw_min_x;
 314         uint32_t draw_min_y;
 315         uint32_t draw_max_x;
 316         uint32_t draw_max_y;
 317         /** @} */
 318         /** @{
 319          * Width/height of the color framebuffer being rendered to,
 320          * for VC5_TILE_RENDERING_MODE_CONFIG.
 321         */
 322         uint32_t draw_width;
 323         uint32_t draw_height;
 324         /** @} */
 325         /** @{ Tile information, depending on MSAA and float color buffer. */
 326         uint32_t draw_tiles_x; /** @< Number of tiles wide for framebuffer. */
 327         uint32_t draw_tiles_y; /** @< Number of tiles high for framebuffer. */
 328
 329         uint32_t tile_width; /** @< Width of a tile. */
 330         uint32_t tile_height; /** @< Height of a tile. */
 331         /** maximum internal_bpp of all color render targets. */
 332         uint32_t internal_bpp;
 333
 334         /** Whether the current rendering is in a 4X MSAA tile buffer. */
 335         bool msaa;
 336         /** @} */
 337
 338         /* Bitmask of PIPE_CLEAR_* of buffers that were cleared before the
 339          * first rendering.
 340          */
 341         uint32_t clear;
 342         /* Bitmask of PIPE_CLEAR_* of buffers that have been read by a draw
 343          * call without having been cleared first.
 344          */
 345         uint32_t load;
 346         /* Bitmask of PIPE_CLEAR_* of buffers that have been rendered to
 347          * (either clears or draws) and should be stored.
 348          */
 349         uint32_t store;
 350         uint32_t clear_color[4][4];
 351         float clear_z;
 352         uint8_t clear_s;
 353
 354         /**
 355          * Set if some drawing (triangles, blits, or just a glClear()) has
 356          * been done to the FBO, meaning that we need to
 357          * DRM_IOCTL_VC5_SUBMIT_CL.
 358          */
 359         bool needs_flush;
 360
 361         /* Set if any shader has dirtied cachelines in the TMU that need to be
 362          * flushed before job end.
 363          */
 364         bool tmu_dirty_rcl;
 365
 366         /**
 367          * Set if a packet enabling TF has been emitted in the job (V3D 4.x).
 368          */
 369         bool tf_enabled;
 370
 371         /**
 372          * Current EZ state for drawing. Updated at the start of draw after
 373          * we've decided on the shader being rendered.
 374          */
 375         enum v3d_ez_state ez_state;
 376         /**
 377          * The first EZ state that was used for drawing with a decided EZ
 378          * direction (so either UNDECIDED, GT, or LT).
 379          */
 380         enum v3d_ez_state first_ez_state;
 381
 382         /**
 383          * Number of draw calls (not counting full buffer clears) queued in
 384          * the current job.
 385          */
 386         uint32_t draw_calls_queued;
 387
 388         struct v3d_job_key key;
 389 };
 390
 391 struct v3d_context {
 392         struct pipe_context base;
 393
 394         int fd;
 395         struct v3d_screen *screen;
 396
 397         /** The 3D rendering job for the currently bound FBO. */
 398         struct v3d_job *job;
 399
 400         /* Map from struct v3d_job_key to the job for that FBO.
 401          */
 402         struct hash_table *jobs;
 403
 404         /**
 405          * Map from v3d_resource to a job writing to that resource.
 406          *
 407          * Primarily for flushing jobs rendering to textures that are now
 408          * being read from.
 409          */
 410         struct hash_table *write_jobs;
 411
 412         struct slab_child_pool transfer_pool;
 413         struct blitter_context *blitter;
 414
 415         /** bitfield of VC5_DIRTY_* */
 416         uint32_t dirty;
 417
 418         struct primconvert_context *primconvert;
 419
 420         uint32_t next_uncompiled_program_id;
 421         uint64_t next_compiled_program_id;
 422
 423         struct v3d_compiler_state *compiler_state;
 424
 425         uint8_t prim_mode;
 426
 427         /** Maximum index buffer valid for the current shader_rec. */
 428         uint32_t max_index;
 429
 430         /** Sync object that our RCL or TFU job will update as its out_sync. */
 431         uint32_t out_sync;
 432
 433         /* Stream uploader used by gallium internals.  This could also be used
 434          * by driver internals, but we tend to use the v3d_cl.h interfaces
 435          * instead.
 436          */
 437         struct u_upload_mgr *uploader;
 438         /* State uploader used inside the driver.  This is for packing bits of
 439          * long-term state inside buffers, since the kernel interfaces
 440          * allocate a page at a time.
 441          */
 442         struct u_upload_mgr *state_uploader;
 443
 444         /** @{ Current pipeline state objects */
 445         struct pipe_scissor_state scissor;
 446         struct v3d_blend_state *blend;
 447         struct v3d_rasterizer_state *rasterizer;
 448         struct v3d_depth_stencil_alpha_state *zsa;
 449
 450         struct v3d_program_stateobj prog;
 451         uint32_t compute_num_workgroups[3];
 452         struct v3d_bo *compute_shared_memory;
 453
 454         struct v3d_vertex_stateobj *vtx;
 455
 456         struct {
 457                 struct pipe_blend_color f;
 458                 uint16_t hf[4];
 459         } blend_color;
 460         struct pipe_stencil_ref stencil_ref;
 461         unsigned sample_mask;
 462         struct pipe_framebuffer_state framebuffer;
 463
 464         /* Per render target, whether we should swap the R and B fields in the
 465          * shader's color output and in blending.  If render targets disagree
 466          * on the R/B swap and use the constant color, then we would need to
 467          * fall back to in-shader blending.
 468          */
 469         uint8_t swap_color_rb;
 470
 471         /* Per render target, whether we should treat the dst alpha values as
 472          * one in blending.
 473          *
 474          * For RGBX formats, the tile buffer's alpha channel will be
 475          * undefined.
 476          */
 477         uint8_t blend_dst_alpha_one;
 478
 479         bool active_queries;
 480
 481         uint32_t tf_prims_generated;
 482         uint32_t prims_generated;
 483
 484         struct pipe_poly_stipple stipple;
 485         struct pipe_clip_state clip;
 486         struct pipe_viewport_state viewport;
 487         struct v3d_ssbo_stateobj ssbo[PIPE_SHADER_TYPES];
 488         struct v3d_shaderimg_stateobj shaderimg[PIPE_SHADER_TYPES];
 489         struct v3d_constbuf_stateobj constbuf[PIPE_SHADER_TYPES];
 490         struct v3d_texture_stateobj tex[PIPE_SHADER_TYPES];
 491         struct v3d_vertexbuf_stateobj vertexbuf;
 492         struct v3d_streamout_stateobj streamout;
 493         struct v3d_bo *current_oq;
 494         struct pipe_debug_callback debug;
 495         /** @} */
 496 };
 497
 498 struct v3d_rasterizer_state {
 499         struct pipe_rasterizer_state base;
 500
 501         float point_size;
 502
 503         uint8_t depth_offset[9];
 504         uint8_t depth_offset_z16[9];
 505 };
 506
 507 struct v3d_depth_stencil_alpha_state {
 508         struct pipe_depth_stencil_alpha_state base;
 509
 510         enum v3d_ez_state ez_state;
 511
 512         uint8_t stencil_front[6];
 513         uint8_t stencil_back[6];
 514 };
 515
 516 struct v3d_blend_state {
 517         struct pipe_blend_state base;
 518
 519         /* Per-RT mask of whether blending is enabled. */
 520         uint8_t blend_enables;
 521 };
 522
 523 #define perf_debug(...) do {                            \
 524         if (unlikely(V3D_DEBUG & V3D_DEBUG_PERF))       \
 525                 fprintf(stderr, __VA_ARGS__);           \
 526         if (unlikely(v3d->debug.debug_message))         \
 527                 pipe_debug_message(&v3d->debug, PERF_INFO, __VA_ARGS__);    \
 528 } while (0)
 529
 530 #define foreach_bit(b, mask)                                            \
 531         for (uint32_t _m = (mask), b; _m && ({(b) = u_bit_scan(&_m); 1;});)
 532
 533 static inline struct v3d_context *
 534 v3d_context(struct pipe_context *pcontext)
 535 {
 536         return (struct v3d_context *)pcontext;
 537 }
 538
 539 static inline struct v3d_sampler_view *
 540 v3d_sampler_view(struct pipe_sampler_view *psview)
 541 {
 542         return (struct v3d_sampler_view *)psview;
 543 }
 544
 545 static inline struct v3d_sampler_state *
 546 v3d_sampler_state(struct pipe_sampler_state *psampler)
 547 {
 548         return (struct v3d_sampler_state *)psampler;
 549 }
 550
 551 struct pipe_context *v3d_context_create(struct pipe_screen *pscreen,
 552                                         void *priv, unsigned flags);
 553 void v3d_program_init(struct pipe_context *pctx);
 554 void v3d_program_fini(struct pipe_context *pctx);
 555 void v3d_query_init(struct pipe_context *pctx);
 556
 557 void v3d_simulator_init(struct v3d_screen *screen);
 558 void v3d_simulator_destroy(struct v3d_screen *screen);
 559 uint32_t v3d_simulator_get_spill(uint32_t spill_size);
 560 int v3d_simulator_ioctl(int fd, unsigned long request, void *arg);
 561 void v3d_simulator_open_from_handle(int fd, int handle, uint32_t size);
 562
 563 static inline int
 564 v3d_ioctl(int fd, unsigned long request, void *arg)
 565 {
 566         if (using_v3d_simulator)
 567                 return v3d_simulator_ioctl(fd, request, arg);
 568         else
 569                 return drmIoctl(fd, request, arg);
 570 }
 571
 572 void v3d_set_shader_uniform_dirty_flags(struct v3d_compiled_shader *shader);
 573 struct v3d_cl_reloc v3d_write_uniforms(struct v3d_context *v3d,
 574                                        struct v3d_compiled_shader *shader,
 575                                        enum pipe_shader_type stage);
 576
 577 void v3d_flush(struct pipe_context *pctx);
 578 void v3d_job_init(struct v3d_context *v3d);
 579 struct v3d_job *v3d_get_job(struct v3d_context *v3d,
 580                             struct pipe_surface **cbufs,
 581                             struct pipe_surface *zsbuf);
 582 struct v3d_job *v3d_get_job_for_fbo(struct v3d_context *v3d);
 583 void v3d_job_add_bo(struct v3d_job *job, struct v3d_bo *bo);
 584 void v3d_job_add_write_resource(struct v3d_job *job, struct pipe_resource *prsc);
 585 void v3d_job_submit(struct v3d_context *v3d, struct v3d_job *job);
 586 void v3d_flush_jobs_writing_resource(struct v3d_context *v3d,
 587                                      struct pipe_resource *prsc);
 588 void v3d_flush_jobs_reading_resource(struct v3d_context *v3d,
 589                                      struct pipe_resource *prsc);
 590 void v3d_update_compiled_shaders(struct v3d_context *v3d, uint8_t prim_mode);
 591 void v3d_update_compiled_cs(struct v3d_context *v3d);
 592
 593 bool v3d_rt_format_supported(const struct v3d_device_info *devinfo,
 594                              enum pipe_format f);
 595 bool v3d_tex_format_supported(const struct v3d_device_info *devinfo,
 596                               enum pipe_format f);
 597 uint8_t v3d_get_rt_format(const struct v3d_device_info *devinfo, enum pipe_format f);
 598 uint8_t v3d_get_tex_format(const struct v3d_device_info *devinfo, enum pipe_format f);
 599 uint8_t v3d_get_tex_return_size(const struct v3d_device_info *devinfo,
 600                                 enum pipe_format f,
 601                                 enum pipe_tex_compare compare);
 602 uint8_t v3d_get_tex_return_channels(const struct v3d_device_info *devinfo,
 603                                     enum pipe_format f);
 604 const uint8_t *v3d_get_format_swizzle(const struct v3d_device_info *devinfo,
 605                                       enum pipe_format f);
 606 void v3d_get_internal_type_bpp_for_output_format(const struct v3d_device_info *devinfo,
 607                                                  uint32_t format,
 608                                                  uint32_t *type,
 609                                                  uint32_t *bpp);
 610 bool v3d_tfu_supports_tex_format(const struct v3d_device_info *devinfo,
 611                                  uint32_t tex_format);
 612
 613 void v3d_init_query_functions(struct v3d_context *v3d);
 614 void v3d_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info);
 615 void v3d_blitter_save(struct v3d_context *v3d);
 616 boolean v3d_generate_mipmap(struct pipe_context *pctx,
 617                             struct pipe_resource *prsc,
 618                             enum pipe_format format,
 619                             unsigned int base_level,
 620                             unsigned int last_level,
 621                             unsigned int first_layer,
 622                             unsigned int last_layer);
 623
 624 struct v3d_fence *v3d_fence_create(struct v3d_context *v3d);
 625
 626 #ifdef v3dX
 627 #  include "v3dx_context.h"
 628 #else
 629 #  define v3dX(x) v3d33_##x
 630 #  include "v3dx_context.h"
 631 #  undef v3dX
 632
 633 #  define v3dX(x) v3d41_##x
 634 #  include "v3dx_context.h"
 635 #  undef v3dX
 636 #endif
 637
 638 #endif /* VC5_CONTEXT_H */