2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
29 #include "broadcom/common/v3d_macros.h"
34 #include "pipe/p_context.h"
35 #include "pipe/p_state.h"
36 #include "util/bitset.h"
37 #include "util/slab.h"
39 #include "drm-uapi/v3d_drm.h"
40 #include "v3d_screen.h"
41 #include "broadcom/common/v3d_limits.h"
45 void v3d_job_add_bo(struct v3d_job
*job
, struct v3d_bo
*bo
);
47 #include "v3d_bufmgr.h"
48 #include "v3d_resource.h"
51 #ifdef USE_V3D_SIMULATOR
52 #define using_v3d_simulator true
54 #define using_v3d_simulator false
57 #define VC5_DIRTY_BLEND (1ull << 0)
58 #define VC5_DIRTY_RASTERIZER (1ull << 1)
59 #define VC5_DIRTY_ZSA (1ull << 2)
60 #define VC5_DIRTY_COMPTEX (1ull << 3)
61 #define VC5_DIRTY_VERTTEX (1ull << 4)
62 #define VC5_DIRTY_FRAGTEX (1ull << 5)
64 #define VC5_DIRTY_SHADER_IMAGE (1ull << 9)
65 #define VC5_DIRTY_BLEND_COLOR (1ull << 10)
66 #define VC5_DIRTY_STENCIL_REF (1ull << 11)
67 #define VC5_DIRTY_SAMPLE_STATE (1ull << 12)
68 #define VC5_DIRTY_FRAMEBUFFER (1ull << 13)
69 #define VC5_DIRTY_STIPPLE (1ull << 14)
70 #define VC5_DIRTY_VIEWPORT (1ull << 15)
71 #define VC5_DIRTY_CONSTBUF (1ull << 16)
72 #define VC5_DIRTY_VTXSTATE (1ull << 17)
73 #define VC5_DIRTY_VTXBUF (1ull << 18)
74 #define VC5_DIRTY_SCISSOR (1ull << 19)
75 #define VC5_DIRTY_FLAT_SHADE_FLAGS (1ull << 20)
76 #define VC5_DIRTY_PRIM_MODE (1ull << 21)
77 #define VC5_DIRTY_CLIP (1ull << 22)
78 #define VC5_DIRTY_UNCOMPILED_CS (1ull << 23)
79 #define VC5_DIRTY_UNCOMPILED_VS (1ull << 24)
80 #define VC5_DIRTY_UNCOMPILED_FS (1ull << 25)
82 #define VC5_DIRTY_COMPILED_CS (1ull << 29)
83 #define VC5_DIRTY_COMPILED_VS (1ull << 30)
84 #define VC5_DIRTY_COMPILED_FS (1ull << 31)
86 #define VC5_DIRTY_FS_INPUTS (1ull << 35)
87 #define VC5_DIRTY_STREAMOUT (1ull << 36)
88 #define VC5_DIRTY_OQ (1ull << 37)
89 #define VC5_DIRTY_CENTROID_FLAGS (1ull << 38)
90 #define VC5_DIRTY_NOPERSPECTIVE_FLAGS (1ull << 39)
91 #define VC5_DIRTY_SSBO (1ull << 40)
93 #define VC5_MAX_FS_INPUTS 64
95 enum v3d_sampler_state_variant
{
96 V3D_SAMPLER_STATE_BORDER_0
,
97 V3D_SAMPLER_STATE_F16
,
98 V3D_SAMPLER_STATE_F16_UNORM
,
99 V3D_SAMPLER_STATE_F16_SNORM
,
100 V3D_SAMPLER_STATE_F16_BGRA
,
101 V3D_SAMPLER_STATE_F16_BGRA_UNORM
,
102 V3D_SAMPLER_STATE_F16_BGRA_SNORM
,
103 V3D_SAMPLER_STATE_F16_A
,
104 V3D_SAMPLER_STATE_F16_A_SNORM
,
105 V3D_SAMPLER_STATE_F16_A_UNORM
,
106 V3D_SAMPLER_STATE_F16_LA
,
107 V3D_SAMPLER_STATE_F16_LA_UNORM
,
108 V3D_SAMPLER_STATE_F16_LA_SNORM
,
109 V3D_SAMPLER_STATE_32
,
110 V3D_SAMPLER_STATE_32_UNORM
,
111 V3D_SAMPLER_STATE_32_SNORM
,
112 V3D_SAMPLER_STATE_32_A
,
113 V3D_SAMPLER_STATE_32_A_UNORM
,
114 V3D_SAMPLER_STATE_32_A_SNORM
,
115 V3D_SAMPLER_STATE_1010102U
,
116 V3D_SAMPLER_STATE_16U
,
117 V3D_SAMPLER_STATE_16I
,
118 V3D_SAMPLER_STATE_8I
,
119 V3D_SAMPLER_STATE_8U
,
121 V3D_SAMPLER_STATE_VARIANT_COUNT
,
124 enum v3d_flush_cond
{
125 /* Flush job unless we are flushing for transform feedback, where we
126 * handle flushing in the driver via the 'Wait for TF' packet.
129 /* Always flush the job, even for cases where we would normally not
130 * do it, such as transform feedback.
133 /* Flush job if it is not the current FBO job. This is intended to
134 * skip automatic flushes of the current job for resources that we
135 * expect to be externally synchronized by the application using
136 * glMemoryBarrier(), such as SSBOs and shader images.
138 V3D_FLUSH_NOT_CURRENT_JOB
,
141 struct v3d_sampler_view
{
142 struct pipe_sampler_view base
;
145 /* Precomputed swizzles to pass in to the shader key. */
148 uint8_t texture_shader_state
[32];
149 /* V3D 4.x: Texture state struct. */
152 enum v3d_sampler_state_variant sampler_variant
;
154 /* Actual texture to be read by this sampler view. May be different
155 * from base.texture in the case of having a shadow tiled copy of a
158 struct pipe_resource
*texture
;
161 struct v3d_sampler_state
{
162 struct pipe_sampler_state base
;
166 /* V3D 3.x: Packed texture state. */
167 uint8_t texture_shader_state
[32];
168 /* V3D 4.x: Sampler state struct. */
169 struct pipe_resource
*sampler_state
;
170 uint32_t sampler_state_offset
[V3D_SAMPLER_STATE_VARIANT_COUNT
];
172 bool border_color_variants
;
175 struct v3d_texture_stateobj
{
176 struct pipe_sampler_view
*textures
[V3D_MAX_TEXTURE_SAMPLERS
];
177 unsigned num_textures
;
178 struct pipe_sampler_state
*samplers
[V3D_MAX_TEXTURE_SAMPLERS
];
179 unsigned num_samplers
;
180 struct v3d_cl_reloc texture_state
[V3D_MAX_TEXTURE_SAMPLERS
];
183 struct v3d_shader_uniform_info
{
184 enum quniform_contents
*contents
;
189 struct v3d_uncompiled_shader
{
190 /** A name for this program, so you can track it in shader-db output. */
192 /** How many variants of this program were compiled, for shader-db. */
193 uint32_t compiled_variant_count
;
194 struct pipe_shader_state base
;
195 uint32_t num_tf_outputs
;
196 struct v3d_varying_slot
*tf_outputs
;
197 uint16_t tf_specs
[16];
198 uint16_t tf_specs_psiz
[16];
199 uint32_t num_tf_specs
;
202 struct v3d_compiled_shader
{
203 struct pipe_resource
*resource
;
207 struct v3d_prog_data
*base
;
208 struct v3d_vs_prog_data
*vs
;
209 struct v3d_fs_prog_data
*fs
;
210 struct v3d_compute_prog_data
*compute
;
214 * VC5_DIRTY_* flags that, when set in v3d->dirty, mean that the
215 * uniforms have to be rewritten (and therefore the shader state
218 uint64_t uniform_dirty_bits
;
221 struct v3d_program_stateobj
{
222 struct v3d_uncompiled_shader
*bind_vs
, *bind_fs
, *bind_compute
;
223 struct v3d_compiled_shader
*cs
, *vs
, *fs
, *compute
;
225 struct hash_table
*cache
[MESA_SHADER_STAGES
];
227 struct v3d_bo
*spill_bo
;
228 int spill_size_per_thread
;
231 struct v3d_constbuf_stateobj
{
232 struct pipe_constant_buffer cb
[PIPE_MAX_CONSTANT_BUFFERS
];
233 uint32_t enabled_mask
;
237 struct v3d_vertexbuf_stateobj
{
238 struct pipe_vertex_buffer vb
[PIPE_MAX_ATTRIBS
];
240 uint32_t enabled_mask
;
244 struct v3d_vertex_stateobj
{
245 struct pipe_vertex_element pipe
[V3D_MAX_VS_INPUTS
/ 4];
246 unsigned num_elements
;
248 uint8_t attrs
[16 * (V3D_MAX_VS_INPUTS
/ 4)];
249 struct pipe_resource
*defaults
;
250 uint32_t defaults_offset
;
253 struct v3d_stream_output_target
{
254 struct pipe_stream_output_target base
;
255 /* Number of transform feedback vertices written to this target */
256 uint32_t recorded_vertex_count
;
259 struct v3d_streamout_stateobj
{
260 struct pipe_stream_output_target
*targets
[PIPE_MAX_SO_BUFFERS
];
261 /* Number of vertices we've written into the buffer so far. */
262 uint32_t offsets
[PIPE_MAX_SO_BUFFERS
];
263 unsigned num_targets
;
266 struct v3d_ssbo_stateobj
{
267 struct pipe_shader_buffer sb
[PIPE_MAX_SHADER_BUFFERS
];
268 uint32_t enabled_mask
;
271 /* Hash table key for v3d->jobs */
273 struct pipe_surface
*cbufs
[4];
274 struct pipe_surface
*zsbuf
;
278 VC5_EZ_UNDECIDED
= 0,
284 struct v3d_image_view
{
285 struct pipe_image_view base
;
286 /* V3D 4.x texture shader state struct */
287 struct pipe_resource
*tex_state
;
288 uint32_t tex_state_offset
;
291 struct v3d_shaderimg_stateobj
{
292 struct v3d_image_view si
[PIPE_MAX_SHADER_IMAGES
];
293 uint32_t enabled_mask
;
297 * A complete bin/render job.
299 * This is all of the state necessary to submit a bin/render to the kernel.
300 * We want to be able to have multiple in progress at a time, so that we don't
301 * need to flush an existing CL just to switch to rendering to a new render
302 * target (which would mean reading back from the old render target when
303 * starting to render to it again).
306 struct v3d_context
*v3d
;
309 struct v3d_cl indirect
;
310 struct v3d_bo
*tile_alloc
;
311 struct v3d_bo
*tile_state
;
313 struct drm_v3d_submit_cl submit
;
316 * Set of all BOs referenced by the job. This will be used for making
317 * the list of BOs that the kernel will need to have paged in to
322 /** Sum of the sizes of the BOs referenced by the job. */
323 uint32_t referenced_size
;
325 struct set
*write_prscs
;
326 struct set
*tf_write_prscs
;
328 /* Size of the submit.bo_handles array. */
329 uint32_t bo_handles_size
;
331 /** @{ Surfaces to submit rendering for. */
332 struct pipe_surface
*cbufs
[4];
333 struct pipe_surface
*zsbuf
;
336 * Bounding box of the scissor across all queued drawing.
338 * Note that the max values are exclusive.
346 * Width/height of the color framebuffer being rendered to,
347 * for VC5_TILE_RENDERING_MODE_CONFIG.
350 uint32_t draw_height
;
352 /** @{ Tile information, depending on MSAA and float color buffer. */
353 uint32_t draw_tiles_x
; /** @< Number of tiles wide for framebuffer. */
354 uint32_t draw_tiles_y
; /** @< Number of tiles high for framebuffer. */
356 uint32_t tile_width
; /** @< Width of a tile. */
357 uint32_t tile_height
; /** @< Height of a tile. */
358 /** maximum internal_bpp of all color render targets. */
359 uint32_t internal_bpp
;
361 /** Whether the current rendering is in a 4X MSAA tile buffer. */
365 /* Bitmask of PIPE_CLEAR_* of buffers that were cleared before the
369 /* Bitmask of PIPE_CLEAR_* of buffers that have been read by a draw
370 * call without having been cleared first.
373 /* Bitmask of PIPE_CLEAR_* of buffers that have been rendered to
374 * (either clears or draws) and should be stored.
377 uint32_t clear_color
[4][4];
382 * Set if some drawing (triangles, blits, or just a glClear()) has
383 * been done to the FBO, meaning that we need to
384 * DRM_IOCTL_VC5_SUBMIT_CL.
388 /* Set if any shader has dirtied cachelines in the TMU that need to be
389 * flushed before job end.
394 * Set if a packet enabling TF has been emitted in the job (V3D 4.x).
399 * Current EZ state for drawing. Updated at the start of draw after
400 * we've decided on the shader being rendered.
402 enum v3d_ez_state ez_state
;
404 * The first EZ state that was used for drawing with a decided EZ
405 * direction (so either UNDECIDED, GT, or LT).
407 enum v3d_ez_state first_ez_state
;
410 * Number of draw calls (not counting full buffer clears) queued in
413 uint32_t draw_calls_queued
;
416 * Number of draw calls (not counting full buffer clears) queued in
417 * the current job during active transform feedback.
419 uint32_t tf_draw_calls_queued
;
421 struct v3d_job_key key
;
425 struct pipe_context base
;
428 struct v3d_screen
*screen
;
430 /** The 3D rendering job for the currently bound FBO. */
433 /* Map from struct v3d_job_key to the job for that FBO.
435 struct hash_table
*jobs
;
438 * Map from v3d_resource to a job writing to that resource.
440 * Primarily for flushing jobs rendering to textures that are now
443 struct hash_table
*write_jobs
;
445 struct slab_child_pool transfer_pool
;
446 struct blitter_context
*blitter
;
448 /** bitfield of VC5_DIRTY_* */
451 struct primconvert_context
*primconvert
;
453 uint32_t next_uncompiled_program_id
;
454 uint64_t next_compiled_program_id
;
456 struct v3d_compiler_state
*compiler_state
;
460 /** Maximum index buffer valid for the current shader_rec. */
463 /** Sync object that our RCL or TFU job will update as its out_sync. */
466 /* Stream uploader used by gallium internals. This could also be used
467 * by driver internals, but we tend to use the v3d_cl.h interfaces
470 struct u_upload_mgr
*uploader
;
471 /* State uploader used inside the driver. This is for packing bits of
472 * long-term state inside buffers, since the kernel interfaces
473 * allocate a page at a time.
475 struct u_upload_mgr
*state_uploader
;
477 /** @{ Current pipeline state objects */
478 struct pipe_scissor_state scissor
;
479 struct v3d_blend_state
*blend
;
480 struct v3d_rasterizer_state
*rasterizer
;
481 struct v3d_depth_stencil_alpha_state
*zsa
;
483 struct v3d_program_stateobj prog
;
484 uint32_t compute_num_workgroups
[3];
485 struct v3d_bo
*compute_shared_memory
;
487 struct v3d_vertex_stateobj
*vtx
;
490 struct pipe_blend_color f
;
493 struct pipe_stencil_ref stencil_ref
;
494 unsigned sample_mask
;
495 struct pipe_framebuffer_state framebuffer
;
497 /* Per render target, whether we should swap the R and B fields in the
498 * shader's color output and in blending. If render targets disagree
499 * on the R/B swap and use the constant color, then we would need to
500 * fall back to in-shader blending.
502 uint8_t swap_color_rb
;
504 /* Per render target, whether we should treat the dst alpha values as
507 * For RGBX formats, the tile buffer's alpha channel will be
510 uint8_t blend_dst_alpha_one
;
514 uint32_t tf_prims_generated
;
515 uint32_t prims_generated
;
517 struct pipe_poly_stipple stipple
;
518 struct pipe_clip_state clip
;
519 struct pipe_viewport_state viewport
;
520 struct v3d_ssbo_stateobj ssbo
[PIPE_SHADER_TYPES
];
521 struct v3d_shaderimg_stateobj shaderimg
[PIPE_SHADER_TYPES
];
522 struct v3d_constbuf_stateobj constbuf
[PIPE_SHADER_TYPES
];
523 struct v3d_texture_stateobj tex
[PIPE_SHADER_TYPES
];
524 struct v3d_vertexbuf_stateobj vertexbuf
;
525 struct v3d_streamout_stateobj streamout
;
526 struct v3d_bo
*current_oq
;
527 struct pipe_resource
*prim_counts
;
528 uint32_t prim_counts_offset
;
529 struct pipe_debug_callback debug
;
533 struct v3d_rasterizer_state
{
534 struct pipe_rasterizer_state base
;
538 uint8_t depth_offset
[9];
539 uint8_t depth_offset_z16
[9];
542 struct v3d_depth_stencil_alpha_state
{
543 struct pipe_depth_stencil_alpha_state base
;
545 enum v3d_ez_state ez_state
;
547 uint8_t stencil_front
[6];
548 uint8_t stencil_back
[6];
551 struct v3d_blend_state
{
552 struct pipe_blend_state base
;
554 /* Per-RT mask of whether blending is enabled. */
555 uint8_t blend_enables
;
558 #define perf_debug(...) do { \
559 if (unlikely(V3D_DEBUG & V3D_DEBUG_PERF)) \
560 fprintf(stderr, __VA_ARGS__); \
561 if (unlikely(v3d->debug.debug_message)) \
562 pipe_debug_message(&v3d->debug, PERF_INFO, __VA_ARGS__); \
565 #define foreach_bit(b, mask) \
566 for (uint32_t _m = (mask), b; _m && ({(b) = u_bit_scan(&_m); 1;});)
568 static inline struct v3d_context
*
569 v3d_context(struct pipe_context
*pcontext
)
571 return (struct v3d_context
*)pcontext
;
574 static inline struct v3d_sampler_view
*
575 v3d_sampler_view(struct pipe_sampler_view
*psview
)
577 return (struct v3d_sampler_view
*)psview
;
580 static inline struct v3d_sampler_state
*
581 v3d_sampler_state(struct pipe_sampler_state
*psampler
)
583 return (struct v3d_sampler_state
*)psampler
;
586 static inline struct v3d_stream_output_target
*
587 v3d_stream_output_target(struct pipe_stream_output_target
*ptarget
)
589 return (struct v3d_stream_output_target
*)ptarget
;
592 static inline uint32_t
593 v3d_stream_output_target_get_vertex_count(struct pipe_stream_output_target
*ptarget
)
595 return v3d_stream_output_target(ptarget
)->recorded_vertex_count
;
598 struct pipe_context
*v3d_context_create(struct pipe_screen
*pscreen
,
599 void *priv
, unsigned flags
);
600 void v3d_program_init(struct pipe_context
*pctx
);
601 void v3d_program_fini(struct pipe_context
*pctx
);
602 void v3d_query_init(struct pipe_context
*pctx
);
604 void v3d_simulator_init(struct v3d_screen
*screen
);
605 void v3d_simulator_destroy(struct v3d_screen
*screen
);
606 uint32_t v3d_simulator_get_spill(uint32_t spill_size
);
607 int v3d_simulator_ioctl(int fd
, unsigned long request
, void *arg
);
608 void v3d_simulator_open_from_handle(int fd
, int handle
, uint32_t size
);
611 v3d_ioctl(int fd
, unsigned long request
, void *arg
)
613 if (using_v3d_simulator
)
614 return v3d_simulator_ioctl(fd
, request
, arg
);
616 return drmIoctl(fd
, request
, arg
);
620 v3d_transform_feedback_enabled(struct v3d_context
*v3d
)
622 return v3d
->prog
.bind_vs
->num_tf_specs
!= 0 &&
626 void v3d_set_shader_uniform_dirty_flags(struct v3d_compiled_shader
*shader
);
627 struct v3d_cl_reloc
v3d_write_uniforms(struct v3d_context
*v3d
,
629 struct v3d_compiled_shader
*shader
,
630 enum pipe_shader_type stage
);
632 void v3d_flush(struct pipe_context
*pctx
);
633 void v3d_job_init(struct v3d_context
*v3d
);
634 struct v3d_job
*v3d_job_create(struct v3d_context
*v3d
);
635 void v3d_job_free(struct v3d_context
*v3d
, struct v3d_job
*job
);
636 struct v3d_job
*v3d_get_job(struct v3d_context
*v3d
,
637 struct pipe_surface
**cbufs
,
638 struct pipe_surface
*zsbuf
);
639 struct v3d_job
*v3d_get_job_for_fbo(struct v3d_context
*v3d
);
640 void v3d_job_add_bo(struct v3d_job
*job
, struct v3d_bo
*bo
);
641 void v3d_job_add_write_resource(struct v3d_job
*job
, struct pipe_resource
*prsc
);
642 void v3d_job_add_tf_write_resource(struct v3d_job
*job
, struct pipe_resource
*prsc
);
643 void v3d_job_submit(struct v3d_context
*v3d
, struct v3d_job
*job
);
644 void v3d_flush_jobs_using_bo(struct v3d_context
*v3d
, struct v3d_bo
*bo
);
645 void v3d_flush_jobs_writing_resource(struct v3d_context
*v3d
,
646 struct pipe_resource
*prsc
,
647 enum v3d_flush_cond flush_cond
);
648 void v3d_flush_jobs_reading_resource(struct v3d_context
*v3d
,
649 struct pipe_resource
*prsc
,
650 enum v3d_flush_cond flush_cond
);
651 void v3d_update_compiled_shaders(struct v3d_context
*v3d
, uint8_t prim_mode
);
652 void v3d_update_compiled_cs(struct v3d_context
*v3d
);
654 bool v3d_rt_format_supported(const struct v3d_device_info
*devinfo
,
656 bool v3d_tex_format_supported(const struct v3d_device_info
*devinfo
,
658 uint8_t v3d_get_rt_format(const struct v3d_device_info
*devinfo
, enum pipe_format f
);
659 uint8_t v3d_get_tex_format(const struct v3d_device_info
*devinfo
, enum pipe_format f
);
660 uint8_t v3d_get_tex_return_size(const struct v3d_device_info
*devinfo
,
662 enum pipe_tex_compare compare
);
663 uint8_t v3d_get_tex_return_channels(const struct v3d_device_info
*devinfo
,
665 const uint8_t *v3d_get_format_swizzle(const struct v3d_device_info
*devinfo
,
667 void v3d_get_internal_type_bpp_for_output_format(const struct v3d_device_info
*devinfo
,
671 bool v3d_tfu_supports_tex_format(const struct v3d_device_info
*devinfo
,
672 uint32_t tex_format
);
674 void v3d_init_query_functions(struct v3d_context
*v3d
);
675 void v3d_blit(struct pipe_context
*pctx
, const struct pipe_blit_info
*blit_info
);
676 void v3d_blitter_save(struct v3d_context
*v3d
);
677 bool v3d_generate_mipmap(struct pipe_context
*pctx
,
678 struct pipe_resource
*prsc
,
679 enum pipe_format format
,
680 unsigned int base_level
,
681 unsigned int last_level
,
682 unsigned int first_layer
,
683 unsigned int last_layer
);
685 struct v3d_fence
*v3d_fence_create(struct v3d_context
*v3d
);
687 void v3d_tf_update_counters(struct v3d_context
*v3d
);
690 # include "v3dx_context.h"
692 # define v3dX(x) v3d33_##x
693 # include "v3dx_context.h"
696 # define v3dX(x) v3d41_##x
697 # include "v3dx_context.h"
701 #endif /* VC5_CONTEXT_H */