2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
29 #include "broadcom/common/v3d_macros.h"
34 #include "pipe/p_context.h"
35 #include "pipe/p_state.h"
36 #include "util/bitset.h"
37 #include "util/slab.h"
40 #include "v3d_screen.h"
41 #include "broadcom/common/v3d_limits.h"
45 void v3d_job_add_bo(struct v3d_job
*job
, struct v3d_bo
*bo
);
47 #include "v3d_bufmgr.h"
48 #include "v3d_resource.h"
51 #ifdef USE_V3D_SIMULATOR
52 #define using_v3d_simulator true
54 #define using_v3d_simulator false
57 #define VC5_DIRTY_BLEND (1 << 0)
58 #define VC5_DIRTY_RASTERIZER (1 << 1)
59 #define VC5_DIRTY_ZSA (1 << 2)
60 #define VC5_DIRTY_FRAGTEX (1 << 3)
61 #define VC5_DIRTY_VERTTEX (1 << 4)
62 #define VC5_DIRTY_SHADER_IMAGE (1 << 5)
64 #define VC5_DIRTY_BLEND_COLOR (1 << 7)
65 #define VC5_DIRTY_STENCIL_REF (1 << 8)
66 #define VC5_DIRTY_SAMPLE_STATE (1 << 9)
67 #define VC5_DIRTY_FRAMEBUFFER (1 << 10)
68 #define VC5_DIRTY_STIPPLE (1 << 11)
69 #define VC5_DIRTY_VIEWPORT (1 << 12)
70 #define VC5_DIRTY_CONSTBUF (1 << 13)
71 #define VC5_DIRTY_VTXSTATE (1 << 14)
72 #define VC5_DIRTY_VTXBUF (1 << 15)
73 #define VC5_DIRTY_SCISSOR (1 << 17)
74 #define VC5_DIRTY_FLAT_SHADE_FLAGS (1 << 18)
75 #define VC5_DIRTY_PRIM_MODE (1 << 19)
76 #define VC5_DIRTY_CLIP (1 << 20)
77 #define VC5_DIRTY_UNCOMPILED_VS (1 << 21)
78 #define VC5_DIRTY_UNCOMPILED_FS (1 << 22)
79 #define VC5_DIRTY_COMPILED_CS (1 << 23)
80 #define VC5_DIRTY_COMPILED_VS (1 << 24)
81 #define VC5_DIRTY_COMPILED_FS (1 << 25)
82 #define VC5_DIRTY_FS_INPUTS (1 << 26)
83 #define VC5_DIRTY_STREAMOUT (1 << 27)
84 #define VC5_DIRTY_OQ (1 << 28)
85 #define VC5_DIRTY_CENTROID_FLAGS (1 << 29)
86 #define VC5_DIRTY_NOPERSPECTIVE_FLAGS (1 << 30)
87 #define VC5_DIRTY_SSBO (1 << 31)
89 #define VC5_MAX_FS_INPUTS 64
91 struct v3d_sampler_view
{
92 struct pipe_sampler_view base
;
95 /* Precomputed swizzles to pass in to the shader key. */
98 uint8_t texture_shader_state
[32];
99 /* V3D 4.x: Texture state struct. */
102 /* Actual texture to be read by this sampler view. May be different
103 * from base.texture in the case of having a shadow tiled copy of a
106 struct pipe_resource
*texture
;
109 struct v3d_sampler_state
{
110 struct pipe_sampler_state base
;
114 /* V3D 3.x: Packed texture state. */
115 uint8_t texture_shader_state
[32];
116 /* V3D 4.x: Sampler state struct. */
120 struct v3d_texture_stateobj
{
121 struct pipe_sampler_view
*textures
[V3D_MAX_TEXTURE_SAMPLERS
];
122 unsigned num_textures
;
123 struct pipe_sampler_state
*samplers
[V3D_MAX_TEXTURE_SAMPLERS
];
124 unsigned num_samplers
;
125 struct v3d_cl_reloc texture_state
[V3D_MAX_TEXTURE_SAMPLERS
];
128 struct v3d_shader_uniform_info
{
129 enum quniform_contents
*contents
;
134 struct v3d_uncompiled_shader
{
135 /** A name for this program, so you can track it in shader-db output. */
137 /** How many variants of this program were compiled, for shader-db. */
138 uint32_t compiled_variant_count
;
139 struct pipe_shader_state base
;
140 uint32_t num_tf_outputs
;
141 struct v3d_varying_slot
*tf_outputs
;
142 uint16_t tf_specs
[16];
143 uint16_t tf_specs_psiz
[16];
144 uint32_t num_tf_specs
;
147 * Flag for if the NIR in this shader originally came from TGSI. If
148 * so, we need to do some fixups at compile time, due to missing
149 * information in TGSI that exists in NIR.
154 struct v3d_compiled_shader
{
155 struct pipe_resource
*resource
;
159 struct v3d_prog_data
*base
;
160 struct v3d_vs_prog_data
*vs
;
161 struct v3d_fs_prog_data
*fs
;
165 * VC5_DIRTY_* flags that, when set in v3d->dirty, mean that the
166 * uniforms have to be rewritten (and therefore the shader state
169 uint32_t uniform_dirty_bits
;
172 struct v3d_program_stateobj
{
173 struct v3d_uncompiled_shader
*bind_vs
, *bind_fs
;
174 struct v3d_compiled_shader
*cs
, *vs
, *fs
;
176 struct v3d_bo
*spill_bo
;
177 int spill_size_per_thread
;
180 struct v3d_constbuf_stateobj
{
181 struct pipe_constant_buffer cb
[PIPE_MAX_CONSTANT_BUFFERS
];
182 uint32_t enabled_mask
;
186 struct v3d_vertexbuf_stateobj
{
187 struct pipe_vertex_buffer vb
[PIPE_MAX_ATTRIBS
];
189 uint32_t enabled_mask
;
193 struct v3d_vertex_stateobj
{
194 struct pipe_vertex_element pipe
[V3D_MAX_VS_INPUTS
/ 4];
195 unsigned num_elements
;
197 uint8_t attrs
[16 * (V3D_MAX_VS_INPUTS
/ 4)];
198 struct pipe_resource
*defaults
;
199 uint32_t defaults_offset
;
202 struct v3d_streamout_stateobj
{
203 struct pipe_stream_output_target
*targets
[PIPE_MAX_SO_BUFFERS
];
204 /* Number of vertices we've written into the buffer so far. */
205 uint32_t offsets
[PIPE_MAX_SO_BUFFERS
];
206 unsigned num_targets
;
209 struct v3d_ssbo_stateobj
{
210 struct pipe_shader_buffer sb
[PIPE_MAX_SHADER_BUFFERS
];
211 uint32_t enabled_mask
;
214 /* Hash table key for v3d->jobs */
216 struct pipe_surface
*cbufs
[4];
217 struct pipe_surface
*zsbuf
;
221 VC5_EZ_UNDECIDED
= 0,
227 struct v3d_image_view
{
228 struct pipe_image_view base
;
229 /* V3D 4.x texture shader state struct */
230 struct pipe_resource
*tex_state
;
231 uint32_t tex_state_offset
;
234 struct v3d_shaderimg_stateobj
{
235 struct v3d_image_view si
[PIPE_MAX_SHADER_IMAGES
];
236 uint32_t enabled_mask
;
240 * A complete bin/render job.
242 * This is all of the state necessary to submit a bin/render to the kernel.
243 * We want to be able to have multiple in progress at a time, so that we don't
244 * need to flush an existing CL just to switch to rendering to a new render
245 * target (which would mean reading back from the old render target when
246 * starting to render to it again).
249 struct v3d_context
*v3d
;
252 struct v3d_cl indirect
;
253 struct v3d_bo
*tile_alloc
;
254 struct v3d_bo
*tile_state
;
255 uint32_t shader_rec_count
;
257 struct drm_v3d_submit_cl submit
;
260 * Set of all BOs referenced by the job. This will be used for making
261 * the list of BOs that the kernel will need to have paged in to
266 /** Sum of the sizes of the BOs referenced by the job. */
267 uint32_t referenced_size
;
269 struct set
*write_prscs
;
271 /* Size of the submit.bo_handles array. */
272 uint32_t bo_handles_size
;
274 /** @{ Surfaces to submit rendering for. */
275 struct pipe_surface
*cbufs
[4];
276 struct pipe_surface
*zsbuf
;
279 * Bounding box of the scissor across all queued drawing.
281 * Note that the max values are exclusive.
289 * Width/height of the color framebuffer being rendered to,
290 * for VC5_TILE_RENDERING_MODE_CONFIG.
293 uint32_t draw_height
;
295 /** @{ Tile information, depending on MSAA and float color buffer. */
296 uint32_t draw_tiles_x
; /** @< Number of tiles wide for framebuffer. */
297 uint32_t draw_tiles_y
; /** @< Number of tiles high for framebuffer. */
299 uint32_t tile_width
; /** @< Width of a tile. */
300 uint32_t tile_height
; /** @< Height of a tile. */
301 /** maximum internal_bpp of all color render targets. */
302 uint32_t internal_bpp
;
304 /** Whether the current rendering is in a 4X MSAA tile buffer. */
308 /* Bitmask of PIPE_CLEAR_* of buffers that were cleared before the
312 /* Bitmask of PIPE_CLEAR_* of buffers that have been read by a draw
313 * call without having been cleared first.
316 /* Bitmask of PIPE_CLEAR_* of buffers that have been rendered to
317 * (either clears or draws) and should be stored.
320 uint32_t clear_color
[4][4];
325 * Set if some drawing (triangles, blits, or just a glClear()) has
326 * been done to the FBO, meaning that we need to
327 * DRM_IOCTL_VC5_SUBMIT_CL.
331 /* Set if any shader has dirtied cachelines in the TMU that need to be
332 * flushed before job end.
337 * Set if a packet enabling TF has been emitted in the job (V3D 4.x).
342 * Current EZ state for drawing. Updated at the start of draw after
343 * we've decided on the shader being rendered.
345 enum v3d_ez_state ez_state
;
347 * The first EZ state that was used for drawing with a decided EZ
348 * direction (so either UNDECIDED, GT, or LT).
350 enum v3d_ez_state first_ez_state
;
353 * Number of draw calls (not counting full buffer clears) queued in
356 uint32_t draw_calls_queued
;
358 struct v3d_job_key key
;
362 struct pipe_context base
;
365 struct v3d_screen
*screen
;
367 /** The 3D rendering job for the currently bound FBO. */
370 /* Map from struct v3d_job_key to the job for that FBO.
372 struct hash_table
*jobs
;
375 * Map from v3d_resource to a job writing to that resource.
377 * Primarily for flushing jobs rendering to textures that are now
380 struct hash_table
*write_jobs
;
382 struct slab_child_pool transfer_pool
;
383 struct blitter_context
*blitter
;
385 /** bitfield of VC5_DIRTY_* */
388 struct primconvert_context
*primconvert
;
390 struct hash_table
*fs_cache
, *vs_cache
;
391 uint32_t next_uncompiled_program_id
;
392 uint64_t next_compiled_program_id
;
394 struct v3d_compiler_state
*compiler_state
;
398 /** Maximum index buffer valid for the current shader_rec. */
401 /** Sync object that our RCL or TFU job will update as its out_sync. */
404 /* Stream uploader used by gallium internals. This could also be used
405 * by driver internals, but we tend to use the v3d_cl.h interfaces
408 struct u_upload_mgr
*uploader
;
409 /* State uploader used inside the driver. This is for packing bits of
410 * long-term state inside buffers, since the kernel interfaces
411 * allocate a page at a time.
413 struct u_upload_mgr
*state_uploader
;
415 /** @{ Current pipeline state objects */
416 struct pipe_scissor_state scissor
;
417 struct v3d_blend_state
*blend
;
418 struct v3d_rasterizer_state
*rasterizer
;
419 struct v3d_depth_stencil_alpha_state
*zsa
;
421 struct v3d_program_stateobj prog
;
423 struct v3d_vertex_stateobj
*vtx
;
426 struct pipe_blend_color f
;
429 struct pipe_stencil_ref stencil_ref
;
430 unsigned sample_mask
;
431 struct pipe_framebuffer_state framebuffer
;
433 /* Per render target, whether we should swap the R and B fields in the
434 * shader's color output and in blending. If render targets disagree
435 * on the R/B swap and use the constant color, then we would need to
436 * fall back to in-shader blending.
438 uint8_t swap_color_rb
;
440 /* Per render target, whether we should treat the dst alpha values as
443 * For RGBX formats, the tile buffer's alpha channel will be
446 uint8_t blend_dst_alpha_one
;
450 uint32_t tf_prims_generated
;
451 uint32_t prims_generated
;
453 struct pipe_poly_stipple stipple
;
454 struct pipe_clip_state clip
;
455 struct pipe_viewport_state viewport
;
456 struct v3d_ssbo_stateobj ssbo
[PIPE_SHADER_TYPES
];
457 struct v3d_shaderimg_stateobj shaderimg
[PIPE_SHADER_TYPES
];
458 struct v3d_constbuf_stateobj constbuf
[PIPE_SHADER_TYPES
];
459 struct v3d_texture_stateobj tex
[PIPE_SHADER_TYPES
];
460 struct v3d_vertexbuf_stateobj vertexbuf
;
461 struct v3d_streamout_stateobj streamout
;
462 struct v3d_bo
*current_oq
;
463 struct pipe_debug_callback debug
;
467 struct v3d_rasterizer_state
{
468 struct pipe_rasterizer_state base
;
472 uint8_t depth_offset
[9];
473 uint8_t depth_offset_z16
[9];
476 struct v3d_depth_stencil_alpha_state
{
477 struct pipe_depth_stencil_alpha_state base
;
479 enum v3d_ez_state ez_state
;
481 uint8_t stencil_front
[6];
482 uint8_t stencil_back
[6];
485 struct v3d_blend_state
{
486 struct pipe_blend_state base
;
488 /* Per-RT mask of whether blending is enabled. */
489 uint8_t blend_enables
;
492 #define perf_debug(...) do { \
493 if (unlikely(V3D_DEBUG & V3D_DEBUG_PERF)) \
494 fprintf(stderr, __VA_ARGS__); \
495 if (unlikely(v3d->debug.debug_message)) \
496 pipe_debug_message(&v3d->debug, PERF_INFO, __VA_ARGS__); \
499 #define foreach_bit(b, mask) \
500 for (uint32_t _m = (mask), b; _m && ({(b) = u_bit_scan(&_m); 1;});)
502 static inline struct v3d_context
*
503 v3d_context(struct pipe_context
*pcontext
)
505 return (struct v3d_context
*)pcontext
;
508 static inline struct v3d_sampler_view
*
509 v3d_sampler_view(struct pipe_sampler_view
*psview
)
511 return (struct v3d_sampler_view
*)psview
;
514 static inline struct v3d_sampler_state
*
515 v3d_sampler_state(struct pipe_sampler_state
*psampler
)
517 return (struct v3d_sampler_state
*)psampler
;
520 struct pipe_context
*v3d_context_create(struct pipe_screen
*pscreen
,
521 void *priv
, unsigned flags
);
522 void v3d_program_init(struct pipe_context
*pctx
);
523 void v3d_program_fini(struct pipe_context
*pctx
);
524 void v3d_query_init(struct pipe_context
*pctx
);
526 void v3d_simulator_init(struct v3d_screen
*screen
);
527 void v3d_simulator_destroy(struct v3d_screen
*screen
);
528 int v3d_simulator_ioctl(int fd
, unsigned long request
, void *arg
);
529 void v3d_simulator_open_from_handle(int fd
, int handle
, uint32_t size
);
532 v3d_ioctl(int fd
, unsigned long request
, void *arg
)
534 if (using_v3d_simulator
)
535 return v3d_simulator_ioctl(fd
, request
, arg
);
537 return drmIoctl(fd
, request
, arg
);
540 void v3d_set_shader_uniform_dirty_flags(struct v3d_compiled_shader
*shader
);
541 struct v3d_cl_reloc
v3d_write_uniforms(struct v3d_context
*v3d
,
542 struct v3d_compiled_shader
*shader
,
543 enum pipe_shader_type stage
);
545 void v3d_flush(struct pipe_context
*pctx
);
546 void v3d_job_init(struct v3d_context
*v3d
);
547 struct v3d_job
*v3d_get_job(struct v3d_context
*v3d
,
548 struct pipe_surface
**cbufs
,
549 struct pipe_surface
*zsbuf
);
550 struct v3d_job
*v3d_get_job_for_fbo(struct v3d_context
*v3d
);
551 void v3d_job_add_bo(struct v3d_job
*job
, struct v3d_bo
*bo
);
552 void v3d_job_add_write_resource(struct v3d_job
*job
, struct pipe_resource
*prsc
);
553 void v3d_job_submit(struct v3d_context
*v3d
, struct v3d_job
*job
);
554 void v3d_flush_jobs_writing_resource(struct v3d_context
*v3d
,
555 struct pipe_resource
*prsc
);
556 void v3d_flush_jobs_reading_resource(struct v3d_context
*v3d
,
557 struct pipe_resource
*prsc
);
558 void v3d_update_compiled_shaders(struct v3d_context
*v3d
, uint8_t prim_mode
);
560 bool v3d_rt_format_supported(const struct v3d_device_info
*devinfo
,
562 bool v3d_tex_format_supported(const struct v3d_device_info
*devinfo
,
564 uint8_t v3d_get_rt_format(const struct v3d_device_info
*devinfo
, enum pipe_format f
);
565 uint8_t v3d_get_tex_format(const struct v3d_device_info
*devinfo
, enum pipe_format f
);
566 uint8_t v3d_get_tex_return_size(const struct v3d_device_info
*devinfo
,
568 enum pipe_tex_compare compare
);
569 uint8_t v3d_get_tex_return_channels(const struct v3d_device_info
*devinfo
,
571 const uint8_t *v3d_get_format_swizzle(const struct v3d_device_info
*devinfo
,
573 void v3d_get_internal_type_bpp_for_output_format(const struct v3d_device_info
*devinfo
,
577 bool v3d_tfu_supports_tex_format(const struct v3d_device_info
*devinfo
,
578 uint32_t tex_format
);
580 void v3d_init_query_functions(struct v3d_context
*v3d
);
581 void v3d_blit(struct pipe_context
*pctx
, const struct pipe_blit_info
*blit_info
);
582 void v3d_blitter_save(struct v3d_context
*v3d
);
583 boolean
v3d_generate_mipmap(struct pipe_context
*pctx
,
584 struct pipe_resource
*prsc
,
585 enum pipe_format format
,
586 unsigned int base_level
,
587 unsigned int last_level
,
588 unsigned int first_layer
,
589 unsigned int last_layer
);
591 struct v3d_fence
*v3d_fence_create(struct v3d_context
*v3d
);
594 # include "v3dx_context.h"
596 # define v3dX(x) v3d33_##x
597 # include "v3dx_context.h"
600 # define v3dX(x) v3d41_##x
601 # include "v3dx_context.h"
605 #endif /* VC5_CONTEXT_H */