v3d: Always emit a TF disable at the start of drawing on V3D 4.x.
[mesa.git] / src / gallium / drivers / v3d / v3d_context.h
1 /*
2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #ifndef VC5_CONTEXT_H
26 #define VC5_CONTEXT_H
27
28 #ifdef V3D_VERSION
29 #include "broadcom/common/v3d_macros.h"
30 #endif
31
32 #include <stdio.h>
33
34 #include "pipe/p_context.h"
35 #include "pipe/p_state.h"
36 #include "util/bitset.h"
37 #include "util/slab.h"
38 #include "xf86drm.h"
39 #include "v3d_drm.h"
40 #include "v3d_screen.h"
41
42 struct v3d_job;
43 struct v3d_bo;
44 void v3d_job_add_bo(struct v3d_job *job, struct v3d_bo *bo);
45
46 #include "v3d_bufmgr.h"
47 #include "v3d_resource.h"
48 #include "v3d_cl.h"
49
50 #ifdef USE_V3D_SIMULATOR
51 #define using_v3d_simulator true
52 #else
53 #define using_v3d_simulator false
54 #endif
55
56 #define VC5_DIRTY_BLEND (1 << 0)
57 #define VC5_DIRTY_RASTERIZER (1 << 1)
58 #define VC5_DIRTY_ZSA (1 << 2)
59 #define VC5_DIRTY_FRAGTEX (1 << 3)
60 #define VC5_DIRTY_VERTTEX (1 << 4)
61
62 #define VC5_DIRTY_BLEND_COLOR (1 << 7)
63 #define VC5_DIRTY_STENCIL_REF (1 << 8)
64 #define VC5_DIRTY_SAMPLE_STATE (1 << 9)
65 #define VC5_DIRTY_FRAMEBUFFER (1 << 10)
66 #define VC5_DIRTY_STIPPLE (1 << 11)
67 #define VC5_DIRTY_VIEWPORT (1 << 12)
68 #define VC5_DIRTY_CONSTBUF (1 << 13)
69 #define VC5_DIRTY_VTXSTATE (1 << 14)
70 #define VC5_DIRTY_VTXBUF (1 << 15)
71 #define VC5_DIRTY_SCISSOR (1 << 17)
72 #define VC5_DIRTY_FLAT_SHADE_FLAGS (1 << 18)
73 #define VC5_DIRTY_PRIM_MODE (1 << 19)
74 #define VC5_DIRTY_CLIP (1 << 20)
75 #define VC5_DIRTY_UNCOMPILED_VS (1 << 21)
76 #define VC5_DIRTY_UNCOMPILED_FS (1 << 22)
77 #define VC5_DIRTY_COMPILED_CS (1 << 23)
78 #define VC5_DIRTY_COMPILED_VS (1 << 24)
79 #define VC5_DIRTY_COMPILED_FS (1 << 25)
80 #define VC5_DIRTY_FS_INPUTS (1 << 26)
81 #define VC5_DIRTY_STREAMOUT (1 << 27)
82 #define VC5_DIRTY_OQ (1 << 28)
83 #define VC5_DIRTY_CENTROID_FLAGS (1 << 29)
84 #define VC5_DIRTY_NOPERSPECTIVE_FLAGS (1 << 30)
85
86 #define VC5_MAX_FS_INPUTS 64
87
88 struct v3d_sampler_view {
89 struct pipe_sampler_view base;
90 uint32_t p0;
91 uint32_t p1;
92 /* Precomputed swizzles to pass in to the shader key. */
93 uint8_t swizzle[4];
94
95 uint8_t texture_shader_state[32];
96 /* V3D 4.x: Texture state struct. */
97 struct v3d_bo *bo;
98 };
99
100 struct v3d_sampler_state {
101 struct pipe_sampler_state base;
102 uint32_t p0;
103 uint32_t p1;
104
105 /* V3D 3.x: Packed texture state. */
106 uint8_t texture_shader_state[32];
107 /* V3D 4.x: Sampler state struct. */
108 struct v3d_bo *bo;
109 };
110
111 struct v3d_texture_stateobj {
112 struct pipe_sampler_view *textures[PIPE_MAX_SAMPLERS];
113 unsigned num_textures;
114 struct pipe_sampler_state *samplers[PIPE_MAX_SAMPLERS];
115 unsigned num_samplers;
116 struct v3d_cl_reloc texture_state[PIPE_MAX_SAMPLERS];
117 };
118
119 struct v3d_shader_uniform_info {
120 enum quniform_contents *contents;
121 uint32_t *data;
122 uint32_t count;
123 };
124
125 struct v3d_uncompiled_shader {
126 /** A name for this program, so you can track it in shader-db output. */
127 uint32_t program_id;
128 /** How many variants of this program were compiled, for shader-db. */
129 uint32_t compiled_variant_count;
130 struct pipe_shader_state base;
131 uint32_t num_tf_outputs;
132 struct v3d_varying_slot *tf_outputs;
133 uint16_t tf_specs[16];
134 uint16_t tf_specs_psiz[16];
135 uint32_t num_tf_specs;
136
137 /**
138 * Flag for if the NIR in this shader originally came from TGSI. If
139 * so, we need to do some fixups at compile time, due to missing
140 * information in TGSI that exists in NIR.
141 */
142 bool was_tgsi;
143 };
144
145 struct v3d_compiled_shader {
146 struct v3d_bo *bo;
147
148 union {
149 struct v3d_prog_data *base;
150 struct v3d_vs_prog_data *vs;
151 struct v3d_fs_prog_data *fs;
152 } prog_data;
153
154 /**
155 * VC5_DIRTY_* flags that, when set in v3d->dirty, mean that the
156 * uniforms have to be rewritten (and therefore the shader state
157 * reemitted).
158 */
159 uint32_t uniform_dirty_bits;
160 };
161
162 struct v3d_program_stateobj {
163 struct v3d_uncompiled_shader *bind_vs, *bind_fs;
164 struct v3d_compiled_shader *cs, *vs, *fs;
165
166 struct v3d_bo *spill_bo;
167 int spill_size_per_thread;
168 };
169
170 struct v3d_constbuf_stateobj {
171 struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS];
172 uint32_t enabled_mask;
173 uint32_t dirty_mask;
174 };
175
176 struct v3d_vertexbuf_stateobj {
177 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
178 unsigned count;
179 uint32_t enabled_mask;
180 uint32_t dirty_mask;
181 };
182
183 struct v3d_vertex_stateobj {
184 struct pipe_vertex_element pipe[VC5_MAX_ATTRIBUTES];
185 unsigned num_elements;
186
187 uint8_t attrs[16 * VC5_MAX_ATTRIBUTES];
188 struct v3d_bo *default_attribute_values;
189 };
190
191 struct v3d_streamout_stateobj {
192 struct pipe_stream_output_target *targets[PIPE_MAX_SO_BUFFERS];
193 /* Number of vertices we've written into the buffer so far. */
194 uint32_t offsets[PIPE_MAX_SO_BUFFERS];
195 unsigned num_targets;
196 };
197
198 /* Hash table key for v3d->jobs */
199 struct v3d_job_key {
200 struct pipe_surface *cbufs[4];
201 struct pipe_surface *zsbuf;
202 };
203
204 enum v3d_ez_state {
205 VC5_EZ_UNDECIDED = 0,
206 VC5_EZ_GT_GE,
207 VC5_EZ_LT_LE,
208 VC5_EZ_DISABLED,
209 };
210
211 /**
212 * A complete bin/render job.
213 *
214 * This is all of the state necessary to submit a bin/render to the kernel.
215 * We want to be able to have multiple in progress at a time, so that we don't
216 * need to flush an existing CL just to switch to rendering to a new render
217 * target (which would mean reading back from the old render target when
218 * starting to render to it again).
219 */
220 struct v3d_job {
221 struct v3d_context *v3d;
222 struct v3d_cl bcl;
223 struct v3d_cl rcl;
224 struct v3d_cl indirect;
225 struct v3d_bo *tile_alloc;
226 struct v3d_bo *tile_state;
227 uint32_t shader_rec_count;
228
229 struct drm_v3d_submit_cl submit;
230
231 /**
232 * Set of all BOs referenced by the job. This will be used for making
233 * the list of BOs that the kernel will need to have paged in to
234 * execute our job.
235 */
236 struct set *bos;
237
238 /** Sum of the sizes of the BOs referenced by the job. */
239 uint32_t referenced_size;
240
241 struct set *write_prscs;
242
243 /* Size of the submit.bo_handles array. */
244 uint32_t bo_handles_size;
245
246 /** @{ Surfaces to submit rendering for. */
247 struct pipe_surface *cbufs[4];
248 struct pipe_surface *zsbuf;
249 /** @} */
250 /** @{
251 * Bounding box of the scissor across all queued drawing.
252 *
253 * Note that the max values are exclusive.
254 */
255 uint32_t draw_min_x;
256 uint32_t draw_min_y;
257 uint32_t draw_max_x;
258 uint32_t draw_max_y;
259 /** @} */
260 /** @{
261 * Width/height of the color framebuffer being rendered to,
262 * for VC5_TILE_RENDERING_MODE_CONFIG.
263 */
264 uint32_t draw_width;
265 uint32_t draw_height;
266 /** @} */
267 /** @{ Tile information, depending on MSAA and float color buffer. */
268 uint32_t draw_tiles_x; /** @< Number of tiles wide for framebuffer. */
269 uint32_t draw_tiles_y; /** @< Number of tiles high for framebuffer. */
270
271 uint32_t tile_width; /** @< Width of a tile. */
272 uint32_t tile_height; /** @< Height of a tile. */
273 /** maximum internal_bpp of all color render targets. */
274 uint32_t internal_bpp;
275
276 /** Whether the current rendering is in a 4X MSAA tile buffer. */
277 bool msaa;
278 /** @} */
279
280 /* Bitmask of PIPE_CLEAR_* of buffers that were cleared before the
281 * first rendering.
282 */
283 uint32_t clear;
284 /* Bitmask of PIPE_CLEAR_* of buffers that have been read by a draw
285 * call without having been cleared first.
286 */
287 uint32_t load;
288 /* Bitmask of PIPE_CLEAR_* of buffers that have been rendered to
289 * (either clears or draws) and should be stored.
290 */
291 uint32_t store;
292 uint32_t clear_color[4][4];
293 float clear_z;
294 uint8_t clear_s;
295
296 /**
297 * Set if some drawing (triangles, blits, or just a glClear()) has
298 * been done to the FBO, meaning that we need to
299 * DRM_IOCTL_VC5_SUBMIT_CL.
300 */
301 bool needs_flush;
302
303 /**
304 * Set if there is a nonzero address for OCCLUSION_QUERY_COUNTER. If
305 * so, we need to disable it and flush before ending the CL, to keep
306 * the next tile from starting with it enabled.
307 */
308 bool oq_enabled;
309
310 /**
311 * Set if a packet enabling TF has been emitted in the job (V3D 4.x).
312 */
313 bool tf_enabled;
314
315 /**
316 * Current EZ state for drawing. Updated at the start of draw after
317 * we've decided on the shader being rendered.
318 */
319 enum v3d_ez_state ez_state;
320 /**
321 * The first EZ state that was used for drawing with a decided EZ
322 * direction (so either UNDECIDED, GT, or LT).
323 */
324 enum v3d_ez_state first_ez_state;
325
326 /**
327 * Number of draw calls (not counting full buffer clears) queued in
328 * the current job.
329 */
330 uint32_t draw_calls_queued;
331
332 struct v3d_job_key key;
333 };
334
335 struct v3d_context {
336 struct pipe_context base;
337
338 int fd;
339 struct v3d_screen *screen;
340
341 /** The 3D rendering job for the currently bound FBO. */
342 struct v3d_job *job;
343
344 /* Map from struct v3d_job_key to the job for that FBO.
345 */
346 struct hash_table *jobs;
347
348 /**
349 * Map from v3d_resource to a job writing to that resource.
350 *
351 * Primarily for flushing jobs rendering to textures that are now
352 * being read from.
353 */
354 struct hash_table *write_jobs;
355
356 struct slab_child_pool transfer_pool;
357 struct blitter_context *blitter;
358
359 /** bitfield of VC5_DIRTY_* */
360 uint32_t dirty;
361
362 struct primconvert_context *primconvert;
363
364 struct hash_table *fs_cache, *vs_cache;
365 uint32_t next_uncompiled_program_id;
366 uint64_t next_compiled_program_id;
367
368 struct v3d_compiler_state *compiler_state;
369
370 uint8_t prim_mode;
371
372 /** Maximum index buffer valid for the current shader_rec. */
373 uint32_t max_index;
374
375 /** Sync object that our RCL will update as its out_sync. */
376 uint32_t out_sync;
377
378 struct u_upload_mgr *uploader;
379
380 /** @{ Current pipeline state objects */
381 struct pipe_scissor_state scissor;
382 struct v3d_blend_state *blend;
383 struct v3d_rasterizer_state *rasterizer;
384 struct v3d_depth_stencil_alpha_state *zsa;
385
386 struct v3d_texture_stateobj verttex, fragtex;
387
388 struct v3d_program_stateobj prog;
389
390 struct v3d_vertex_stateobj *vtx;
391
392 struct {
393 struct pipe_blend_color f;
394 uint16_t hf[4];
395 } blend_color;
396 struct pipe_stencil_ref stencil_ref;
397 unsigned sample_mask;
398 struct pipe_framebuffer_state framebuffer;
399
400 /* Per render target, whether we should swap the R and B fields in the
401 * shader's color output and in blending. If render targets disagree
402 * on the R/B swap and use the constant color, then we would need to
403 * fall back to in-shader blending.
404 */
405 uint8_t swap_color_rb;
406
407 /* Per render target, whether we should treat the dst alpha values as
408 * one in blending.
409 *
410 * For RGBX formats, the tile buffer's alpha channel will be
411 * undefined.
412 */
413 uint8_t blend_dst_alpha_one;
414
415 bool active_queries;
416
417 uint32_t tf_prims_generated;
418 uint32_t prims_generated;
419
420 struct pipe_poly_stipple stipple;
421 struct pipe_clip_state clip;
422 struct pipe_viewport_state viewport;
423 struct v3d_constbuf_stateobj constbuf[PIPE_SHADER_TYPES];
424 struct v3d_vertexbuf_stateobj vertexbuf;
425 struct v3d_streamout_stateobj streamout;
426 struct v3d_bo *current_oq;
427 /** @} */
428 };
429
430 struct v3d_rasterizer_state {
431 struct pipe_rasterizer_state base;
432
433 float point_size;
434
435 uint8_t depth_offset[9];
436 uint8_t depth_offset_z16[9];
437 };
438
439 struct v3d_depth_stencil_alpha_state {
440 struct pipe_depth_stencil_alpha_state base;
441
442 enum v3d_ez_state ez_state;
443
444 uint8_t stencil_front[6];
445 uint8_t stencil_back[6];
446 };
447
448 struct v3d_blend_state {
449 struct pipe_blend_state base;
450
451 /* Per-RT mask of whether blending is enabled. */
452 uint8_t blend_enables;
453 };
454
455 #define perf_debug(...) do { \
456 if (unlikely(V3D_DEBUG & V3D_DEBUG_PERF)) \
457 fprintf(stderr, __VA_ARGS__); \
458 } while (0)
459
460 static inline struct v3d_context *
461 v3d_context(struct pipe_context *pcontext)
462 {
463 return (struct v3d_context *)pcontext;
464 }
465
466 static inline struct v3d_sampler_view *
467 v3d_sampler_view(struct pipe_sampler_view *psview)
468 {
469 return (struct v3d_sampler_view *)psview;
470 }
471
472 static inline struct v3d_sampler_state *
473 v3d_sampler_state(struct pipe_sampler_state *psampler)
474 {
475 return (struct v3d_sampler_state *)psampler;
476 }
477
478 struct pipe_context *v3d_context_create(struct pipe_screen *pscreen,
479 void *priv, unsigned flags);
480 void v3d_program_init(struct pipe_context *pctx);
481 void v3d_program_fini(struct pipe_context *pctx);
482 void v3d_query_init(struct pipe_context *pctx);
483
484 void v3d_simulator_init(struct v3d_screen *screen);
485 void v3d_simulator_destroy(struct v3d_screen *screen);
486 int v3d_simulator_flush(struct v3d_context *v3d,
487 struct drm_v3d_submit_cl *args,
488 struct v3d_job *job);
489 int v3d_simulator_ioctl(int fd, unsigned long request, void *arg);
490 void v3d_simulator_open_from_handle(int fd, uint32_t winsys_stride,
491 int handle, uint32_t size);
492
493 static inline int
494 v3d_ioctl(int fd, unsigned long request, void *arg)
495 {
496 if (using_v3d_simulator)
497 return v3d_simulator_ioctl(fd, request, arg);
498 else
499 return drmIoctl(fd, request, arg);
500 }
501
502 void v3d_set_shader_uniform_dirty_flags(struct v3d_compiled_shader *shader);
503 struct v3d_cl_reloc v3d_write_uniforms(struct v3d_context *v3d,
504 struct v3d_compiled_shader *shader,
505 struct v3d_constbuf_stateobj *cb,
506 struct v3d_texture_stateobj *texstate);
507
508 void v3d_flush(struct pipe_context *pctx);
509 void v3d_job_init(struct v3d_context *v3d);
510 struct v3d_job *v3d_get_job(struct v3d_context *v3d,
511 struct pipe_surface **cbufs,
512 struct pipe_surface *zsbuf);
513 struct v3d_job *v3d_get_job_for_fbo(struct v3d_context *v3d);
514 void v3d_job_add_bo(struct v3d_job *job, struct v3d_bo *bo);
515 void v3d_job_add_write_resource(struct v3d_job *job, struct pipe_resource *prsc);
516 void v3d_job_submit(struct v3d_context *v3d, struct v3d_job *job);
517 void v3d_flush_jobs_writing_resource(struct v3d_context *v3d,
518 struct pipe_resource *prsc);
519 void v3d_flush_jobs_reading_resource(struct v3d_context *v3d,
520 struct pipe_resource *prsc);
521 void v3d_update_compiled_shaders(struct v3d_context *v3d, uint8_t prim_mode);
522
523 bool v3d_rt_format_supported(const struct v3d_device_info *devinfo,
524 enum pipe_format f);
525 bool v3d_tex_format_supported(const struct v3d_device_info *devinfo,
526 enum pipe_format f);
527 uint8_t v3d_get_rt_format(const struct v3d_device_info *devinfo, enum pipe_format f);
528 uint8_t v3d_get_tex_format(const struct v3d_device_info *devinfo, enum pipe_format f);
529 uint8_t v3d_get_tex_return_size(const struct v3d_device_info *devinfo,
530 enum pipe_format f,
531 enum pipe_tex_compare compare);
532 uint8_t v3d_get_tex_return_channels(const struct v3d_device_info *devinfo,
533 enum pipe_format f);
534 const uint8_t *v3d_get_format_swizzle(const struct v3d_device_info *devinfo,
535 enum pipe_format f);
536 void v3d_get_internal_type_bpp_for_output_format(const struct v3d_device_info *devinfo,
537 uint32_t format,
538 uint32_t *type,
539 uint32_t *bpp);
540
541 void v3d_init_query_functions(struct v3d_context *v3d);
542 void v3d_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info);
543 void v3d_blitter_save(struct v3d_context *v3d);
544
545 struct v3d_fence *v3d_fence_create(struct v3d_context *v3d);
546
547 #ifdef v3dX
548 # include "v3dx_context.h"
549 #else
550 # define v3dX(x) v3d33_##x
551 # include "v3dx_context.h"
552 # undef v3dX
553
554 # define v3dX(x) v3d41_##x
555 # include "v3dx_context.h"
556 # undef v3dX
557 #endif
558
559 #endif /* VC5_CONTEXT_H */