2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
29 #include "broadcom/common/v3d_macros.h"
34 #include "pipe/p_context.h"
35 #include "pipe/p_state.h"
36 #include "util/bitset.h"
37 #include "util/slab.h"
39 #include "drm-uapi/v3d_drm.h"
40 #include "v3d_screen.h"
41 #include "broadcom/common/v3d_limits.h"
45 void v3d_job_add_bo(struct v3d_job
*job
, struct v3d_bo
*bo
);
47 #include "v3d_bufmgr.h"
48 #include "v3d_resource.h"
51 #ifdef USE_V3D_SIMULATOR
52 #define using_v3d_simulator true
54 #define using_v3d_simulator false
57 #define VC5_DIRTY_BLEND (1 << 0)
58 #define VC5_DIRTY_RASTERIZER (1 << 1)
59 #define VC5_DIRTY_ZSA (1 << 2)
60 #define VC5_DIRTY_FRAGTEX (1 << 3)
61 #define VC5_DIRTY_VERTTEX (1 << 4)
62 #define VC5_DIRTY_SHADER_IMAGE (1 << 5)
64 #define VC5_DIRTY_BLEND_COLOR (1 << 7)
65 #define VC5_DIRTY_STENCIL_REF (1 << 8)
66 #define VC5_DIRTY_SAMPLE_STATE (1 << 9)
67 #define VC5_DIRTY_FRAMEBUFFER (1 << 10)
68 #define VC5_DIRTY_STIPPLE (1 << 11)
69 #define VC5_DIRTY_VIEWPORT (1 << 12)
70 #define VC5_DIRTY_CONSTBUF (1 << 13)
71 #define VC5_DIRTY_VTXSTATE (1 << 14)
72 #define VC5_DIRTY_VTXBUF (1 << 15)
73 #define VC5_DIRTY_SCISSOR (1 << 17)
74 #define VC5_DIRTY_FLAT_SHADE_FLAGS (1 << 18)
75 #define VC5_DIRTY_PRIM_MODE (1 << 19)
76 #define VC5_DIRTY_CLIP (1 << 20)
77 #define VC5_DIRTY_UNCOMPILED_VS (1 << 21)
78 #define VC5_DIRTY_UNCOMPILED_FS (1 << 22)
79 #define VC5_DIRTY_COMPILED_CS (1 << 23)
80 #define VC5_DIRTY_COMPILED_VS (1 << 24)
81 #define VC5_DIRTY_COMPILED_FS (1 << 25)
82 #define VC5_DIRTY_FS_INPUTS (1 << 26)
83 #define VC5_DIRTY_STREAMOUT (1 << 27)
84 #define VC5_DIRTY_OQ (1 << 28)
85 #define VC5_DIRTY_CENTROID_FLAGS (1 << 29)
86 #define VC5_DIRTY_NOPERSPECTIVE_FLAGS (1 << 30)
87 #define VC5_DIRTY_SSBO (1 << 31)
89 #define VC5_MAX_FS_INPUTS 64
91 enum v3d_sampler_state_variant
{
92 V3D_SAMPLER_STATE_BORDER_0
,
93 V3D_SAMPLER_STATE_F16
,
94 V3D_SAMPLER_STATE_F16_UNORM
,
95 V3D_SAMPLER_STATE_F16_SNORM
,
96 V3D_SAMPLER_STATE_F16_BGRA
,
97 V3D_SAMPLER_STATE_F16_BGRA_UNORM
,
98 V3D_SAMPLER_STATE_F16_BGRA_SNORM
,
99 V3D_SAMPLER_STATE_F16_A
,
100 V3D_SAMPLER_STATE_F16_A_SNORM
,
101 V3D_SAMPLER_STATE_F16_A_UNORM
,
102 V3D_SAMPLER_STATE_F16_LA
,
103 V3D_SAMPLER_STATE_F16_LA_UNORM
,
104 V3D_SAMPLER_STATE_F16_LA_SNORM
,
105 V3D_SAMPLER_STATE_32
,
106 V3D_SAMPLER_STATE_32_UNORM
,
107 V3D_SAMPLER_STATE_32_SNORM
,
108 V3D_SAMPLER_STATE_32_A
,
109 V3D_SAMPLER_STATE_32_A_UNORM
,
110 V3D_SAMPLER_STATE_32_A_SNORM
,
111 V3D_SAMPLER_STATE_1010102U
,
112 V3D_SAMPLER_STATE_16U
,
113 V3D_SAMPLER_STATE_16I
,
114 V3D_SAMPLER_STATE_8I
,
115 V3D_SAMPLER_STATE_8U
,
117 V3D_SAMPLER_STATE_VARIANT_COUNT
,
120 struct v3d_sampler_view
{
121 struct pipe_sampler_view base
;
124 /* Precomputed swizzles to pass in to the shader key. */
127 uint8_t texture_shader_state
[32];
128 /* V3D 4.x: Texture state struct. */
131 enum v3d_sampler_state_variant sampler_variant
;
133 /* Actual texture to be read by this sampler view. May be different
134 * from base.texture in the case of having a shadow tiled copy of a
137 struct pipe_resource
*texture
;
140 struct v3d_sampler_state
{
141 struct pipe_sampler_state base
;
145 /* V3D 3.x: Packed texture state. */
146 uint8_t texture_shader_state
[32];
147 /* V3D 4.x: Sampler state struct. */
148 struct pipe_resource
*sampler_state
;
149 uint32_t sampler_state_offset
[V3D_SAMPLER_STATE_VARIANT_COUNT
];
151 bool border_color_variants
;
154 struct v3d_texture_stateobj
{
155 struct pipe_sampler_view
*textures
[V3D_MAX_TEXTURE_SAMPLERS
];
156 unsigned num_textures
;
157 struct pipe_sampler_state
*samplers
[V3D_MAX_TEXTURE_SAMPLERS
];
158 unsigned num_samplers
;
159 struct v3d_cl_reloc texture_state
[V3D_MAX_TEXTURE_SAMPLERS
];
162 struct v3d_shader_uniform_info
{
163 enum quniform_contents
*contents
;
168 struct v3d_uncompiled_shader
{
169 /** A name for this program, so you can track it in shader-db output. */
171 /** How many variants of this program were compiled, for shader-db. */
172 uint32_t compiled_variant_count
;
173 struct pipe_shader_state base
;
174 uint32_t num_tf_outputs
;
175 struct v3d_varying_slot
*tf_outputs
;
176 uint16_t tf_specs
[16];
177 uint16_t tf_specs_psiz
[16];
178 uint32_t num_tf_specs
;
181 struct v3d_compiled_shader
{
182 struct pipe_resource
*resource
;
186 struct v3d_prog_data
*base
;
187 struct v3d_vs_prog_data
*vs
;
188 struct v3d_fs_prog_data
*fs
;
189 struct v3d_compute_prog_data
*compute
;
193 * VC5_DIRTY_* flags that, when set in v3d->dirty, mean that the
194 * uniforms have to be rewritten (and therefore the shader state
197 uint32_t uniform_dirty_bits
;
200 struct v3d_program_stateobj
{
201 struct v3d_uncompiled_shader
*bind_vs
, *bind_fs
, *bind_compute
;
202 struct v3d_compiled_shader
*cs
, *vs
, *fs
, *compute
;
204 struct hash_table
*cache
[MESA_SHADER_STAGES
];
206 struct v3d_bo
*spill_bo
;
207 int spill_size_per_thread
;
210 struct v3d_constbuf_stateobj
{
211 struct pipe_constant_buffer cb
[PIPE_MAX_CONSTANT_BUFFERS
];
212 uint32_t enabled_mask
;
216 struct v3d_vertexbuf_stateobj
{
217 struct pipe_vertex_buffer vb
[PIPE_MAX_ATTRIBS
];
219 uint32_t enabled_mask
;
223 struct v3d_vertex_stateobj
{
224 struct pipe_vertex_element pipe
[V3D_MAX_VS_INPUTS
/ 4];
225 unsigned num_elements
;
227 uint8_t attrs
[16 * (V3D_MAX_VS_INPUTS
/ 4)];
228 struct pipe_resource
*defaults
;
229 uint32_t defaults_offset
;
232 struct v3d_stream_output_target
{
233 struct pipe_stream_output_target base
;
234 /* Number of transform feedback vertices written to this target */
235 uint32_t recorded_vertex_count
;
238 struct v3d_streamout_stateobj
{
239 struct pipe_stream_output_target
*targets
[PIPE_MAX_SO_BUFFERS
];
240 /* Number of vertices we've written into the buffer so far. */
241 uint32_t offsets
[PIPE_MAX_SO_BUFFERS
];
242 unsigned num_targets
;
245 struct v3d_ssbo_stateobj
{
246 struct pipe_shader_buffer sb
[PIPE_MAX_SHADER_BUFFERS
];
247 uint32_t enabled_mask
;
250 /* Hash table key for v3d->jobs */
252 struct pipe_surface
*cbufs
[4];
253 struct pipe_surface
*zsbuf
;
257 VC5_EZ_UNDECIDED
= 0,
263 struct v3d_image_view
{
264 struct pipe_image_view base
;
265 /* V3D 4.x texture shader state struct */
266 struct pipe_resource
*tex_state
;
267 uint32_t tex_state_offset
;
270 struct v3d_shaderimg_stateobj
{
271 struct v3d_image_view si
[PIPE_MAX_SHADER_IMAGES
];
272 uint32_t enabled_mask
;
276 * A complete bin/render job.
278 * This is all of the state necessary to submit a bin/render to the kernel.
279 * We want to be able to have multiple in progress at a time, so that we don't
280 * need to flush an existing CL just to switch to rendering to a new render
281 * target (which would mean reading back from the old render target when
282 * starting to render to it again).
285 struct v3d_context
*v3d
;
288 struct v3d_cl indirect
;
289 struct v3d_bo
*tile_alloc
;
290 struct v3d_bo
*tile_state
;
291 uint32_t shader_rec_count
;
293 struct drm_v3d_submit_cl submit
;
296 * Set of all BOs referenced by the job. This will be used for making
297 * the list of BOs that the kernel will need to have paged in to
302 /** Sum of the sizes of the BOs referenced by the job. */
303 uint32_t referenced_size
;
305 struct set
*write_prscs
;
306 struct set
*tf_write_prscs
;
308 /* Size of the submit.bo_handles array. */
309 uint32_t bo_handles_size
;
311 /** @{ Surfaces to submit rendering for. */
312 struct pipe_surface
*cbufs
[4];
313 struct pipe_surface
*zsbuf
;
316 * Bounding box of the scissor across all queued drawing.
318 * Note that the max values are exclusive.
326 * Width/height of the color framebuffer being rendered to,
327 * for VC5_TILE_RENDERING_MODE_CONFIG.
330 uint32_t draw_height
;
332 /** @{ Tile information, depending on MSAA and float color buffer. */
333 uint32_t draw_tiles_x
; /** @< Number of tiles wide for framebuffer. */
334 uint32_t draw_tiles_y
; /** @< Number of tiles high for framebuffer. */
336 uint32_t tile_width
; /** @< Width of a tile. */
337 uint32_t tile_height
; /** @< Height of a tile. */
338 /** maximum internal_bpp of all color render targets. */
339 uint32_t internal_bpp
;
341 /** Whether the current rendering is in a 4X MSAA tile buffer. */
345 /* Bitmask of PIPE_CLEAR_* of buffers that were cleared before the
349 /* Bitmask of PIPE_CLEAR_* of buffers that have been read by a draw
350 * call without having been cleared first.
353 /* Bitmask of PIPE_CLEAR_* of buffers that have been rendered to
354 * (either clears or draws) and should be stored.
357 uint32_t clear_color
[4][4];
362 * Set if some drawing (triangles, blits, or just a glClear()) has
363 * been done to the FBO, meaning that we need to
364 * DRM_IOCTL_VC5_SUBMIT_CL.
368 /* Set if any shader has dirtied cachelines in the TMU that need to be
369 * flushed before job end.
374 * Set if a packet enabling TF has been emitted in the job (V3D 4.x).
379 * Current EZ state for drawing. Updated at the start of draw after
380 * we've decided on the shader being rendered.
382 enum v3d_ez_state ez_state
;
384 * The first EZ state that was used for drawing with a decided EZ
385 * direction (so either UNDECIDED, GT, or LT).
387 enum v3d_ez_state first_ez_state
;
390 * Number of draw calls (not counting full buffer clears) queued in
393 uint32_t draw_calls_queued
;
395 struct v3d_job_key key
;
399 struct pipe_context base
;
402 struct v3d_screen
*screen
;
404 /** The 3D rendering job for the currently bound FBO. */
407 /* Map from struct v3d_job_key to the job for that FBO.
409 struct hash_table
*jobs
;
412 * Map from v3d_resource to a job writing to that resource.
414 * Primarily for flushing jobs rendering to textures that are now
417 struct hash_table
*write_jobs
;
419 struct slab_child_pool transfer_pool
;
420 struct blitter_context
*blitter
;
422 /** bitfield of VC5_DIRTY_* */
425 struct primconvert_context
*primconvert
;
427 uint32_t next_uncompiled_program_id
;
428 uint64_t next_compiled_program_id
;
430 struct v3d_compiler_state
*compiler_state
;
434 /** Maximum index buffer valid for the current shader_rec. */
437 /** Sync object that our RCL or TFU job will update as its out_sync. */
440 /* Stream uploader used by gallium internals. This could also be used
441 * by driver internals, but we tend to use the v3d_cl.h interfaces
444 struct u_upload_mgr
*uploader
;
445 /* State uploader used inside the driver. This is for packing bits of
446 * long-term state inside buffers, since the kernel interfaces
447 * allocate a page at a time.
449 struct u_upload_mgr
*state_uploader
;
451 /** @{ Current pipeline state objects */
452 struct pipe_scissor_state scissor
;
453 struct v3d_blend_state
*blend
;
454 struct v3d_rasterizer_state
*rasterizer
;
455 struct v3d_depth_stencil_alpha_state
*zsa
;
457 struct v3d_program_stateobj prog
;
458 uint32_t compute_num_workgroups
[3];
459 struct v3d_bo
*compute_shared_memory
;
461 struct v3d_vertex_stateobj
*vtx
;
464 struct pipe_blend_color f
;
467 struct pipe_stencil_ref stencil_ref
;
468 unsigned sample_mask
;
469 struct pipe_framebuffer_state framebuffer
;
471 /* Per render target, whether we should swap the R and B fields in the
472 * shader's color output and in blending. If render targets disagree
473 * on the R/B swap and use the constant color, then we would need to
474 * fall back to in-shader blending.
476 uint8_t swap_color_rb
;
478 /* Per render target, whether we should treat the dst alpha values as
481 * For RGBX formats, the tile buffer's alpha channel will be
484 uint8_t blend_dst_alpha_one
;
488 uint32_t tf_prims_generated
;
489 uint32_t prims_generated
;
491 struct pipe_poly_stipple stipple
;
492 struct pipe_clip_state clip
;
493 struct pipe_viewport_state viewport
;
494 struct v3d_ssbo_stateobj ssbo
[PIPE_SHADER_TYPES
];
495 struct v3d_shaderimg_stateobj shaderimg
[PIPE_SHADER_TYPES
];
496 struct v3d_constbuf_stateobj constbuf
[PIPE_SHADER_TYPES
];
497 struct v3d_texture_stateobj tex
[PIPE_SHADER_TYPES
];
498 struct v3d_vertexbuf_stateobj vertexbuf
;
499 struct v3d_streamout_stateobj streamout
;
500 struct v3d_bo
*current_oq
;
501 struct pipe_debug_callback debug
;
505 struct v3d_rasterizer_state
{
506 struct pipe_rasterizer_state base
;
510 uint8_t depth_offset
[9];
511 uint8_t depth_offset_z16
[9];
514 struct v3d_depth_stencil_alpha_state
{
515 struct pipe_depth_stencil_alpha_state base
;
517 enum v3d_ez_state ez_state
;
519 uint8_t stencil_front
[6];
520 uint8_t stencil_back
[6];
523 struct v3d_blend_state
{
524 struct pipe_blend_state base
;
526 /* Per-RT mask of whether blending is enabled. */
527 uint8_t blend_enables
;
530 #define perf_debug(...) do { \
531 if (unlikely(V3D_DEBUG & V3D_DEBUG_PERF)) \
532 fprintf(stderr, __VA_ARGS__); \
533 if (unlikely(v3d->debug.debug_message)) \
534 pipe_debug_message(&v3d->debug, PERF_INFO, __VA_ARGS__); \
537 #define foreach_bit(b, mask) \
538 for (uint32_t _m = (mask), b; _m && ({(b) = u_bit_scan(&_m); 1;});)
540 static inline struct v3d_context
*
541 v3d_context(struct pipe_context
*pcontext
)
543 return (struct v3d_context
*)pcontext
;
546 static inline struct v3d_sampler_view
*
547 v3d_sampler_view(struct pipe_sampler_view
*psview
)
549 return (struct v3d_sampler_view
*)psview
;
552 static inline struct v3d_sampler_state
*
553 v3d_sampler_state(struct pipe_sampler_state
*psampler
)
555 return (struct v3d_sampler_state
*)psampler
;
558 static inline struct v3d_stream_output_target
*
559 v3d_stream_output_target(struct pipe_stream_output_target
*ptarget
)
561 return (struct v3d_stream_output_target
*)ptarget
;
564 struct pipe_context
*v3d_context_create(struct pipe_screen
*pscreen
,
565 void *priv
, unsigned flags
);
566 void v3d_program_init(struct pipe_context
*pctx
);
567 void v3d_program_fini(struct pipe_context
*pctx
);
568 void v3d_query_init(struct pipe_context
*pctx
);
570 void v3d_simulator_init(struct v3d_screen
*screen
);
571 void v3d_simulator_destroy(struct v3d_screen
*screen
);
572 uint32_t v3d_simulator_get_spill(uint32_t spill_size
);
573 int v3d_simulator_ioctl(int fd
, unsigned long request
, void *arg
);
574 void v3d_simulator_open_from_handle(int fd
, int handle
, uint32_t size
);
577 v3d_ioctl(int fd
, unsigned long request
, void *arg
)
579 if (using_v3d_simulator
)
580 return v3d_simulator_ioctl(fd
, request
, arg
);
582 return drmIoctl(fd
, request
, arg
);
586 v3d_transform_feedback_enabled(struct v3d_context
*v3d
)
588 return v3d
->prog
.bind_vs
->num_tf_specs
!= 0 &&
592 void v3d_set_shader_uniform_dirty_flags(struct v3d_compiled_shader
*shader
);
593 struct v3d_cl_reloc
v3d_write_uniforms(struct v3d_context
*v3d
,
594 struct v3d_compiled_shader
*shader
,
595 enum pipe_shader_type stage
);
597 void v3d_flush(struct pipe_context
*pctx
);
598 void v3d_job_init(struct v3d_context
*v3d
);
599 struct v3d_job
*v3d_get_job(struct v3d_context
*v3d
,
600 struct pipe_surface
**cbufs
,
601 struct pipe_surface
*zsbuf
);
602 struct v3d_job
*v3d_get_job_for_fbo(struct v3d_context
*v3d
);
603 void v3d_job_add_bo(struct v3d_job
*job
, struct v3d_bo
*bo
);
604 void v3d_job_add_write_resource(struct v3d_job
*job
, struct pipe_resource
*prsc
);
605 void v3d_job_add_tf_write_resource(struct v3d_job
*job
, struct pipe_resource
*prsc
);
606 void v3d_job_submit(struct v3d_context
*v3d
, struct v3d_job
*job
);
607 void v3d_flush_jobs_using_bo(struct v3d_context
*v3d
, struct v3d_bo
*bo
);
608 void v3d_flush_jobs_writing_resource(struct v3d_context
*v3d
,
609 struct pipe_resource
*prsc
,
611 void v3d_flush_jobs_reading_resource(struct v3d_context
*v3d
,
612 struct pipe_resource
*prsc
);
613 void v3d_update_compiled_shaders(struct v3d_context
*v3d
, uint8_t prim_mode
);
614 void v3d_update_compiled_cs(struct v3d_context
*v3d
);
616 bool v3d_rt_format_supported(const struct v3d_device_info
*devinfo
,
618 bool v3d_tex_format_supported(const struct v3d_device_info
*devinfo
,
620 uint8_t v3d_get_rt_format(const struct v3d_device_info
*devinfo
, enum pipe_format f
);
621 uint8_t v3d_get_tex_format(const struct v3d_device_info
*devinfo
, enum pipe_format f
);
622 uint8_t v3d_get_tex_return_size(const struct v3d_device_info
*devinfo
,
624 enum pipe_tex_compare compare
);
625 uint8_t v3d_get_tex_return_channels(const struct v3d_device_info
*devinfo
,
627 const uint8_t *v3d_get_format_swizzle(const struct v3d_device_info
*devinfo
,
629 void v3d_get_internal_type_bpp_for_output_format(const struct v3d_device_info
*devinfo
,
633 bool v3d_tfu_supports_tex_format(const struct v3d_device_info
*devinfo
,
634 uint32_t tex_format
);
636 void v3d_init_query_functions(struct v3d_context
*v3d
);
637 void v3d_blit(struct pipe_context
*pctx
, const struct pipe_blit_info
*blit_info
);
638 void v3d_blitter_save(struct v3d_context
*v3d
);
639 bool v3d_generate_mipmap(struct pipe_context
*pctx
,
640 struct pipe_resource
*prsc
,
641 enum pipe_format format
,
642 unsigned int base_level
,
643 unsigned int last_level
,
644 unsigned int first_layer
,
645 unsigned int last_layer
);
647 struct v3d_fence
*v3d_fence_create(struct v3d_context
*v3d
);
650 # include "v3dx_context.h"
652 # define v3dX(x) v3d33_##x
653 # include "v3dx_context.h"
656 # define v3dX(x) v3d41_##x
657 # include "v3dx_context.h"
661 #endif /* VC5_CONTEXT_H */