src/gallium/drivers/v3d/v3d_resource.c

   1 /*
   2  * Copyright © 2014-2017 Broadcom
   3  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22  * IN THE SOFTWARE.
  23  */
  24
  25 #include "pipe/p_defines.h"
  26 #include "util/u_blit.h"
  27 #include "util/u_memory.h"
  28 #include "util/u_format.h"
  29 #include "util/u_inlines.h"
  30 #include "util/u_surface.h"
  31 #include "util/u_transfer_helper.h"
  32 #include "util/u_upload_mgr.h"
  33 #include "util/u_format_zs.h"
  34
  35 #include "drm_fourcc.h"
  36 #include "v3d_screen.h"
  37 #include "v3d_context.h"
  38 #include "v3d_resource.h"
  39 #include "v3d_tiling.h"
  40 #include "broadcom/cle/v3d_packet_v33_pack.h"
  41
  42 static void
  43 v3d_debug_resource_layout(struct v3d_resource *rsc, const char *caller)
  44 {
  45         if (!(V3D_DEBUG & V3D_DEBUG_SURFACE))
  46                 return;
  47
  48         struct pipe_resource *prsc = &rsc->base;
  49
  50         if (prsc->target == PIPE_BUFFER) {
  51                 fprintf(stderr,
  52                         "rsc %s %p (format %s), %dx%d buffer @0x%08x-0x%08x\n",
  53                         caller, rsc,
  54                         util_format_short_name(prsc->format),
  55                         prsc->width0, prsc->height0,
  56                         rsc->bo->offset,
  57                         rsc->bo->offset + rsc->bo->size - 1);
  58                 return;
  59         }
  60
  61         static const char *const tiling_descriptions[] = {
  62                 [VC5_TILING_RASTER] = "R",
  63                 [VC5_TILING_LINEARTILE] = "LT",
  64                 [VC5_TILING_UBLINEAR_1_COLUMN] = "UB1",
  65                 [VC5_TILING_UBLINEAR_2_COLUMN] = "UB2",
  66                 [VC5_TILING_UIF_NO_XOR] = "UIF",
  67                 [VC5_TILING_UIF_XOR] = "UIF^",
  68         };
  69
  70         for (int i = 0; i <= prsc->last_level; i++) {
  71                 struct v3d_resource_slice *slice = &rsc->slices[i];
  72
  73                 int level_width = slice->stride / rsc->cpp;
  74                 int level_height = slice->padded_height;
  75                 int level_depth =
  76                         u_minify(util_next_power_of_two(prsc->depth0), i);
  77
  78                 fprintf(stderr,
  79                         "rsc %s %p (format %s), %dx%d: "
  80                         "level %d (%s) %dx%dx%d -> %dx%dx%d, stride %d@0x%08x\n",
  81                         caller, rsc,
  82                         util_format_short_name(prsc->format),
  83                         prsc->width0, prsc->height0,
  84                         i, tiling_descriptions[slice->tiling],
  85                         u_minify(prsc->width0, i),
  86                         u_minify(prsc->height0, i),
  87                         u_minify(prsc->depth0, i),
  88                         level_width,
  89                         level_height,
  90                         level_depth,
  91                         slice->stride,
  92                         rsc->bo->offset + slice->offset);
  93         }
  94 }
  95
  96 static bool
  97 v3d_resource_bo_alloc(struct v3d_resource *rsc)
  98 {
  99         struct pipe_resource *prsc = &rsc->base;
 100         struct pipe_screen *pscreen = prsc->screen;
 101         struct v3d_bo *bo;
 102
 103         bo = v3d_bo_alloc(v3d_screen(pscreen), rsc->size, "resource");
 104         if (bo) {
 105                 v3d_bo_unreference(&rsc->bo);
 106                 rsc->bo = bo;
 107                 v3d_debug_resource_layout(rsc, "alloc");
 108                 return true;
 109         } else {
 110                 return false;
 111         }
 112 }
 113
 114 static void
 115 v3d_resource_transfer_unmap(struct pipe_context *pctx,
 116                             struct pipe_transfer *ptrans)
 117 {
 118         struct v3d_context *v3d = v3d_context(pctx);
 119         struct v3d_transfer *trans = v3d_transfer(ptrans);
 120
 121         if (trans->map) {
 122                 struct v3d_resource *rsc = v3d_resource(ptrans->resource);
 123                 struct v3d_resource_slice *slice = &rsc->slices[ptrans->level];
 124
 125                 if (ptrans->usage & PIPE_TRANSFER_WRITE) {
 126                         for (int z = 0; z < ptrans->box.depth; z++) {
 127                                 void *dst = rsc->bo->map +
 128                                         v3d_layer_offset(&rsc->base,
 129                                                          ptrans->level,
 130                                                          ptrans->box.z + z);
 131                                 v3d_store_tiled_image(dst,
 132                                                       slice->stride,
 133                                                       (trans->map +
 134                                                        ptrans->stride *
 135                                                        ptrans->box.height * z),
 136                                                       ptrans->stride,
 137                                                       slice->tiling, rsc->cpp,
 138                                                       slice->padded_height,
 139                                                       &ptrans->box);
 140                         }
 141                 }
 142                 free(trans->map);
 143         }
 144
 145         pipe_resource_reference(&ptrans->resource, NULL);
 146         slab_free(&v3d->transfer_pool, ptrans);
 147 }
 148
 149 static void *
 150 v3d_resource_transfer_map(struct pipe_context *pctx,
 151                           struct pipe_resource *prsc,
 152                           unsigned level, unsigned usage,
 153                           const struct pipe_box *box,
 154                           struct pipe_transfer **pptrans)
 155 {
 156         struct v3d_context *v3d = v3d_context(pctx);
 157         struct v3d_resource *rsc = v3d_resource(prsc);
 158         struct v3d_transfer *trans;
 159         struct pipe_transfer *ptrans;
 160         enum pipe_format format = prsc->format;
 161         char *buf;
 162
 163         /* MSAA maps should have been handled by u_transfer_helper. */
 164         assert(prsc->nr_samples <= 1);
 165
 166         /* Upgrade DISCARD_RANGE to WHOLE_RESOURCE if the whole resource is
 167          * being mapped.
 168          */
 169         if ((usage & PIPE_TRANSFER_DISCARD_RANGE) &&
 170             !(usage & PIPE_TRANSFER_UNSYNCHRONIZED) &&
 171             !(prsc->flags & PIPE_RESOURCE_FLAG_MAP_COHERENT) &&
 172             prsc->last_level == 0 &&
 173             prsc->width0 == box->width &&
 174             prsc->height0 == box->height &&
 175             prsc->depth0 == box->depth &&
 176             prsc->array_size == 1 &&
 177             rsc->bo->private) {
 178                 usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
 179         }
 180
 181         if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
 182                 if (v3d_resource_bo_alloc(rsc)) {
 183                         /* If it might be bound as one of our vertex buffers
 184                          * or UBOs, make sure we re-emit vertex buffer state
 185                          * or uniforms.
 186                          */
 187                         if (prsc->bind & PIPE_BIND_VERTEX_BUFFER)
 188                                 v3d->dirty |= VC5_DIRTY_VTXBUF;
 189                         if (prsc->bind & PIPE_BIND_CONSTANT_BUFFER)
 190                                 v3d->dirty |= VC5_DIRTY_CONSTBUF;
 191                 } else {
 192                         /* If we failed to reallocate, flush users so that we
 193                          * don't violate any syncing requirements.
 194                          */
 195                         v3d_flush_jobs_reading_resource(v3d, prsc);
 196                 }
 197         } else if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
 198                 /* If we're writing and the buffer is being used by the CL, we
 199                  * have to flush the CL first.  If we're only reading, we need
 200                  * to flush if the CL has written our buffer.
 201                  */
 202                 if (usage & PIPE_TRANSFER_WRITE)
 203                         v3d_flush_jobs_reading_resource(v3d, prsc);
 204                 else
 205                         v3d_flush_jobs_writing_resource(v3d, prsc);
 206         }
 207
 208         if (usage & PIPE_TRANSFER_WRITE) {
 209                 rsc->writes++;
 210                 rsc->initialized_buffers = ~0;
 211         }
 212
 213         trans = slab_alloc(&v3d->transfer_pool);
 214         if (!trans)
 215                 return NULL;
 216
 217         /* XXX: Handle DONTBLOCK, DISCARD_RANGE, PERSISTENT, COHERENT. */
 218
 219         /* slab_alloc_st() doesn't zero: */
 220         memset(trans, 0, sizeof(*trans));
 221         ptrans = &trans->base;
 222
 223         pipe_resource_reference(&ptrans->resource, prsc);
 224         ptrans->level = level;
 225         ptrans->usage = usage;
 226         ptrans->box = *box;
 227
 228         /* Note that the current kernel implementation is synchronous, so no
 229          * need to do syncing stuff here yet.
 230          */
 231
 232         if (usage & PIPE_TRANSFER_UNSYNCHRONIZED)
 233                 buf = v3d_bo_map_unsynchronized(rsc->bo);
 234         else
 235                 buf = v3d_bo_map(rsc->bo);
 236         if (!buf) {
 237                 fprintf(stderr, "Failed to map bo\n");
 238                 goto fail;
 239         }
 240
 241         *pptrans = ptrans;
 242
 243         /* Our load/store routines work on entire compressed blocks. */
 244         ptrans->box.x /= util_format_get_blockwidth(format);
 245         ptrans->box.y /= util_format_get_blockheight(format);
 246         ptrans->box.width = DIV_ROUND_UP(ptrans->box.width,
 247                                          util_format_get_blockwidth(format));
 248         ptrans->box.height = DIV_ROUND_UP(ptrans->box.height,
 249                                           util_format_get_blockheight(format));
 250
 251         struct v3d_resource_slice *slice = &rsc->slices[level];
 252         if (rsc->tiled) {
 253                 /* No direct mappings of tiled, since we need to manually
 254                  * tile/untile.
 255                  */
 256                 if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
 257                         return NULL;
 258
 259                 ptrans->stride = ptrans->box.width * rsc->cpp;
 260                 ptrans->layer_stride = ptrans->stride * ptrans->box.height;
 261
 262                 trans->map = malloc(ptrans->layer_stride * ptrans->box.depth);
 263
 264                 if (usage & PIPE_TRANSFER_READ) {
 265                         for (int z = 0; z < ptrans->box.depth; z++) {
 266                                 void *src = rsc->bo->map +
 267                                         v3d_layer_offset(&rsc->base,
 268                                                          ptrans->level,
 269                                                          ptrans->box.z + z);
 270                                 v3d_load_tiled_image((trans->map +
 271                                                       ptrans->stride *
 272                                                       ptrans->box.height * z),
 273                                                      ptrans->stride,
 274                                                      src,
 275                                                      slice->stride,
 276                                                      slice->tiling, rsc->cpp,
 277                                                      slice->padded_height,
 278                                              &ptrans->box);
 279                         }
 280                 }
 281                 return trans->map;
 282         } else {
 283                 ptrans->stride = slice->stride;
 284                 ptrans->layer_stride = rsc->cube_map_stride;
 285
 286                 return buf + slice->offset +
 287                         ptrans->box.y * ptrans->stride +
 288                         ptrans->box.x * rsc->cpp +
 289                         ptrans->box.z * rsc->cube_map_stride;
 290         }
 291
 292
 293 fail:
 294         v3d_resource_transfer_unmap(pctx, ptrans);
 295         return NULL;
 296 }
 297
 298 static void
 299 v3d_resource_destroy(struct pipe_screen *pscreen,
 300                      struct pipe_resource *prsc)
 301 {
 302         struct v3d_resource *rsc = v3d_resource(prsc);
 303
 304         v3d_bo_unreference(&rsc->bo);
 305         free(rsc);
 306 }
 307
 308 static boolean
 309 v3d_resource_get_handle(struct pipe_screen *pscreen,
 310                         struct pipe_context *pctx,
 311                         struct pipe_resource *prsc,
 312                         struct winsys_handle *whandle,
 313                         unsigned usage)
 314 {
 315         struct v3d_resource *rsc = v3d_resource(prsc);
 316         struct v3d_bo *bo = rsc->bo;
 317
 318         whandle->stride = rsc->slices[0].stride;
 319         whandle->offset = 0;
 320
 321         /* If we're passing some reference to our BO out to some other part of
 322          * the system, then we can't do any optimizations about only us being
 323          * the ones seeing it (like BO caching).
 324          */
 325         bo->private = false;
 326
 327         switch (whandle->type) {
 328         case WINSYS_HANDLE_TYPE_SHARED:
 329                 return v3d_bo_flink(bo, &whandle->handle);
 330         case WINSYS_HANDLE_TYPE_KMS:
 331                 whandle->handle = bo->handle;
 332                 return TRUE;
 333         case WINSYS_HANDLE_TYPE_FD:
 334                 whandle->handle = v3d_bo_get_dmabuf(bo);
 335                 return whandle->handle != -1;
 336         }
 337
 338         return FALSE;
 339 }
 340
 341 #define PAGE_UB_ROWS (VC5_UIFCFG_PAGE_SIZE / VC5_UIFBLOCK_ROW_SIZE)
 342 #define PAGE_UB_ROWS_TIMES_1_5 ((PAGE_UB_ROWS * 3) >> 1)
 343 #define PAGE_CACHE_UB_ROWS (VC5_PAGE_CACHE_SIZE / VC5_UIFBLOCK_ROW_SIZE)
 344 #define PAGE_CACHE_MINUS_1_5_UB_ROWS (PAGE_CACHE_UB_ROWS - PAGE_UB_ROWS_TIMES_1_5)
 345
 346 /**
 347  * Computes the HW's UIFblock padding for a given height/cpp.
 348  *
 349  * The goal of the padding is to keep pages of the same color (bank number) at
 350  * least half a page away from each other vertically when crossing between
 351  * between columns of UIF blocks.
 352  */
 353 static uint32_t
 354 v3d_get_ub_pad(struct v3d_resource *rsc, uint32_t height)
 355 {
 356         uint32_t utile_h = v3d_utile_height(rsc->cpp);
 357         uint32_t uif_block_h = utile_h * 2;
 358         uint32_t height_ub = height / uif_block_h;
 359
 360         uint32_t height_offset_in_pc = height_ub % PAGE_CACHE_UB_ROWS;
 361
 362         /* For the perfectly-aligned-for-UIF-XOR case, don't add any pad. */
 363         if (height_offset_in_pc == 0)
 364                 return 0;
 365
 366         /* Try padding up to where we're offset by at least half a page. */
 367         if (height_offset_in_pc < PAGE_UB_ROWS_TIMES_1_5) {
 368                 /* If we fit entirely in the page cache, don't pad. */
 369                 if (height_ub < PAGE_CACHE_UB_ROWS)
 370                         return 0;
 371                 else
 372                         return PAGE_UB_ROWS_TIMES_1_5 - height_offset_in_pc;
 373         }
 374
 375         /* If we're close to being aligned to page cache size, then round up
 376          * and rely on XOR.
 377          */
 378         if (height_offset_in_pc > PAGE_CACHE_MINUS_1_5_UB_ROWS)
 379                 return PAGE_CACHE_UB_ROWS - height_offset_in_pc;
 380
 381         /* Otherwise, we're far enough away (top and bottom) to not need any
 382          * padding.
 383          */
 384         return 0;
 385 }
 386
 387 static void
 388 v3d_setup_slices(struct v3d_resource *rsc)
 389 {
 390         struct pipe_resource *prsc = &rsc->base;
 391         uint32_t width = prsc->width0;
 392         uint32_t height = prsc->height0;
 393         uint32_t depth = prsc->depth0;
 394         /* Note that power-of-two padding is based on level 1.  These are not
 395          * equivalent to just util_next_power_of_two(dimension), because at a
 396          * level 0 dimension of 9, the level 1 power-of-two padded value is 4,
 397          * not 8.
 398          */
 399         uint32_t pot_width = 2 * util_next_power_of_two(u_minify(width, 1));
 400         uint32_t pot_height = 2 * util_next_power_of_two(u_minify(height, 1));
 401         uint32_t pot_depth = 2 * util_next_power_of_two(u_minify(depth, 1));
 402         uint32_t offset = 0;
 403         uint32_t utile_w = v3d_utile_width(rsc->cpp);
 404         uint32_t utile_h = v3d_utile_height(rsc->cpp);
 405         uint32_t uif_block_w = utile_w * 2;
 406         uint32_t uif_block_h = utile_h * 2;
 407         uint32_t block_width = util_format_get_blockwidth(prsc->format);
 408         uint32_t block_height = util_format_get_blockheight(prsc->format);
 409         bool msaa = prsc->nr_samples > 1;
 410         /* MSAA textures/renderbuffers are always laid out as single-level
 411          * UIF.
 412          */
 413         bool uif_top = msaa;
 414
 415         for (int i = prsc->last_level; i >= 0; i--) {
 416                 struct v3d_resource_slice *slice = &rsc->slices[i];
 417
 418                 uint32_t level_width, level_height, level_depth;
 419                 if (i < 2) {
 420                         level_width = u_minify(width, i);
 421                         level_height = u_minify(height, i);
 422                 } else {
 423                         level_width = u_minify(pot_width, i);
 424                         level_height = u_minify(pot_height, i);
 425                 }
 426                 if (i < 1)
 427                         level_depth = u_minify(depth, i);
 428                 else
 429                         level_depth = u_minify(pot_depth, i);
 430
 431                 if (msaa) {
 432                         level_width *= 2;
 433                         level_height *= 2;
 434                 }
 435
 436                 level_width = DIV_ROUND_UP(level_width, block_width);
 437                 level_height = DIV_ROUND_UP(level_height, block_height);
 438
 439                 if (!rsc->tiled) {
 440                         slice->tiling = VC5_TILING_RASTER;
 441                         if (prsc->target == PIPE_TEXTURE_1D)
 442                                 level_width = align(level_width, 64 / rsc->cpp);
 443                 } else {
 444                         if ((i != 0 || !uif_top) &&
 445                             (level_width <= utile_w ||
 446                              level_height <= utile_h)) {
 447                                 slice->tiling = VC5_TILING_LINEARTILE;
 448                                 level_width = align(level_width, utile_w);
 449                                 level_height = align(level_height, utile_h);
 450                         } else if ((i != 0 || !uif_top) &&
 451                                    level_width <= uif_block_w) {
 452                                 slice->tiling = VC5_TILING_UBLINEAR_1_COLUMN;
 453                                 level_width = align(level_width, uif_block_w);
 454                                 level_height = align(level_height, uif_block_h);
 455                         } else if ((i != 0 || !uif_top) &&
 456                                    level_width <= 2 * uif_block_w) {
 457                                 slice->tiling = VC5_TILING_UBLINEAR_2_COLUMN;
 458                                 level_width = align(level_width, 2 * uif_block_w);
 459                                 level_height = align(level_height, uif_block_h);
 460                         } else {
 461                                 /* We align the width to a 4-block column of
 462                                  * UIF blocks, but we only align height to UIF
 463                                  * blocks.
 464                                  */
 465                                 level_width = align(level_width,
 466                                                     4 * uif_block_w);
 467                                 level_height = align(level_height,
 468                                                      uif_block_h);
 469
 470                                 slice->ub_pad = v3d_get_ub_pad(rsc,
 471                                                                level_height);
 472                                 level_height += slice->ub_pad * uif_block_h;
 473
 474                                 /* If the padding set us to to be aligned to
 475                                  * the page cache size, then the HW will use
 476                                  * the XOR bit on odd columns to get us
 477                                  * perfectly misaligned
 478                                  */
 479                                 if ((level_height / uif_block_h) %
 480                                     (VC5_PAGE_CACHE_SIZE /
 481                                      VC5_UIFBLOCK_ROW_SIZE) == 0) {
 482                                         slice->tiling = VC5_TILING_UIF_XOR;
 483                                 } else {
 484                                         slice->tiling = VC5_TILING_UIF_NO_XOR;
 485                                 }
 486                         }
 487                 }
 488
 489                 slice->offset = offset;
 490                 slice->stride = level_width * rsc->cpp;
 491                 slice->padded_height = level_height;
 492                 slice->size = level_height * slice->stride;
 493
 494                 uint32_t slice_total_size = slice->size * level_depth;
 495
 496                 /* The HW aligns level 1's base to a page if any of level 1 or
 497                  * below could be UIF XOR.  The lower levels then inherit the
 498                  * alignment for as long as necesary, thanks to being power of
 499                  * two aligned.
 500                  */
 501                 if (i == 1 &&
 502                     level_width > 4 * uif_block_w &&
 503                     level_height > PAGE_CACHE_MINUS_1_5_UB_ROWS * uif_block_h) {
 504                         slice_total_size = align(slice_total_size,
 505                                                  VC5_UIFCFG_PAGE_SIZE);
 506                 }
 507
 508                 offset += slice_total_size;
 509
 510         }
 511         rsc->size = offset;
 512
 513         /* UIF/UBLINEAR levels need to be aligned to UIF-blocks, and LT only
 514          * needs to be aligned to utile boundaries.  Since tiles are laid out
 515          * from small to big in memory, we need to align the later UIF slices
 516          * to UIF blocks, if they were preceded by non-UIF-block-aligned LT
 517          * slices.
 518          *
 519          * We additionally align to 4k, which improves UIF XOR performance.
 520          */
 521         uint32_t page_align_offset = (align(rsc->slices[0].offset, 4096) -
 522                                       rsc->slices[0].offset);
 523         if (page_align_offset) {
 524                 rsc->size += page_align_offset;
 525                 for (int i = 0; i <= prsc->last_level; i++)
 526                         rsc->slices[i].offset += page_align_offset;
 527         }
 528
 529         /* Arrays and cube textures have a stride which is the distance from
 530          * one full mipmap tree to the next (64b aligned).  For 3D textures,
 531          * we need to program the stride between slices of miplevel 0.
 532          */
 533         if (prsc->target != PIPE_TEXTURE_3D) {
 534                 rsc->cube_map_stride = align(rsc->slices[0].offset +
 535                                              rsc->slices[0].size, 64);
 536                 rsc->size += rsc->cube_map_stride * (prsc->array_size - 1);
 537         } else {
 538                 rsc->cube_map_stride = rsc->slices[0].size;
 539         }
 540 }
 541
 542 uint32_t
 543 v3d_layer_offset(struct pipe_resource *prsc, uint32_t level, uint32_t layer)
 544 {
 545         struct v3d_resource *rsc = v3d_resource(prsc);
 546         struct v3d_resource_slice *slice = &rsc->slices[level];
 547
 548         if (prsc->target == PIPE_TEXTURE_3D)
 549                 return slice->offset + layer * slice->size;
 550         else
 551                 return slice->offset + layer * rsc->cube_map_stride;
 552 }
 553
 554 static struct v3d_resource *
 555 v3d_resource_setup(struct pipe_screen *pscreen,
 556                    const struct pipe_resource *tmpl)
 557 {
 558         struct v3d_screen *screen = v3d_screen(pscreen);
 559         struct v3d_resource *rsc = CALLOC_STRUCT(v3d_resource);
 560         if (!rsc)
 561                 return NULL;
 562         struct pipe_resource *prsc = &rsc->base;
 563
 564         *prsc = *tmpl;
 565
 566         pipe_reference_init(&prsc->reference, 1);
 567         prsc->screen = pscreen;
 568
 569         if (prsc->nr_samples <= 1 ||
 570             screen->devinfo.ver >= 40 ||
 571             util_format_is_depth_or_stencil(prsc->format)) {
 572                 rsc->cpp = util_format_get_blocksize(prsc->format);
 573                 if (screen->devinfo.ver < 40 && prsc->nr_samples > 1)
 574                         rsc->cpp *= prsc->nr_samples;
 575         } else {
 576                 assert(v3d_rt_format_supported(&screen->devinfo, prsc->format));
 577                 uint32_t output_image_format =
 578                         v3d_get_rt_format(&screen->devinfo, prsc->format);
 579                 uint32_t internal_type;
 580                 uint32_t internal_bpp;
 581                 v3d_get_internal_type_bpp_for_output_format(&screen->devinfo,
 582                                                             output_image_format,
 583                                                             &internal_type,
 584                                                             &internal_bpp);
 585                 switch (internal_bpp) {
 586                 case V3D_INTERNAL_BPP_32:
 587                         rsc->cpp = 4;
 588                         break;
 589                 case V3D_INTERNAL_BPP_64:
 590                         rsc->cpp = 8;
 591                         break;
 592                 case V3D_INTERNAL_BPP_128:
 593                         rsc->cpp = 16;
 594                         break;
 595                 }
 596         }
 597
 598         assert(rsc->cpp);
 599
 600         return rsc;
 601 }
 602
 603 static bool
 604 find_modifier(uint64_t needle, const uint64_t *haystack, int count)
 605 {
 606         int i;
 607
 608         for (i = 0; i < count; i++) {
 609                 if (haystack[i] == needle)
 610                         return true;
 611         }
 612
 613         return false;
 614 }
 615
 616 static struct pipe_resource *
 617 v3d_resource_create_with_modifiers(struct pipe_screen *pscreen,
 618                                    const struct pipe_resource *tmpl,
 619                                    const uint64_t *modifiers,
 620                                    int count)
 621 {
 622         bool linear_ok = find_modifier(DRM_FORMAT_MOD_LINEAR, modifiers, count);
 623         struct v3d_resource *rsc = v3d_resource_setup(pscreen, tmpl);
 624         struct pipe_resource *prsc = &rsc->base;
 625         /* Use a tiled layout if we can, for better 3D performance. */
 626         bool should_tile = true;
 627
 628         /* VBOs/PBOs are untiled (and 1 height). */
 629         if (tmpl->target == PIPE_BUFFER)
 630                 should_tile = false;
 631
 632         /* Cursors are always linear, and the user can request linear as well.
 633          */
 634         if (tmpl->bind & (PIPE_BIND_LINEAR | PIPE_BIND_CURSOR))
 635                 should_tile = false;
 636
 637         /* 1D and 1D_ARRAY textures are always raster-order. */
 638         if (tmpl->target == PIPE_TEXTURE_1D ||
 639             tmpl->target == PIPE_TEXTURE_1D_ARRAY)
 640                 should_tile = false;
 641
 642         /* Scanout BOs for simulator need to be linear for interaction with
 643          * i965.
 644          */
 645         if (using_v3d_simulator &&
 646             tmpl->bind & (PIPE_BIND_SHARED | PIPE_BIND_SCANOUT))
 647                 should_tile = false;
 648
 649         /* No user-specified modifier; determine our own. */
 650         if (count == 1 && modifiers[0] == DRM_FORMAT_MOD_INVALID) {
 651                 linear_ok = true;
 652                 rsc->tiled = should_tile;
 653         } else if (should_tile &&
 654                    find_modifier(DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED,
 655                                  modifiers, count)) {
 656                 rsc->tiled = true;
 657         } else if (linear_ok) {
 658                 rsc->tiled = false;
 659         } else {
 660                 fprintf(stderr, "Unsupported modifier requested\n");
 661                 return NULL;
 662         }
 663
 664         rsc->internal_format = prsc->format;
 665
 666         v3d_setup_slices(rsc);
 667         if (!v3d_resource_bo_alloc(rsc))
 668                 goto fail;
 669
 670         return prsc;
 671 fail:
 672         v3d_resource_destroy(pscreen, prsc);
 673         return NULL;
 674 }
 675
 676 struct pipe_resource *
 677 v3d_resource_create(struct pipe_screen *pscreen,
 678                     const struct pipe_resource *tmpl)
 679 {
 680         const uint64_t mod = DRM_FORMAT_MOD_INVALID;
 681         return v3d_resource_create_with_modifiers(pscreen, tmpl, &mod, 1);
 682 }
 683
 684 static struct pipe_resource *
 685 v3d_resource_from_handle(struct pipe_screen *pscreen,
 686                          const struct pipe_resource *tmpl,
 687                          struct winsys_handle *whandle,
 688                          unsigned usage)
 689 {
 690         struct v3d_screen *screen = v3d_screen(pscreen);
 691         struct v3d_resource *rsc = v3d_resource_setup(pscreen, tmpl);
 692         struct pipe_resource *prsc = &rsc->base;
 693         struct v3d_resource_slice *slice = &rsc->slices[0];
 694
 695         if (!rsc)
 696                 return NULL;
 697
 698         switch (whandle->modifier) {
 699         case DRM_FORMAT_MOD_LINEAR:
 700         case DRM_FORMAT_MOD_INVALID:
 701                 rsc->tiled = false;
 702                 break;
 703         /* XXX: UIF */
 704         default:
 705                 fprintf(stderr,
 706                         "Attempt to import unsupported modifier 0x%llx\n",
 707                         (long long)whandle->modifier);
 708                 goto fail;
 709         }
 710
 711         if (whandle->offset != 0) {
 712                 fprintf(stderr,
 713                         "Attempt to import unsupported winsys offset %u\n",
 714                         whandle->offset);
 715                 goto fail;
 716         }
 717
 718         switch (whandle->type) {
 719         case WINSYS_HANDLE_TYPE_SHARED:
 720                 rsc->bo = v3d_bo_open_name(screen,
 721                                            whandle->handle, whandle->stride);
 722                 break;
 723         case WINSYS_HANDLE_TYPE_FD:
 724                 rsc->bo = v3d_bo_open_dmabuf(screen,
 725                                              whandle->handle, whandle->stride);
 726                 break;
 727         default:
 728                 fprintf(stderr,
 729                         "Attempt to import unsupported handle type %d\n",
 730                         whandle->type);
 731                 goto fail;
 732         }
 733
 734         if (!rsc->bo)
 735                 goto fail;
 736
 737         rsc->internal_format = prsc->format;
 738
 739         v3d_setup_slices(rsc);
 740         v3d_debug_resource_layout(rsc, "import");
 741
 742         if (whandle->stride != slice->stride) {
 743                 static bool warned = false;
 744                 if (!warned) {
 745                         warned = true;
 746                         fprintf(stderr,
 747                                 "Attempting to import %dx%d %s with "
 748                                 "unsupported stride %d instead of %d\n",
 749                                 prsc->width0, prsc->height0,
 750                                 util_format_short_name(prsc->format),
 751                                 whandle->stride,
 752                                 slice->stride);
 753                 }
 754                 goto fail;
 755         }
 756
 757         return prsc;
 758
 759 fail:
 760         v3d_resource_destroy(pscreen, prsc);
 761         return NULL;
 762 }
 763
 764 static struct pipe_surface *
 765 v3d_create_surface(struct pipe_context *pctx,
 766                    struct pipe_resource *ptex,
 767                    const struct pipe_surface *surf_tmpl)
 768 {
 769         struct v3d_context *v3d = v3d_context(pctx);
 770         struct v3d_screen *screen = v3d->screen;
 771         struct v3d_surface *surface = CALLOC_STRUCT(v3d_surface);
 772         struct v3d_resource *rsc = v3d_resource(ptex);
 773
 774         if (!surface)
 775                 return NULL;
 776
 777         assert(surf_tmpl->u.tex.first_layer == surf_tmpl->u.tex.last_layer);
 778
 779         struct pipe_surface *psurf = &surface->base;
 780         unsigned level = surf_tmpl->u.tex.level;
 781         struct v3d_resource_slice *slice = &rsc->slices[level];
 782
 783         pipe_reference_init(&psurf->reference, 1);
 784         pipe_resource_reference(&psurf->texture, ptex);
 785
 786         psurf->context = pctx;
 787         psurf->format = surf_tmpl->format;
 788         psurf->width = u_minify(ptex->width0, level);
 789         psurf->height = u_minify(ptex->height0, level);
 790         psurf->u.tex.level = level;
 791         psurf->u.tex.first_layer = surf_tmpl->u.tex.first_layer;
 792         psurf->u.tex.last_layer = surf_tmpl->u.tex.last_layer;
 793
 794         surface->offset = v3d_layer_offset(ptex, level,
 795                                            psurf->u.tex.first_layer);
 796         surface->tiling = slice->tiling;
 797
 798         surface->format = v3d_get_rt_format(&screen->devinfo, psurf->format);
 799
 800         if (util_format_is_depth_or_stencil(psurf->format)) {
 801                 switch (psurf->format) {
 802                 case PIPE_FORMAT_Z16_UNORM:
 803                         surface->internal_type = V3D_INTERNAL_TYPE_DEPTH_16;
 804                         break;
 805                 case PIPE_FORMAT_Z32_FLOAT:
 806                 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
 807                         surface->internal_type = V3D_INTERNAL_TYPE_DEPTH_32F;
 808                         break;
 809                 default:
 810                         surface->internal_type = V3D_INTERNAL_TYPE_DEPTH_24;
 811                 }
 812         } else {
 813                 uint32_t bpp, type;
 814                 v3d_get_internal_type_bpp_for_output_format(&screen->devinfo,
 815                                                             surface->format,
 816                                                             &type, &bpp);
 817                 surface->internal_type = type;
 818                 surface->internal_bpp = bpp;
 819         }
 820
 821         if (surface->tiling == VC5_TILING_UIF_NO_XOR ||
 822             surface->tiling == VC5_TILING_UIF_XOR) {
 823                 surface->padded_height_of_output_image_in_uif_blocks =
 824                         (slice->padded_height /
 825                          (2 * v3d_utile_height(rsc->cpp)));
 826         }
 827
 828         if (rsc->separate_stencil) {
 829                 surface->separate_stencil =
 830                         v3d_create_surface(pctx, &rsc->separate_stencil->base,
 831                                            surf_tmpl);
 832         }
 833
 834         return &surface->base;
 835 }
 836
 837 static void
 838 v3d_surface_destroy(struct pipe_context *pctx, struct pipe_surface *psurf)
 839 {
 840         struct v3d_surface *surf = v3d_surface(psurf);
 841
 842         if (surf->separate_stencil)
 843                 pipe_surface_reference(&surf->separate_stencil, NULL);
 844
 845         pipe_resource_reference(&psurf->texture, NULL);
 846         FREE(psurf);
 847 }
 848
 849 static void
 850 v3d_flush_resource(struct pipe_context *pctx, struct pipe_resource *resource)
 851 {
 852         /* All calls to flush_resource are followed by a flush of the context,
 853          * so there's nothing to do.
 854          */
 855 }
 856
 857 static enum pipe_format
 858 v3d_resource_get_internal_format(struct pipe_resource *prsc)
 859 {
 860         return v3d_resource(prsc)->internal_format;
 861 }
 862
 863 static void
 864 v3d_resource_set_stencil(struct pipe_resource *prsc,
 865                          struct pipe_resource *stencil)
 866 {
 867         v3d_resource(prsc)->separate_stencil = v3d_resource(stencil);
 868 }
 869
 870 static struct pipe_resource *
 871 v3d_resource_get_stencil(struct pipe_resource *prsc)
 872 {
 873         struct v3d_resource *rsc = v3d_resource(prsc);
 874
 875         return &rsc->separate_stencil->base;
 876 }
 877
 878 static const struct u_transfer_vtbl transfer_vtbl = {
 879         .resource_create          = v3d_resource_create,
 880         .resource_destroy         = v3d_resource_destroy,
 881         .transfer_map             = v3d_resource_transfer_map,
 882         .transfer_unmap           = v3d_resource_transfer_unmap,
 883         .transfer_flush_region    = u_default_transfer_flush_region,
 884         .get_internal_format      = v3d_resource_get_internal_format,
 885         .set_stencil              = v3d_resource_set_stencil,
 886         .get_stencil              = v3d_resource_get_stencil,
 887 };
 888
 889 void
 890 v3d_resource_screen_init(struct pipe_screen *pscreen)
 891 {
 892         pscreen->resource_create_with_modifiers =
 893                 v3d_resource_create_with_modifiers;
 894         pscreen->resource_create = u_transfer_helper_resource_create;
 895         pscreen->resource_from_handle = v3d_resource_from_handle;
 896         pscreen->resource_get_handle = v3d_resource_get_handle;
 897         pscreen->resource_destroy = u_transfer_helper_resource_destroy;
 898         pscreen->transfer_helper = u_transfer_helper_create(&transfer_vtbl,
 899                                                             true, true, true);
 900 }
 901
 902 void
 903 v3d_resource_context_init(struct pipe_context *pctx)
 904 {
 905         pctx->transfer_map = u_transfer_helper_transfer_map;
 906         pctx->transfer_flush_region = u_transfer_helper_transfer_flush_region;
 907         pctx->transfer_unmap = u_transfer_helper_transfer_unmap;
 908         pctx->buffer_subdata = u_default_buffer_subdata;
 909         pctx->texture_subdata = u_default_texture_subdata;
 910         pctx->create_surface = v3d_create_surface;
 911         pctx->surface_destroy = v3d_surface_destroy;
 912         pctx->resource_copy_region = util_resource_copy_region;
 913         pctx->blit = v3d_blit;
 914         pctx->flush_resource = v3d_flush_resource;
 915 }