src/gallium/drivers/v3d/v3d_resource.c

   1 /*
   2  * Copyright © 2014-2017 Broadcom
   3  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22  * IN THE SOFTWARE.
  23  */
  24
  25 #include "pipe/p_defines.h"
  26 #include "util/u_blit.h"
  27 #include "util/u_memory.h"
  28 #include "util/u_format.h"
  29 #include "util/u_inlines.h"
  30 #include "util/u_surface.h"
  31 #include "util/u_transfer_helper.h"
  32 #include "util/u_upload_mgr.h"
  33 #include "util/u_format_zs.h"
  34
  35 #include "drm_fourcc.h"
  36 #include "v3d_screen.h"
  37 #include "v3d_context.h"
  38 #include "v3d_resource.h"
  39 #include "v3d_tiling.h"
  40 #include "broadcom/cle/v3d_packet_v33_pack.h"
  41
  42 static void
  43 v3d_debug_resource_layout(struct v3d_resource *rsc, const char *caller)
  44 {
  45         if (!(V3D_DEBUG & V3D_DEBUG_SURFACE))
  46                 return;
  47
  48         struct pipe_resource *prsc = &rsc->base;
  49
  50         if (prsc->target == PIPE_BUFFER) {
  51                 fprintf(stderr,
  52                         "rsc %s %p (format %s), %dx%d buffer @0x%08x-0x%08x\n",
  53                         caller, rsc,
  54                         util_format_short_name(prsc->format),
  55                         prsc->width0, prsc->height0,
  56                         rsc->bo->offset,
  57                         rsc->bo->offset + rsc->bo->size - 1);
  58                 return;
  59         }
  60
  61         static const char *const tiling_descriptions[] = {
  62                 [VC5_TILING_RASTER] = "R",
  63                 [VC5_TILING_LINEARTILE] = "LT",
  64                 [VC5_TILING_UBLINEAR_1_COLUMN] = "UB1",
  65                 [VC5_TILING_UBLINEAR_2_COLUMN] = "UB2",
  66                 [VC5_TILING_UIF_NO_XOR] = "UIF",
  67                 [VC5_TILING_UIF_XOR] = "UIF^",
  68         };
  69
  70         for (int i = 0; i <= prsc->last_level; i++) {
  71                 struct v3d_resource_slice *slice = &rsc->slices[i];
  72
  73                 int level_width = slice->stride / rsc->cpp;
  74                 int level_height = slice->padded_height;
  75                 int level_depth =
  76                         u_minify(util_next_power_of_two(prsc->depth0), i);
  77
  78                 fprintf(stderr,
  79                         "rsc %s %p (format %s), %dx%d: "
  80                         "level %d (%s) %dx%dx%d -> %dx%dx%d, stride %d@0x%08x\n",
  81                         caller, rsc,
  82                         util_format_short_name(prsc->format),
  83                         prsc->width0, prsc->height0,
  84                         i, tiling_descriptions[slice->tiling],
  85                         u_minify(prsc->width0, i),
  86                         u_minify(prsc->height0, i),
  87                         u_minify(prsc->depth0, i),
  88                         level_width,
  89                         level_height,
  90                         level_depth,
  91                         slice->stride,
  92                         rsc->bo->offset + slice->offset);
  93         }
  94 }
  95
  96 static bool
  97 v3d_resource_bo_alloc(struct v3d_resource *rsc)
  98 {
  99         struct pipe_resource *prsc = &rsc->base;
 100         struct pipe_screen *pscreen = prsc->screen;
 101         struct v3d_bo *bo;
 102
 103         bo = v3d_bo_alloc(v3d_screen(pscreen), rsc->size, "resource");
 104         if (bo) {
 105                 v3d_bo_unreference(&rsc->bo);
 106                 rsc->bo = bo;
 107                 v3d_debug_resource_layout(rsc, "alloc");
 108                 return true;
 109         } else {
 110                 return false;
 111         }
 112 }
 113
 114 static void
 115 v3d_resource_transfer_unmap(struct pipe_context *pctx,
 116                             struct pipe_transfer *ptrans)
 117 {
 118         struct v3d_context *v3d = v3d_context(pctx);
 119         struct v3d_transfer *trans = v3d_transfer(ptrans);
 120
 121         if (trans->map) {
 122                 struct v3d_resource *rsc = v3d_resource(ptrans->resource);
 123                 struct v3d_resource_slice *slice = &rsc->slices[ptrans->level];
 124
 125                 if (ptrans->usage & PIPE_TRANSFER_WRITE) {
 126                         for (int z = 0; z < ptrans->box.depth; z++) {
 127                                 void *dst = rsc->bo->map +
 128                                         v3d_layer_offset(&rsc->base,
 129                                                          ptrans->level,
 130                                                          ptrans->box.z + z);
 131                                 v3d_store_tiled_image(dst,
 132                                                       slice->stride,
 133                                                       (trans->map +
 134                                                        ptrans->stride *
 135                                                        ptrans->box.height * z),
 136                                                       ptrans->stride,
 137                                                       slice->tiling, rsc->cpp,
 138                                                       slice->padded_height,
 139                                                       &ptrans->box);
 140                         }
 141                 }
 142                 free(trans->map);
 143         }
 144
 145         pipe_resource_reference(&ptrans->resource, NULL);
 146         slab_free(&v3d->transfer_pool, ptrans);
 147 }
 148
 149 static void *
 150 v3d_resource_transfer_map(struct pipe_context *pctx,
 151                           struct pipe_resource *prsc,
 152                           unsigned level, unsigned usage,
 153                           const struct pipe_box *box,
 154                           struct pipe_transfer **pptrans)
 155 {
 156         struct v3d_context *v3d = v3d_context(pctx);
 157         struct v3d_resource *rsc = v3d_resource(prsc);
 158         struct v3d_transfer *trans;
 159         struct pipe_transfer *ptrans;
 160         enum pipe_format format = prsc->format;
 161         char *buf;
 162
 163         /* MSAA maps should have been handled by u_transfer_helper. */
 164         assert(prsc->nr_samples <= 1);
 165
 166         /* Upgrade DISCARD_RANGE to WHOLE_RESOURCE if the whole resource is
 167          * being mapped.
 168          */
 169         if ((usage & PIPE_TRANSFER_DISCARD_RANGE) &&
 170             !(usage & PIPE_TRANSFER_UNSYNCHRONIZED) &&
 171             !(prsc->flags & PIPE_RESOURCE_FLAG_MAP_PERSISTENT) &&
 172             prsc->last_level == 0 &&
 173             prsc->width0 == box->width &&
 174             prsc->height0 == box->height &&
 175             prsc->depth0 == box->depth &&
 176             prsc->array_size == 1 &&
 177             rsc->bo->private) {
 178                 usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
 179         }
 180
 181         if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
 182                 if (v3d_resource_bo_alloc(rsc)) {
 183                         /* If it might be bound as one of our vertex buffers
 184                          * or UBOs, make sure we re-emit vertex buffer state
 185                          * or uniforms.
 186                          */
 187                         if (prsc->bind & PIPE_BIND_VERTEX_BUFFER)
 188                                 v3d->dirty |= VC5_DIRTY_VTXBUF;
 189                         if (prsc->bind & PIPE_BIND_CONSTANT_BUFFER)
 190                                 v3d->dirty |= VC5_DIRTY_CONSTBUF;
 191                 } else {
 192                         /* If we failed to reallocate, flush users so that we
 193                          * don't violate any syncing requirements.
 194                          */
 195                         v3d_flush_jobs_reading_resource(v3d, prsc);
 196                 }
 197         } else if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
 198                 /* If we're writing and the buffer is being used by the CL, we
 199                  * have to flush the CL first.  If we're only reading, we need
 200                  * to flush if the CL has written our buffer.
 201                  */
 202                 if (usage & PIPE_TRANSFER_WRITE)
 203                         v3d_flush_jobs_reading_resource(v3d, prsc);
 204                 else
 205                         v3d_flush_jobs_writing_resource(v3d, prsc);
 206         }
 207
 208         if (usage & PIPE_TRANSFER_WRITE) {
 209                 rsc->writes++;
 210                 rsc->initialized_buffers = ~0;
 211         }
 212
 213         trans = slab_alloc(&v3d->transfer_pool);
 214         if (!trans)
 215                 return NULL;
 216
 217         /* XXX: Handle DONTBLOCK, DISCARD_RANGE, PERSISTENT, COHERENT. */
 218
 219         /* slab_alloc_st() doesn't zero: */
 220         memset(trans, 0, sizeof(*trans));
 221         ptrans = &trans->base;
 222
 223         pipe_resource_reference(&ptrans->resource, prsc);
 224         ptrans->level = level;
 225         ptrans->usage = usage;
 226         ptrans->box = *box;
 227
 228         /* Note that the current kernel implementation is synchronous, so no
 229          * need to do syncing stuff here yet.
 230          */
 231
 232         if (usage & PIPE_TRANSFER_UNSYNCHRONIZED)
 233                 buf = v3d_bo_map_unsynchronized(rsc->bo);
 234         else
 235                 buf = v3d_bo_map(rsc->bo);
 236         if (!buf) {
 237                 fprintf(stderr, "Failed to map bo\n");
 238                 goto fail;
 239         }
 240
 241         *pptrans = ptrans;
 242
 243         /* Our load/store routines work on entire compressed blocks. */
 244         ptrans->box.x /= util_format_get_blockwidth(format);
 245         ptrans->box.y /= util_format_get_blockheight(format);
 246         ptrans->box.width = DIV_ROUND_UP(ptrans->box.width,
 247                                          util_format_get_blockwidth(format));
 248         ptrans->box.height = DIV_ROUND_UP(ptrans->box.height,
 249                                           util_format_get_blockheight(format));
 250
 251         struct v3d_resource_slice *slice = &rsc->slices[level];
 252         if (rsc->tiled) {
 253                 /* No direct mappings of tiled, since we need to manually
 254                  * tile/untile.
 255                  */
 256                 if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
 257                         return NULL;
 258
 259                 ptrans->stride = ptrans->box.width * rsc->cpp;
 260                 ptrans->layer_stride = ptrans->stride * ptrans->box.height;
 261
 262                 trans->map = malloc(ptrans->layer_stride * ptrans->box.depth);
 263
 264                 if (usage & PIPE_TRANSFER_READ) {
 265                         for (int z = 0; z < ptrans->box.depth; z++) {
 266                                 void *src = rsc->bo->map +
 267                                         v3d_layer_offset(&rsc->base,
 268                                                          ptrans->level,
 269                                                          ptrans->box.z + z);
 270                                 v3d_load_tiled_image((trans->map +
 271                                                       ptrans->stride *
 272                                                       ptrans->box.height * z),
 273                                                      ptrans->stride,
 274                                                      src,
 275                                                      slice->stride,
 276                                                      slice->tiling, rsc->cpp,
 277                                                      slice->padded_height,
 278                                              &ptrans->box);
 279                         }
 280                 }
 281                 return trans->map;
 282         } else {
 283                 ptrans->stride = slice->stride;
 284                 ptrans->layer_stride = rsc->cube_map_stride;
 285
 286                 return buf + slice->offset +
 287                         ptrans->box.y * ptrans->stride +
 288                         ptrans->box.x * rsc->cpp +
 289                         ptrans->box.z * rsc->cube_map_stride;
 290         }
 291
 292
 293 fail:
 294         v3d_resource_transfer_unmap(pctx, ptrans);
 295         return NULL;
 296 }
 297
 298 static void
 299 v3d_resource_destroy(struct pipe_screen *pscreen,
 300                      struct pipe_resource *prsc)
 301 {
 302         struct v3d_screen *screen = v3d_screen(pscreen);
 303         struct v3d_resource *rsc = v3d_resource(prsc);
 304
 305         if (rsc->scanout)
 306                 renderonly_scanout_destroy(rsc->scanout, screen->ro);
 307
 308         v3d_bo_unreference(&rsc->bo);
 309         free(rsc);
 310 }
 311
 312 static boolean
 313 v3d_resource_get_handle(struct pipe_screen *pscreen,
 314                         struct pipe_context *pctx,
 315                         struct pipe_resource *prsc,
 316                         struct winsys_handle *whandle,
 317                         unsigned usage)
 318 {
 319         struct v3d_screen *screen = v3d_screen(pscreen);
 320         struct v3d_resource *rsc = v3d_resource(prsc);
 321         struct v3d_bo *bo = rsc->bo;
 322
 323         whandle->stride = rsc->slices[0].stride;
 324         whandle->offset = 0;
 325
 326         /* If we're passing some reference to our BO out to some other part of
 327          * the system, then we can't do any optimizations about only us being
 328          * the ones seeing it (like BO caching).
 329          */
 330         bo->private = false;
 331
 332         if (rsc->tiled) {
 333                 /* A shared tiled buffer should always be allocated as UIF,
 334                  * not UBLINEAR or LT.
 335                  */
 336                 assert(rsc->slices[0].tiling == VC5_TILING_UIF_XOR ||
 337                        rsc->slices[0].tiling == VC5_TILING_UIF_NO_XOR);
 338                 whandle->modifier = DRM_FORMAT_MOD_BROADCOM_UIF;
 339         } else {
 340                 whandle->modifier = DRM_FORMAT_MOD_LINEAR;
 341         }
 342
 343         switch (whandle->type) {
 344         case WINSYS_HANDLE_TYPE_SHARED:
 345                 return v3d_bo_flink(bo, &whandle->handle);
 346         case WINSYS_HANDLE_TYPE_KMS:
 347                 if (screen->ro) {
 348                         assert(rsc->scanout);
 349                         return renderonly_get_handle(rsc->scanout, whandle);
 350                 }
 351                 whandle->handle = bo->handle;
 352                 return TRUE;
 353         case WINSYS_HANDLE_TYPE_FD:
 354                 whandle->handle = v3d_bo_get_dmabuf(bo);
 355                 return whandle->handle != -1;
 356         }
 357
 358         return FALSE;
 359 }
 360
 361 #define PAGE_UB_ROWS (VC5_UIFCFG_PAGE_SIZE / VC5_UIFBLOCK_ROW_SIZE)
 362 #define PAGE_UB_ROWS_TIMES_1_5 ((PAGE_UB_ROWS * 3) >> 1)
 363 #define PAGE_CACHE_UB_ROWS (VC5_PAGE_CACHE_SIZE / VC5_UIFBLOCK_ROW_SIZE)
 364 #define PAGE_CACHE_MINUS_1_5_UB_ROWS (PAGE_CACHE_UB_ROWS - PAGE_UB_ROWS_TIMES_1_5)
 365
 366 /**
 367  * Computes the HW's UIFblock padding for a given height/cpp.
 368  *
 369  * The goal of the padding is to keep pages of the same color (bank number) at
 370  * least half a page away from each other vertically when crossing between
 371  * between columns of UIF blocks.
 372  */
 373 static uint32_t
 374 v3d_get_ub_pad(struct v3d_resource *rsc, uint32_t height)
 375 {
 376         uint32_t utile_h = v3d_utile_height(rsc->cpp);
 377         uint32_t uif_block_h = utile_h * 2;
 378         uint32_t height_ub = height / uif_block_h;
 379
 380         uint32_t height_offset_in_pc = height_ub % PAGE_CACHE_UB_ROWS;
 381
 382         /* For the perfectly-aligned-for-UIF-XOR case, don't add any pad. */
 383         if (height_offset_in_pc == 0)
 384                 return 0;
 385
 386         /* Try padding up to where we're offset by at least half a page. */
 387         if (height_offset_in_pc < PAGE_UB_ROWS_TIMES_1_5) {
 388                 /* If we fit entirely in the page cache, don't pad. */
 389                 if (height_ub < PAGE_CACHE_UB_ROWS)
 390                         return 0;
 391                 else
 392                         return PAGE_UB_ROWS_TIMES_1_5 - height_offset_in_pc;
 393         }
 394
 395         /* If we're close to being aligned to page cache size, then round up
 396          * and rely on XOR.
 397          */
 398         if (height_offset_in_pc > PAGE_CACHE_MINUS_1_5_UB_ROWS)
 399                 return PAGE_CACHE_UB_ROWS - height_offset_in_pc;
 400
 401         /* Otherwise, we're far enough away (top and bottom) to not need any
 402          * padding.
 403          */
 404         return 0;
 405 }
 406
 407 static void
 408 v3d_setup_slices(struct v3d_resource *rsc, uint32_t winsys_stride)
 409 {
 410         struct pipe_resource *prsc = &rsc->base;
 411         uint32_t width = prsc->width0;
 412         uint32_t height = prsc->height0;
 413         uint32_t depth = prsc->depth0;
 414         /* Note that power-of-two padding is based on level 1.  These are not
 415          * equivalent to just util_next_power_of_two(dimension), because at a
 416          * level 0 dimension of 9, the level 1 power-of-two padded value is 4,
 417          * not 8.
 418          */
 419         uint32_t pot_width = 2 * util_next_power_of_two(u_minify(width, 1));
 420         uint32_t pot_height = 2 * util_next_power_of_two(u_minify(height, 1));
 421         uint32_t pot_depth = 2 * util_next_power_of_two(u_minify(depth, 1));
 422         uint32_t offset = 0;
 423         uint32_t utile_w = v3d_utile_width(rsc->cpp);
 424         uint32_t utile_h = v3d_utile_height(rsc->cpp);
 425         uint32_t uif_block_w = utile_w * 2;
 426         uint32_t uif_block_h = utile_h * 2;
 427         uint32_t block_width = util_format_get_blockwidth(prsc->format);
 428         uint32_t block_height = util_format_get_blockheight(prsc->format);
 429         bool msaa = prsc->nr_samples > 1;
 430         /* MSAA textures/renderbuffers are always laid out as single-level
 431          * UIF.
 432          */
 433         bool uif_top = msaa;
 434
 435         for (int i = prsc->last_level; i >= 0; i--) {
 436                 struct v3d_resource_slice *slice = &rsc->slices[i];
 437
 438                 uint32_t level_width, level_height, level_depth;
 439                 if (i < 2) {
 440                         level_width = u_minify(width, i);
 441                         level_height = u_minify(height, i);
 442                 } else {
 443                         level_width = u_minify(pot_width, i);
 444                         level_height = u_minify(pot_height, i);
 445                 }
 446                 if (i < 1)
 447                         level_depth = u_minify(depth, i);
 448                 else
 449                         level_depth = u_minify(pot_depth, i);
 450
 451                 if (msaa) {
 452                         level_width *= 2;
 453                         level_height *= 2;
 454                 }
 455
 456                 level_width = DIV_ROUND_UP(level_width, block_width);
 457                 level_height = DIV_ROUND_UP(level_height, block_height);
 458
 459                 if (!rsc->tiled) {
 460                         slice->tiling = VC5_TILING_RASTER;
 461                         if (prsc->target == PIPE_TEXTURE_1D)
 462                                 level_width = align(level_width, 64 / rsc->cpp);
 463                 } else {
 464                         if ((i != 0 || !uif_top) &&
 465                             (level_width <= utile_w ||
 466                              level_height <= utile_h)) {
 467                                 slice->tiling = VC5_TILING_LINEARTILE;
 468                                 level_width = align(level_width, utile_w);
 469                                 level_height = align(level_height, utile_h);
 470                         } else if ((i != 0 || !uif_top) &&
 471                                    level_width <= uif_block_w) {
 472                                 slice->tiling = VC5_TILING_UBLINEAR_1_COLUMN;
 473                                 level_width = align(level_width, uif_block_w);
 474                                 level_height = align(level_height, uif_block_h);
 475                         } else if ((i != 0 || !uif_top) &&
 476                                    level_width <= 2 * uif_block_w) {
 477                                 slice->tiling = VC5_TILING_UBLINEAR_2_COLUMN;
 478                                 level_width = align(level_width, 2 * uif_block_w);
 479                                 level_height = align(level_height, uif_block_h);
 480                         } else {
 481                                 /* We align the width to a 4-block column of
 482                                  * UIF blocks, but we only align height to UIF
 483                                  * blocks.
 484                                  */
 485                                 level_width = align(level_width,
 486                                                     4 * uif_block_w);
 487                                 level_height = align(level_height,
 488                                                      uif_block_h);
 489
 490                                 slice->ub_pad = v3d_get_ub_pad(rsc,
 491                                                                level_height);
 492                                 level_height += slice->ub_pad * uif_block_h;
 493
 494                                 /* If the padding set us to to be aligned to
 495                                  * the page cache size, then the HW will use
 496                                  * the XOR bit on odd columns to get us
 497                                  * perfectly misaligned
 498                                  */
 499                                 if ((level_height / uif_block_h) %
 500                                     (VC5_PAGE_CACHE_SIZE /
 501                                      VC5_UIFBLOCK_ROW_SIZE) == 0) {
 502                                         slice->tiling = VC5_TILING_UIF_XOR;
 503                                 } else {
 504                                         slice->tiling = VC5_TILING_UIF_NO_XOR;
 505                                 }
 506                         }
 507                 }
 508
 509                 slice->offset = offset;
 510                 if (winsys_stride)
 511                         slice->stride = winsys_stride;
 512                 else
 513                         slice->stride = level_width * rsc->cpp;
 514                 slice->padded_height = level_height;
 515                 slice->size = level_height * slice->stride;
 516
 517                 uint32_t slice_total_size = slice->size * level_depth;
 518
 519                 /* The HW aligns level 1's base to a page if any of level 1 or
 520                  * below could be UIF XOR.  The lower levels then inherit the
 521                  * alignment for as long as necesary, thanks to being power of
 522                  * two aligned.
 523                  */
 524                 if (i == 1 &&
 525                     level_width > 4 * uif_block_w &&
 526                     level_height > PAGE_CACHE_MINUS_1_5_UB_ROWS * uif_block_h) {
 527                         slice_total_size = align(slice_total_size,
 528                                                  VC5_UIFCFG_PAGE_SIZE);
 529                 }
 530
 531                 offset += slice_total_size;
 532
 533         }
 534         rsc->size = offset;
 535
 536         /* UIF/UBLINEAR levels need to be aligned to UIF-blocks, and LT only
 537          * needs to be aligned to utile boundaries.  Since tiles are laid out
 538          * from small to big in memory, we need to align the later UIF slices
 539          * to UIF blocks, if they were preceded by non-UIF-block-aligned LT
 540          * slices.
 541          *
 542          * We additionally align to 4k, which improves UIF XOR performance.
 543          */
 544         uint32_t page_align_offset = (align(rsc->slices[0].offset, 4096) -
 545                                       rsc->slices[0].offset);
 546         if (page_align_offset) {
 547                 rsc->size += page_align_offset;
 548                 for (int i = 0; i <= prsc->last_level; i++)
 549                         rsc->slices[i].offset += page_align_offset;
 550         }
 551
 552         /* Arrays and cube textures have a stride which is the distance from
 553          * one full mipmap tree to the next (64b aligned).  For 3D textures,
 554          * we need to program the stride between slices of miplevel 0.
 555          */
 556         if (prsc->target != PIPE_TEXTURE_3D) {
 557                 rsc->cube_map_stride = align(rsc->slices[0].offset +
 558                                              rsc->slices[0].size, 64);
 559                 rsc->size += rsc->cube_map_stride * (prsc->array_size - 1);
 560         } else {
 561                 rsc->cube_map_stride = rsc->slices[0].size;
 562         }
 563 }
 564
 565 uint32_t
 566 v3d_layer_offset(struct pipe_resource *prsc, uint32_t level, uint32_t layer)
 567 {
 568         struct v3d_resource *rsc = v3d_resource(prsc);
 569         struct v3d_resource_slice *slice = &rsc->slices[level];
 570
 571         if (prsc->target == PIPE_TEXTURE_3D)
 572                 return slice->offset + layer * slice->size;
 573         else
 574                 return slice->offset + layer * rsc->cube_map_stride;
 575 }
 576
 577 static struct v3d_resource *
 578 v3d_resource_setup(struct pipe_screen *pscreen,
 579                    const struct pipe_resource *tmpl)
 580 {
 581         struct v3d_screen *screen = v3d_screen(pscreen);
 582         struct v3d_resource *rsc = CALLOC_STRUCT(v3d_resource);
 583         if (!rsc)
 584                 return NULL;
 585         struct pipe_resource *prsc = &rsc->base;
 586
 587         *prsc = *tmpl;
 588
 589         pipe_reference_init(&prsc->reference, 1);
 590         prsc->screen = pscreen;
 591
 592         if (prsc->nr_samples <= 1 ||
 593             screen->devinfo.ver >= 40 ||
 594             util_format_is_depth_or_stencil(prsc->format)) {
 595                 rsc->cpp = util_format_get_blocksize(prsc->format);
 596                 if (screen->devinfo.ver < 40 && prsc->nr_samples > 1)
 597                         rsc->cpp *= prsc->nr_samples;
 598         } else {
 599                 assert(v3d_rt_format_supported(&screen->devinfo, prsc->format));
 600                 uint32_t output_image_format =
 601                         v3d_get_rt_format(&screen->devinfo, prsc->format);
 602                 uint32_t internal_type;
 603                 uint32_t internal_bpp;
 604                 v3d_get_internal_type_bpp_for_output_format(&screen->devinfo,
 605                                                             output_image_format,
 606                                                             &internal_type,
 607                                                             &internal_bpp);
 608                 switch (internal_bpp) {
 609                 case V3D_INTERNAL_BPP_32:
 610                         rsc->cpp = 4;
 611                         break;
 612                 case V3D_INTERNAL_BPP_64:
 613                         rsc->cpp = 8;
 614                         break;
 615                 case V3D_INTERNAL_BPP_128:
 616                         rsc->cpp = 16;
 617                         break;
 618                 }
 619         }
 620
 621         assert(rsc->cpp);
 622
 623         return rsc;
 624 }
 625
 626 static bool
 627 find_modifier(uint64_t needle, const uint64_t *haystack, int count)
 628 {
 629         int i;
 630
 631         for (i = 0; i < count; i++) {
 632                 if (haystack[i] == needle)
 633                         return true;
 634         }
 635
 636         return false;
 637 }
 638
 639 static struct pipe_resource *
 640 v3d_resource_create_with_modifiers(struct pipe_screen *pscreen,
 641                                    const struct pipe_resource *tmpl,
 642                                    const uint64_t *modifiers,
 643                                    int count)
 644 {
 645         struct v3d_screen *screen = v3d_screen(pscreen);
 646         bool linear_ok = find_modifier(DRM_FORMAT_MOD_LINEAR, modifiers, count);
 647         struct v3d_resource *rsc = v3d_resource_setup(pscreen, tmpl);
 648         struct pipe_resource *prsc = &rsc->base;
 649         /* Use a tiled layout if we can, for better 3D performance. */
 650         bool should_tile = true;
 651
 652         /* VBOs/PBOs are untiled (and 1 height). */
 653         if (tmpl->target == PIPE_BUFFER)
 654                 should_tile = false;
 655
 656         /* Cursors are always linear, and the user can request linear as well.
 657          */
 658         if (tmpl->bind & (PIPE_BIND_LINEAR | PIPE_BIND_CURSOR))
 659                 should_tile = false;
 660
 661         /* No tiling when we're sharing with another device (pl111). */
 662         if (screen->ro && (tmpl->bind & PIPE_BIND_SCANOUT))
 663                 should_tile = false;
 664
 665         /* 1D and 1D_ARRAY textures are always raster-order. */
 666         if (tmpl->target == PIPE_TEXTURE_1D ||
 667             tmpl->target == PIPE_TEXTURE_1D_ARRAY)
 668                 should_tile = false;
 669
 670         /* Scanout BOs for simulator need to be linear for interaction with
 671          * i965.
 672          */
 673         if (using_v3d_simulator &&
 674             tmpl->bind & (PIPE_BIND_SHARED | PIPE_BIND_SCANOUT))
 675                 should_tile = false;
 676
 677         /* No user-specified modifier; determine our own. */
 678         if (count == 1 && modifiers[0] == DRM_FORMAT_MOD_INVALID) {
 679                 linear_ok = true;
 680                 rsc->tiled = should_tile;
 681         } else if (should_tile &&
 682                    find_modifier(DRM_FORMAT_MOD_BROADCOM_UIF,
 683                                  modifiers, count)) {
 684                 rsc->tiled = true;
 685         } else if (linear_ok) {
 686                 rsc->tiled = false;
 687         } else {
 688                 fprintf(stderr, "Unsupported modifier requested\n");
 689                 return NULL;
 690         }
 691
 692         rsc->internal_format = prsc->format;
 693
 694         v3d_setup_slices(rsc, 0);
 695
 696         /* If we're in a renderonly setup, use the other device to perform our
 697          * (linear) allocaton and just import it to v3d.  The other device may
 698          * be using CMA, and V3D can import from CMA but doesn't do CMA
 699          * allocations on its own.
 700          *
 701          * Note that DRI3 doesn't give us tmpl->bind flags, so we have to use
 702          * the modifiers to see if we're allocating a scanout object.
 703          */
 704         if (screen->ro &&
 705             ((tmpl->bind & PIPE_BIND_SCANOUT) ||
 706              (count == 1 && modifiers[0] == DRM_FORMAT_MOD_LINEAR))) {
 707                 struct winsys_handle handle;
 708                 rsc->scanout =
 709                    renderonly_scanout_for_resource(prsc, screen->ro, &handle);
 710                 if (!rsc->scanout) {
 711                         fprintf(stderr, "Failed to create scanout resource\n");
 712                         goto fail;
 713                 }
 714                 assert(handle.type == WINSYS_HANDLE_TYPE_FD);
 715                 rsc->bo = v3d_bo_open_dmabuf(screen, handle.handle);
 716                 v3d_debug_resource_layout(rsc, "scanout");
 717         } else {
 718                 if (!v3d_resource_bo_alloc(rsc))
 719                         goto fail;
 720         }
 721
 722         return prsc;
 723 fail:
 724         v3d_resource_destroy(pscreen, prsc);
 725         return NULL;
 726 }
 727
 728 struct pipe_resource *
 729 v3d_resource_create(struct pipe_screen *pscreen,
 730                     const struct pipe_resource *tmpl)
 731 {
 732         const uint64_t mod = DRM_FORMAT_MOD_INVALID;
 733         return v3d_resource_create_with_modifiers(pscreen, tmpl, &mod, 1);
 734 }
 735
 736 static struct pipe_resource *
 737 v3d_resource_from_handle(struct pipe_screen *pscreen,
 738                          const struct pipe_resource *tmpl,
 739                          struct winsys_handle *whandle,
 740                          unsigned usage)
 741 {
 742         struct v3d_screen *screen = v3d_screen(pscreen);
 743         struct v3d_resource *rsc = v3d_resource_setup(pscreen, tmpl);
 744         struct pipe_resource *prsc = &rsc->base;
 745         struct v3d_resource_slice *slice = &rsc->slices[0];
 746
 747         if (!rsc)
 748                 return NULL;
 749
 750         switch (whandle->modifier) {
 751         case DRM_FORMAT_MOD_LINEAR:
 752                 rsc->tiled = false;
 753                 break;
 754         case DRM_FORMAT_MOD_BROADCOM_UIF:
 755         case DRM_FORMAT_MOD_INVALID:
 756                 rsc->tiled = true;
 757                 break;
 758         default:
 759                 fprintf(stderr,
 760                         "Attempt to import unsupported modifier 0x%llx\n",
 761                         (long long)whandle->modifier);
 762                 goto fail;
 763         }
 764
 765         if (whandle->offset != 0) {
 766                 fprintf(stderr,
 767                         "Attempt to import unsupported winsys offset %u\n",
 768                         whandle->offset);
 769                 goto fail;
 770         }
 771
 772         switch (whandle->type) {
 773         case WINSYS_HANDLE_TYPE_SHARED:
 774                 rsc->bo = v3d_bo_open_name(screen, whandle->handle);
 775                 break;
 776         case WINSYS_HANDLE_TYPE_FD:
 777                 rsc->bo = v3d_bo_open_dmabuf(screen, whandle->handle);
 778                 break;
 779         default:
 780                 fprintf(stderr,
 781                         "Attempt to import unsupported handle type %d\n",
 782                         whandle->type);
 783                 goto fail;
 784         }
 785
 786         if (!rsc->bo)
 787                 goto fail;
 788
 789         rsc->internal_format = prsc->format;
 790
 791         v3d_setup_slices(rsc, whandle->stride);
 792         v3d_debug_resource_layout(rsc, "import");
 793
 794         if (screen->ro) {
 795                 /* Make sure that renderonly has a handle to our buffer in the
 796                  * display's fd, so that a later renderonly_get_handle()
 797                  * returns correct handles or GEM names.
 798                  */
 799                 rsc->scanout =
 800                         renderonly_create_gpu_import_for_resource(prsc,
 801                                                                   screen->ro,
 802                                                                   NULL);
 803                 if (!rsc->scanout) {
 804                         fprintf(stderr, "Failed to create scanout resource.\n");
 805                         goto fail;
 806                 }
 807         }
 808
 809         if (whandle->stride != slice->stride) {
 810                 static bool warned = false;
 811                 if (!warned) {
 812                         warned = true;
 813                         fprintf(stderr,
 814                                 "Attempting to import %dx%d %s with "
 815                                 "unsupported stride %d instead of %d\n",
 816                                 prsc->width0, prsc->height0,
 817                                 util_format_short_name(prsc->format),
 818                                 whandle->stride,
 819                                 slice->stride);
 820                 }
 821                 goto fail;
 822         }
 823
 824         return prsc;
 825
 826 fail:
 827         v3d_resource_destroy(pscreen, prsc);
 828         return NULL;
 829 }
 830
 831 void
 832 v3d_update_shadow_texture(struct pipe_context *pctx,
 833                           struct pipe_sampler_view *pview)
 834 {
 835         struct v3d_sampler_view *view = v3d_sampler_view(pview);
 836         struct v3d_resource *shadow = v3d_resource(view->texture);
 837         struct v3d_resource *orig = v3d_resource(pview->texture);
 838
 839         assert(view->texture != pview->texture);
 840
 841         if (shadow->writes == orig->writes && orig->bo->private)
 842                 return;
 843
 844         perf_debug("Updating %dx%d@%d shadow for linear texture\n",
 845                    orig->base.width0, orig->base.height0,
 846                    pview->u.tex.first_level);
 847
 848         for (int i = 0; i <= shadow->base.last_level; i++) {
 849                 unsigned width = u_minify(shadow->base.width0, i);
 850                 unsigned height = u_minify(shadow->base.height0, i);
 851                 struct pipe_blit_info info = {
 852                         .dst = {
 853                                 .resource = &shadow->base,
 854                                 .level = i,
 855                                 .box = {
 856                                         .x = 0,
 857                                         .y = 0,
 858                                         .z = 0,
 859                                         .width = width,
 860                                         .height = height,
 861                                         .depth = 1,
 862                                 },
 863                                 .format = shadow->base.format,
 864                         },
 865                         .src = {
 866                                 .resource = &orig->base,
 867                                 .level = pview->u.tex.first_level + i,
 868                                 .box = {
 869                                         .x = 0,
 870                                         .y = 0,
 871                                         .z = 0,
 872                                         .width = width,
 873                                         .height = height,
 874                                         .depth = 1,
 875                                 },
 876                                 .format = orig->base.format,
 877                         },
 878                         .mask = util_format_get_mask(orig->base.format),
 879                 };
 880                 pctx->blit(pctx, &info);
 881         }
 882
 883         shadow->writes = orig->writes;
 884 }
 885
 886 static struct pipe_surface *
 887 v3d_create_surface(struct pipe_context *pctx,
 888                    struct pipe_resource *ptex,
 889                    const struct pipe_surface *surf_tmpl)
 890 {
 891         struct v3d_context *v3d = v3d_context(pctx);
 892         struct v3d_screen *screen = v3d->screen;
 893         struct v3d_surface *surface = CALLOC_STRUCT(v3d_surface);
 894         struct v3d_resource *rsc = v3d_resource(ptex);
 895
 896         if (!surface)
 897                 return NULL;
 898
 899         assert(surf_tmpl->u.tex.first_layer == surf_tmpl->u.tex.last_layer);
 900
 901         struct pipe_surface *psurf = &surface->base;
 902         unsigned level = surf_tmpl->u.tex.level;
 903         struct v3d_resource_slice *slice = &rsc->slices[level];
 904
 905         pipe_reference_init(&psurf->reference, 1);
 906         pipe_resource_reference(&psurf->texture, ptex);
 907
 908         psurf->context = pctx;
 909         psurf->format = surf_tmpl->format;
 910         psurf->width = u_minify(ptex->width0, level);
 911         psurf->height = u_minify(ptex->height0, level);
 912         psurf->u.tex.level = level;
 913         psurf->u.tex.first_layer = surf_tmpl->u.tex.first_layer;
 914         psurf->u.tex.last_layer = surf_tmpl->u.tex.last_layer;
 915
 916         surface->offset = v3d_layer_offset(ptex, level,
 917                                            psurf->u.tex.first_layer);
 918         surface->tiling = slice->tiling;
 919
 920         surface->format = v3d_get_rt_format(&screen->devinfo, psurf->format);
 921
 922         const struct util_format_description *desc =
 923                 util_format_description(psurf->format);
 924
 925         surface->swap_rb = (desc->swizzle[0] == PIPE_SWIZZLE_Z &&
 926                             psurf->format != PIPE_FORMAT_B5G6R5_UNORM);
 927
 928         if (util_format_is_depth_or_stencil(psurf->format)) {
 929                 switch (psurf->format) {
 930                 case PIPE_FORMAT_Z16_UNORM:
 931                         surface->internal_type = V3D_INTERNAL_TYPE_DEPTH_16;
 932                         break;
 933                 case PIPE_FORMAT_Z32_FLOAT:
 934                 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
 935                         surface->internal_type = V3D_INTERNAL_TYPE_DEPTH_32F;
 936                         break;
 937                 default:
 938                         surface->internal_type = V3D_INTERNAL_TYPE_DEPTH_24;
 939                 }
 940         } else {
 941                 uint32_t bpp, type;
 942                 v3d_get_internal_type_bpp_for_output_format(&screen->devinfo,
 943                                                             surface->format,
 944                                                             &type, &bpp);
 945                 surface->internal_type = type;
 946                 surface->internal_bpp = bpp;
 947         }
 948
 949         if (surface->tiling == VC5_TILING_UIF_NO_XOR ||
 950             surface->tiling == VC5_TILING_UIF_XOR) {
 951                 surface->padded_height_of_output_image_in_uif_blocks =
 952                         (slice->padded_height /
 953                          (2 * v3d_utile_height(rsc->cpp)));
 954         }
 955
 956         if (rsc->separate_stencil) {
 957                 surface->separate_stencil =
 958                         v3d_create_surface(pctx, &rsc->separate_stencil->base,
 959                                            surf_tmpl);
 960         }
 961
 962         return &surface->base;
 963 }
 964
 965 static void
 966 v3d_surface_destroy(struct pipe_context *pctx, struct pipe_surface *psurf)
 967 {
 968         struct v3d_surface *surf = v3d_surface(psurf);
 969
 970         if (surf->separate_stencil)
 971                 pipe_surface_reference(&surf->separate_stencil, NULL);
 972
 973         pipe_resource_reference(&psurf->texture, NULL);
 974         FREE(psurf);
 975 }
 976
 977 static void
 978 v3d_flush_resource(struct pipe_context *pctx, struct pipe_resource *resource)
 979 {
 980         /* All calls to flush_resource are followed by a flush of the context,
 981          * so there's nothing to do.
 982          */
 983 }
 984
 985 static enum pipe_format
 986 v3d_resource_get_internal_format(struct pipe_resource *prsc)
 987 {
 988         return v3d_resource(prsc)->internal_format;
 989 }
 990
 991 static void
 992 v3d_resource_set_stencil(struct pipe_resource *prsc,
 993                          struct pipe_resource *stencil)
 994 {
 995         v3d_resource(prsc)->separate_stencil = v3d_resource(stencil);
 996 }
 997
 998 static struct pipe_resource *
 999 v3d_resource_get_stencil(struct pipe_resource *prsc)
1000 {
1001         struct v3d_resource *rsc = v3d_resource(prsc);
1002
1003         return &rsc->separate_stencil->base;
1004 }
1005
1006 static const struct u_transfer_vtbl transfer_vtbl = {
1007         .resource_create          = v3d_resource_create,
1008         .resource_destroy         = v3d_resource_destroy,
1009         .transfer_map             = v3d_resource_transfer_map,
1010         .transfer_unmap           = v3d_resource_transfer_unmap,
1011         .transfer_flush_region    = u_default_transfer_flush_region,
1012         .get_internal_format      = v3d_resource_get_internal_format,
1013         .set_stencil              = v3d_resource_set_stencil,
1014         .get_stencil              = v3d_resource_get_stencil,
1015 };
1016
1017 void
1018 v3d_resource_screen_init(struct pipe_screen *pscreen)
1019 {
1020         pscreen->resource_create_with_modifiers =
1021                 v3d_resource_create_with_modifiers;
1022         pscreen->resource_create = u_transfer_helper_resource_create;
1023         pscreen->resource_from_handle = v3d_resource_from_handle;
1024         pscreen->resource_get_handle = v3d_resource_get_handle;
1025         pscreen->resource_destroy = u_transfer_helper_resource_destroy;
1026         pscreen->transfer_helper = u_transfer_helper_create(&transfer_vtbl,
1027                                                             true, false,
1028                                                             true, true);
1029 }
1030
1031 void
1032 v3d_resource_context_init(struct pipe_context *pctx)
1033 {
1034         pctx->transfer_map = u_transfer_helper_transfer_map;
1035         pctx->transfer_flush_region = u_transfer_helper_transfer_flush_region;
1036         pctx->transfer_unmap = u_transfer_helper_transfer_unmap;
1037         pctx->buffer_subdata = u_default_buffer_subdata;
1038         pctx->texture_subdata = u_default_texture_subdata;
1039         pctx->create_surface = v3d_create_surface;
1040         pctx->surface_destroy = v3d_surface_destroy;
1041         pctx->resource_copy_region = util_resource_copy_region;
1042         pctx->blit = v3d_blit;
1043         pctx->generate_mipmap = v3d_generate_mipmap;
1044         pctx->flush_resource = v3d_flush_resource;
1045 }