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v3d: Always lay out shared tiled buffers with UIF_TOP set.
[mesa.git] / src / gallium / drivers / v3d / v3d_resource.c
1 /*
2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include "pipe/p_defines.h"
26 #include "util/u_blit.h"
27 #include "util/u_memory.h"
28 #include "util/u_format.h"
29 #include "util/u_inlines.h"
30 #include "util/u_surface.h"
31 #include "util/u_transfer_helper.h"
32 #include "util/u_upload_mgr.h"
33 #include "util/u_format_zs.h"
34 #include "util/u_drm.h"
35
36 #include "drm-uapi/drm_fourcc.h"
37 #include "v3d_screen.h"
38 #include "v3d_context.h"
39 #include "v3d_resource.h"
40 #include "v3d_tiling.h"
41 #include "broadcom/cle/v3d_packet_v33_pack.h"
42
43 static void
44 v3d_debug_resource_layout(struct v3d_resource *rsc, const char *caller)
45 {
46 if (!(V3D_DEBUG & V3D_DEBUG_SURFACE))
47 return;
48
49 struct pipe_resource *prsc = &rsc->base;
50
51 if (prsc->target == PIPE_BUFFER) {
52 fprintf(stderr,
53 "rsc %s %p (format %s), %dx%d buffer @0x%08x-0x%08x\n",
54 caller, rsc,
55 util_format_short_name(prsc->format),
56 prsc->width0, prsc->height0,
57 rsc->bo->offset,
58 rsc->bo->offset + rsc->bo->size - 1);
59 return;
60 }
61
62 static const char *const tiling_descriptions[] = {
63 [VC5_TILING_RASTER] = "R",
64 [VC5_TILING_LINEARTILE] = "LT",
65 [VC5_TILING_UBLINEAR_1_COLUMN] = "UB1",
66 [VC5_TILING_UBLINEAR_2_COLUMN] = "UB2",
67 [VC5_TILING_UIF_NO_XOR] = "UIF",
68 [VC5_TILING_UIF_XOR] = "UIF^",
69 };
70
71 for (int i = 0; i <= prsc->last_level; i++) {
72 struct v3d_resource_slice *slice = &rsc->slices[i];
73
74 int level_width = slice->stride / rsc->cpp;
75 int level_height = slice->padded_height;
76 int level_depth =
77 u_minify(util_next_power_of_two(prsc->depth0), i);
78
79 fprintf(stderr,
80 "rsc %s %p (format %s), %dx%d: "
81 "level %d (%s) %dx%dx%d -> %dx%dx%d, stride %d@0x%08x\n",
82 caller, rsc,
83 util_format_short_name(prsc->format),
84 prsc->width0, prsc->height0,
85 i, tiling_descriptions[slice->tiling],
86 u_minify(prsc->width0, i),
87 u_minify(prsc->height0, i),
88 u_minify(prsc->depth0, i),
89 level_width,
90 level_height,
91 level_depth,
92 slice->stride,
93 rsc->bo->offset + slice->offset);
94 }
95 }
96
97 static bool
98 v3d_resource_bo_alloc(struct v3d_resource *rsc)
99 {
100 struct pipe_resource *prsc = &rsc->base;
101 struct pipe_screen *pscreen = prsc->screen;
102 struct v3d_bo *bo;
103
104 bo = v3d_bo_alloc(v3d_screen(pscreen), rsc->size, "resource");
105 if (bo) {
106 v3d_bo_unreference(&rsc->bo);
107 rsc->bo = bo;
108 v3d_debug_resource_layout(rsc, "alloc");
109 return true;
110 } else {
111 return false;
112 }
113 }
114
115 static void
116 v3d_resource_transfer_unmap(struct pipe_context *pctx,
117 struct pipe_transfer *ptrans)
118 {
119 struct v3d_context *v3d = v3d_context(pctx);
120 struct v3d_transfer *trans = v3d_transfer(ptrans);
121
122 if (trans->map) {
123 struct v3d_resource *rsc = v3d_resource(ptrans->resource);
124 struct v3d_resource_slice *slice = &rsc->slices[ptrans->level];
125
126 if (ptrans->usage & PIPE_TRANSFER_WRITE) {
127 for (int z = 0; z < ptrans->box.depth; z++) {
128 void *dst = rsc->bo->map +
129 v3d_layer_offset(&rsc->base,
130 ptrans->level,
131 ptrans->box.z + z);
132 v3d_store_tiled_image(dst,
133 slice->stride,
134 (trans->map +
135 ptrans->stride *
136 ptrans->box.height * z),
137 ptrans->stride,
138 slice->tiling, rsc->cpp,
139 slice->padded_height,
140 &ptrans->box);
141 }
142 }
143 free(trans->map);
144 }
145
146 pipe_resource_reference(&ptrans->resource, NULL);
147 slab_free(&v3d->transfer_pool, ptrans);
148 }
149
150 static void
151 v3d_map_usage_prep(struct pipe_context *pctx,
152 struct pipe_resource *prsc,
153 unsigned usage)
154 {
155 struct v3d_context *v3d = v3d_context(pctx);
156 struct v3d_resource *rsc = v3d_resource(prsc);
157
158 if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
159 if (v3d_resource_bo_alloc(rsc)) {
160 /* If it might be bound as one of our vertex buffers
161 * or UBOs, make sure we re-emit vertex buffer state
162 * or uniforms.
163 */
164 if (prsc->bind & PIPE_BIND_VERTEX_BUFFER)
165 v3d->dirty |= VC5_DIRTY_VTXBUF;
166 if (prsc->bind & PIPE_BIND_CONSTANT_BUFFER)
167 v3d->dirty |= VC5_DIRTY_CONSTBUF;
168 } else {
169 /* If we failed to reallocate, flush users so that we
170 * don't violate any syncing requirements.
171 */
172 v3d_flush_jobs_reading_resource(v3d, prsc);
173 }
174 } else if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
175 /* If we're writing and the buffer is being used by the CL, we
176 * have to flush the CL first. If we're only reading, we need
177 * to flush if the CL has written our buffer.
178 */
179 if (usage & PIPE_TRANSFER_WRITE)
180 v3d_flush_jobs_reading_resource(v3d, prsc);
181 else
182 v3d_flush_jobs_writing_resource(v3d, prsc);
183 }
184
185 if (usage & PIPE_TRANSFER_WRITE) {
186 rsc->writes++;
187 rsc->initialized_buffers = ~0;
188 }
189 }
190
191 static void *
192 v3d_resource_transfer_map(struct pipe_context *pctx,
193 struct pipe_resource *prsc,
194 unsigned level, unsigned usage,
195 const struct pipe_box *box,
196 struct pipe_transfer **pptrans)
197 {
198 struct v3d_context *v3d = v3d_context(pctx);
199 struct v3d_resource *rsc = v3d_resource(prsc);
200 struct v3d_transfer *trans;
201 struct pipe_transfer *ptrans;
202 enum pipe_format format = prsc->format;
203 char *buf;
204
205 /* MSAA maps should have been handled by u_transfer_helper. */
206 assert(prsc->nr_samples <= 1);
207
208 /* Upgrade DISCARD_RANGE to WHOLE_RESOURCE if the whole resource is
209 * being mapped.
210 */
211 if ((usage & PIPE_TRANSFER_DISCARD_RANGE) &&
212 !(usage & PIPE_TRANSFER_UNSYNCHRONIZED) &&
213 !(prsc->flags & PIPE_RESOURCE_FLAG_MAP_PERSISTENT) &&
214 prsc->last_level == 0 &&
215 prsc->width0 == box->width &&
216 prsc->height0 == box->height &&
217 prsc->depth0 == box->depth &&
218 prsc->array_size == 1 &&
219 rsc->bo->private) {
220 usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
221 }
222
223 v3d_map_usage_prep(pctx, prsc, usage);
224
225 trans = slab_alloc(&v3d->transfer_pool);
226 if (!trans)
227 return NULL;
228
229 /* XXX: Handle DONTBLOCK, DISCARD_RANGE, PERSISTENT, COHERENT. */
230
231 /* slab_alloc_st() doesn't zero: */
232 memset(trans, 0, sizeof(*trans));
233 ptrans = &trans->base;
234
235 pipe_resource_reference(&ptrans->resource, prsc);
236 ptrans->level = level;
237 ptrans->usage = usage;
238 ptrans->box = *box;
239
240 /* Note that the current kernel implementation is synchronous, so no
241 * need to do syncing stuff here yet.
242 */
243
244 if (usage & PIPE_TRANSFER_UNSYNCHRONIZED)
245 buf = v3d_bo_map_unsynchronized(rsc->bo);
246 else
247 buf = v3d_bo_map(rsc->bo);
248 if (!buf) {
249 fprintf(stderr, "Failed to map bo\n");
250 goto fail;
251 }
252
253 *pptrans = ptrans;
254
255 /* Our load/store routines work on entire compressed blocks. */
256 ptrans->box.x /= util_format_get_blockwidth(format);
257 ptrans->box.y /= util_format_get_blockheight(format);
258 ptrans->box.width = DIV_ROUND_UP(ptrans->box.width,
259 util_format_get_blockwidth(format));
260 ptrans->box.height = DIV_ROUND_UP(ptrans->box.height,
261 util_format_get_blockheight(format));
262
263 struct v3d_resource_slice *slice = &rsc->slices[level];
264 if (rsc->tiled) {
265 /* No direct mappings of tiled, since we need to manually
266 * tile/untile.
267 */
268 if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
269 return NULL;
270
271 ptrans->stride = ptrans->box.width * rsc->cpp;
272 ptrans->layer_stride = ptrans->stride * ptrans->box.height;
273
274 trans->map = malloc(ptrans->layer_stride * ptrans->box.depth);
275
276 if (usage & PIPE_TRANSFER_READ) {
277 for (int z = 0; z < ptrans->box.depth; z++) {
278 void *src = rsc->bo->map +
279 v3d_layer_offset(&rsc->base,
280 ptrans->level,
281 ptrans->box.z + z);
282 v3d_load_tiled_image((trans->map +
283 ptrans->stride *
284 ptrans->box.height * z),
285 ptrans->stride,
286 src,
287 slice->stride,
288 slice->tiling, rsc->cpp,
289 slice->padded_height,
290 &ptrans->box);
291 }
292 }
293 return trans->map;
294 } else {
295 ptrans->stride = slice->stride;
296 ptrans->layer_stride = rsc->cube_map_stride;
297
298 return buf + slice->offset +
299 ptrans->box.y * ptrans->stride +
300 ptrans->box.x * rsc->cpp +
301 ptrans->box.z * rsc->cube_map_stride;
302 }
303
304
305 fail:
306 v3d_resource_transfer_unmap(pctx, ptrans);
307 return NULL;
308 }
309
310 static void
311 v3d_texture_subdata(struct pipe_context *pctx,
312 struct pipe_resource *prsc,
313 unsigned level,
314 unsigned usage,
315 const struct pipe_box *box,
316 const void *data,
317 unsigned stride,
318 unsigned layer_stride)
319 {
320 struct v3d_resource *rsc = v3d_resource(prsc);
321 struct v3d_resource_slice *slice = &rsc->slices[level];
322
323 /* For a direct mapping, we can just take the u_transfer path. */
324 if (!rsc->tiled) {
325 return u_default_texture_subdata(pctx, prsc, level, usage, box,
326 data, stride, layer_stride);
327 }
328
329 /* Otherwise, map and store the texture data directly into the tiled
330 * texture. Note that gallium's texture_subdata may be called with
331 * obvious usage flags missing!
332 */
333 v3d_map_usage_prep(pctx, prsc, usage | (PIPE_TRANSFER_WRITE |
334 PIPE_TRANSFER_DISCARD_RANGE));
335
336 void *buf;
337 if (usage & PIPE_TRANSFER_UNSYNCHRONIZED)
338 buf = v3d_bo_map_unsynchronized(rsc->bo);
339 else
340 buf = v3d_bo_map(rsc->bo);
341
342 for (int i = 0; i < box->depth; i++) {
343 v3d_store_tiled_image(buf +
344 v3d_layer_offset(&rsc->base,
345 level,
346 box->z + i),
347 slice->stride,
348 (void *)data + layer_stride * i,
349 stride,
350 slice->tiling, rsc->cpp, slice->padded_height,
351 box);
352 }
353 }
354
355 static void
356 v3d_resource_destroy(struct pipe_screen *pscreen,
357 struct pipe_resource *prsc)
358 {
359 struct v3d_screen *screen = v3d_screen(pscreen);
360 struct v3d_resource *rsc = v3d_resource(prsc);
361
362 if (rsc->scanout)
363 renderonly_scanout_destroy(rsc->scanout, screen->ro);
364
365 v3d_bo_unreference(&rsc->bo);
366 free(rsc);
367 }
368
369 static boolean
370 v3d_resource_get_handle(struct pipe_screen *pscreen,
371 struct pipe_context *pctx,
372 struct pipe_resource *prsc,
373 struct winsys_handle *whandle,
374 unsigned usage)
375 {
376 struct v3d_screen *screen = v3d_screen(pscreen);
377 struct v3d_resource *rsc = v3d_resource(prsc);
378 struct v3d_bo *bo = rsc->bo;
379
380 whandle->stride = rsc->slices[0].stride;
381 whandle->offset = 0;
382
383 /* If we're passing some reference to our BO out to some other part of
384 * the system, then we can't do any optimizations about only us being
385 * the ones seeing it (like BO caching).
386 */
387 bo->private = false;
388
389 if (rsc->tiled) {
390 /* A shared tiled buffer should always be allocated as UIF,
391 * not UBLINEAR or LT.
392 */
393 assert(rsc->slices[0].tiling == VC5_TILING_UIF_XOR ||
394 rsc->slices[0].tiling == VC5_TILING_UIF_NO_XOR);
395 whandle->modifier = DRM_FORMAT_MOD_BROADCOM_UIF;
396 } else {
397 whandle->modifier = DRM_FORMAT_MOD_LINEAR;
398 }
399
400 switch (whandle->type) {
401 case WINSYS_HANDLE_TYPE_SHARED:
402 return v3d_bo_flink(bo, &whandle->handle);
403 case WINSYS_HANDLE_TYPE_KMS:
404 if (screen->ro) {
405 assert(rsc->scanout);
406 return renderonly_get_handle(rsc->scanout, whandle);
407 }
408 whandle->handle = bo->handle;
409 return TRUE;
410 case WINSYS_HANDLE_TYPE_FD:
411 whandle->handle = v3d_bo_get_dmabuf(bo);
412 return whandle->handle != -1;
413 }
414
415 return FALSE;
416 }
417
418 #define PAGE_UB_ROWS (VC5_UIFCFG_PAGE_SIZE / VC5_UIFBLOCK_ROW_SIZE)
419 #define PAGE_UB_ROWS_TIMES_1_5 ((PAGE_UB_ROWS * 3) >> 1)
420 #define PAGE_CACHE_UB_ROWS (VC5_PAGE_CACHE_SIZE / VC5_UIFBLOCK_ROW_SIZE)
421 #define PAGE_CACHE_MINUS_1_5_UB_ROWS (PAGE_CACHE_UB_ROWS - PAGE_UB_ROWS_TIMES_1_5)
422
423 /**
424 * Computes the HW's UIFblock padding for a given height/cpp.
425 *
426 * The goal of the padding is to keep pages of the same color (bank number) at
427 * least half a page away from each other vertically when crossing between
428 * between columns of UIF blocks.
429 */
430 static uint32_t
431 v3d_get_ub_pad(struct v3d_resource *rsc, uint32_t height)
432 {
433 uint32_t utile_h = v3d_utile_height(rsc->cpp);
434 uint32_t uif_block_h = utile_h * 2;
435 uint32_t height_ub = height / uif_block_h;
436
437 uint32_t height_offset_in_pc = height_ub % PAGE_CACHE_UB_ROWS;
438
439 /* For the perfectly-aligned-for-UIF-XOR case, don't add any pad. */
440 if (height_offset_in_pc == 0)
441 return 0;
442
443 /* Try padding up to where we're offset by at least half a page. */
444 if (height_offset_in_pc < PAGE_UB_ROWS_TIMES_1_5) {
445 /* If we fit entirely in the page cache, don't pad. */
446 if (height_ub < PAGE_CACHE_UB_ROWS)
447 return 0;
448 else
449 return PAGE_UB_ROWS_TIMES_1_5 - height_offset_in_pc;
450 }
451
452 /* If we're close to being aligned to page cache size, then round up
453 * and rely on XOR.
454 */
455 if (height_offset_in_pc > PAGE_CACHE_MINUS_1_5_UB_ROWS)
456 return PAGE_CACHE_UB_ROWS - height_offset_in_pc;
457
458 /* Otherwise, we're far enough away (top and bottom) to not need any
459 * padding.
460 */
461 return 0;
462 }
463
464 static void
465 v3d_setup_slices(struct v3d_resource *rsc, uint32_t winsys_stride,
466 bool uif_top)
467 {
468 struct pipe_resource *prsc = &rsc->base;
469 uint32_t width = prsc->width0;
470 uint32_t height = prsc->height0;
471 uint32_t depth = prsc->depth0;
472 /* Note that power-of-two padding is based on level 1. These are not
473 * equivalent to just util_next_power_of_two(dimension), because at a
474 * level 0 dimension of 9, the level 1 power-of-two padded value is 4,
475 * not 8.
476 */
477 uint32_t pot_width = 2 * util_next_power_of_two(u_minify(width, 1));
478 uint32_t pot_height = 2 * util_next_power_of_two(u_minify(height, 1));
479 uint32_t pot_depth = 2 * util_next_power_of_two(u_minify(depth, 1));
480 uint32_t offset = 0;
481 uint32_t utile_w = v3d_utile_width(rsc->cpp);
482 uint32_t utile_h = v3d_utile_height(rsc->cpp);
483 uint32_t uif_block_w = utile_w * 2;
484 uint32_t uif_block_h = utile_h * 2;
485 uint32_t block_width = util_format_get_blockwidth(prsc->format);
486 uint32_t block_height = util_format_get_blockheight(prsc->format);
487 bool msaa = prsc->nr_samples > 1;
488
489 /* MSAA textures/renderbuffers are always laid out as single-level
490 * UIF.
491 */
492 uif_top |= msaa;
493
494 /* Check some easy mistakes to make in a resource_create() call that
495 * will break our setup.
496 */
497 assert(prsc->array_size != 0);
498 assert(prsc->depth0 != 0);
499
500 for (int i = prsc->last_level; i >= 0; i--) {
501 struct v3d_resource_slice *slice = &rsc->slices[i];
502
503 uint32_t level_width, level_height, level_depth;
504 if (i < 2) {
505 level_width = u_minify(width, i);
506 level_height = u_minify(height, i);
507 } else {
508 level_width = u_minify(pot_width, i);
509 level_height = u_minify(pot_height, i);
510 }
511 if (i < 1)
512 level_depth = u_minify(depth, i);
513 else
514 level_depth = u_minify(pot_depth, i);
515
516 if (msaa) {
517 level_width *= 2;
518 level_height *= 2;
519 }
520
521 level_width = DIV_ROUND_UP(level_width, block_width);
522 level_height = DIV_ROUND_UP(level_height, block_height);
523
524 if (!rsc->tiled) {
525 slice->tiling = VC5_TILING_RASTER;
526 if (prsc->target == PIPE_TEXTURE_1D)
527 level_width = align(level_width, 64 / rsc->cpp);
528 } else {
529 if ((i != 0 || !uif_top) &&
530 (level_width <= utile_w ||
531 level_height <= utile_h)) {
532 slice->tiling = VC5_TILING_LINEARTILE;
533 level_width = align(level_width, utile_w);
534 level_height = align(level_height, utile_h);
535 } else if ((i != 0 || !uif_top) &&
536 level_width <= uif_block_w) {
537 slice->tiling = VC5_TILING_UBLINEAR_1_COLUMN;
538 level_width = align(level_width, uif_block_w);
539 level_height = align(level_height, uif_block_h);
540 } else if ((i != 0 || !uif_top) &&
541 level_width <= 2 * uif_block_w) {
542 slice->tiling = VC5_TILING_UBLINEAR_2_COLUMN;
543 level_width = align(level_width, 2 * uif_block_w);
544 level_height = align(level_height, uif_block_h);
545 } else {
546 /* We align the width to a 4-block column of
547 * UIF blocks, but we only align height to UIF
548 * blocks.
549 */
550 level_width = align(level_width,
551 4 * uif_block_w);
552 level_height = align(level_height,
553 uif_block_h);
554
555 slice->ub_pad = v3d_get_ub_pad(rsc,
556 level_height);
557 level_height += slice->ub_pad * uif_block_h;
558
559 /* If the padding set us to to be aligned to
560 * the page cache size, then the HW will use
561 * the XOR bit on odd columns to get us
562 * perfectly misaligned
563 */
564 if ((level_height / uif_block_h) %
565 (VC5_PAGE_CACHE_SIZE /
566 VC5_UIFBLOCK_ROW_SIZE) == 0) {
567 slice->tiling = VC5_TILING_UIF_XOR;
568 } else {
569 slice->tiling = VC5_TILING_UIF_NO_XOR;
570 }
571 }
572 }
573
574 slice->offset = offset;
575 if (winsys_stride)
576 slice->stride = winsys_stride;
577 else
578 slice->stride = level_width * rsc->cpp;
579 slice->padded_height = level_height;
580 slice->size = level_height * slice->stride;
581
582 uint32_t slice_total_size = slice->size * level_depth;
583
584 /* The HW aligns level 1's base to a page if any of level 1 or
585 * below could be UIF XOR. The lower levels then inherit the
586 * alignment for as long as necesary, thanks to being power of
587 * two aligned.
588 */
589 if (i == 1 &&
590 level_width > 4 * uif_block_w &&
591 level_height > PAGE_CACHE_MINUS_1_5_UB_ROWS * uif_block_h) {
592 slice_total_size = align(slice_total_size,
593 VC5_UIFCFG_PAGE_SIZE);
594 }
595
596 offset += slice_total_size;
597
598 }
599 rsc->size = offset;
600
601 /* UIF/UBLINEAR levels need to be aligned to UIF-blocks, and LT only
602 * needs to be aligned to utile boundaries. Since tiles are laid out
603 * from small to big in memory, we need to align the later UIF slices
604 * to UIF blocks, if they were preceded by non-UIF-block-aligned LT
605 * slices.
606 *
607 * We additionally align to 4k, which improves UIF XOR performance.
608 */
609 uint32_t page_align_offset = (align(rsc->slices[0].offset, 4096) -
610 rsc->slices[0].offset);
611 if (page_align_offset) {
612 rsc->size += page_align_offset;
613 for (int i = 0; i <= prsc->last_level; i++)
614 rsc->slices[i].offset += page_align_offset;
615 }
616
617 /* Arrays and cube textures have a stride which is the distance from
618 * one full mipmap tree to the next (64b aligned). For 3D textures,
619 * we need to program the stride between slices of miplevel 0.
620 */
621 if (prsc->target != PIPE_TEXTURE_3D) {
622 rsc->cube_map_stride = align(rsc->slices[0].offset +
623 rsc->slices[0].size, 64);
624 rsc->size += rsc->cube_map_stride * (prsc->array_size - 1);
625 } else {
626 rsc->cube_map_stride = rsc->slices[0].size;
627 }
628 }
629
630 uint32_t
631 v3d_layer_offset(struct pipe_resource *prsc, uint32_t level, uint32_t layer)
632 {
633 struct v3d_resource *rsc = v3d_resource(prsc);
634 struct v3d_resource_slice *slice = &rsc->slices[level];
635
636 if (prsc->target == PIPE_TEXTURE_3D)
637 return slice->offset + layer * slice->size;
638 else
639 return slice->offset + layer * rsc->cube_map_stride;
640 }
641
642 static struct v3d_resource *
643 v3d_resource_setup(struct pipe_screen *pscreen,
644 const struct pipe_resource *tmpl)
645 {
646 struct v3d_screen *screen = v3d_screen(pscreen);
647 struct v3d_resource *rsc = CALLOC_STRUCT(v3d_resource);
648 if (!rsc)
649 return NULL;
650 struct pipe_resource *prsc = &rsc->base;
651
652 *prsc = *tmpl;
653
654 pipe_reference_init(&prsc->reference, 1);
655 prsc->screen = pscreen;
656
657 if (prsc->nr_samples <= 1 ||
658 screen->devinfo.ver >= 40 ||
659 util_format_is_depth_or_stencil(prsc->format)) {
660 rsc->cpp = util_format_get_blocksize(prsc->format);
661 if (screen->devinfo.ver < 40 && prsc->nr_samples > 1)
662 rsc->cpp *= prsc->nr_samples;
663 } else {
664 assert(v3d_rt_format_supported(&screen->devinfo, prsc->format));
665 uint32_t output_image_format =
666 v3d_get_rt_format(&screen->devinfo, prsc->format);
667 uint32_t internal_type;
668 uint32_t internal_bpp;
669 v3d_get_internal_type_bpp_for_output_format(&screen->devinfo,
670 output_image_format,
671 &internal_type,
672 &internal_bpp);
673 switch (internal_bpp) {
674 case V3D_INTERNAL_BPP_32:
675 rsc->cpp = 4;
676 break;
677 case V3D_INTERNAL_BPP_64:
678 rsc->cpp = 8;
679 break;
680 case V3D_INTERNAL_BPP_128:
681 rsc->cpp = 16;
682 break;
683 }
684 }
685
686 assert(rsc->cpp);
687
688 return rsc;
689 }
690
691 static struct pipe_resource *
692 v3d_resource_create_with_modifiers(struct pipe_screen *pscreen,
693 const struct pipe_resource *tmpl,
694 const uint64_t *modifiers,
695 int count)
696 {
697 struct v3d_screen *screen = v3d_screen(pscreen);
698
699 /* If we're in a renderonly setup, use the other device to perform our
700 * (linear) allocation and just import it to v3d. The other device
701 * may be using CMA, and V3D can import from CMA but doesn't do CMA
702 * allocations on its own.
703 *
704 * We always allocate this way for SHARED, because get_handle will
705 * need a resource on the display fd.
706 */
707 if (screen->ro && (tmpl->bind & (PIPE_BIND_SCANOUT |
708 PIPE_BIND_SHARED))) {
709 struct winsys_handle handle;
710 struct pipe_resource scanout_tmpl = *tmpl;
711 struct renderonly_scanout *scanout =
712 renderonly_scanout_for_resource(&scanout_tmpl,
713 screen->ro,
714 &handle);
715 if (!scanout) {
716 fprintf(stderr, "Failed to create scanout resource\n");
717 return NULL;
718 }
719 assert(handle.type == WINSYS_HANDLE_TYPE_FD);
720 /* The fd is all we need. Destroy the old scanout (and its
721 * GEM handle on kms_fd) before resource_from_handle()'s
722 * renderonly_create_gpu_import_for_resource() call which will
723 * also get a kms_fd GEM handle for the fd.
724 */
725 renderonly_scanout_destroy(scanout, screen->ro);
726 struct pipe_resource *prsc =
727 pscreen->resource_from_handle(pscreen, tmpl,
728 &handle,
729 PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE);
730 close(handle.handle);
731 return prsc;
732 }
733
734 bool linear_ok = drm_find_modifier(DRM_FORMAT_MOD_LINEAR, modifiers, count);
735 struct v3d_resource *rsc = v3d_resource_setup(pscreen, tmpl);
736 struct pipe_resource *prsc = &rsc->base;
737 /* Use a tiled layout if we can, for better 3D performance. */
738 bool should_tile = true;
739
740 /* VBOs/PBOs are untiled (and 1 height). */
741 if (tmpl->target == PIPE_BUFFER)
742 should_tile = false;
743
744 /* Cursors are always linear, and the user can request linear as well.
745 */
746 if (tmpl->bind & (PIPE_BIND_LINEAR | PIPE_BIND_CURSOR))
747 should_tile = false;
748
749 /* 1D and 1D_ARRAY textures are always raster-order. */
750 if (tmpl->target == PIPE_TEXTURE_1D ||
751 tmpl->target == PIPE_TEXTURE_1D_ARRAY)
752 should_tile = false;
753
754 /* Scanout BOs for simulator need to be linear for interaction with
755 * i965.
756 */
757 if (using_v3d_simulator &&
758 tmpl->bind & (PIPE_BIND_SHARED | PIPE_BIND_SCANOUT))
759 should_tile = false;
760
761 /* No user-specified modifier; determine our own. */
762 if (count == 1 && modifiers[0] == DRM_FORMAT_MOD_INVALID) {
763 linear_ok = true;
764 rsc->tiled = should_tile;
765 } else if (should_tile &&
766 drm_find_modifier(DRM_FORMAT_MOD_BROADCOM_UIF,
767 modifiers, count)) {
768 rsc->tiled = true;
769 } else if (linear_ok) {
770 rsc->tiled = false;
771 } else {
772 fprintf(stderr, "Unsupported modifier requested\n");
773 goto fail;
774 }
775
776 rsc->internal_format = prsc->format;
777
778 v3d_setup_slices(rsc, 0, tmpl->bind & PIPE_BIND_SHARED);
779
780 if (!v3d_resource_bo_alloc(rsc))
781 goto fail;
782
783 return prsc;
784 fail:
785 v3d_resource_destroy(pscreen, prsc);
786 return NULL;
787 }
788
789 struct pipe_resource *
790 v3d_resource_create(struct pipe_screen *pscreen,
791 const struct pipe_resource *tmpl)
792 {
793 const uint64_t mod = DRM_FORMAT_MOD_INVALID;
794 return v3d_resource_create_with_modifiers(pscreen, tmpl, &mod, 1);
795 }
796
797 static struct pipe_resource *
798 v3d_resource_from_handle(struct pipe_screen *pscreen,
799 const struct pipe_resource *tmpl,
800 struct winsys_handle *whandle,
801 unsigned usage)
802 {
803 struct v3d_screen *screen = v3d_screen(pscreen);
804 struct v3d_resource *rsc = v3d_resource_setup(pscreen, tmpl);
805 struct pipe_resource *prsc = &rsc->base;
806 struct v3d_resource_slice *slice = &rsc->slices[0];
807
808 if (!rsc)
809 return NULL;
810
811 switch (whandle->modifier) {
812 case DRM_FORMAT_MOD_LINEAR:
813 rsc->tiled = false;
814 break;
815 case DRM_FORMAT_MOD_BROADCOM_UIF:
816 rsc->tiled = true;
817 break;
818 case DRM_FORMAT_MOD_INVALID:
819 rsc->tiled = screen->ro == NULL;
820 break;
821 default:
822 fprintf(stderr,
823 "Attempt to import unsupported modifier 0x%llx\n",
824 (long long)whandle->modifier);
825 goto fail;
826 }
827
828 if (whandle->offset != 0) {
829 fprintf(stderr,
830 "Attempt to import unsupported winsys offset %u\n",
831 whandle->offset);
832 goto fail;
833 }
834
835 switch (whandle->type) {
836 case WINSYS_HANDLE_TYPE_SHARED:
837 rsc->bo = v3d_bo_open_name(screen, whandle->handle);
838 break;
839 case WINSYS_HANDLE_TYPE_FD:
840 rsc->bo = v3d_bo_open_dmabuf(screen, whandle->handle);
841 break;
842 default:
843 fprintf(stderr,
844 "Attempt to import unsupported handle type %d\n",
845 whandle->type);
846 goto fail;
847 }
848
849 if (!rsc->bo)
850 goto fail;
851
852 rsc->internal_format = prsc->format;
853
854 v3d_setup_slices(rsc, whandle->stride, true);
855 v3d_debug_resource_layout(rsc, "import");
856
857 if (screen->ro) {
858 /* Make sure that renderonly has a handle to our buffer in the
859 * display's fd, so that a later renderonly_get_handle()
860 * returns correct handles or GEM names.
861 */
862 rsc->scanout =
863 renderonly_create_gpu_import_for_resource(prsc,
864 screen->ro,
865 NULL);
866 if (!rsc->scanout) {
867 fprintf(stderr, "Failed to create scanout resource.\n");
868 goto fail;
869 }
870 }
871
872 if (whandle->stride != slice->stride) {
873 static bool warned = false;
874 if (!warned) {
875 warned = true;
876 fprintf(stderr,
877 "Attempting to import %dx%d %s with "
878 "unsupported stride %d instead of %d\n",
879 prsc->width0, prsc->height0,
880 util_format_short_name(prsc->format),
881 whandle->stride,
882 slice->stride);
883 }
884 goto fail;
885 }
886
887 return prsc;
888
889 fail:
890 v3d_resource_destroy(pscreen, prsc);
891 return NULL;
892 }
893
894 void
895 v3d_update_shadow_texture(struct pipe_context *pctx,
896 struct pipe_sampler_view *pview)
897 {
898 struct v3d_context *v3d = v3d_context(pctx);
899 struct v3d_sampler_view *view = v3d_sampler_view(pview);
900 struct v3d_resource *shadow = v3d_resource(view->texture);
901 struct v3d_resource *orig = v3d_resource(pview->texture);
902
903 assert(view->texture != pview->texture);
904
905 if (shadow->writes == orig->writes && orig->bo->private)
906 return;
907
908 perf_debug("Updating %dx%d@%d shadow for linear texture\n",
909 orig->base.width0, orig->base.height0,
910 pview->u.tex.first_level);
911
912 for (int i = 0; i <= shadow->base.last_level; i++) {
913 unsigned width = u_minify(shadow->base.width0, i);
914 unsigned height = u_minify(shadow->base.height0, i);
915 struct pipe_blit_info info = {
916 .dst = {
917 .resource = &shadow->base,
918 .level = i,
919 .box = {
920 .x = 0,
921 .y = 0,
922 .z = 0,
923 .width = width,
924 .height = height,
925 .depth = 1,
926 },
927 .format = shadow->base.format,
928 },
929 .src = {
930 .resource = &orig->base,
931 .level = pview->u.tex.first_level + i,
932 .box = {
933 .x = 0,
934 .y = 0,
935 .z = 0,
936 .width = width,
937 .height = height,
938 .depth = 1,
939 },
940 .format = orig->base.format,
941 },
942 .mask = util_format_get_mask(orig->base.format),
943 };
944 pctx->blit(pctx, &info);
945 }
946
947 shadow->writes = orig->writes;
948 }
949
950 static struct pipe_surface *
951 v3d_create_surface(struct pipe_context *pctx,
952 struct pipe_resource *ptex,
953 const struct pipe_surface *surf_tmpl)
954 {
955 struct v3d_context *v3d = v3d_context(pctx);
956 struct v3d_screen *screen = v3d->screen;
957 struct v3d_surface *surface = CALLOC_STRUCT(v3d_surface);
958 struct v3d_resource *rsc = v3d_resource(ptex);
959
960 if (!surface)
961 return NULL;
962
963 assert(surf_tmpl->u.tex.first_layer == surf_tmpl->u.tex.last_layer);
964
965 struct pipe_surface *psurf = &surface->base;
966 unsigned level = surf_tmpl->u.tex.level;
967 struct v3d_resource_slice *slice = &rsc->slices[level];
968
969 pipe_reference_init(&psurf->reference, 1);
970 pipe_resource_reference(&psurf->texture, ptex);
971
972 psurf->context = pctx;
973 psurf->format = surf_tmpl->format;
974 psurf->width = u_minify(ptex->width0, level);
975 psurf->height = u_minify(ptex->height0, level);
976 psurf->u.tex.level = level;
977 psurf->u.tex.first_layer = surf_tmpl->u.tex.first_layer;
978 psurf->u.tex.last_layer = surf_tmpl->u.tex.last_layer;
979
980 surface->offset = v3d_layer_offset(ptex, level,
981 psurf->u.tex.first_layer);
982 surface->tiling = slice->tiling;
983
984 surface->format = v3d_get_rt_format(&screen->devinfo, psurf->format);
985
986 const struct util_format_description *desc =
987 util_format_description(psurf->format);
988
989 surface->swap_rb = (desc->swizzle[0] == PIPE_SWIZZLE_Z &&
990 psurf->format != PIPE_FORMAT_B5G6R5_UNORM);
991
992 if (util_format_is_depth_or_stencil(psurf->format)) {
993 switch (psurf->format) {
994 case PIPE_FORMAT_Z16_UNORM:
995 surface->internal_type = V3D_INTERNAL_TYPE_DEPTH_16;
996 break;
997 case PIPE_FORMAT_Z32_FLOAT:
998 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
999 surface->internal_type = V3D_INTERNAL_TYPE_DEPTH_32F;
1000 break;
1001 default:
1002 surface->internal_type = V3D_INTERNAL_TYPE_DEPTH_24;
1003 }
1004 } else {
1005 uint32_t bpp, type;
1006 v3d_get_internal_type_bpp_for_output_format(&screen->devinfo,
1007 surface->format,
1008 &type, &bpp);
1009 surface->internal_type = type;
1010 surface->internal_bpp = bpp;
1011 }
1012
1013 if (surface->tiling == VC5_TILING_UIF_NO_XOR ||
1014 surface->tiling == VC5_TILING_UIF_XOR) {
1015 surface->padded_height_of_output_image_in_uif_blocks =
1016 (slice->padded_height /
1017 (2 * v3d_utile_height(rsc->cpp)));
1018 }
1019
1020 if (rsc->separate_stencil) {
1021 surface->separate_stencil =
1022 v3d_create_surface(pctx, &rsc->separate_stencil->base,
1023 surf_tmpl);
1024 }
1025
1026 return &surface->base;
1027 }
1028
1029 static void
1030 v3d_surface_destroy(struct pipe_context *pctx, struct pipe_surface *psurf)
1031 {
1032 struct v3d_surface *surf = v3d_surface(psurf);
1033
1034 if (surf->separate_stencil)
1035 pipe_surface_reference(&surf->separate_stencil, NULL);
1036
1037 pipe_resource_reference(&psurf->texture, NULL);
1038 FREE(psurf);
1039 }
1040
1041 static void
1042 v3d_flush_resource(struct pipe_context *pctx, struct pipe_resource *resource)
1043 {
1044 /* All calls to flush_resource are followed by a flush of the context,
1045 * so there's nothing to do.
1046 */
1047 }
1048
1049 static enum pipe_format
1050 v3d_resource_get_internal_format(struct pipe_resource *prsc)
1051 {
1052 return v3d_resource(prsc)->internal_format;
1053 }
1054
1055 static void
1056 v3d_resource_set_stencil(struct pipe_resource *prsc,
1057 struct pipe_resource *stencil)
1058 {
1059 v3d_resource(prsc)->separate_stencil = v3d_resource(stencil);
1060 }
1061
1062 static struct pipe_resource *
1063 v3d_resource_get_stencil(struct pipe_resource *prsc)
1064 {
1065 struct v3d_resource *rsc = v3d_resource(prsc);
1066
1067 return &rsc->separate_stencil->base;
1068 }
1069
1070 static const struct u_transfer_vtbl transfer_vtbl = {
1071 .resource_create = v3d_resource_create,
1072 .resource_destroy = v3d_resource_destroy,
1073 .transfer_map = v3d_resource_transfer_map,
1074 .transfer_unmap = v3d_resource_transfer_unmap,
1075 .transfer_flush_region = u_default_transfer_flush_region,
1076 .get_internal_format = v3d_resource_get_internal_format,
1077 .set_stencil = v3d_resource_set_stencil,
1078 .get_stencil = v3d_resource_get_stencil,
1079 };
1080
1081 void
1082 v3d_resource_screen_init(struct pipe_screen *pscreen)
1083 {
1084 pscreen->resource_create_with_modifiers =
1085 v3d_resource_create_with_modifiers;
1086 pscreen->resource_create = u_transfer_helper_resource_create;
1087 pscreen->resource_from_handle = v3d_resource_from_handle;
1088 pscreen->resource_get_handle = v3d_resource_get_handle;
1089 pscreen->resource_destroy = u_transfer_helper_resource_destroy;
1090 pscreen->transfer_helper = u_transfer_helper_create(&transfer_vtbl,
1091 true, false,
1092 true, true);
1093 }
1094
1095 void
1096 v3d_resource_context_init(struct pipe_context *pctx)
1097 {
1098 pctx->transfer_map = u_transfer_helper_transfer_map;
1099 pctx->transfer_flush_region = u_transfer_helper_transfer_flush_region;
1100 pctx->transfer_unmap = u_transfer_helper_transfer_unmap;
1101 pctx->buffer_subdata = u_default_buffer_subdata;
1102 pctx->texture_subdata = v3d_texture_subdata;
1103 pctx->create_surface = v3d_create_surface;
1104 pctx->surface_destroy = v3d_surface_destroy;
1105 pctx->resource_copy_region = util_resource_copy_region;
1106 pctx->blit = v3d_blit;
1107 pctx->generate_mipmap = v3d_generate_mipmap;
1108 pctx->flush_resource = v3d_flush_resource;
1109 }