v3d: Add VIR dumping of TMU config p0/p1.
[mesa.git] / src / gallium / drivers / v3d / v3d_screen.c
1 /*
2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include "util/os_misc.h"
26 #include "pipe/p_defines.h"
27 #include "pipe/p_screen.h"
28 #include "pipe/p_state.h"
29
30 #include "util/u_debug.h"
31 #include "util/u_memory.h"
32 #include "util/u_format.h"
33 #include "util/u_hash_table.h"
34 #include "util/u_screen.h"
35 #include "util/ralloc.h"
36
37 #include <xf86drm.h>
38 #include "v3d_screen.h"
39 #include "v3d_context.h"
40 #include "v3d_resource.h"
41 #include "compiler/v3d_compiler.h"
42
43 static const char *
44 v3d_screen_get_name(struct pipe_screen *pscreen)
45 {
46 struct v3d_screen *screen = v3d_screen(pscreen);
47
48 if (!screen->name) {
49 screen->name = ralloc_asprintf(screen,
50 "V3D %d.%d",
51 screen->devinfo.ver / 10,
52 screen->devinfo.ver % 10);
53 }
54
55 return screen->name;
56 }
57
58 static const char *
59 v3d_screen_get_vendor(struct pipe_screen *pscreen)
60 {
61 return "Broadcom";
62 }
63
64 static void
65 v3d_screen_destroy(struct pipe_screen *pscreen)
66 {
67 struct v3d_screen *screen = v3d_screen(pscreen);
68
69 util_hash_table_destroy(screen->bo_handles);
70 v3d_bufmgr_destroy(pscreen);
71 slab_destroy_parent(&screen->transfer_pool);
72
73 if (using_v3d_simulator)
74 v3d_simulator_destroy(screen);
75
76 v3d_compiler_free(screen->compiler);
77
78 close(screen->fd);
79 ralloc_free(pscreen);
80 }
81
82 static bool
83 v3d_has_feature(struct v3d_screen *screen, enum drm_v3d_param feature)
84 {
85 struct drm_v3d_get_param p = {
86 .param = feature,
87 };
88 int ret = v3d_ioctl(screen->fd, DRM_IOCTL_V3D_GET_PARAM, &p);
89
90 if (ret != 0)
91 return false;
92
93 return p.value;
94 }
95
96 static int
97 v3d_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
98 {
99 struct v3d_screen *screen = v3d_screen(pscreen);
100
101 switch (param) {
102 /* Supported features (boolean caps). */
103 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
104 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
105 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
106 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
107 case PIPE_CAP_NPOT_TEXTURES:
108 case PIPE_CAP_SHAREABLE_SHADERS:
109 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
110 case PIPE_CAP_TEXTURE_MULTISAMPLE:
111 case PIPE_CAP_TEXTURE_SWIZZLE:
112 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
113 case PIPE_CAP_START_INSTANCE:
114 case PIPE_CAP_TGSI_INSTANCEID:
115 case PIPE_CAP_SM3:
116 case PIPE_CAP_TEXTURE_QUERY_LOD:
117 case PIPE_CAP_PRIMITIVE_RESTART:
118 case PIPE_CAP_OCCLUSION_QUERY:
119 case PIPE_CAP_POINT_SPRITE:
120 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
121 case PIPE_CAP_COMPUTE:
122 case PIPE_CAP_DRAW_INDIRECT:
123 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
124 case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
125 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
126 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
127 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
128 return 1;
129
130 case PIPE_CAP_GENERATE_MIPMAP:
131 return v3d_has_feature(screen,DRM_V3D_PARAM_SUPPORTS_TFU);
132
133 case PIPE_CAP_INDEP_BLEND_ENABLE:
134 return screen->devinfo.ver >= 40;
135
136 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
137 return 256;
138
139 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
140 return 4;
141
142 case PIPE_CAP_GLSL_FEATURE_LEVEL:
143 return 400;
144
145 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
146 return 140;
147
148 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
149 return 1;
150 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
151 return 0;
152 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
153 if (screen->devinfo.ver >= 40)
154 return 0;
155 else
156 return 1;
157 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
158 if (screen->devinfo.ver >= 40)
159 return 1;
160 else
161 return 0;
162
163 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
164 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
165 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
166 return 1;
167
168 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
169 return 4;
170
171 /* Texturing. */
172 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
173 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
174 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
175 return VC5_MAX_MIP_LEVELS;
176 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
177 return 2048;
178
179 /* Render targets. */
180 case PIPE_CAP_MAX_RENDER_TARGETS:
181 return 4;
182
183 case PIPE_CAP_VENDOR_ID:
184 return 0x14E4;
185 case PIPE_CAP_ACCELERATED:
186 return 1;
187 case PIPE_CAP_VIDEO_MEMORY: {
188 uint64_t system_memory;
189
190 if (!os_get_total_physical_memory(&system_memory))
191 return 0;
192
193 return (int)(system_memory >> 20);
194 }
195 case PIPE_CAP_UMA:
196 return 1;
197
198 default:
199 return u_pipe_screen_get_param_defaults(pscreen, param);
200 }
201 }
202
203 static float
204 v3d_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
205 {
206 switch (param) {
207 case PIPE_CAPF_MAX_LINE_WIDTH:
208 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
209 return 32;
210
211 case PIPE_CAPF_MAX_POINT_WIDTH:
212 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
213 return 512.0f;
214
215 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
216 return 0.0f;
217 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
218 return 16.0f;
219
220 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
221 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
222 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
223 return 0.0f;
224 default:
225 fprintf(stderr, "unknown paramf %d\n", param);
226 return 0;
227 }
228 }
229
230 static int
231 v3d_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
232 enum pipe_shader_cap param)
233 {
234 if (shader != PIPE_SHADER_VERTEX &&
235 shader != PIPE_SHADER_FRAGMENT) {
236 return 0;
237 }
238
239 /* this is probably not totally correct.. but it's a start: */
240 switch (param) {
241 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
242 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
243 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
244 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
245 return 16384;
246
247 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
248 return UINT_MAX;
249
250 case PIPE_SHADER_CAP_MAX_INPUTS:
251 if (shader == PIPE_SHADER_FRAGMENT)
252 return VC5_MAX_FS_INPUTS / 4;
253 else
254 return VC5_MAX_ATTRIBUTES;
255 case PIPE_SHADER_CAP_MAX_OUTPUTS:
256 if (shader == PIPE_SHADER_FRAGMENT)
257 return 4;
258 else
259 return VC5_MAX_FS_INPUTS / 4;
260 case PIPE_SHADER_CAP_MAX_TEMPS:
261 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
262 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
263 return 16 * 1024 * sizeof(float);
264 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
265 return 16;
266 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
267 return 0;
268 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
269 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
270 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
271 return 0;
272 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
273 return 1;
274 case PIPE_SHADER_CAP_SUBROUTINES:
275 return 0;
276 case PIPE_SHADER_CAP_INTEGERS:
277 return 1;
278 case PIPE_SHADER_CAP_FP16:
279 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
280 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
281 case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
282 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
283 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
284 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
285 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
286 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
287 return 0;
288 case PIPE_SHADER_CAP_SCALAR_ISA:
289 return 1;
290 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
291 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
292 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
293 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
294 return VC5_MAX_TEXTURE_SAMPLERS;
295 case PIPE_SHADER_CAP_PREFERRED_IR:
296 return PIPE_SHADER_IR_NIR;
297 case PIPE_SHADER_CAP_SUPPORTED_IRS:
298 return 0;
299 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
300 return 32;
301 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
302 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
303 return 0;
304 default:
305 fprintf(stderr, "unknown shader param %d\n", param);
306 return 0;
307 }
308 return 0;
309 }
310
311 static boolean
312 v3d_screen_is_format_supported(struct pipe_screen *pscreen,
313 enum pipe_format format,
314 enum pipe_texture_target target,
315 unsigned sample_count,
316 unsigned storage_sample_count,
317 unsigned usage)
318 {
319 struct v3d_screen *screen = v3d_screen(pscreen);
320
321 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
322 return false;
323
324 if (sample_count > 1 && sample_count != VC5_MAX_SAMPLES)
325 return FALSE;
326
327 if (target >= PIPE_MAX_TEXTURE_TYPES) {
328 return FALSE;
329 }
330
331 if (usage & PIPE_BIND_VERTEX_BUFFER) {
332 switch (format) {
333 case PIPE_FORMAT_R32G32B32A32_FLOAT:
334 case PIPE_FORMAT_R32G32B32_FLOAT:
335 case PIPE_FORMAT_R32G32_FLOAT:
336 case PIPE_FORMAT_R32_FLOAT:
337 case PIPE_FORMAT_R32G32B32A32_SNORM:
338 case PIPE_FORMAT_R32G32B32_SNORM:
339 case PIPE_FORMAT_R32G32_SNORM:
340 case PIPE_FORMAT_R32_SNORM:
341 case PIPE_FORMAT_R32G32B32A32_SSCALED:
342 case PIPE_FORMAT_R32G32B32_SSCALED:
343 case PIPE_FORMAT_R32G32_SSCALED:
344 case PIPE_FORMAT_R32_SSCALED:
345 case PIPE_FORMAT_R16G16B16A16_UNORM:
346 case PIPE_FORMAT_R16G16B16_UNORM:
347 case PIPE_FORMAT_R16G16_UNORM:
348 case PIPE_FORMAT_R16_UNORM:
349 case PIPE_FORMAT_R16G16B16A16_SNORM:
350 case PIPE_FORMAT_R16G16B16_SNORM:
351 case PIPE_FORMAT_R16G16_SNORM:
352 case PIPE_FORMAT_R16_SNORM:
353 case PIPE_FORMAT_R16G16B16A16_USCALED:
354 case PIPE_FORMAT_R16G16B16_USCALED:
355 case PIPE_FORMAT_R16G16_USCALED:
356 case PIPE_FORMAT_R16_USCALED:
357 case PIPE_FORMAT_R16G16B16A16_SSCALED:
358 case PIPE_FORMAT_R16G16B16_SSCALED:
359 case PIPE_FORMAT_R16G16_SSCALED:
360 case PIPE_FORMAT_R16_SSCALED:
361 case PIPE_FORMAT_R8G8B8A8_UNORM:
362 case PIPE_FORMAT_R8G8B8_UNORM:
363 case PIPE_FORMAT_R8G8_UNORM:
364 case PIPE_FORMAT_R8_UNORM:
365 case PIPE_FORMAT_R8G8B8A8_SNORM:
366 case PIPE_FORMAT_R8G8B8_SNORM:
367 case PIPE_FORMAT_R8G8_SNORM:
368 case PIPE_FORMAT_R8_SNORM:
369 case PIPE_FORMAT_R8G8B8A8_USCALED:
370 case PIPE_FORMAT_R8G8B8_USCALED:
371 case PIPE_FORMAT_R8G8_USCALED:
372 case PIPE_FORMAT_R8_USCALED:
373 case PIPE_FORMAT_R8G8B8A8_SSCALED:
374 case PIPE_FORMAT_R8G8B8_SSCALED:
375 case PIPE_FORMAT_R8G8_SSCALED:
376 case PIPE_FORMAT_R8_SSCALED:
377 case PIPE_FORMAT_R10G10B10A2_UNORM:
378 case PIPE_FORMAT_B10G10R10A2_UNORM:
379 case PIPE_FORMAT_R10G10B10A2_SNORM:
380 case PIPE_FORMAT_B10G10R10A2_SNORM:
381 case PIPE_FORMAT_R10G10B10A2_USCALED:
382 case PIPE_FORMAT_B10G10R10A2_USCALED:
383 case PIPE_FORMAT_R10G10B10A2_SSCALED:
384 case PIPE_FORMAT_B10G10R10A2_SSCALED:
385 break;
386 default:
387 return FALSE;
388 }
389 }
390
391 if ((usage & PIPE_BIND_RENDER_TARGET) &&
392 !v3d_rt_format_supported(&screen->devinfo, format)) {
393 return FALSE;
394 }
395
396 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
397 !v3d_tex_format_supported(&screen->devinfo, format)) {
398 return FALSE;
399 }
400
401 if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
402 !(format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
403 format == PIPE_FORMAT_X8Z24_UNORM ||
404 format == PIPE_FORMAT_Z16_UNORM ||
405 format == PIPE_FORMAT_Z32_FLOAT ||
406 format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT)) {
407 return FALSE;
408 }
409
410 if ((usage & PIPE_BIND_INDEX_BUFFER) &&
411 !(format == PIPE_FORMAT_I8_UINT ||
412 format == PIPE_FORMAT_I16_UINT ||
413 format == PIPE_FORMAT_I32_UINT)) {
414 return FALSE;
415 }
416
417 return TRUE;
418 }
419
420 #define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
421
422 static unsigned handle_hash(void *key)
423 {
424 return PTR_TO_UINT(key);
425 }
426
427 static int handle_compare(void *key1, void *key2)
428 {
429 return PTR_TO_UINT(key1) != PTR_TO_UINT(key2);
430 }
431
432 static bool
433 v3d_get_device_info(struct v3d_screen *screen)
434 {
435 struct drm_v3d_get_param ident0 = {
436 .param = DRM_V3D_PARAM_V3D_CORE0_IDENT0,
437 };
438 struct drm_v3d_get_param ident1 = {
439 .param = DRM_V3D_PARAM_V3D_CORE0_IDENT1,
440 };
441 int ret;
442
443 ret = v3d_ioctl(screen->fd, DRM_IOCTL_V3D_GET_PARAM, &ident0);
444 if (ret != 0) {
445 fprintf(stderr, "Couldn't get V3D core IDENT0: %s\n",
446 strerror(errno));
447 return false;
448 }
449 ret = v3d_ioctl(screen->fd, DRM_IOCTL_V3D_GET_PARAM, &ident1);
450 if (ret != 0) {
451 fprintf(stderr, "Couldn't get V3D core IDENT1: %s\n",
452 strerror(errno));
453 return false;
454 }
455
456 uint32_t major = (ident0.value >> 24) & 0xff;
457 uint32_t minor = (ident1.value >> 0) & 0xf;
458 screen->devinfo.ver = major * 10 + minor;
459
460 screen->devinfo.vpm_size = (ident1.value >> 28 & 0xf) * 8192;
461
462 switch (screen->devinfo.ver) {
463 case 33:
464 case 41:
465 case 42:
466 break;
467 default:
468 fprintf(stderr,
469 "V3D %d.%d not supported by this version of Mesa.\n",
470 screen->devinfo.ver / 10,
471 screen->devinfo.ver % 10);
472 return false;
473 }
474
475 return true;
476 }
477
478 static const void *
479 v3d_screen_get_compiler_options(struct pipe_screen *pscreen,
480 enum pipe_shader_ir ir, unsigned shader)
481 {
482 return &v3d_nir_options;
483 }
484
485 struct pipe_screen *
486 v3d_screen_create(int fd, struct renderonly *ro)
487 {
488 struct v3d_screen *screen = rzalloc(NULL, struct v3d_screen);
489 struct pipe_screen *pscreen;
490
491 pscreen = &screen->base;
492
493 pscreen->destroy = v3d_screen_destroy;
494 pscreen->get_param = v3d_screen_get_param;
495 pscreen->get_paramf = v3d_screen_get_paramf;
496 pscreen->get_shader_param = v3d_screen_get_shader_param;
497 pscreen->context_create = v3d_context_create;
498 pscreen->is_format_supported = v3d_screen_is_format_supported;
499
500 screen->fd = fd;
501 if (ro) {
502 screen->ro = renderonly_dup(ro);
503 if (!screen->ro) {
504 fprintf(stderr, "Failed to dup renderonly object\n");
505 ralloc_free(screen);
506 return NULL;
507 }
508 }
509 list_inithead(&screen->bo_cache.time_list);
510 (void)mtx_init(&screen->bo_handles_mutex, mtx_plain);
511 screen->bo_handles = util_hash_table_create(handle_hash, handle_compare);
512
513 #if defined(USE_V3D_SIMULATOR)
514 v3d_simulator_init(screen);
515 #endif
516
517 if (!v3d_get_device_info(screen))
518 goto fail;
519
520 slab_create_parent(&screen->transfer_pool, sizeof(struct v3d_transfer), 16);
521
522 v3d_fence_init(screen);
523
524 v3d_process_debug_variable();
525
526 v3d_resource_screen_init(pscreen);
527
528 screen->compiler = v3d_compiler_init(&screen->devinfo);
529
530 pscreen->get_name = v3d_screen_get_name;
531 pscreen->get_vendor = v3d_screen_get_vendor;
532 pscreen->get_device_vendor = v3d_screen_get_vendor;
533 pscreen->get_compiler_options = v3d_screen_get_compiler_options;
534
535 return pscreen;
536
537 fail:
538 close(fd);
539 ralloc_free(pscreen);
540 return NULL;
541 }