projects / mesa.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
v3d: Fix BO stats accounting for imported buffers.
[mesa.git] / src / gallium / drivers / v3d / v3dx_state.c
1 /*
2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include "pipe/p_state.h"
26 #include "util/u_format.h"
27 #include "util/u_framebuffer.h"
28 #include "util/u_inlines.h"
29 #include "util/u_math.h"
30 #include "util/u_memory.h"
31 #include "util/u_half.h"
32 #include "util/u_helpers.h"
33 #include "util/u_upload_mgr.h"
34
35 #include "v3d_context.h"
36 #include "v3d_tiling.h"
37 #include "broadcom/common/v3d_macros.h"
38 #include "broadcom/compiler/v3d_compiler.h"
39 #include "broadcom/cle/v3dx_pack.h"
40
41 static void
42 v3d_generic_cso_state_delete(struct pipe_context *pctx, void *hwcso)
43 {
44 free(hwcso);
45 }
46
47 static void
48 v3d_set_blend_color(struct pipe_context *pctx,
49 const struct pipe_blend_color *blend_color)
50 {
51 struct v3d_context *v3d = v3d_context(pctx);
52 v3d->blend_color.f = *blend_color;
53 for (int i = 0; i < 4; i++) {
54 v3d->blend_color.hf[i] =
55 util_float_to_half(blend_color->color[i]);
56 }
57 v3d->dirty |= VC5_DIRTY_BLEND_COLOR;
58 }
59
60 static void
61 v3d_set_stencil_ref(struct pipe_context *pctx,
62 const struct pipe_stencil_ref *stencil_ref)
63 {
64 struct v3d_context *v3d = v3d_context(pctx);
65 v3d->stencil_ref = *stencil_ref;
66 v3d->dirty |= VC5_DIRTY_STENCIL_REF;
67 }
68
69 static void
70 v3d_set_clip_state(struct pipe_context *pctx,
71 const struct pipe_clip_state *clip)
72 {
73 struct v3d_context *v3d = v3d_context(pctx);
74 v3d->clip = *clip;
75 v3d->dirty |= VC5_DIRTY_CLIP;
76 }
77
78 static void
79 v3d_set_sample_mask(struct pipe_context *pctx, unsigned sample_mask)
80 {
81 struct v3d_context *v3d = v3d_context(pctx);
82 v3d->sample_mask = sample_mask & ((1 << V3D_MAX_SAMPLES) - 1);
83 v3d->dirty |= VC5_DIRTY_SAMPLE_STATE;
84 }
85
86 static void *
87 v3d_create_rasterizer_state(struct pipe_context *pctx,
88 const struct pipe_rasterizer_state *cso)
89 {
90 struct v3d_rasterizer_state *so;
91
92 so = CALLOC_STRUCT(v3d_rasterizer_state);
93 if (!so)
94 return NULL;
95
96 so->base = *cso;
97
98 /* Workaround: HW-2726 PTB does not handle zero-size points (BCM2835,
99 * BCM21553).
100 */
101 so->point_size = MAX2(cso->point_size, .125f);
102
103 STATIC_ASSERT(sizeof(so->depth_offset) >=
104 cl_packet_length(DEPTH_OFFSET));
105 v3dx_pack(&so->depth_offset, DEPTH_OFFSET, depth) {
106 depth.depth_offset_factor = cso->offset_scale;
107 depth.depth_offset_units = cso->offset_units;
108 }
109
110 /* The HW treats polygon offset units based on a Z24 buffer, so we
111 * need to scale up offset_units if we're only Z16.
112 */
113 v3dx_pack(&so->depth_offset_z16, DEPTH_OFFSET, depth) {
114 depth.depth_offset_factor = cso->offset_scale;
115 depth.depth_offset_units = cso->offset_units * 256.0;
116 }
117
118 return so;
119 }
120
121 /* Blend state is baked into shaders. */
122 static void *
123 v3d_create_blend_state(struct pipe_context *pctx,
124 const struct pipe_blend_state *cso)
125 {
126 struct v3d_blend_state *so;
127
128 so = CALLOC_STRUCT(v3d_blend_state);
129 if (!so)
130 return NULL;
131
132 so->base = *cso;
133
134 if (cso->independent_blend_enable) {
135 for (int i = 0; i < V3D_MAX_DRAW_BUFFERS; i++) {
136 so->blend_enables |= cso->rt[i].blend_enable << i;
137
138 /* V3D 4.x is when we got independent blend enables. */
139 assert(V3D_VERSION >= 40 ||
140 cso->rt[i].blend_enable == cso->rt[0].blend_enable);
141 }
142 } else {
143 if (cso->rt[0].blend_enable)
144 so->blend_enables = (1 << V3D_MAX_DRAW_BUFFERS) - 1;
145 }
146
147 return so;
148 }
149
150 static uint32_t
151 translate_stencil_op(enum pipe_stencil_op op)
152 {
153 switch (op) {
154 case PIPE_STENCIL_OP_KEEP: return V3D_STENCIL_OP_KEEP;
155 case PIPE_STENCIL_OP_ZERO: return V3D_STENCIL_OP_ZERO;
156 case PIPE_STENCIL_OP_REPLACE: return V3D_STENCIL_OP_REPLACE;
157 case PIPE_STENCIL_OP_INCR: return V3D_STENCIL_OP_INCR;
158 case PIPE_STENCIL_OP_DECR: return V3D_STENCIL_OP_DECR;
159 case PIPE_STENCIL_OP_INCR_WRAP: return V3D_STENCIL_OP_INCWRAP;
160 case PIPE_STENCIL_OP_DECR_WRAP: return V3D_STENCIL_OP_DECWRAP;
161 case PIPE_STENCIL_OP_INVERT: return V3D_STENCIL_OP_INVERT;
162 }
163 unreachable("bad stencil op");
164 }
165
166 static void *
167 v3d_create_depth_stencil_alpha_state(struct pipe_context *pctx,
168 const struct pipe_depth_stencil_alpha_state *cso)
169 {
170 struct v3d_depth_stencil_alpha_state *so;
171
172 so = CALLOC_STRUCT(v3d_depth_stencil_alpha_state);
173 if (!so)
174 return NULL;
175
176 so->base = *cso;
177
178 if (cso->depth.enabled) {
179 switch (cso->depth.func) {
180 case PIPE_FUNC_LESS:
181 case PIPE_FUNC_LEQUAL:
182 so->ez_state = VC5_EZ_LT_LE;
183 break;
184 case PIPE_FUNC_GREATER:
185 case PIPE_FUNC_GEQUAL:
186 so->ez_state = VC5_EZ_GT_GE;
187 break;
188 case PIPE_FUNC_NEVER:
189 case PIPE_FUNC_EQUAL:
190 so->ez_state = VC5_EZ_UNDECIDED;
191 break;
192 default:
193 so->ez_state = VC5_EZ_DISABLED;
194 break;
195 }
196
197 /* If stencil is enabled and it's not a no-op, then it would
198 * break EZ updates.
199 */
200 if (cso->stencil[0].enabled &&
201 (cso->stencil[0].zfail_op != PIPE_STENCIL_OP_KEEP ||
202 cso->stencil[0].func != PIPE_FUNC_ALWAYS ||
203 (cso->stencil[1].enabled &&
204 (cso->stencil[1].zfail_op != PIPE_STENCIL_OP_KEEP &&
205 cso->stencil[1].func != PIPE_FUNC_ALWAYS)))) {
206 so->ez_state = VC5_EZ_DISABLED;
207 }
208 }
209
210 const struct pipe_stencil_state *front = &cso->stencil[0];
211 const struct pipe_stencil_state *back = &cso->stencil[1];
212
213 if (front->enabled) {
214 STATIC_ASSERT(sizeof(so->stencil_front) >=
215 cl_packet_length(STENCIL_CFG));
216 v3dx_pack(&so->stencil_front, STENCIL_CFG, config) {
217 config.front_config = true;
218 /* If !back->enabled, then the front values should be
219 * used for both front and back-facing primitives.
220 */
221 config.back_config = !back->enabled;
222
223 config.stencil_write_mask = front->writemask;
224 config.stencil_test_mask = front->valuemask;
225
226 config.stencil_test_function = front->func;
227 config.stencil_pass_op =
228 translate_stencil_op(front->zpass_op);
229 config.depth_test_fail_op =
230 translate_stencil_op(front->zfail_op);
231 config.stencil_test_fail_op =
232 translate_stencil_op(front->fail_op);
233 }
234 }
235 if (back->enabled) {
236 STATIC_ASSERT(sizeof(so->stencil_back) >=
237 cl_packet_length(STENCIL_CFG));
238 v3dx_pack(&so->stencil_back, STENCIL_CFG, config) {
239 config.front_config = false;
240 config.back_config = true;
241
242 config.stencil_write_mask = back->writemask;
243 config.stencil_test_mask = back->valuemask;
244
245 config.stencil_test_function = back->func;
246 config.stencil_pass_op =
247 translate_stencil_op(back->zpass_op);
248 config.depth_test_fail_op =
249 translate_stencil_op(back->zfail_op);
250 config.stencil_test_fail_op =
251 translate_stencil_op(back->fail_op);
252 }
253 }
254
255 return so;
256 }
257
258 static void
259 v3d_set_polygon_stipple(struct pipe_context *pctx,
260 const struct pipe_poly_stipple *stipple)
261 {
262 struct v3d_context *v3d = v3d_context(pctx);
263 v3d->stipple = *stipple;
264 v3d->dirty |= VC5_DIRTY_STIPPLE;
265 }
266
267 static void
268 v3d_set_scissor_states(struct pipe_context *pctx,
269 unsigned start_slot,
270 unsigned num_scissors,
271 const struct pipe_scissor_state *scissor)
272 {
273 struct v3d_context *v3d = v3d_context(pctx);
274
275 v3d->scissor = *scissor;
276 v3d->dirty |= VC5_DIRTY_SCISSOR;
277 }
278
279 static void
280 v3d_set_viewport_states(struct pipe_context *pctx,
281 unsigned start_slot,
282 unsigned num_viewports,
283 const struct pipe_viewport_state *viewport)
284 {
285 struct v3d_context *v3d = v3d_context(pctx);
286 v3d->viewport = *viewport;
287 v3d->dirty |= VC5_DIRTY_VIEWPORT;
288 }
289
290 static void
291 v3d_set_vertex_buffers(struct pipe_context *pctx,
292 unsigned start_slot, unsigned count,
293 const struct pipe_vertex_buffer *vb)
294 {
295 struct v3d_context *v3d = v3d_context(pctx);
296 struct v3d_vertexbuf_stateobj *so = &v3d->vertexbuf;
297
298 util_set_vertex_buffers_mask(so->vb, &so->enabled_mask, vb,
299 start_slot, count);
300 so->count = util_last_bit(so->enabled_mask);
301
302 v3d->dirty |= VC5_DIRTY_VTXBUF;
303 }
304
305 static void
306 v3d_blend_state_bind(struct pipe_context *pctx, void *hwcso)
307 {
308 struct v3d_context *v3d = v3d_context(pctx);
309 v3d->blend = hwcso;
310 v3d->dirty |= VC5_DIRTY_BLEND;
311 }
312
313 static void
314 v3d_rasterizer_state_bind(struct pipe_context *pctx, void *hwcso)
315 {
316 struct v3d_context *v3d = v3d_context(pctx);
317 v3d->rasterizer = hwcso;
318 v3d->dirty |= VC5_DIRTY_RASTERIZER;
319 }
320
321 static void
322 v3d_zsa_state_bind(struct pipe_context *pctx, void *hwcso)
323 {
324 struct v3d_context *v3d = v3d_context(pctx);
325 v3d->zsa = hwcso;
326 v3d->dirty |= VC5_DIRTY_ZSA;
327 }
328
329 static void *
330 v3d_vertex_state_create(struct pipe_context *pctx, unsigned num_elements,
331 const struct pipe_vertex_element *elements)
332 {
333 struct v3d_context *v3d = v3d_context(pctx);
334 struct v3d_vertex_stateobj *so = CALLOC_STRUCT(v3d_vertex_stateobj);
335
336 if (!so)
337 return NULL;
338
339 memcpy(so->pipe, elements, sizeof(*elements) * num_elements);
340 so->num_elements = num_elements;
341
342 for (int i = 0; i < so->num_elements; i++) {
343 const struct pipe_vertex_element *elem = &elements[i];
344 const struct util_format_description *desc =
345 util_format_description(elem->src_format);
346 uint32_t r_size = desc->channel[0].size;
347
348 const uint32_t size =
349 cl_packet_length(GL_SHADER_STATE_ATTRIBUTE_RECORD);
350
351 v3dx_pack(&so->attrs[i * size],
352 GL_SHADER_STATE_ATTRIBUTE_RECORD, attr) {
353 /* vec_size == 0 means 4 */
354 attr.vec_size = desc->nr_channels & 3;
355 attr.signed_int_type = (desc->channel[0].type ==
356 UTIL_FORMAT_TYPE_SIGNED);
357
358 attr.normalized_int_type = desc->channel[0].normalized;
359 attr.read_as_int_uint = desc->channel[0].pure_integer;
360 attr.instance_divisor = MIN2(elem->instance_divisor,
361 0xffff);
362
363 switch (desc->channel[0].type) {
364 case UTIL_FORMAT_TYPE_FLOAT:
365 if (r_size == 32) {
366 attr.type = ATTRIBUTE_FLOAT;
367 } else {
368 assert(r_size == 16);
369 attr.type = ATTRIBUTE_HALF_FLOAT;
370 }
371 break;
372
373 case UTIL_FORMAT_TYPE_SIGNED:
374 case UTIL_FORMAT_TYPE_UNSIGNED:
375 switch (r_size) {
376 case 32:
377 attr.type = ATTRIBUTE_INT;
378 break;
379 case 16:
380 attr.type = ATTRIBUTE_SHORT;
381 break;
382 case 10:
383 attr.type = ATTRIBUTE_INT2_10_10_10;
384 break;
385 case 8:
386 attr.type = ATTRIBUTE_BYTE;
387 break;
388 default:
389 fprintf(stderr,
390 "format %s unsupported\n",
391 desc->name);
392 attr.type = ATTRIBUTE_BYTE;
393 abort();
394 }
395 break;
396
397 default:
398 fprintf(stderr,
399 "format %s unsupported\n",
400 desc->name);
401 abort();
402 }
403 }
404 }
405
406 /* Set up the default attribute values in case any of the vertex
407 * elements use them.
408 */
409 uint32_t *attrs;
410 u_upload_alloc(v3d->state_uploader, 0,
411 V3D_MAX_VS_INPUTS * sizeof(float), 16,
412 &so->defaults_offset, &so->defaults, (void **)&attrs);
413
414 for (int i = 0; i < V3D_MAX_VS_INPUTS / 4; i++) {
415 attrs[i * 4 + 0] = 0;
416 attrs[i * 4 + 1] = 0;
417 attrs[i * 4 + 2] = 0;
418 if (i < so->num_elements &&
419 util_format_is_pure_integer(so->pipe[i].src_format)) {
420 attrs[i * 4 + 3] = 1;
421 } else {
422 attrs[i * 4 + 3] = fui(1.0);
423 }
424 }
425
426 u_upload_unmap(v3d->state_uploader);
427 return so;
428 }
429
430 static void
431 v3d_vertex_state_delete(struct pipe_context *pctx, void *hwcso)
432 {
433 struct v3d_vertex_stateobj *so = hwcso;
434
435 pipe_resource_reference(&so->defaults, NULL);
436 free(so);
437 }
438
439 static void
440 v3d_vertex_state_bind(struct pipe_context *pctx, void *hwcso)
441 {
442 struct v3d_context *v3d = v3d_context(pctx);
443 v3d->vtx = hwcso;
444 v3d->dirty |= VC5_DIRTY_VTXSTATE;
445 }
446
447 static void
448 v3d_set_constant_buffer(struct pipe_context *pctx, uint shader, uint index,
449 const struct pipe_constant_buffer *cb)
450 {
451 struct v3d_context *v3d = v3d_context(pctx);
452 struct v3d_constbuf_stateobj *so = &v3d->constbuf[shader];
453
454 util_copy_constant_buffer(&so->cb[index], cb);
455
456 /* Note that the state tracker can unbind constant buffers by
457 * passing NULL here.
458 */
459 if (unlikely(!cb)) {
460 so->enabled_mask &= ~(1 << index);
461 so->dirty_mask &= ~(1 << index);
462 return;
463 }
464
465 so->enabled_mask |= 1 << index;
466 so->dirty_mask |= 1 << index;
467 v3d->dirty |= VC5_DIRTY_CONSTBUF;
468 }
469
470 static void
471 v3d_set_framebuffer_state(struct pipe_context *pctx,
472 const struct pipe_framebuffer_state *framebuffer)
473 {
474 struct v3d_context *v3d = v3d_context(pctx);
475 struct pipe_framebuffer_state *cso = &v3d->framebuffer;
476
477 v3d->job = NULL;
478
479 util_copy_framebuffer_state(cso, framebuffer);
480
481 v3d->swap_color_rb = 0;
482 v3d->blend_dst_alpha_one = 0;
483 for (int i = 0; i < v3d->framebuffer.nr_cbufs; i++) {
484 struct pipe_surface *cbuf = v3d->framebuffer.cbufs[i];
485 if (!cbuf)
486 continue;
487 struct v3d_surface *v3d_cbuf = v3d_surface(cbuf);
488
489 const struct util_format_description *desc =
490 util_format_description(cbuf->format);
491
492 /* For BGRA8 formats (DRI window system default format), we
493 * need to swap R and B, since the HW's format is RGBA8. On
494 * V3D 4.1+, the RCL can swap R and B on load/store.
495 */
496 if (v3d->screen->devinfo.ver < 41 && v3d_cbuf->swap_rb)
497 v3d->swap_color_rb |= 1 << i;
498
499 if (desc->swizzle[3] == PIPE_SWIZZLE_1)
500 v3d->blend_dst_alpha_one |= 1 << i;
501 }
502
503 v3d->dirty |= VC5_DIRTY_FRAMEBUFFER;
504 }
505
506 static uint32_t translate_wrap(uint32_t pipe_wrap, bool using_nearest)
507 {
508 switch (pipe_wrap) {
509 case PIPE_TEX_WRAP_REPEAT:
510 return 0;
511 case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
512 return 1;
513 case PIPE_TEX_WRAP_MIRROR_REPEAT:
514 return 2;
515 case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
516 return 3;
517 case PIPE_TEX_WRAP_CLAMP:
518 return (using_nearest ? 1 : 3);
519 default:
520 unreachable("Unknown wrap mode");
521 }
522 }
523
524
525 static void *
526 v3d_create_sampler_state(struct pipe_context *pctx,
527 const struct pipe_sampler_state *cso)
528 {
529 MAYBE_UNUSED struct v3d_context *v3d = v3d_context(pctx);
530 struct v3d_sampler_state *so = CALLOC_STRUCT(v3d_sampler_state);
531
532 if (!so)
533 return NULL;
534
535 memcpy(so, cso, sizeof(*cso));
536
537 bool either_nearest =
538 (cso->mag_img_filter == PIPE_TEX_MIPFILTER_NEAREST ||
539 cso->min_img_filter == PIPE_TEX_MIPFILTER_NEAREST);
540
541 #if V3D_VERSION >= 40
542 so->bo = v3d_bo_alloc(v3d->screen, cl_packet_length(SAMPLER_STATE),
543 "sampler");
544 void *map = v3d_bo_map(so->bo);
545
546 v3dx_pack(map, SAMPLER_STATE, sampler) {
547 sampler.wrap_i_border = false;
548
549 sampler.wrap_s = translate_wrap(cso->wrap_s, either_nearest);
550 sampler.wrap_t = translate_wrap(cso->wrap_t, either_nearest);
551 sampler.wrap_r = translate_wrap(cso->wrap_r, either_nearest);
552
553 sampler.fixed_bias = cso->lod_bias;
554 sampler.depth_compare_function = cso->compare_func;
555
556 sampler.min_filter_nearest =
557 cso->min_img_filter == PIPE_TEX_FILTER_NEAREST;
558 sampler.mag_filter_nearest =
559 cso->mag_img_filter == PIPE_TEX_FILTER_NEAREST;
560 sampler.mip_filter_nearest =
561 cso->min_mip_filter != PIPE_TEX_MIPFILTER_LINEAR;
562
563 sampler.min_level_of_detail = MIN2(MAX2(0, cso->min_lod),
564 15);
565 sampler.max_level_of_detail = MIN2(cso->max_lod, 15);
566
567 /* If we're not doing inter-miplevel filtering, we need to
568 * clamp the LOD so that we only sample from baselevel.
569 * However, we need to still allow the calculated LOD to be
570 * fractionally over the baselevel, so that the HW can decide
571 * between the min and mag filters.
572 */
573 if (cso->min_mip_filter == PIPE_TEX_MIPFILTER_NONE) {
574 sampler.min_level_of_detail =
575 MIN2(sampler.min_level_of_detail, 1.0 / 256.0);
576 sampler.max_level_of_detail =
577 MIN2(sampler.max_level_of_detail, 1.0 / 256.0);
578 }
579
580 if (cso->max_anisotropy) {
581 sampler.anisotropy_enable = true;
582
583 if (cso->max_anisotropy > 8)
584 sampler.maximum_anisotropy = 3;
585 else if (cso->max_anisotropy > 4)
586 sampler.maximum_anisotropy = 2;
587 else if (cso->max_anisotropy > 2)
588 sampler.maximum_anisotropy = 1;
589 }
590
591 sampler.border_color_mode = V3D_BORDER_COLOR_FOLLOWS;
592 /* XXX: The border color field is in the TMU blending format
593 * (32, f16, or i16), and we need to customize it based on
594 * that.
595 *
596 * XXX: for compat alpha formats, we need the alpha field to
597 * be in the red channel.
598 */
599 sampler.border_color_red =
600 util_float_to_half(cso->border_color.f[0]);
601 sampler.border_color_green =
602 util_float_to_half(cso->border_color.f[1]);
603 sampler.border_color_blue =
604 util_float_to_half(cso->border_color.f[2]);
605 sampler.border_color_alpha =
606 util_float_to_half(cso->border_color.f[3]);
607 }
608
609 #else /* V3D_VERSION < 40 */
610 v3dx_pack(&so->p0, TEXTURE_UNIFORM_PARAMETER_0_CFG_MODE1, p0) {
611 p0.s_wrap_mode = translate_wrap(cso->wrap_s, either_nearest);
612 p0.t_wrap_mode = translate_wrap(cso->wrap_t, either_nearest);
613 p0.r_wrap_mode = translate_wrap(cso->wrap_r, either_nearest);
614 }
615
616 v3dx_pack(&so->texture_shader_state, TEXTURE_SHADER_STATE, tex) {
617 tex.depth_compare_function = cso->compare_func;
618 tex.fixed_bias = cso->lod_bias;
619 }
620 #endif /* V3D_VERSION < 40 */
621 return so;
622 }
623
624 static void
625 v3d_sampler_states_bind(struct pipe_context *pctx,
626 enum pipe_shader_type shader, unsigned start,
627 unsigned nr, void **hwcso)
628 {
629 struct v3d_context *v3d = v3d_context(pctx);
630 struct v3d_texture_stateobj *stage_tex = &v3d->tex[shader];
631
632 assert(start == 0);
633 unsigned i;
634 unsigned new_nr = 0;
635
636 for (i = 0; i < nr; i++) {
637 if (hwcso[i])
638 new_nr = i + 1;
639 stage_tex->samplers[i] = hwcso[i];
640 }
641
642 for (; i < stage_tex->num_samplers; i++) {
643 stage_tex->samplers[i] = NULL;
644 }
645
646 stage_tex->num_samplers = new_nr;
647 }
648
649 static void
650 v3d_sampler_state_delete(struct pipe_context *pctx,
651 void *hwcso)
652 {
653 struct pipe_sampler_state *psampler = hwcso;
654 struct v3d_sampler_state *sampler = v3d_sampler_state(psampler);
655
656 v3d_bo_unreference(&sampler->bo);
657 free(psampler);
658 }
659
660 #if V3D_VERSION >= 40
661 static uint32_t
662 translate_swizzle(unsigned char pipe_swizzle)
663 {
664 switch (pipe_swizzle) {
665 case PIPE_SWIZZLE_0:
666 return 0;
667 case PIPE_SWIZZLE_1:
668 return 1;
669 case PIPE_SWIZZLE_X:
670 case PIPE_SWIZZLE_Y:
671 case PIPE_SWIZZLE_Z:
672 case PIPE_SWIZZLE_W:
673 return 2 + pipe_swizzle;
674 default:
675 unreachable("unknown swizzle");
676 }
677 }
678 #endif
679
680 static void
681 v3d_setup_texture_shader_state(struct V3DX(TEXTURE_SHADER_STATE) *tex,
682 struct pipe_resource *prsc,
683 int base_level, int last_level,
684 int first_layer, int last_layer)
685 {
686 struct v3d_resource *rsc = v3d_resource(prsc);
687 int msaa_scale = prsc->nr_samples > 1 ? 2 : 1;
688
689 tex->image_width = prsc->width0 * msaa_scale;
690 tex->image_height = prsc->height0 * msaa_scale;
691
692 #if V3D_VERSION >= 40
693 /* On 4.x, the height of a 1D texture is redefined to be the
694 * upper 14 bits of the width (which is only usable with txf).
695 */
696 if (prsc->target == PIPE_TEXTURE_1D ||
697 prsc->target == PIPE_TEXTURE_1D_ARRAY) {
698 tex->image_height = tex->image_width >> 14;
699 }
700 #endif
701
702 if (prsc->target == PIPE_TEXTURE_3D) {
703 tex->image_depth = prsc->depth0;
704 } else {
705 tex->image_depth = (last_layer - first_layer) + 1;
706 }
707
708 tex->base_level = base_level;
709 #if V3D_VERSION >= 40
710 tex->max_level = last_level;
711 /* Note that we don't have a job to reference the texture's sBO
712 * at state create time, so any time this sampler view is used
713 * we need to add the texture to the job.
714 */
715 tex->texture_base_pointer =
716 cl_address(NULL,
717 rsc->bo->offset +
718 v3d_layer_offset(prsc, 0, first_layer));
719 #endif
720 tex->array_stride_64_byte_aligned = rsc->cube_map_stride / 64;
721
722 /* Since other platform devices may produce UIF images even
723 * when they're not big enough for V3D to assume they're UIF,
724 * we force images with level 0 as UIF to be always treated
725 * that way.
726 */
727 tex->level_0_is_strictly_uif =
728 (rsc->slices[0].tiling == VC5_TILING_UIF_XOR ||
729 rsc->slices[0].tiling == VC5_TILING_UIF_NO_XOR);
730 tex->level_0_xor_enable = (rsc->slices[0].tiling == VC5_TILING_UIF_XOR);
731
732 if (tex->level_0_is_strictly_uif)
733 tex->level_0_ub_pad = rsc->slices[0].ub_pad;
734
735 #if V3D_VERSION >= 40
736 if (tex->uif_xor_disable ||
737 tex->level_0_is_strictly_uif) {
738 tex->extended = true;
739 }
740 #endif /* V3D_VERSION >= 40 */
741 }
742
743 static struct pipe_sampler_view *
744 v3d_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *prsc,
745 const struct pipe_sampler_view *cso)
746 {
747 struct v3d_context *v3d = v3d_context(pctx);
748 struct v3d_screen *screen = v3d->screen;
749 struct v3d_sampler_view *so = CALLOC_STRUCT(v3d_sampler_view);
750 struct v3d_resource *rsc = v3d_resource(prsc);
751
752 if (!so)
753 return NULL;
754
755 so->base = *cso;
756
757 pipe_reference(NULL, &prsc->reference);
758
759 /* Compute the sampler view's swizzle up front. This will be plugged
760 * into either the sampler (for 16-bit returns) or the shader's
761 * texture key (for 32)
762 */
763 uint8_t view_swizzle[4] = {
764 cso->swizzle_r,
765 cso->swizzle_g,
766 cso->swizzle_b,
767 cso->swizzle_a
768 };
769 const uint8_t *fmt_swizzle =
770 v3d_get_format_swizzle(&screen->devinfo, so->base.format);
771 util_format_compose_swizzles(fmt_swizzle, view_swizzle, so->swizzle);
772
773 so->base.texture = prsc;
774 so->base.reference.count = 1;
775 so->base.context = pctx;
776
777 /* V3D still doesn't support sampling from raster textures, so we will
778 * have to copy to a temporary tiled texture.
779 */
780 if (!rsc->tiled && !(prsc->target == PIPE_TEXTURE_1D ||
781 prsc->target == PIPE_TEXTURE_1D_ARRAY)) {
782 struct v3d_resource *shadow_parent = rsc;
783 struct pipe_resource tmpl = {
784 .target = prsc->target,
785 .format = prsc->format,
786 .width0 = u_minify(prsc->width0,
787 cso->u.tex.first_level),
788 .height0 = u_minify(prsc->height0,
789 cso->u.tex.first_level),
790 .depth0 = 1,
791 .array_size = 1,
792 .bind = PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_RENDER_TARGET,
793 .last_level = cso->u.tex.last_level - cso->u.tex.first_level,
794 .nr_samples = prsc->nr_samples,
795 };
796
797 /* Create the shadow texture. The rest of the sampler view
798 * setup will use the shadow.
799 */
800 prsc = v3d_resource_create(pctx->screen, &tmpl);
801 if (!prsc) {
802 free(so);
803 return NULL;
804 }
805 rsc = v3d_resource(prsc);
806
807 /* Flag it as needing update of the contents from the parent. */
808 rsc->writes = shadow_parent->writes - 1;
809 assert(rsc->tiled);
810
811 so->texture = prsc;
812 } else {
813 pipe_resource_reference(&so->texture, prsc);
814 }
815
816 void *map;
817 #if V3D_VERSION >= 40
818 so->bo = v3d_bo_alloc(v3d->screen,
819 cl_packet_length(TEXTURE_SHADER_STATE), "sampler");
820 map = v3d_bo_map(so->bo);
821 #else /* V3D_VERSION < 40 */
822 STATIC_ASSERT(sizeof(so->texture_shader_state) >=
823 cl_packet_length(TEXTURE_SHADER_STATE));
824 map = &so->texture_shader_state;
825 #endif
826
827 v3dx_pack(map, TEXTURE_SHADER_STATE, tex) {
828 v3d_setup_texture_shader_state(&tex, prsc,
829 cso->u.tex.first_level,
830 cso->u.tex.last_level,
831 cso->u.tex.first_layer,
832 cso->u.tex.last_layer);
833
834 tex.srgb = util_format_is_srgb(cso->format);
835
836 #if V3D_VERSION >= 40
837 tex.swizzle_r = translate_swizzle(so->swizzle[0]);
838 tex.swizzle_g = translate_swizzle(so->swizzle[1]);
839 tex.swizzle_b = translate_swizzle(so->swizzle[2]);
840 tex.swizzle_a = translate_swizzle(so->swizzle[3]);
841 #endif
842
843 if (prsc->nr_samples > 1 && V3D_VERSION < 40) {
844 /* Using texture views to reinterpret formats on our
845 * MSAA textures won't work, because we don't lay out
846 * the bits in memory as it's expected -- for example,
847 * RGBA8 and RGB10_A2 are compatible in the
848 * ARB_texture_view spec, but in HW we lay them out as
849 * 32bpp RGBA8 and 64bpp RGBA16F. Just assert for now
850 * to catch failures.
851 *
852 * We explicitly allow remapping S8Z24 to RGBA8888 for
853 * v3d_blit.c's stencil blits.
854 */
855 assert((util_format_linear(cso->format) ==
856 util_format_linear(prsc->format)) ||
857 (prsc->format == PIPE_FORMAT_S8_UINT_Z24_UNORM &&
858 cso->format == PIPE_FORMAT_R8G8B8A8_UNORM));
859 uint32_t output_image_format =
860 v3d_get_rt_format(&screen->devinfo, cso->format);
861 uint32_t internal_type;
862 uint32_t internal_bpp;
863 v3d_get_internal_type_bpp_for_output_format(&screen->devinfo,
864 output_image_format,
865 &internal_type,
866 &internal_bpp);
867
868 switch (internal_type) {
869 case V3D_INTERNAL_TYPE_8:
870 tex.texture_type = TEXTURE_DATA_FORMAT_RGBA8;
871 break;
872 case V3D_INTERNAL_TYPE_16F:
873 tex.texture_type = TEXTURE_DATA_FORMAT_RGBA16F;
874 break;
875 default:
876 unreachable("Bad MSAA texture type");
877 }
878
879 /* sRGB was stored in the tile buffer as linear and
880 * would have been encoded to sRGB on resolved tile
881 * buffer store. Note that this means we would need
882 * shader code if we wanted to read an MSAA sRGB
883 * texture without sRGB decode.
884 */
885 tex.srgb = false;
886 } else {
887 tex.texture_type = v3d_get_tex_format(&screen->devinfo,
888 cso->format);
889 }
890 };
891
892 return &so->base;
893 }
894
895 static void
896 v3d_sampler_view_destroy(struct pipe_context *pctx,
897 struct pipe_sampler_view *psview)
898 {
899 struct v3d_sampler_view *sview = v3d_sampler_view(psview);
900
901 v3d_bo_unreference(&sview->bo);
902 pipe_resource_reference(&psview->texture, NULL);
903 pipe_resource_reference(&sview->texture, NULL);
904 free(psview);
905 }
906
907 static void
908 v3d_set_sampler_views(struct pipe_context *pctx,
909 enum pipe_shader_type shader,
910 unsigned start, unsigned nr,
911 struct pipe_sampler_view **views)
912 {
913 struct v3d_context *v3d = v3d_context(pctx);
914 struct v3d_texture_stateobj *stage_tex = &v3d->tex[shader];
915 unsigned i;
916 unsigned new_nr = 0;
917
918 assert(start == 0);
919
920 for (i = 0; i < nr; i++) {
921 if (views[i])
922 new_nr = i + 1;
923 pipe_sampler_view_reference(&stage_tex->textures[i], views[i]);
924 }
925
926 for (; i < stage_tex->num_textures; i++) {
927 pipe_sampler_view_reference(&stage_tex->textures[i], NULL);
928 }
929
930 stage_tex->num_textures = new_nr;
931 }
932
933 static struct pipe_stream_output_target *
934 v3d_create_stream_output_target(struct pipe_context *pctx,
935 struct pipe_resource *prsc,
936 unsigned buffer_offset,
937 unsigned buffer_size)
938 {
939 struct pipe_stream_output_target *target;
940
941 target = CALLOC_STRUCT(pipe_stream_output_target);
942 if (!target)
943 return NULL;
944
945 pipe_reference_init(&target->reference, 1);
946 pipe_resource_reference(&target->buffer, prsc);
947
948 target->context = pctx;
949 target->buffer_offset = buffer_offset;
950 target->buffer_size = buffer_size;
951
952 return target;
953 }
954
955 static void
956 v3d_stream_output_target_destroy(struct pipe_context *pctx,
957 struct pipe_stream_output_target *target)
958 {
959 pipe_resource_reference(&target->buffer, NULL);
960 free(target);
961 }
962
963 static void
964 v3d_set_stream_output_targets(struct pipe_context *pctx,
965 unsigned num_targets,
966 struct pipe_stream_output_target **targets,
967 const unsigned *offsets)
968 {
969 struct v3d_context *ctx = v3d_context(pctx);
970 struct v3d_streamout_stateobj *so = &ctx->streamout;
971 unsigned i;
972
973 assert(num_targets <= ARRAY_SIZE(so->targets));
974
975 for (i = 0; i < num_targets; i++) {
976 if (offsets[i] != -1)
977 so->offsets[i] = offsets[i];
978
979 pipe_so_target_reference(&so->targets[i], targets[i]);
980 }
981
982 for (; i < so->num_targets; i++)
983 pipe_so_target_reference(&so->targets[i], NULL);
984
985 so->num_targets = num_targets;
986
987 ctx->dirty |= VC5_DIRTY_STREAMOUT;
988 }
989
990 static void
991 v3d_set_shader_buffers(struct pipe_context *pctx,
992 enum pipe_shader_type shader,
993 unsigned start, unsigned count,
994 const struct pipe_shader_buffer *buffers)
995 {
996 struct v3d_context *v3d = v3d_context(pctx);
997 struct v3d_ssbo_stateobj *so = &v3d->ssbo[shader];
998 unsigned mask = 0;
999
1000 if (buffers) {
1001 for (unsigned i = 0; i < count; i++) {
1002 unsigned n = i + start;
1003 struct pipe_shader_buffer *buf = &so->sb[n];
1004
1005 if ((buf->buffer == buffers[i].buffer) &&
1006 (buf->buffer_offset == buffers[i].buffer_offset) &&
1007 (buf->buffer_size == buffers[i].buffer_size))
1008 continue;
1009
1010 mask |= 1 << n;
1011
1012 buf->buffer_offset = buffers[i].buffer_offset;
1013 buf->buffer_size = buffers[i].buffer_size;
1014 pipe_resource_reference(&buf->buffer, buffers[i].buffer);
1015
1016 if (buf->buffer)
1017 so->enabled_mask |= 1 << n;
1018 else
1019 so->enabled_mask &= ~(1 << n);
1020 }
1021 } else {
1022 mask = ((1 << count) - 1) << start;
1023
1024 for (unsigned i = 0; i < count; i++) {
1025 unsigned n = i + start;
1026 struct pipe_shader_buffer *buf = &so->sb[n];
1027
1028 pipe_resource_reference(&buf->buffer, NULL);
1029 }
1030
1031 so->enabled_mask &= ~mask;
1032 }
1033
1034 v3d->dirty |= VC5_DIRTY_SSBO;
1035 }
1036
1037 static void
1038 v3d_create_image_view_texture_shader_state(struct v3d_context *v3d,
1039 struct v3d_shaderimg_stateobj *so,
1040 int img)
1041 {
1042 #if V3D_VERSION >= 40
1043 struct v3d_image_view *iview = &so->si[img];
1044
1045 void *map;
1046 u_upload_alloc(v3d->uploader, 0, cl_packet_length(TEXTURE_SHADER_STATE),
1047 32,
1048 &iview->tex_state_offset,
1049 &iview->tex_state,
1050 &map);
1051
1052 struct pipe_resource *prsc = iview->base.resource;
1053
1054 v3dx_pack(map, TEXTURE_SHADER_STATE, tex) {
1055 v3d_setup_texture_shader_state(&tex, prsc,
1056 iview->base.u.tex.level,
1057 iview->base.u.tex.level,
1058 iview->base.u.tex.first_layer,
1059 iview->base.u.tex.last_layer);
1060
1061 tex.swizzle_r = translate_swizzle(PIPE_SWIZZLE_X);
1062 tex.swizzle_g = translate_swizzle(PIPE_SWIZZLE_Y);
1063 tex.swizzle_b = translate_swizzle(PIPE_SWIZZLE_Z);
1064 tex.swizzle_a = translate_swizzle(PIPE_SWIZZLE_W);
1065
1066 tex.texture_type = v3d_get_tex_format(&v3d->screen->devinfo,
1067 iview->base.format);
1068 };
1069 #else /* V3D_VERSION < 40 */
1070 /* V3D 3.x doesn't use support shader image load/store operations on
1071 * textures, so it would get lowered in the shader to general memory
1072 * acceses.
1073 */
1074 #endif
1075 }
1076
1077 static void
1078 v3d_set_shader_images(struct pipe_context *pctx,
1079 enum pipe_shader_type shader,
1080 unsigned start, unsigned count,
1081 const struct pipe_image_view *images)
1082 {
1083 struct v3d_context *v3d = v3d_context(pctx);
1084 struct v3d_shaderimg_stateobj *so = &v3d->shaderimg[shader];
1085
1086 if (images) {
1087 for (unsigned i = 0; i < count; i++) {
1088 unsigned n = i + start;
1089 struct v3d_image_view *iview = &so->si[n];
1090
1091 if ((iview->base.resource == images[i].resource) &&
1092 (iview->base.format == images[i].format) &&
1093 (iview->base.access == images[i].access) &&
1094 !memcmp(&iview->base.u, &images[i].u,
1095 sizeof(iview->base.u)))
1096 continue;
1097
1098 util_copy_image_view(&iview->base, &images[i]);
1099
1100 if (iview->base.resource) {
1101 so->enabled_mask |= 1 << n;
1102 v3d_create_image_view_texture_shader_state(v3d,
1103 so,
1104 n);
1105 } else {
1106 so->enabled_mask &= ~(1 << n);
1107 pipe_resource_reference(&iview->tex_state, NULL);
1108 }
1109 }
1110 } else {
1111 for (unsigned i = 0; i < count; i++) {
1112 unsigned n = i + start;
1113 struct v3d_image_view *iview = &so->si[n];
1114
1115 pipe_resource_reference(&iview->base.resource, NULL);
1116 pipe_resource_reference(&iview->tex_state, NULL);
1117 }
1118
1119 if (count == 32)
1120 so->enabled_mask = 0;
1121 else
1122 so->enabled_mask &= ~(((1 << count) - 1) << start);
1123 }
1124
1125 v3d->dirty |= VC5_DIRTY_SHADER_IMAGE;
1126 }
1127
1128 void
1129 v3dX(state_init)(struct pipe_context *pctx)
1130 {
1131 pctx->set_blend_color = v3d_set_blend_color;
1132 pctx->set_stencil_ref = v3d_set_stencil_ref;
1133 pctx->set_clip_state = v3d_set_clip_state;
1134 pctx->set_sample_mask = v3d_set_sample_mask;
1135 pctx->set_constant_buffer = v3d_set_constant_buffer;
1136 pctx->set_framebuffer_state = v3d_set_framebuffer_state;
1137 pctx->set_polygon_stipple = v3d_set_polygon_stipple;
1138 pctx->set_scissor_states = v3d_set_scissor_states;
1139 pctx->set_viewport_states = v3d_set_viewport_states;
1140
1141 pctx->set_vertex_buffers = v3d_set_vertex_buffers;
1142
1143 pctx->create_blend_state = v3d_create_blend_state;
1144 pctx->bind_blend_state = v3d_blend_state_bind;
1145 pctx->delete_blend_state = v3d_generic_cso_state_delete;
1146
1147 pctx->create_rasterizer_state = v3d_create_rasterizer_state;
1148 pctx->bind_rasterizer_state = v3d_rasterizer_state_bind;
1149 pctx->delete_rasterizer_state = v3d_generic_cso_state_delete;
1150
1151 pctx->create_depth_stencil_alpha_state = v3d_create_depth_stencil_alpha_state;
1152 pctx->bind_depth_stencil_alpha_state = v3d_zsa_state_bind;
1153 pctx->delete_depth_stencil_alpha_state = v3d_generic_cso_state_delete;
1154
1155 pctx->create_vertex_elements_state = v3d_vertex_state_create;
1156 pctx->delete_vertex_elements_state = v3d_vertex_state_delete;
1157 pctx->bind_vertex_elements_state = v3d_vertex_state_bind;
1158
1159 pctx->create_sampler_state = v3d_create_sampler_state;
1160 pctx->delete_sampler_state = v3d_sampler_state_delete;
1161 pctx->bind_sampler_states = v3d_sampler_states_bind;
1162
1163 pctx->create_sampler_view = v3d_create_sampler_view;
1164 pctx->sampler_view_destroy = v3d_sampler_view_destroy;
1165 pctx->set_sampler_views = v3d_set_sampler_views;
1166
1167 pctx->set_shader_buffers = v3d_set_shader_buffers;
1168 pctx->set_shader_images = v3d_set_shader_images;
1169
1170 pctx->create_stream_output_target = v3d_create_stream_output_target;
1171 pctx->stream_output_target_destroy = v3d_stream_output_target_destroy;
1172 pctx->set_stream_output_targets = v3d_set_stream_output_targets;
1173 }