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v3d: Move the sampler state to the long-lived state uploader.
[mesa.git] / src / gallium / drivers / v3d / v3dx_state.c
1 /*
2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include "pipe/p_state.h"
26 #include "util/u_format.h"
27 #include "util/u_framebuffer.h"
28 #include "util/u_inlines.h"
29 #include "util/u_math.h"
30 #include "util/u_memory.h"
31 #include "util/u_half.h"
32 #include "util/u_helpers.h"
33 #include "util/u_upload_mgr.h"
34
35 #include "v3d_context.h"
36 #include "v3d_tiling.h"
37 #include "broadcom/common/v3d_macros.h"
38 #include "broadcom/compiler/v3d_compiler.h"
39 #include "broadcom/cle/v3dx_pack.h"
40
41 static void
42 v3d_generic_cso_state_delete(struct pipe_context *pctx, void *hwcso)
43 {
44 free(hwcso);
45 }
46
47 static void
48 v3d_set_blend_color(struct pipe_context *pctx,
49 const struct pipe_blend_color *blend_color)
50 {
51 struct v3d_context *v3d = v3d_context(pctx);
52 v3d->blend_color.f = *blend_color;
53 for (int i = 0; i < 4; i++) {
54 v3d->blend_color.hf[i] =
55 util_float_to_half(blend_color->color[i]);
56 }
57 v3d->dirty |= VC5_DIRTY_BLEND_COLOR;
58 }
59
60 static void
61 v3d_set_stencil_ref(struct pipe_context *pctx,
62 const struct pipe_stencil_ref *stencil_ref)
63 {
64 struct v3d_context *v3d = v3d_context(pctx);
65 v3d->stencil_ref = *stencil_ref;
66 v3d->dirty |= VC5_DIRTY_STENCIL_REF;
67 }
68
69 static void
70 v3d_set_clip_state(struct pipe_context *pctx,
71 const struct pipe_clip_state *clip)
72 {
73 struct v3d_context *v3d = v3d_context(pctx);
74 v3d->clip = *clip;
75 v3d->dirty |= VC5_DIRTY_CLIP;
76 }
77
78 static void
79 v3d_set_sample_mask(struct pipe_context *pctx, unsigned sample_mask)
80 {
81 struct v3d_context *v3d = v3d_context(pctx);
82 v3d->sample_mask = sample_mask & ((1 << V3D_MAX_SAMPLES) - 1);
83 v3d->dirty |= VC5_DIRTY_SAMPLE_STATE;
84 }
85
86 static void *
87 v3d_create_rasterizer_state(struct pipe_context *pctx,
88 const struct pipe_rasterizer_state *cso)
89 {
90 struct v3d_rasterizer_state *so;
91
92 so = CALLOC_STRUCT(v3d_rasterizer_state);
93 if (!so)
94 return NULL;
95
96 so->base = *cso;
97
98 /* Workaround: HW-2726 PTB does not handle zero-size points (BCM2835,
99 * BCM21553).
100 */
101 so->point_size = MAX2(cso->point_size, .125f);
102
103 STATIC_ASSERT(sizeof(so->depth_offset) >=
104 cl_packet_length(DEPTH_OFFSET));
105 v3dx_pack(&so->depth_offset, DEPTH_OFFSET, depth) {
106 depth.depth_offset_factor = cso->offset_scale;
107 depth.depth_offset_units = cso->offset_units;
108 }
109
110 /* The HW treats polygon offset units based on a Z24 buffer, so we
111 * need to scale up offset_units if we're only Z16.
112 */
113 v3dx_pack(&so->depth_offset_z16, DEPTH_OFFSET, depth) {
114 depth.depth_offset_factor = cso->offset_scale;
115 depth.depth_offset_units = cso->offset_units * 256.0;
116 }
117
118 return so;
119 }
120
121 /* Blend state is baked into shaders. */
122 static void *
123 v3d_create_blend_state(struct pipe_context *pctx,
124 const struct pipe_blend_state *cso)
125 {
126 struct v3d_blend_state *so;
127
128 so = CALLOC_STRUCT(v3d_blend_state);
129 if (!so)
130 return NULL;
131
132 so->base = *cso;
133
134 if (cso->independent_blend_enable) {
135 for (int i = 0; i < V3D_MAX_DRAW_BUFFERS; i++) {
136 so->blend_enables |= cso->rt[i].blend_enable << i;
137
138 /* V3D 4.x is when we got independent blend enables. */
139 assert(V3D_VERSION >= 40 ||
140 cso->rt[i].blend_enable == cso->rt[0].blend_enable);
141 }
142 } else {
143 if (cso->rt[0].blend_enable)
144 so->blend_enables = (1 << V3D_MAX_DRAW_BUFFERS) - 1;
145 }
146
147 return so;
148 }
149
150 static uint32_t
151 translate_stencil_op(enum pipe_stencil_op op)
152 {
153 switch (op) {
154 case PIPE_STENCIL_OP_KEEP: return V3D_STENCIL_OP_KEEP;
155 case PIPE_STENCIL_OP_ZERO: return V3D_STENCIL_OP_ZERO;
156 case PIPE_STENCIL_OP_REPLACE: return V3D_STENCIL_OP_REPLACE;
157 case PIPE_STENCIL_OP_INCR: return V3D_STENCIL_OP_INCR;
158 case PIPE_STENCIL_OP_DECR: return V3D_STENCIL_OP_DECR;
159 case PIPE_STENCIL_OP_INCR_WRAP: return V3D_STENCIL_OP_INCWRAP;
160 case PIPE_STENCIL_OP_DECR_WRAP: return V3D_STENCIL_OP_DECWRAP;
161 case PIPE_STENCIL_OP_INVERT: return V3D_STENCIL_OP_INVERT;
162 }
163 unreachable("bad stencil op");
164 }
165
166 static void *
167 v3d_create_depth_stencil_alpha_state(struct pipe_context *pctx,
168 const struct pipe_depth_stencil_alpha_state *cso)
169 {
170 struct v3d_depth_stencil_alpha_state *so;
171
172 so = CALLOC_STRUCT(v3d_depth_stencil_alpha_state);
173 if (!so)
174 return NULL;
175
176 so->base = *cso;
177
178 if (cso->depth.enabled) {
179 switch (cso->depth.func) {
180 case PIPE_FUNC_LESS:
181 case PIPE_FUNC_LEQUAL:
182 so->ez_state = VC5_EZ_LT_LE;
183 break;
184 case PIPE_FUNC_GREATER:
185 case PIPE_FUNC_GEQUAL:
186 so->ez_state = VC5_EZ_GT_GE;
187 break;
188 case PIPE_FUNC_NEVER:
189 case PIPE_FUNC_EQUAL:
190 so->ez_state = VC5_EZ_UNDECIDED;
191 break;
192 default:
193 so->ez_state = VC5_EZ_DISABLED;
194 break;
195 }
196
197 /* If stencil is enabled and it's not a no-op, then it would
198 * break EZ updates.
199 */
200 if (cso->stencil[0].enabled &&
201 (cso->stencil[0].zfail_op != PIPE_STENCIL_OP_KEEP ||
202 cso->stencil[0].func != PIPE_FUNC_ALWAYS ||
203 (cso->stencil[1].enabled &&
204 (cso->stencil[1].zfail_op != PIPE_STENCIL_OP_KEEP &&
205 cso->stencil[1].func != PIPE_FUNC_ALWAYS)))) {
206 so->ez_state = VC5_EZ_DISABLED;
207 }
208 }
209
210 const struct pipe_stencil_state *front = &cso->stencil[0];
211 const struct pipe_stencil_state *back = &cso->stencil[1];
212
213 if (front->enabled) {
214 STATIC_ASSERT(sizeof(so->stencil_front) >=
215 cl_packet_length(STENCIL_CFG));
216 v3dx_pack(&so->stencil_front, STENCIL_CFG, config) {
217 config.front_config = true;
218 /* If !back->enabled, then the front values should be
219 * used for both front and back-facing primitives.
220 */
221 config.back_config = !back->enabled;
222
223 config.stencil_write_mask = front->writemask;
224 config.stencil_test_mask = front->valuemask;
225
226 config.stencil_test_function = front->func;
227 config.stencil_pass_op =
228 translate_stencil_op(front->zpass_op);
229 config.depth_test_fail_op =
230 translate_stencil_op(front->zfail_op);
231 config.stencil_test_fail_op =
232 translate_stencil_op(front->fail_op);
233 }
234 }
235 if (back->enabled) {
236 STATIC_ASSERT(sizeof(so->stencil_back) >=
237 cl_packet_length(STENCIL_CFG));
238 v3dx_pack(&so->stencil_back, STENCIL_CFG, config) {
239 config.front_config = false;
240 config.back_config = true;
241
242 config.stencil_write_mask = back->writemask;
243 config.stencil_test_mask = back->valuemask;
244
245 config.stencil_test_function = back->func;
246 config.stencil_pass_op =
247 translate_stencil_op(back->zpass_op);
248 config.depth_test_fail_op =
249 translate_stencil_op(back->zfail_op);
250 config.stencil_test_fail_op =
251 translate_stencil_op(back->fail_op);
252 }
253 }
254
255 return so;
256 }
257
258 static void
259 v3d_set_polygon_stipple(struct pipe_context *pctx,
260 const struct pipe_poly_stipple *stipple)
261 {
262 struct v3d_context *v3d = v3d_context(pctx);
263 v3d->stipple = *stipple;
264 v3d->dirty |= VC5_DIRTY_STIPPLE;
265 }
266
267 static void
268 v3d_set_scissor_states(struct pipe_context *pctx,
269 unsigned start_slot,
270 unsigned num_scissors,
271 const struct pipe_scissor_state *scissor)
272 {
273 struct v3d_context *v3d = v3d_context(pctx);
274
275 v3d->scissor = *scissor;
276 v3d->dirty |= VC5_DIRTY_SCISSOR;
277 }
278
279 static void
280 v3d_set_viewport_states(struct pipe_context *pctx,
281 unsigned start_slot,
282 unsigned num_viewports,
283 const struct pipe_viewport_state *viewport)
284 {
285 struct v3d_context *v3d = v3d_context(pctx);
286 v3d->viewport = *viewport;
287 v3d->dirty |= VC5_DIRTY_VIEWPORT;
288 }
289
290 static void
291 v3d_set_vertex_buffers(struct pipe_context *pctx,
292 unsigned start_slot, unsigned count,
293 const struct pipe_vertex_buffer *vb)
294 {
295 struct v3d_context *v3d = v3d_context(pctx);
296 struct v3d_vertexbuf_stateobj *so = &v3d->vertexbuf;
297
298 util_set_vertex_buffers_mask(so->vb, &so->enabled_mask, vb,
299 start_slot, count);
300 so->count = util_last_bit(so->enabled_mask);
301
302 v3d->dirty |= VC5_DIRTY_VTXBUF;
303 }
304
305 static void
306 v3d_blend_state_bind(struct pipe_context *pctx, void *hwcso)
307 {
308 struct v3d_context *v3d = v3d_context(pctx);
309 v3d->blend = hwcso;
310 v3d->dirty |= VC5_DIRTY_BLEND;
311 }
312
313 static void
314 v3d_rasterizer_state_bind(struct pipe_context *pctx, void *hwcso)
315 {
316 struct v3d_context *v3d = v3d_context(pctx);
317 v3d->rasterizer = hwcso;
318 v3d->dirty |= VC5_DIRTY_RASTERIZER;
319 }
320
321 static void
322 v3d_zsa_state_bind(struct pipe_context *pctx, void *hwcso)
323 {
324 struct v3d_context *v3d = v3d_context(pctx);
325 v3d->zsa = hwcso;
326 v3d->dirty |= VC5_DIRTY_ZSA;
327 }
328
329 static void *
330 v3d_vertex_state_create(struct pipe_context *pctx, unsigned num_elements,
331 const struct pipe_vertex_element *elements)
332 {
333 struct v3d_context *v3d = v3d_context(pctx);
334 struct v3d_vertex_stateobj *so = CALLOC_STRUCT(v3d_vertex_stateobj);
335
336 if (!so)
337 return NULL;
338
339 memcpy(so->pipe, elements, sizeof(*elements) * num_elements);
340 so->num_elements = num_elements;
341
342 for (int i = 0; i < so->num_elements; i++) {
343 const struct pipe_vertex_element *elem = &elements[i];
344 const struct util_format_description *desc =
345 util_format_description(elem->src_format);
346 uint32_t r_size = desc->channel[0].size;
347
348 const uint32_t size =
349 cl_packet_length(GL_SHADER_STATE_ATTRIBUTE_RECORD);
350
351 v3dx_pack(&so->attrs[i * size],
352 GL_SHADER_STATE_ATTRIBUTE_RECORD, attr) {
353 /* vec_size == 0 means 4 */
354 attr.vec_size = desc->nr_channels & 3;
355 attr.signed_int_type = (desc->channel[0].type ==
356 UTIL_FORMAT_TYPE_SIGNED);
357
358 attr.normalized_int_type = desc->channel[0].normalized;
359 attr.read_as_int_uint = desc->channel[0].pure_integer;
360 attr.instance_divisor = MIN2(elem->instance_divisor,
361 0xffff);
362
363 switch (desc->channel[0].type) {
364 case UTIL_FORMAT_TYPE_FLOAT:
365 if (r_size == 32) {
366 attr.type = ATTRIBUTE_FLOAT;
367 } else {
368 assert(r_size == 16);
369 attr.type = ATTRIBUTE_HALF_FLOAT;
370 }
371 break;
372
373 case UTIL_FORMAT_TYPE_SIGNED:
374 case UTIL_FORMAT_TYPE_UNSIGNED:
375 switch (r_size) {
376 case 32:
377 attr.type = ATTRIBUTE_INT;
378 break;
379 case 16:
380 attr.type = ATTRIBUTE_SHORT;
381 break;
382 case 10:
383 attr.type = ATTRIBUTE_INT2_10_10_10;
384 break;
385 case 8:
386 attr.type = ATTRIBUTE_BYTE;
387 break;
388 default:
389 fprintf(stderr,
390 "format %s unsupported\n",
391 desc->name);
392 attr.type = ATTRIBUTE_BYTE;
393 abort();
394 }
395 break;
396
397 default:
398 fprintf(stderr,
399 "format %s unsupported\n",
400 desc->name);
401 abort();
402 }
403 }
404 }
405
406 /* Set up the default attribute values in case any of the vertex
407 * elements use them.
408 */
409 uint32_t *attrs;
410 u_upload_alloc(v3d->state_uploader, 0,
411 V3D_MAX_VS_INPUTS * sizeof(float), 16,
412 &so->defaults_offset, &so->defaults, (void **)&attrs);
413
414 for (int i = 0; i < V3D_MAX_VS_INPUTS / 4; i++) {
415 attrs[i * 4 + 0] = 0;
416 attrs[i * 4 + 1] = 0;
417 attrs[i * 4 + 2] = 0;
418 if (i < so->num_elements &&
419 util_format_is_pure_integer(so->pipe[i].src_format)) {
420 attrs[i * 4 + 3] = 1;
421 } else {
422 attrs[i * 4 + 3] = fui(1.0);
423 }
424 }
425
426 u_upload_unmap(v3d->state_uploader);
427 return so;
428 }
429
430 static void
431 v3d_vertex_state_delete(struct pipe_context *pctx, void *hwcso)
432 {
433 struct v3d_vertex_stateobj *so = hwcso;
434
435 pipe_resource_reference(&so->defaults, NULL);
436 free(so);
437 }
438
439 static void
440 v3d_vertex_state_bind(struct pipe_context *pctx, void *hwcso)
441 {
442 struct v3d_context *v3d = v3d_context(pctx);
443 v3d->vtx = hwcso;
444 v3d->dirty |= VC5_DIRTY_VTXSTATE;
445 }
446
447 static void
448 v3d_set_constant_buffer(struct pipe_context *pctx, uint shader, uint index,
449 const struct pipe_constant_buffer *cb)
450 {
451 struct v3d_context *v3d = v3d_context(pctx);
452 struct v3d_constbuf_stateobj *so = &v3d->constbuf[shader];
453
454 util_copy_constant_buffer(&so->cb[index], cb);
455
456 /* Note that the state tracker can unbind constant buffers by
457 * passing NULL here.
458 */
459 if (unlikely(!cb)) {
460 so->enabled_mask &= ~(1 << index);
461 so->dirty_mask &= ~(1 << index);
462 return;
463 }
464
465 so->enabled_mask |= 1 << index;
466 so->dirty_mask |= 1 << index;
467 v3d->dirty |= VC5_DIRTY_CONSTBUF;
468 }
469
470 static void
471 v3d_set_framebuffer_state(struct pipe_context *pctx,
472 const struct pipe_framebuffer_state *framebuffer)
473 {
474 struct v3d_context *v3d = v3d_context(pctx);
475 struct pipe_framebuffer_state *cso = &v3d->framebuffer;
476
477 v3d->job = NULL;
478
479 util_copy_framebuffer_state(cso, framebuffer);
480
481 v3d->swap_color_rb = 0;
482 v3d->blend_dst_alpha_one = 0;
483 for (int i = 0; i < v3d->framebuffer.nr_cbufs; i++) {
484 struct pipe_surface *cbuf = v3d->framebuffer.cbufs[i];
485 if (!cbuf)
486 continue;
487 struct v3d_surface *v3d_cbuf = v3d_surface(cbuf);
488
489 const struct util_format_description *desc =
490 util_format_description(cbuf->format);
491
492 /* For BGRA8 formats (DRI window system default format), we
493 * need to swap R and B, since the HW's format is RGBA8. On
494 * V3D 4.1+, the RCL can swap R and B on load/store.
495 */
496 if (v3d->screen->devinfo.ver < 41 && v3d_cbuf->swap_rb)
497 v3d->swap_color_rb |= 1 << i;
498
499 if (desc->swizzle[3] == PIPE_SWIZZLE_1)
500 v3d->blend_dst_alpha_one |= 1 << i;
501 }
502
503 v3d->dirty |= VC5_DIRTY_FRAMEBUFFER;
504 }
505
506 static enum V3DX(Wrap_Mode)
507 translate_wrap(uint32_t pipe_wrap, bool using_nearest)
508 {
509 switch (pipe_wrap) {
510 case PIPE_TEX_WRAP_REPEAT:
511 return V3D_WRAP_MODE_REPEAT;
512 case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
513 return V3D_WRAP_MODE_CLAMP;
514 case PIPE_TEX_WRAP_MIRROR_REPEAT:
515 return V3D_WRAP_MODE_MIRROR;
516 case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
517 return V3D_WRAP_MODE_BORDER;
518 case PIPE_TEX_WRAP_CLAMP:
519 return (using_nearest ?
520 V3D_WRAP_MODE_CLAMP :
521 V3D_WRAP_MODE_BORDER);
522 default:
523 unreachable("Unknown wrap mode");
524 }
525 }
526
527
528 static void *
529 v3d_create_sampler_state(struct pipe_context *pctx,
530 const struct pipe_sampler_state *cso)
531 {
532 MAYBE_UNUSED struct v3d_context *v3d = v3d_context(pctx);
533 struct v3d_sampler_state *so = CALLOC_STRUCT(v3d_sampler_state);
534
535 if (!so)
536 return NULL;
537
538 memcpy(so, cso, sizeof(*cso));
539
540 bool either_nearest =
541 (cso->mag_img_filter == PIPE_TEX_MIPFILTER_NEAREST ||
542 cso->min_img_filter == PIPE_TEX_MIPFILTER_NEAREST);
543
544 #if V3D_VERSION >= 40
545 void *map;
546 u_upload_alloc(v3d->state_uploader, 0,
547 cl_packet_length(SAMPLER_STATE),
548 32, /* XXX: 8 for unextended samplers. */
549 &so->sampler_state_offset,
550 &so->sampler_state,
551 &map);
552
553 v3dx_pack(map, SAMPLER_STATE, sampler) {
554 sampler.wrap_i_border = false;
555
556 sampler.wrap_s = translate_wrap(cso->wrap_s, either_nearest);
557 sampler.wrap_t = translate_wrap(cso->wrap_t, either_nearest);
558 sampler.wrap_r = translate_wrap(cso->wrap_r, either_nearest);
559
560 sampler.fixed_bias = cso->lod_bias;
561 sampler.depth_compare_function = cso->compare_func;
562
563 sampler.min_filter_nearest =
564 cso->min_img_filter == PIPE_TEX_FILTER_NEAREST;
565 sampler.mag_filter_nearest =
566 cso->mag_img_filter == PIPE_TEX_FILTER_NEAREST;
567 sampler.mip_filter_nearest =
568 cso->min_mip_filter != PIPE_TEX_MIPFILTER_LINEAR;
569
570 sampler.min_level_of_detail = MIN2(MAX2(0, cso->min_lod),
571 15);
572 sampler.max_level_of_detail = MIN2(cso->max_lod, 15);
573
574 /* If we're not doing inter-miplevel filtering, we need to
575 * clamp the LOD so that we only sample from baselevel.
576 * However, we need to still allow the calculated LOD to be
577 * fractionally over the baselevel, so that the HW can decide
578 * between the min and mag filters.
579 */
580 if (cso->min_mip_filter == PIPE_TEX_MIPFILTER_NONE) {
581 sampler.min_level_of_detail =
582 MIN2(sampler.min_level_of_detail, 1.0 / 256.0);
583 sampler.max_level_of_detail =
584 MIN2(sampler.max_level_of_detail, 1.0 / 256.0);
585 }
586
587 if (cso->max_anisotropy) {
588 sampler.anisotropy_enable = true;
589
590 if (cso->max_anisotropy > 8)
591 sampler.maximum_anisotropy = 3;
592 else if (cso->max_anisotropy > 4)
593 sampler.maximum_anisotropy = 2;
594 else if (cso->max_anisotropy > 2)
595 sampler.maximum_anisotropy = 1;
596 }
597
598 sampler.border_color_mode = V3D_BORDER_COLOR_FOLLOWS;
599 /* XXX: The border color field is in the TMU blending format
600 * (32, f16, or i16), and we need to customize it based on
601 * that.
602 *
603 * XXX: for compat alpha formats, we need the alpha field to
604 * be in the red channel.
605 */
606 sampler.border_color_red =
607 util_float_to_half(cso->border_color.f[0]);
608 sampler.border_color_green =
609 util_float_to_half(cso->border_color.f[1]);
610 sampler.border_color_blue =
611 util_float_to_half(cso->border_color.f[2]);
612 sampler.border_color_alpha =
613 util_float_to_half(cso->border_color.f[3]);
614 }
615
616 #else /* V3D_VERSION < 40 */
617 v3dx_pack(&so->p0, TEXTURE_UNIFORM_PARAMETER_0_CFG_MODE1, p0) {
618 p0.s_wrap_mode = translate_wrap(cso->wrap_s, either_nearest);
619 p0.t_wrap_mode = translate_wrap(cso->wrap_t, either_nearest);
620 p0.r_wrap_mode = translate_wrap(cso->wrap_r, either_nearest);
621 }
622
623 v3dx_pack(&so->texture_shader_state, TEXTURE_SHADER_STATE, tex) {
624 tex.depth_compare_function = cso->compare_func;
625 tex.fixed_bias = cso->lod_bias;
626 }
627 #endif /* V3D_VERSION < 40 */
628 return so;
629 }
630
631 static void
632 v3d_sampler_states_bind(struct pipe_context *pctx,
633 enum pipe_shader_type shader, unsigned start,
634 unsigned nr, void **hwcso)
635 {
636 struct v3d_context *v3d = v3d_context(pctx);
637 struct v3d_texture_stateobj *stage_tex = &v3d->tex[shader];
638
639 assert(start == 0);
640 unsigned i;
641 unsigned new_nr = 0;
642
643 for (i = 0; i < nr; i++) {
644 if (hwcso[i])
645 new_nr = i + 1;
646 stage_tex->samplers[i] = hwcso[i];
647 }
648
649 for (; i < stage_tex->num_samplers; i++) {
650 stage_tex->samplers[i] = NULL;
651 }
652
653 stage_tex->num_samplers = new_nr;
654 }
655
656 static void
657 v3d_sampler_state_delete(struct pipe_context *pctx,
658 void *hwcso)
659 {
660 struct pipe_sampler_state *psampler = hwcso;
661 struct v3d_sampler_state *sampler = v3d_sampler_state(psampler);
662
663 pipe_resource_reference(&sampler->sampler_state, NULL);
664 free(psampler);
665 }
666
667 #if V3D_VERSION >= 40
668 static uint32_t
669 translate_swizzle(unsigned char pipe_swizzle)
670 {
671 switch (pipe_swizzle) {
672 case PIPE_SWIZZLE_0:
673 return 0;
674 case PIPE_SWIZZLE_1:
675 return 1;
676 case PIPE_SWIZZLE_X:
677 case PIPE_SWIZZLE_Y:
678 case PIPE_SWIZZLE_Z:
679 case PIPE_SWIZZLE_W:
680 return 2 + pipe_swizzle;
681 default:
682 unreachable("unknown swizzle");
683 }
684 }
685 #endif
686
687 static void
688 v3d_setup_texture_shader_state(struct V3DX(TEXTURE_SHADER_STATE) *tex,
689 struct pipe_resource *prsc,
690 int base_level, int last_level,
691 int first_layer, int last_layer)
692 {
693 struct v3d_resource *rsc = v3d_resource(prsc);
694 int msaa_scale = prsc->nr_samples > 1 ? 2 : 1;
695
696 tex->image_width = prsc->width0 * msaa_scale;
697 tex->image_height = prsc->height0 * msaa_scale;
698
699 #if V3D_VERSION >= 40
700 /* On 4.x, the height of a 1D texture is redefined to be the
701 * upper 14 bits of the width (which is only usable with txf).
702 */
703 if (prsc->target == PIPE_TEXTURE_1D ||
704 prsc->target == PIPE_TEXTURE_1D_ARRAY) {
705 tex->image_height = tex->image_width >> 14;
706 }
707 #endif
708
709 if (prsc->target == PIPE_TEXTURE_3D) {
710 tex->image_depth = prsc->depth0;
711 } else {
712 tex->image_depth = (last_layer - first_layer) + 1;
713 }
714
715 tex->base_level = base_level;
716 #if V3D_VERSION >= 40
717 tex->max_level = last_level;
718 /* Note that we don't have a job to reference the texture's sBO
719 * at state create time, so any time this sampler view is used
720 * we need to add the texture to the job.
721 */
722 tex->texture_base_pointer =
723 cl_address(NULL,
724 rsc->bo->offset +
725 v3d_layer_offset(prsc, 0, first_layer));
726 #endif
727 tex->array_stride_64_byte_aligned = rsc->cube_map_stride / 64;
728
729 /* Since other platform devices may produce UIF images even
730 * when they're not big enough for V3D to assume they're UIF,
731 * we force images with level 0 as UIF to be always treated
732 * that way.
733 */
734 tex->level_0_is_strictly_uif =
735 (rsc->slices[0].tiling == VC5_TILING_UIF_XOR ||
736 rsc->slices[0].tiling == VC5_TILING_UIF_NO_XOR);
737 tex->level_0_xor_enable = (rsc->slices[0].tiling == VC5_TILING_UIF_XOR);
738
739 if (tex->level_0_is_strictly_uif)
740 tex->level_0_ub_pad = rsc->slices[0].ub_pad;
741
742 #if V3D_VERSION >= 40
743 if (tex->uif_xor_disable ||
744 tex->level_0_is_strictly_uif) {
745 tex->extended = true;
746 }
747 #endif /* V3D_VERSION >= 40 */
748 }
749
750 static struct pipe_sampler_view *
751 v3d_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *prsc,
752 const struct pipe_sampler_view *cso)
753 {
754 struct v3d_context *v3d = v3d_context(pctx);
755 struct v3d_screen *screen = v3d->screen;
756 struct v3d_sampler_view *so = CALLOC_STRUCT(v3d_sampler_view);
757 struct v3d_resource *rsc = v3d_resource(prsc);
758
759 if (!so)
760 return NULL;
761
762 so->base = *cso;
763
764 pipe_reference(NULL, &prsc->reference);
765
766 /* Compute the sampler view's swizzle up front. This will be plugged
767 * into either the sampler (for 16-bit returns) or the shader's
768 * texture key (for 32)
769 */
770 uint8_t view_swizzle[4] = {
771 cso->swizzle_r,
772 cso->swizzle_g,
773 cso->swizzle_b,
774 cso->swizzle_a
775 };
776 const uint8_t *fmt_swizzle =
777 v3d_get_format_swizzle(&screen->devinfo, so->base.format);
778 util_format_compose_swizzles(fmt_swizzle, view_swizzle, so->swizzle);
779
780 so->base.texture = prsc;
781 so->base.reference.count = 1;
782 so->base.context = pctx;
783
784 if (rsc->separate_stencil &&
785 cso->format == PIPE_FORMAT_X32_S8X24_UINT) {
786 rsc = rsc->separate_stencil;
787 prsc = &rsc->base;
788 }
789
790 /* V3D still doesn't support sampling from raster textures, so we will
791 * have to copy to a temporary tiled texture.
792 */
793 if (!rsc->tiled && !(prsc->target == PIPE_TEXTURE_1D ||
794 prsc->target == PIPE_TEXTURE_1D_ARRAY)) {
795 struct v3d_resource *shadow_parent = rsc;
796 struct pipe_resource tmpl = {
797 .target = prsc->target,
798 .format = prsc->format,
799 .width0 = u_minify(prsc->width0,
800 cso->u.tex.first_level),
801 .height0 = u_minify(prsc->height0,
802 cso->u.tex.first_level),
803 .depth0 = 1,
804 .array_size = 1,
805 .bind = PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_RENDER_TARGET,
806 .last_level = cso->u.tex.last_level - cso->u.tex.first_level,
807 .nr_samples = prsc->nr_samples,
808 };
809
810 /* Create the shadow texture. The rest of the sampler view
811 * setup will use the shadow.
812 */
813 prsc = v3d_resource_create(pctx->screen, &tmpl);
814 if (!prsc) {
815 free(so);
816 return NULL;
817 }
818 rsc = v3d_resource(prsc);
819
820 /* Flag it as needing update of the contents from the parent. */
821 rsc->writes = shadow_parent->writes - 1;
822 assert(rsc->tiled);
823
824 so->texture = prsc;
825 } else {
826 pipe_resource_reference(&so->texture, prsc);
827 }
828
829 void *map;
830 #if V3D_VERSION >= 40
831 so->bo = v3d_bo_alloc(v3d->screen,
832 cl_packet_length(TEXTURE_SHADER_STATE), "sampler");
833 map = v3d_bo_map(so->bo);
834 #else /* V3D_VERSION < 40 */
835 STATIC_ASSERT(sizeof(so->texture_shader_state) >=
836 cl_packet_length(TEXTURE_SHADER_STATE));
837 map = &so->texture_shader_state;
838 #endif
839
840 v3dx_pack(map, TEXTURE_SHADER_STATE, tex) {
841 v3d_setup_texture_shader_state(&tex, prsc,
842 cso->u.tex.first_level,
843 cso->u.tex.last_level,
844 cso->u.tex.first_layer,
845 cso->u.tex.last_layer);
846
847 tex.srgb = util_format_is_srgb(cso->format);
848
849 #if V3D_VERSION >= 40
850 tex.swizzle_r = translate_swizzle(so->swizzle[0]);
851 tex.swizzle_g = translate_swizzle(so->swizzle[1]);
852 tex.swizzle_b = translate_swizzle(so->swizzle[2]);
853 tex.swizzle_a = translate_swizzle(so->swizzle[3]);
854 #endif
855
856 if (prsc->nr_samples > 1 && V3D_VERSION < 40) {
857 /* Using texture views to reinterpret formats on our
858 * MSAA textures won't work, because we don't lay out
859 * the bits in memory as it's expected -- for example,
860 * RGBA8 and RGB10_A2 are compatible in the
861 * ARB_texture_view spec, but in HW we lay them out as
862 * 32bpp RGBA8 and 64bpp RGBA16F. Just assert for now
863 * to catch failures.
864 *
865 * We explicitly allow remapping S8Z24 to RGBA8888 for
866 * v3d_blit.c's stencil blits.
867 */
868 assert((util_format_linear(cso->format) ==
869 util_format_linear(prsc->format)) ||
870 (prsc->format == PIPE_FORMAT_S8_UINT_Z24_UNORM &&
871 cso->format == PIPE_FORMAT_R8G8B8A8_UNORM));
872 uint32_t output_image_format =
873 v3d_get_rt_format(&screen->devinfo, cso->format);
874 uint32_t internal_type;
875 uint32_t internal_bpp;
876 v3d_get_internal_type_bpp_for_output_format(&screen->devinfo,
877 output_image_format,
878 &internal_type,
879 &internal_bpp);
880
881 switch (internal_type) {
882 case V3D_INTERNAL_TYPE_8:
883 tex.texture_type = TEXTURE_DATA_FORMAT_RGBA8;
884 break;
885 case V3D_INTERNAL_TYPE_16F:
886 tex.texture_type = TEXTURE_DATA_FORMAT_RGBA16F;
887 break;
888 default:
889 unreachable("Bad MSAA texture type");
890 }
891
892 /* sRGB was stored in the tile buffer as linear and
893 * would have been encoded to sRGB on resolved tile
894 * buffer store. Note that this means we would need
895 * shader code if we wanted to read an MSAA sRGB
896 * texture without sRGB decode.
897 */
898 tex.srgb = false;
899 } else {
900 tex.texture_type = v3d_get_tex_format(&screen->devinfo,
901 cso->format);
902 }
903 };
904
905 return &so->base;
906 }
907
908 static void
909 v3d_sampler_view_destroy(struct pipe_context *pctx,
910 struct pipe_sampler_view *psview)
911 {
912 struct v3d_sampler_view *sview = v3d_sampler_view(psview);
913
914 v3d_bo_unreference(&sview->bo);
915 pipe_resource_reference(&psview->texture, NULL);
916 pipe_resource_reference(&sview->texture, NULL);
917 free(psview);
918 }
919
920 static void
921 v3d_set_sampler_views(struct pipe_context *pctx,
922 enum pipe_shader_type shader,
923 unsigned start, unsigned nr,
924 struct pipe_sampler_view **views)
925 {
926 struct v3d_context *v3d = v3d_context(pctx);
927 struct v3d_texture_stateobj *stage_tex = &v3d->tex[shader];
928 unsigned i;
929 unsigned new_nr = 0;
930
931 assert(start == 0);
932
933 for (i = 0; i < nr; i++) {
934 if (views[i])
935 new_nr = i + 1;
936 pipe_sampler_view_reference(&stage_tex->textures[i], views[i]);
937 }
938
939 for (; i < stage_tex->num_textures; i++) {
940 pipe_sampler_view_reference(&stage_tex->textures[i], NULL);
941 }
942
943 stage_tex->num_textures = new_nr;
944 }
945
946 static struct pipe_stream_output_target *
947 v3d_create_stream_output_target(struct pipe_context *pctx,
948 struct pipe_resource *prsc,
949 unsigned buffer_offset,
950 unsigned buffer_size)
951 {
952 struct pipe_stream_output_target *target;
953
954 target = CALLOC_STRUCT(pipe_stream_output_target);
955 if (!target)
956 return NULL;
957
958 pipe_reference_init(&target->reference, 1);
959 pipe_resource_reference(&target->buffer, prsc);
960
961 target->context = pctx;
962 target->buffer_offset = buffer_offset;
963 target->buffer_size = buffer_size;
964
965 return target;
966 }
967
968 static void
969 v3d_stream_output_target_destroy(struct pipe_context *pctx,
970 struct pipe_stream_output_target *target)
971 {
972 pipe_resource_reference(&target->buffer, NULL);
973 free(target);
974 }
975
976 static void
977 v3d_set_stream_output_targets(struct pipe_context *pctx,
978 unsigned num_targets,
979 struct pipe_stream_output_target **targets,
980 const unsigned *offsets)
981 {
982 struct v3d_context *ctx = v3d_context(pctx);
983 struct v3d_streamout_stateobj *so = &ctx->streamout;
984 unsigned i;
985
986 assert(num_targets <= ARRAY_SIZE(so->targets));
987
988 for (i = 0; i < num_targets; i++) {
989 if (offsets[i] != -1)
990 so->offsets[i] = offsets[i];
991
992 pipe_so_target_reference(&so->targets[i], targets[i]);
993 }
994
995 for (; i < so->num_targets; i++)
996 pipe_so_target_reference(&so->targets[i], NULL);
997
998 so->num_targets = num_targets;
999
1000 ctx->dirty |= VC5_DIRTY_STREAMOUT;
1001 }
1002
1003 static void
1004 v3d_set_shader_buffers(struct pipe_context *pctx,
1005 enum pipe_shader_type shader,
1006 unsigned start, unsigned count,
1007 const struct pipe_shader_buffer *buffers)
1008 {
1009 struct v3d_context *v3d = v3d_context(pctx);
1010 struct v3d_ssbo_stateobj *so = &v3d->ssbo[shader];
1011 unsigned mask = 0;
1012
1013 if (buffers) {
1014 for (unsigned i = 0; i < count; i++) {
1015 unsigned n = i + start;
1016 struct pipe_shader_buffer *buf = &so->sb[n];
1017
1018 if ((buf->buffer == buffers[i].buffer) &&
1019 (buf->buffer_offset == buffers[i].buffer_offset) &&
1020 (buf->buffer_size == buffers[i].buffer_size))
1021 continue;
1022
1023 mask |= 1 << n;
1024
1025 buf->buffer_offset = buffers[i].buffer_offset;
1026 buf->buffer_size = buffers[i].buffer_size;
1027 pipe_resource_reference(&buf->buffer, buffers[i].buffer);
1028
1029 if (buf->buffer)
1030 so->enabled_mask |= 1 << n;
1031 else
1032 so->enabled_mask &= ~(1 << n);
1033 }
1034 } else {
1035 mask = ((1 << count) - 1) << start;
1036
1037 for (unsigned i = 0; i < count; i++) {
1038 unsigned n = i + start;
1039 struct pipe_shader_buffer *buf = &so->sb[n];
1040
1041 pipe_resource_reference(&buf->buffer, NULL);
1042 }
1043
1044 so->enabled_mask &= ~mask;
1045 }
1046
1047 v3d->dirty |= VC5_DIRTY_SSBO;
1048 }
1049
1050 static void
1051 v3d_create_image_view_texture_shader_state(struct v3d_context *v3d,
1052 struct v3d_shaderimg_stateobj *so,
1053 int img)
1054 {
1055 #if V3D_VERSION >= 40
1056 struct v3d_image_view *iview = &so->si[img];
1057
1058 void *map;
1059 u_upload_alloc(v3d->uploader, 0, cl_packet_length(TEXTURE_SHADER_STATE),
1060 32,
1061 &iview->tex_state_offset,
1062 &iview->tex_state,
1063 &map);
1064
1065 struct pipe_resource *prsc = iview->base.resource;
1066
1067 v3dx_pack(map, TEXTURE_SHADER_STATE, tex) {
1068 v3d_setup_texture_shader_state(&tex, prsc,
1069 iview->base.u.tex.level,
1070 iview->base.u.tex.level,
1071 iview->base.u.tex.first_layer,
1072 iview->base.u.tex.last_layer);
1073
1074 tex.swizzle_r = translate_swizzle(PIPE_SWIZZLE_X);
1075 tex.swizzle_g = translate_swizzle(PIPE_SWIZZLE_Y);
1076 tex.swizzle_b = translate_swizzle(PIPE_SWIZZLE_Z);
1077 tex.swizzle_a = translate_swizzle(PIPE_SWIZZLE_W);
1078
1079 tex.texture_type = v3d_get_tex_format(&v3d->screen->devinfo,
1080 iview->base.format);
1081 };
1082 #else /* V3D_VERSION < 40 */
1083 /* V3D 3.x doesn't use support shader image load/store operations on
1084 * textures, so it would get lowered in the shader to general memory
1085 * acceses.
1086 */
1087 #endif
1088 }
1089
1090 static void
1091 v3d_set_shader_images(struct pipe_context *pctx,
1092 enum pipe_shader_type shader,
1093 unsigned start, unsigned count,
1094 const struct pipe_image_view *images)
1095 {
1096 struct v3d_context *v3d = v3d_context(pctx);
1097 struct v3d_shaderimg_stateobj *so = &v3d->shaderimg[shader];
1098
1099 if (images) {
1100 for (unsigned i = 0; i < count; i++) {
1101 unsigned n = i + start;
1102 struct v3d_image_view *iview = &so->si[n];
1103
1104 if ((iview->base.resource == images[i].resource) &&
1105 (iview->base.format == images[i].format) &&
1106 (iview->base.access == images[i].access) &&
1107 !memcmp(&iview->base.u, &images[i].u,
1108 sizeof(iview->base.u)))
1109 continue;
1110
1111 util_copy_image_view(&iview->base, &images[i]);
1112
1113 if (iview->base.resource) {
1114 so->enabled_mask |= 1 << n;
1115 v3d_create_image_view_texture_shader_state(v3d,
1116 so,
1117 n);
1118 } else {
1119 so->enabled_mask &= ~(1 << n);
1120 pipe_resource_reference(&iview->tex_state, NULL);
1121 }
1122 }
1123 } else {
1124 for (unsigned i = 0; i < count; i++) {
1125 unsigned n = i + start;
1126 struct v3d_image_view *iview = &so->si[n];
1127
1128 pipe_resource_reference(&iview->base.resource, NULL);
1129 pipe_resource_reference(&iview->tex_state, NULL);
1130 }
1131
1132 if (count == 32)
1133 so->enabled_mask = 0;
1134 else
1135 so->enabled_mask &= ~(((1 << count) - 1) << start);
1136 }
1137
1138 v3d->dirty |= VC5_DIRTY_SHADER_IMAGE;
1139 }
1140
1141 void
1142 v3dX(state_init)(struct pipe_context *pctx)
1143 {
1144 pctx->set_blend_color = v3d_set_blend_color;
1145 pctx->set_stencil_ref = v3d_set_stencil_ref;
1146 pctx->set_clip_state = v3d_set_clip_state;
1147 pctx->set_sample_mask = v3d_set_sample_mask;
1148 pctx->set_constant_buffer = v3d_set_constant_buffer;
1149 pctx->set_framebuffer_state = v3d_set_framebuffer_state;
1150 pctx->set_polygon_stipple = v3d_set_polygon_stipple;
1151 pctx->set_scissor_states = v3d_set_scissor_states;
1152 pctx->set_viewport_states = v3d_set_viewport_states;
1153
1154 pctx->set_vertex_buffers = v3d_set_vertex_buffers;
1155
1156 pctx->create_blend_state = v3d_create_blend_state;
1157 pctx->bind_blend_state = v3d_blend_state_bind;
1158 pctx->delete_blend_state = v3d_generic_cso_state_delete;
1159
1160 pctx->create_rasterizer_state = v3d_create_rasterizer_state;
1161 pctx->bind_rasterizer_state = v3d_rasterizer_state_bind;
1162 pctx->delete_rasterizer_state = v3d_generic_cso_state_delete;
1163
1164 pctx->create_depth_stencil_alpha_state = v3d_create_depth_stencil_alpha_state;
1165 pctx->bind_depth_stencil_alpha_state = v3d_zsa_state_bind;
1166 pctx->delete_depth_stencil_alpha_state = v3d_generic_cso_state_delete;
1167
1168 pctx->create_vertex_elements_state = v3d_vertex_state_create;
1169 pctx->delete_vertex_elements_state = v3d_vertex_state_delete;
1170 pctx->bind_vertex_elements_state = v3d_vertex_state_bind;
1171
1172 pctx->create_sampler_state = v3d_create_sampler_state;
1173 pctx->delete_sampler_state = v3d_sampler_state_delete;
1174 pctx->bind_sampler_states = v3d_sampler_states_bind;
1175
1176 pctx->create_sampler_view = v3d_create_sampler_view;
1177 pctx->sampler_view_destroy = v3d_sampler_view_destroy;
1178 pctx->set_sampler_views = v3d_set_sampler_views;
1179
1180 pctx->set_shader_buffers = v3d_set_shader_buffers;
1181 pctx->set_shader_images = v3d_set_shader_images;
1182
1183 pctx->create_stream_output_target = v3d_create_stream_output_target;
1184 pctx->stream_output_target_destroy = v3d_stream_output_target_destroy;
1185 pctx->set_stream_output_targets = v3d_set_stream_output_targets;
1186 }