12a3ceff725a86926555f3a94f24cd655a15837a
[mesa.git] / src / gallium / drivers / vc4 / kernel / vc4_drv.h
1 /*
2 * Copyright © 2014 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef VC4_DRV_H
25 #define VC4_DRV_H
26
27 #include "vc4_simulator_validate.h"
28
29 enum vc4_bo_mode {
30 VC4_MODE_UNDECIDED,
31 VC4_MODE_TILE_ALLOC,
32 VC4_MODE_TSDA,
33 VC4_MODE_RENDER,
34 VC4_MODE_SHADER,
35 };
36
37 struct vc4_bo_exec_state {
38 struct drm_gem_cma_object *bo;
39 enum vc4_bo_mode mode;
40 };
41
42 struct vc4_exec_info {
43 /* Sequence number for this bin/render job. */
44 uint64_t seqno;
45
46 /* Kernel-space copy of the ioctl arguments */
47 struct drm_vc4_submit_cl *args;
48
49 /* This is the array of BOs that were looked up at the start of exec.
50 * Command validation will use indices into this array.
51 */
52 struct vc4_bo_exec_state *bo;
53 uint32_t bo_count;
54
55 /* Current unvalidated indices into @bo loaded by the non-hardware
56 * VC4_PACKET_GEM_HANDLES.
57 */
58 uint32_t bo_index[2];
59
60 /* This is the BO where we store the validated command lists, shader
61 * records, and uniforms.
62 */
63 struct drm_gem_cma_object *exec_bo;
64
65 /**
66 * This tracks the per-shader-record state (packet 64) that
67 * determines the length of the shader record and the offset
68 * it's expected to be found at. It gets read in from the
69 * command lists.
70 */
71 struct vc4_shader_state {
72 uint8_t packet;
73 uint32_t addr;
74 /* Maximum vertex index referenced by any primitive using this
75 * shader state.
76 */
77 uint32_t max_index;
78 } *shader_state;
79
80 /** How many shader states the user declared they were using. */
81 uint32_t shader_state_size;
82 /** How many shader state records the validator has seen. */
83 uint32_t shader_state_count;
84
85 bool found_tile_binning_mode_config_packet;
86 bool found_tile_rendering_mode_config_packet;
87 bool found_start_tile_binning_packet;
88 bool found_increment_semaphore_packet;
89 bool found_wait_on_semaphore_packet;
90 uint8_t bin_tiles_x, bin_tiles_y;
91 uint32_t fb_width, fb_height;
92 uint32_t tile_alloc_init_block_size;
93 struct drm_gem_cma_object *tile_alloc_bo;
94
95 /**
96 * Computed addresses pointing into exec_bo where we start the
97 * bin thread (ct0) and render thread (ct1).
98 */
99 uint32_t ct0ca, ct0ea;
100 uint32_t ct1ca, ct1ea;
101
102 /* Pointers to the shader recs. These paddr gets incremented as CL
103 * packets are relocated in validate_gl_shader_state, and the vaddrs
104 * (u and v) get incremented and size decremented as the shader recs
105 * themselves are validated.
106 */
107 void *shader_rec_u;
108 void *shader_rec_v;
109 uint32_t shader_rec_p;
110 uint32_t shader_rec_size;
111
112 /* Pointers to the uniform data. These pointers are incremented, and
113 * size decremented, as each batch of uniforms is uploaded.
114 */
115 void *uniforms_u;
116 void *uniforms_v;
117 uint32_t uniforms_p;
118 uint32_t uniforms_size;
119 };
120
121 /**
122 * struct vc4_texture_sample_info - saves the offsets into the UBO for texture
123 * setup parameters.
124 *
125 * This will be used at draw time to relocate the reference to the texture
126 * contents in p0, and validate that the offset combined with
127 * width/height/stride/etc. from p1 and p2/p3 doesn't sample outside the BO.
128 * Note that the hardware treats unprovided config parameters as 0, so not all
129 * of them need to be set up for every texure sample, and we'll store ~0 as
130 * the offset to mark the unused ones.
131 *
132 * See the VC4 3D architecture guide page 41 ("Texture and Memory Lookup Unit
133 * Setup") for definitions of the texture parameters.
134 */
135 struct vc4_texture_sample_info {
136 bool is_direct;
137 uint32_t p_offset[4];
138 };
139
140 /**
141 * struct vc4_validated_shader_info - information about validated shaders that
142 * needs to be used from command list validation.
143 *
144 * For a given shader, each time a shader state record references it, we need
145 * to verify that the shader doesn't read more uniforms than the shader state
146 * record's uniform BO pointer can provide, and we need to apply relocations
147 * and validate the shader state record's uniforms that define the texture
148 * samples.
149 */
150 struct vc4_validated_shader_info
151 {
152 uint32_t uniforms_size;
153 uint32_t uniforms_src_size;
154 uint32_t num_texture_samples;
155 struct vc4_texture_sample_info *texture_samples;
156 };
157
158 /* vc4_validate.c */
159 int
160 vc4_validate_cl(struct drm_device *dev,
161 void *validated,
162 void *unvalidated,
163 uint32_t len,
164 bool is_bin,
165 struct vc4_exec_info *exec);
166
167 int
168 vc4_validate_shader_recs(struct drm_device *dev, struct vc4_exec_info *exec);
169
170 struct vc4_validated_shader_info *
171 vc4_validate_shader(struct drm_gem_cma_object *shader_obj);
172
173 #endif /* VC4_DRV_H */