vc4: Move the mirrored kernel code to a kernel/ directory.
[mesa.git] / src / gallium / drivers / vc4 / kernel / vc4_drv.h
1 /*
2 * Copyright © 2014 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef VC4_DRV_H
25 #define VC4_DRV_H
26
27 #include "vc4_simulator_validate.h"
28
29 enum vc4_bo_mode {
30 VC4_MODE_UNDECIDED,
31 VC4_MODE_TILE_ALLOC,
32 VC4_MODE_TSDA,
33 VC4_MODE_RENDER,
34 VC4_MODE_SHADER,
35 };
36
37 struct vc4_bo_exec_state {
38 struct drm_gem_cma_object *bo;
39 enum vc4_bo_mode mode;
40 };
41
42 struct exec_info {
43 /* Kernel-space copy of the ioctl arguments */
44 struct drm_vc4_submit_cl *args;
45
46 /* This is the array of BOs that were looked up at the start of exec.
47 * Command validation will use indices into this array.
48 */
49 struct vc4_bo_exec_state *bo;
50 uint32_t bo_count;
51
52 /* Current unvalidated indices into @bo loaded by the non-hardware
53 * VC4_PACKET_GEM_HANDLES.
54 */
55 uint32_t bo_index[2];
56
57 /* This is the BO where we store the validated command lists, shader
58 * records, and uniforms.
59 */
60 struct drm_gem_cma_object *exec_bo;
61
62 /**
63 * This tracks the per-shader-record state (packet 64) that
64 * determines the length of the shader record and the offset
65 * it's expected to be found at. It gets read in from the
66 * command lists.
67 */
68 struct vc4_shader_state {
69 uint8_t packet;
70 uint32_t addr;
71 /* Maximum vertex index referenced by any primitive using this
72 * shader state.
73 */
74 uint32_t max_index;
75 } *shader_state;
76
77 /** How many shader states the user declared they were using. */
78 uint32_t shader_state_size;
79 /** How many shader state records the validator has seen. */
80 uint32_t shader_state_count;
81
82 bool found_tile_binning_mode_config_packet;
83 bool found_tile_rendering_mode_config_packet;
84 bool found_start_tile_binning_packet;
85 uint8_t bin_tiles_x, bin_tiles_y;
86 uint32_t fb_width, fb_height;
87 uint32_t tile_alloc_init_block_size;
88 struct drm_gem_cma_object *tile_alloc_bo;
89
90 /**
91 * Computed addresses pointing into exec_bo where we start the
92 * bin thread (ct0) and render thread (ct1).
93 */
94 uint32_t ct0ca, ct0ea;
95 uint32_t ct1ca, ct1ea;
96
97 /* Pointers to the shader recs. These paddr gets incremented as CL
98 * packets are relocated in validate_gl_shader_state, and the vaddrs
99 * (u and v) get incremented and size decremented as the shader recs
100 * themselves are validated.
101 */
102 void *shader_rec_u;
103 void *shader_rec_v;
104 uint32_t shader_rec_p;
105 uint32_t shader_rec_size;
106
107 /* Pointers to the uniform data. These pointers are incremented, and
108 * size decremented, as each batch of uniforms is uploaded.
109 */
110 void *uniforms_u;
111 void *uniforms_v;
112 uint32_t uniforms_p;
113 uint32_t uniforms_size;
114 };
115
116 /**
117 * struct vc4_texture_sample_info - saves the offsets into the UBO for texture
118 * setup parameters.
119 *
120 * This will be used at draw time to relocate the reference to the texture
121 * contents in p0, and validate that the offset combined with
122 * width/height/stride/etc. from p1 and p2/p3 doesn't sample outside the BO.
123 * Note that the hardware treats unprovided config parameters as 0, so not all
124 * of them need to be set up for every texure sample, and we'll store ~0 as
125 * the offset to mark the unused ones.
126 *
127 * See the VC4 3D architecture guide page 41 ("Texture and Memory Lookup Unit
128 * Setup") for definitions of the texture parameters.
129 */
130 struct vc4_texture_sample_info {
131 uint32_t p_offset[4];
132 };
133
134 /**
135 * struct vc4_validated_shader_info - information about validated shaders that
136 * needs to be used from command list validation.
137 *
138 * For a given shader, each time a shader state record references it, we need
139 * to verify that the shader doesn't read more uniforms than the shader state
140 * record's uniform BO pointer can provide, and we need to apply relocations
141 * and validate the shader state record's uniforms that define the texture
142 * samples.
143 */
144 struct vc4_validated_shader_info
145 {
146 uint32_t uniforms_size;
147 uint32_t uniforms_src_size;
148 uint32_t num_texture_samples;
149 struct vc4_texture_sample_info *texture_samples;
150 };
151
152 /* vc4_validate.c */
153 int
154 vc4_validate_cl(struct drm_device *dev,
155 void *validated,
156 void *unvalidated,
157 uint32_t len,
158 bool is_bin,
159 struct exec_info *exec);
160
161 int
162 vc4_validate_shader_recs(struct drm_device *dev, struct exec_info *exec);
163
164 struct vc4_validated_shader_info *
165 vc4_validate_shader(struct drm_gem_cma_object *shader_obj,
166 uint32_t start_offset);
167
168 #endif /* VC4_DRV_H */