src/gallium/drivers/vc4/kernel/vc4_drv.h

   1 /*
   2  * Copyright © 2014 Broadcom
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #ifndef VC4_DRV_H
  25 #define VC4_DRV_H
  26
  27 #include "vc4_simulator_validate.h"
  28
  29 enum vc4_bo_mode {
  30         VC4_MODE_UNDECIDED,
  31         VC4_MODE_RENDER,
  32         VC4_MODE_SHADER,
  33 };
  34
  35 struct vc4_bo_exec_state {
  36         struct drm_gem_cma_object *bo;
  37         enum vc4_bo_mode mode;
  38 };
  39
  40 struct vc4_exec_info {
  41         /* Sequence number for this bin/render job. */
  42         uint64_t seqno;
  43
  44         /* Kernel-space copy of the ioctl arguments */
  45         struct drm_vc4_submit_cl *args;
  46
  47         /* This is the array of BOs that were looked up at the start of exec.
  48          * Command validation will use indices into this array.
  49          */
  50         struct vc4_bo_exec_state *bo;
  51         uint32_t bo_count;
  52
  53         /* List of other BOs used in the job that need to be released
  54          * once the job is complete.
  55          */
  56         struct list_head unref_list;
  57
  58         /* Current unvalidated indices into @bo loaded by the non-hardware
  59          * VC4_PACKET_GEM_HANDLES.
  60          */
  61         uint32_t bo_index[2];
  62
  63         /* This is the BO where we store the validated command lists, shader
  64          * records, and uniforms.
  65          */
  66         struct drm_gem_cma_object *exec_bo;
  67
  68         /**
  69          * This tracks the per-shader-record state (packet 64) that
  70          * determines the length of the shader record and the offset
  71          * it's expected to be found at.  It gets read in from the
  72          * command lists.
  73          */
  74         struct vc4_shader_state {
  75                 uint32_t addr;
  76                 /* Maximum vertex index referenced by any primitive using this
  77                  * shader state.
  78                  */
  79                 uint32_t max_index;
  80         } *shader_state;
  81
  82         /** How many shader states the user declared they were using. */
  83         uint32_t shader_state_size;
  84         /** How many shader state records the validator has seen. */
  85         uint32_t shader_state_count;
  86
  87         bool found_tile_binning_mode_config_packet;
  88         bool found_start_tile_binning_packet;
  89         bool found_increment_semaphore_packet;
  90         bool found_flush;
  91         uint8_t bin_tiles_x, bin_tiles_y;
  92         struct drm_gem_cma_object *tile_bo;
  93         uint32_t tile_alloc_offset;
  94
  95         /**
  96          * Computed addresses pointing into exec_bo where we start the
  97          * bin thread (ct0) and render thread (ct1).
  98          */
  99         uint32_t ct0ca, ct0ea;
 100         uint32_t ct1ca, ct1ea;
 101
 102         /* Pointer to the unvalidated bin CL (if present). */
 103         void *bin_u;
 104
 105         /* Pointers to the shader recs.  These paddr gets incremented as CL
 106          * packets are relocated in validate_gl_shader_state, and the vaddrs
 107          * (u and v) get incremented and size decremented as the shader recs
 108          * themselves are validated.
 109          */
 110         void *shader_rec_u;
 111         void *shader_rec_v;
 112         uint32_t shader_rec_p;
 113         uint32_t shader_rec_size;
 114
 115         /* Pointers to the uniform data.  These pointers are incremented, and
 116          * size decremented, as each batch of uniforms is uploaded.
 117          */
 118         void *uniforms_u;
 119         void *uniforms_v;
 120         uint32_t uniforms_p;
 121         uint32_t uniforms_size;
 122 };
 123
 124 /**
 125  * struct vc4_texture_sample_info - saves the offsets into the UBO for texture
 126  * setup parameters.
 127  *
 128  * This will be used at draw time to relocate the reference to the texture
 129  * contents in p0, and validate that the offset combined with
 130  * width/height/stride/etc. from p1 and p2/p3 doesn't sample outside the BO.
 131  * Note that the hardware treats unprovided config parameters as 0, so not all
 132  * of them need to be set up for every texure sample, and we'll store ~0 as
 133  * the offset to mark the unused ones.
 134  *
 135  * See the VC4 3D architecture guide page 41 ("Texture and Memory Lookup Unit
 136  * Setup") for definitions of the texture parameters.
 137  */
 138 struct vc4_texture_sample_info {
 139         bool is_direct;
 140         uint32_t p_offset[4];
 141 };
 142
 143 /**
 144  * struct vc4_validated_shader_info - information about validated shaders that
 145  * needs to be used from command list validation.
 146  *
 147  * For a given shader, each time a shader state record references it, we need
 148  * to verify that the shader doesn't read more uniforms than the shader state
 149  * record's uniform BO pointer can provide, and we need to apply relocations
 150  * and validate the shader state record's uniforms that define the texture
 151  * samples.
 152  */
 153 struct vc4_validated_shader_info
 154 {
 155         uint32_t uniforms_size;
 156         uint32_t uniforms_src_size;
 157         uint32_t num_texture_samples;
 158         struct vc4_texture_sample_info *texture_samples;
 159 };
 160
 161 /* vc4_validate.c */
 162 int
 163 vc4_validate_bin_cl(struct drm_device *dev,
 164                     void *validated,
 165                     void *unvalidated,
 166                     struct vc4_exec_info *exec);
 167
 168 int
 169 vc4_validate_shader_recs(struct drm_device *dev, struct vc4_exec_info *exec);
 170
 171 struct vc4_validated_shader_info *
 172 vc4_validate_shader(struct drm_gem_cma_object *shader_obj);
 173
 174 bool vc4_use_bo(struct vc4_exec_info *exec,
 175                 uint32_t hindex,
 176                 enum vc4_bo_mode mode,
 177                 struct drm_gem_cma_object **obj);
 178
 179 int vc4_get_rcl(struct drm_device *dev, struct vc4_exec_info *exec);
 180
 181 bool vc4_check_tex_size(struct vc4_exec_info *exec,
 182                         struct drm_gem_cma_object *fbo,
 183                         uint32_t offset, uint8_t tiling_format,
 184                         uint32_t width, uint32_t height, uint8_t cpp);
 185
 186 #endif /* VC4_DRV_H */