vc4: Update to current kernel validation code.
[mesa.git] / src / gallium / drivers / vc4 / kernel / vc4_drv.h
1 /*
2 * Copyright © 2014 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef VC4_DRV_H
25 #define VC4_DRV_H
26
27 #include "vc4_simulator_validate.h"
28
29 enum vc4_bo_mode {
30 VC4_MODE_UNDECIDED,
31 VC4_MODE_TILE_ALLOC,
32 VC4_MODE_TSDA,
33 VC4_MODE_RENDER,
34 VC4_MODE_SHADER,
35 };
36
37 struct vc4_bo_exec_state {
38 struct drm_gem_cma_object *bo;
39 enum vc4_bo_mode mode;
40 };
41
42 struct vc4_exec_info {
43 /* Sequence number for this bin/render job. */
44 uint64_t seqno;
45
46 /* Kernel-space copy of the ioctl arguments */
47 struct drm_vc4_submit_cl *args;
48
49 /* This is the array of BOs that were looked up at the start of exec.
50 * Command validation will use indices into this array.
51 */
52 struct vc4_bo_exec_state *bo;
53 uint32_t bo_count;
54
55 /* Current unvalidated indices into @bo loaded by the non-hardware
56 * VC4_PACKET_GEM_HANDLES.
57 */
58 uint32_t bo_index[2];
59
60 /* This is the BO where we store the validated command lists, shader
61 * records, and uniforms.
62 */
63 struct drm_gem_cma_object *exec_bo;
64
65 /**
66 * This tracks the per-shader-record state (packet 64) that
67 * determines the length of the shader record and the offset
68 * it's expected to be found at. It gets read in from the
69 * command lists.
70 */
71 struct vc4_shader_state {
72 uint8_t packet;
73 uint32_t addr;
74 /* Maximum vertex index referenced by any primitive using this
75 * shader state.
76 */
77 uint32_t max_index;
78 } *shader_state;
79
80 /** How many shader states the user declared they were using. */
81 uint32_t shader_state_size;
82 /** How many shader state records the validator has seen. */
83 uint32_t shader_state_count;
84
85 bool found_tile_binning_mode_config_packet;
86 bool found_tile_rendering_mode_config_packet;
87 bool found_start_tile_binning_packet;
88 bool found_increment_semaphore_packet;
89 bool found_wait_on_semaphore_packet;
90 uint8_t bin_tiles_x, bin_tiles_y;
91 uint32_t fb_width, fb_height;
92 uint32_t tile_alloc_init_block_mask;
93 uint32_t tile_alloc_init_block_last;
94 struct drm_gem_cma_object *tile_alloc_bo;
95
96 /**
97 * Computed addresses pointing into exec_bo where we start the
98 * bin thread (ct0) and render thread (ct1).
99 */
100 uint32_t ct0ca, ct0ea;
101 uint32_t ct1ca, ct1ea;
102
103 /* Pointers to the shader recs. These paddr gets incremented as CL
104 * packets are relocated in validate_gl_shader_state, and the vaddrs
105 * (u and v) get incremented and size decremented as the shader recs
106 * themselves are validated.
107 */
108 void *shader_rec_u;
109 void *shader_rec_v;
110 uint32_t shader_rec_p;
111 uint32_t shader_rec_size;
112
113 /* Pointers to the uniform data. These pointers are incremented, and
114 * size decremented, as each batch of uniforms is uploaded.
115 */
116 void *uniforms_u;
117 void *uniforms_v;
118 uint32_t uniforms_p;
119 uint32_t uniforms_size;
120 };
121
122 /**
123 * struct vc4_texture_sample_info - saves the offsets into the UBO for texture
124 * setup parameters.
125 *
126 * This will be used at draw time to relocate the reference to the texture
127 * contents in p0, and validate that the offset combined with
128 * width/height/stride/etc. from p1 and p2/p3 doesn't sample outside the BO.
129 * Note that the hardware treats unprovided config parameters as 0, so not all
130 * of them need to be set up for every texure sample, and we'll store ~0 as
131 * the offset to mark the unused ones.
132 *
133 * See the VC4 3D architecture guide page 41 ("Texture and Memory Lookup Unit
134 * Setup") for definitions of the texture parameters.
135 */
136 struct vc4_texture_sample_info {
137 bool is_direct;
138 uint32_t p_offset[4];
139 };
140
141 /**
142 * struct vc4_validated_shader_info - information about validated shaders that
143 * needs to be used from command list validation.
144 *
145 * For a given shader, each time a shader state record references it, we need
146 * to verify that the shader doesn't read more uniforms than the shader state
147 * record's uniform BO pointer can provide, and we need to apply relocations
148 * and validate the shader state record's uniforms that define the texture
149 * samples.
150 */
151 struct vc4_validated_shader_info
152 {
153 uint32_t uniforms_size;
154 uint32_t uniforms_src_size;
155 uint32_t num_texture_samples;
156 struct vc4_texture_sample_info *texture_samples;
157 };
158
159 /* vc4_validate.c */
160 int
161 vc4_validate_cl(struct drm_device *dev,
162 void *validated,
163 void *unvalidated,
164 uint32_t len,
165 bool is_bin,
166 bool has_bin,
167 struct vc4_exec_info *exec);
168
169 int
170 vc4_validate_shader_recs(struct drm_device *dev, struct vc4_exec_info *exec);
171
172 struct vc4_validated_shader_info *
173 vc4_validate_shader(struct drm_gem_cma_object *shader_obj);
174
175 #endif /* VC4_DRV_H */