2 * Copyright © 2015 Broadcom
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "util/u_format.h"
25 #include "util/u_surface.h"
26 #include "util/u_blitter.h"
27 #include "vc4_context.h"
29 static struct pipe_surface
*
30 vc4_get_blit_surface(struct pipe_context
*pctx
,
31 struct pipe_resource
*prsc
, unsigned level
)
33 struct pipe_surface tmpl
;
35 memset(&tmpl
, 0, sizeof(tmpl
));
36 tmpl
.format
= prsc
->format
;
37 tmpl
.u
.tex
.level
= level
;
38 tmpl
.u
.tex
.first_layer
= 0;
39 tmpl
.u
.tex
.last_layer
= 0;
41 return pctx
->create_surface(pctx
, prsc
, &tmpl
);
45 is_tile_unaligned(unsigned size
, unsigned tile_size
)
47 return size
& (tile_size
- 1);
51 vc4_tile_blit(struct pipe_context
*pctx
, const struct pipe_blit_info
*info
)
53 struct vc4_context
*vc4
= vc4_context(pctx
);
54 bool msaa
= (info
->src
.resource
->nr_samples
> 1 ||
55 info
->dst
.resource
->nr_samples
> 1);
56 int tile_width
= msaa
? 32 : 64;
57 int tile_height
= msaa
? 32 : 64;
59 if (util_format_is_depth_or_stencil(info
->dst
.resource
->format
))
62 if (info
->scissor_enable
)
65 if ((info
->mask
& PIPE_MASK_RGBA
) == 0)
68 if (info
->dst
.box
.x
!= info
->src
.box
.x
||
69 info
->dst
.box
.y
!= info
->src
.box
.y
||
70 info
->dst
.box
.width
!= info
->src
.box
.width
||
71 info
->dst
.box
.height
!= info
->src
.box
.height
) {
75 int dst_surface_width
= u_minify(info
->dst
.resource
->width0
,
77 int dst_surface_height
= u_minify(info
->dst
.resource
->height0
,
79 if (is_tile_unaligned(info
->dst
.box
.x
, tile_width
) ||
80 is_tile_unaligned(info
->dst
.box
.y
, tile_height
) ||
81 (is_tile_unaligned(info
->dst
.box
.width
, tile_width
) &&
82 info
->dst
.box
.x
+ info
->dst
.box
.width
!= dst_surface_width
) ||
83 (is_tile_unaligned(info
->dst
.box
.height
, tile_height
) &&
84 info
->dst
.box
.y
+ info
->dst
.box
.height
!= dst_surface_height
)) {
88 /* VC4_PACKET_LOAD_TILE_BUFFER_GENERAL uses the
89 * VC4_PACKET_TILE_RENDERING_MODE_CONFIG's width (determined by our
90 * destination surface) to determine the stride. This may be wrong
91 * when reading from texture miplevels > 0, which are stored in
92 * POT-sized areas. For MSAA, the tile addresses are computed
93 * explicitly by the RCL, but still use the destination width to
94 * determine the stride (which could be fixed by explicitly supplying
97 struct vc4_resource
*rsc
= vc4_resource(info
->src
.resource
);
101 if (info
->src
.resource
->nr_samples
> 1)
102 stride
= align(dst_surface_width
, 32) * 4 * rsc
->cpp
;
103 else if (rsc
->slices
[info
->src
.level
].tiling
== VC4_TILING_FORMAT_T
)
104 stride
= align(dst_surface_width
* rsc
->cpp
, 128);
106 stride
= align(dst_surface_width
* rsc
->cpp
, 16);
108 if (stride
!= rsc
->slices
[info
->src
.level
].stride
)
111 if (info
->dst
.resource
->format
!= info
->src
.resource
->format
)
115 fprintf(stderr
, "RCL blit from %d,%d to %d,%d (%d,%d)\n",
121 info
->dst
.box
.height
);
124 struct pipe_surface
*dst_surf
=
125 vc4_get_blit_surface(pctx
, info
->dst
.resource
, info
->dst
.level
);
126 struct pipe_surface
*src_surf
=
127 vc4_get_blit_surface(pctx
, info
->src
.resource
, info
->src
.level
);
129 vc4_flush_jobs_reading_resource(vc4
, info
->src
.resource
);
131 struct vc4_job
*job
= vc4_get_job(vc4
, dst_surf
, NULL
);
132 pipe_surface_reference(&job
->color_read
, src_surf
);
134 /* If we're resolving from MSAA to single sample, we still need to run
135 * the engine in MSAA mode for the load.
137 if (!job
->msaa
&& info
->src
.resource
->nr_samples
> 1) {
139 job
->tile_width
= 32;
140 job
->tile_height
= 32;
143 job
->draw_min_x
= info
->dst
.box
.x
;
144 job
->draw_min_y
= info
->dst
.box
.y
;
145 job
->draw_max_x
= info
->dst
.box
.x
+ info
->dst
.box
.width
;
146 job
->draw_max_y
= info
->dst
.box
.y
+ info
->dst
.box
.height
;
147 job
->draw_width
= dst_surf
->width
;
148 job
->draw_height
= dst_surf
->height
;
150 job
->tile_width
= tile_width
;
151 job
->tile_height
= tile_height
;
153 job
->needs_flush
= true;
154 job
->resolve
|= PIPE_CLEAR_COLOR
;
156 vc4_job_submit(vc4
, job
);
158 pipe_surface_reference(&dst_surf
, NULL
);
159 pipe_surface_reference(&src_surf
, NULL
);
165 vc4_blitter_save(struct vc4_context
*vc4
)
167 util_blitter_save_vertex_buffer_slot(vc4
->blitter
, vc4
->vertexbuf
.vb
);
168 util_blitter_save_vertex_elements(vc4
->blitter
, vc4
->vtx
);
169 util_blitter_save_vertex_shader(vc4
->blitter
, vc4
->prog
.bind_vs
);
170 util_blitter_save_rasterizer(vc4
->blitter
, vc4
->rasterizer
);
171 util_blitter_save_viewport(vc4
->blitter
, &vc4
->viewport
);
172 util_blitter_save_scissor(vc4
->blitter
, &vc4
->scissor
);
173 util_blitter_save_fragment_shader(vc4
->blitter
, vc4
->prog
.bind_fs
);
174 util_blitter_save_blend(vc4
->blitter
, vc4
->blend
);
175 util_blitter_save_depth_stencil_alpha(vc4
->blitter
, vc4
->zsa
);
176 util_blitter_save_stencil_ref(vc4
->blitter
, &vc4
->stencil_ref
);
177 util_blitter_save_sample_mask(vc4
->blitter
, vc4
->sample_mask
);
178 util_blitter_save_framebuffer(vc4
->blitter
, &vc4
->framebuffer
);
179 util_blitter_save_fragment_sampler_states(vc4
->blitter
,
180 vc4
->fragtex
.num_samplers
,
181 (void **)vc4
->fragtex
.samplers
);
182 util_blitter_save_fragment_sampler_views(vc4
->blitter
,
183 vc4
->fragtex
.num_textures
, vc4
->fragtex
.textures
);
187 vc4_render_blit(struct pipe_context
*ctx
, struct pipe_blit_info
*info
)
189 struct vc4_context
*vc4
= vc4_context(ctx
);
191 if (!util_blitter_is_blit_supported(vc4
->blitter
, info
)) {
192 fprintf(stderr
, "blit unsupported %s -> %s\n",
193 util_format_short_name(info
->src
.resource
->format
),
194 util_format_short_name(info
->dst
.resource
->format
));
198 vc4_blitter_save(vc4
);
199 util_blitter_blit(vc4
->blitter
, info
);
204 /* Optimal hardware path for blitting pixels.
205 * Scaling, format conversion, up- and downsampling (resolve) are allowed.
208 vc4_blit(struct pipe_context
*pctx
, const struct pipe_blit_info
*blit_info
)
210 struct pipe_blit_info info
= *blit_info
;
212 if (vc4_tile_blit(pctx
, blit_info
))
215 if (util_try_blit_via_copy_region(pctx
, &info
)) {
219 if (info
.mask
& PIPE_MASK_S
) {
220 fprintf(stderr
, "cannot blit stencil, skipping\n");
221 info
.mask
&= ~PIPE_MASK_S
;
224 vc4_render_blit(pctx
, &info
);