2 * Copyright © 2014 Broadcom
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
27 #include "pipe/p_defines.h"
28 #include "util/ralloc.h"
29 #include "util/u_inlines.h"
30 #include "util/u_memory.h"
31 #include "util/u_blitter.h"
32 #include "indices/u_primconvert.h"
33 #include "pipe/p_screen.h"
35 #include "vc4_screen.h"
36 #include "vc4_context.h"
37 #include "vc4_resource.h"
40 * Emits a no-op STORE_TILE_BUFFER_GENERAL.
42 * If we emit a PACKET_TILE_COORDINATES, it must be followed by a store of
43 * some sort before another load is triggered.
46 vc4_store_before_load(struct vc4_context
*vc4
, bool *coords_emitted
)
51 cl_u8(&vc4
->rcl
, VC4_PACKET_STORE_TILE_BUFFER_GENERAL
);
52 cl_u8(&vc4
->rcl
, VC4_LOADSTORE_TILE_BUFFER_NONE
);
53 cl_u8(&vc4
->rcl
, (VC4_STORE_TILE_BUFFER_DISABLE_COLOR_CLEAR
|
54 VC4_STORE_TILE_BUFFER_DISABLE_ZS_CLEAR
|
55 VC4_STORE_TILE_BUFFER_DISABLE_VG_MASK_CLEAR
));
56 cl_u32(&vc4
->rcl
, 0); /* no address, since we're in None mode */
58 *coords_emitted
= false;
62 * Emits a PACKET_TILE_COORDINATES if one isn't already pending.
64 * The tile coordinates packet triggers a pending load if there is one, are
65 * used for clipping during rendering, and determine where loads/stores happen
66 * relative to their base address.
69 vc4_tile_coordinates(struct vc4_context
*vc4
, uint32_t x
, uint32_t y
,
75 cl_u8(&vc4
->rcl
, VC4_PACKET_TILE_COORDINATES
);
79 *coords_emitted
= true;
83 vc4_setup_rcl(struct vc4_context
*vc4
)
85 struct vc4_surface
*csurf
= vc4_surface(vc4
->framebuffer
.cbufs
[0]);
86 struct vc4_resource
*ctex
= csurf
? vc4_resource(csurf
->base
.texture
) : NULL
;
87 struct vc4_surface
*zsurf
= vc4_surface(vc4
->framebuffer
.zsbuf
);
88 struct vc4_resource
*ztex
= zsurf
? vc4_resource(zsurf
->base
.texture
) : NULL
;
91 vc4
->resolve
&= ~PIPE_CLEAR_COLOR0
;
93 vc4
->resolve
&= ~(PIPE_CLEAR_DEPTH
| PIPE_CLEAR_STENCIL
);
94 uint32_t resolve_uncleared
= vc4
->resolve
& ~vc4
->cleared
;
95 uint32_t width
= vc4
->framebuffer
.width
;
96 uint32_t height
= vc4
->framebuffer
.height
;
97 uint32_t xtiles
= align(width
, 64) / 64;
98 uint32_t ytiles
= align(height
, 64) / 64;
101 fprintf(stderr
, "RCL: resolve 0x%x clear 0x%x resolve uncleared 0x%x\n",
107 cl_u8(&vc4
->rcl
, VC4_PACKET_CLEAR_COLORS
);
108 cl_u32(&vc4
->rcl
, vc4
->clear_color
[0]);
109 cl_u32(&vc4
->rcl
, vc4
->clear_color
[1]);
110 cl_u32(&vc4
->rcl
, vc4
->clear_depth
);
111 cl_u8(&vc4
->rcl
, vc4
->clear_stencil
);
113 /* The rendering mode config determines the pointer that's used for
114 * VC4_PACKET_STORE_MS_TILE_BUFFER address computations. The kernel
115 * could handle a no-relocation rendering mode config and deny those
116 * packets, but instead we just tell the kernel we're doing our color
117 * rendering to the Z buffer, and just don't emit any of those
120 struct vc4_surface
*render_surf
= csurf
? csurf
: zsurf
;
121 struct vc4_resource
*render_tex
= vc4_resource(render_surf
->base
.texture
);
123 cl_start_reloc(&vc4
->rcl
, 1);
124 cl_u8(&vc4
->rcl
, VC4_PACKET_TILE_RENDERING_MODE_CONFIG
);
125 cl_reloc(vc4
, &vc4
->rcl
, render_tex
->bo
, render_surf
->offset
);
126 cl_u16(&vc4
->rcl
, width
);
127 cl_u16(&vc4
->rcl
, height
);
128 cl_u16(&vc4
->rcl
, ((render_surf
->tiling
<<
129 VC4_RENDER_CONFIG_MEMORY_FORMAT_SHIFT
) |
130 (vc4_rt_format_is_565(render_surf
->base
.format
) ?
131 VC4_RENDER_CONFIG_FORMAT_BGR565
:
132 VC4_RENDER_CONFIG_FORMAT_RGBA8888
) |
133 VC4_RENDER_CONFIG_EARLY_Z_COVERAGE_DISABLE
));
135 /* The tile buffer normally gets cleared when the previous tile is
136 * stored. If the clear values changed between frames, then the tile
137 * buffer has stale clear values in it, so we have to do a store in
138 * None mode (no writes) so that we trigger the tile buffer clear.
140 * Excess clearing is only a performance cost, since per-tile contents
141 * will be loaded/stored in the loop below.
143 if (vc4
->cleared
& (PIPE_CLEAR_COLOR0
|
145 PIPE_CLEAR_STENCIL
)) {
146 cl_u8(&vc4
->rcl
, VC4_PACKET_TILE_COORDINATES
);
150 cl_u8(&vc4
->rcl
, VC4_PACKET_STORE_TILE_BUFFER_GENERAL
);
151 cl_u16(&vc4
->rcl
, VC4_LOADSTORE_TILE_BUFFER_NONE
);
152 cl_u32(&vc4
->rcl
, 0); /* no address, since we're in None mode */
155 for (int y
= 0; y
< ytiles
; y
++) {
156 for (int x
= 0; x
< xtiles
; x
++) {
157 bool end_of_frame
= (x
== xtiles
- 1 &&
159 bool coords_emitted
= false;
161 /* Note that the load doesn't actually occur until the
162 * tile coords packet is processed, and only one load
163 * may be outstanding at a time.
165 if (resolve_uncleared
& PIPE_CLEAR_COLOR
) {
166 vc4_store_before_load(vc4
, &coords_emitted
);
168 cl_start_reloc(&vc4
->rcl
, 1);
169 cl_u8(&vc4
->rcl
, VC4_PACKET_LOAD_TILE_BUFFER_GENERAL
);
171 VC4_LOADSTORE_TILE_BUFFER_COLOR
|
173 VC4_LOADSTORE_TILE_BUFFER_FORMAT_SHIFT
));
175 vc4_rt_format_is_565(csurf
->base
.format
) ?
176 VC4_LOADSTORE_TILE_BUFFER_BGR565
:
177 VC4_LOADSTORE_TILE_BUFFER_RGBA8888
);
178 cl_reloc(vc4
, &vc4
->rcl
, ctex
->bo
,
181 vc4_tile_coordinates(vc4
, x
, y
, &coords_emitted
);
184 if (resolve_uncleared
& (PIPE_CLEAR_DEPTH
| PIPE_CLEAR_STENCIL
)) {
185 vc4_store_before_load(vc4
, &coords_emitted
);
187 cl_start_reloc(&vc4
->rcl
, 1);
188 cl_u8(&vc4
->rcl
, VC4_PACKET_LOAD_TILE_BUFFER_GENERAL
);
190 VC4_LOADSTORE_TILE_BUFFER_ZS
|
192 VC4_LOADSTORE_TILE_BUFFER_FORMAT_SHIFT
));
194 cl_reloc(vc4
, &vc4
->rcl
, ztex
->bo
,
197 vc4_tile_coordinates(vc4
, x
, y
, &coords_emitted
);
200 /* Clipping depends on tile coordinates having been
201 * emitted, so make sure it's happened even if
202 * everything was cleared to start.
204 vc4_tile_coordinates(vc4
, x
, y
, &coords_emitted
);
206 cl_start_reloc(&vc4
->rcl
, 1);
207 cl_u8(&vc4
->rcl
, VC4_PACKET_BRANCH_TO_SUB_LIST
);
208 cl_reloc(vc4
, &vc4
->rcl
, vc4
->tile_alloc
,
209 (y
* xtiles
+ x
) * 32);
211 if (vc4
->resolve
& (PIPE_CLEAR_DEPTH
| PIPE_CLEAR_STENCIL
)) {
212 vc4_tile_coordinates(vc4
, x
, y
, &coords_emitted
);
214 cl_start_reloc(&vc4
->rcl
, 1);
215 cl_u8(&vc4
->rcl
, VC4_PACKET_STORE_TILE_BUFFER_GENERAL
);
217 VC4_LOADSTORE_TILE_BUFFER_ZS
|
219 VC4_LOADSTORE_TILE_BUFFER_FORMAT_SHIFT
));
221 VC4_STORE_TILE_BUFFER_DISABLE_COLOR_CLEAR
);
222 cl_reloc(vc4
, &vc4
->rcl
, ztex
->bo
,
225 !(vc4
->resolve
& PIPE_CLEAR_COLOR0
)) ?
226 VC4_LOADSTORE_TILE_BUFFER_EOF
: 0));
228 coords_emitted
= false;
231 if (vc4
->resolve
& PIPE_CLEAR_COLOR0
) {
232 vc4_tile_coordinates(vc4
, x
, y
, &coords_emitted
);
235 VC4_PACKET_STORE_MS_TILE_BUFFER_AND_EOF
);
238 VC4_PACKET_STORE_MS_TILE_BUFFER
);
241 coords_emitted
= false;
244 /* One of the bits needs to have been set that would
245 * have triggered an EOF.
247 assert(vc4
->resolve
& (PIPE_CLEAR_COLOR0
|
249 PIPE_CLEAR_STENCIL
));
250 /* Any coords emitted must also have been consumed by
253 assert(!coords_emitted
);
259 vc4_flush(struct pipe_context
*pctx
)
261 struct vc4_context
*vc4
= vc4_context(pctx
);
263 if (!vc4
->needs_flush
)
266 /* The FLUSH caps all of our bin lists with a VC4_PACKET_RETURN. */
267 cl_u8(&vc4
->bcl
, VC4_PACKET_FLUSH
);
269 cl_u8(&vc4
->bcl
, VC4_PACKET_NOP
);
270 cl_u8(&vc4
->bcl
, VC4_PACKET_HALT
);
274 if (vc4_debug
& VC4_DEBUG_CL
) {
275 fprintf(stderr
, "BCL:\n");
276 vc4_dump_cl(&vc4
->bcl
, false);
277 fprintf(stderr
, "RCL:\n");
278 vc4_dump_cl(&vc4
->rcl
, true);
281 struct drm_vc4_submit_cl submit
;
282 memset(&submit
, 0, sizeof(submit
));
284 submit
.bo_handles
= vc4
->bo_handles
.base
;
285 submit
.bo_handle_count
= (vc4
->bo_handles
.next
-
286 vc4
->bo_handles
.base
) / 4;
287 submit
.bin_cl
= vc4
->bcl
.base
;
288 submit
.bin_cl_size
= vc4
->bcl
.next
- vc4
->bcl
.base
;
289 submit
.render_cl
= vc4
->rcl
.base
;
290 submit
.render_cl_size
= vc4
->rcl
.next
- vc4
->rcl
.base
;
291 submit
.shader_rec
= vc4
->shader_rec
.base
;
292 submit
.shader_rec_size
= vc4
->shader_rec
.next
- vc4
->shader_rec
.base
;
293 submit
.shader_rec_count
= vc4
->shader_rec_count
;
294 submit
.uniforms
= vc4
->uniforms
.base
;
295 submit
.uniforms_size
= vc4
->uniforms
.next
- vc4
->uniforms
.base
;
297 if (!(vc4_debug
& VC4_DEBUG_NORAST
)) {
300 #ifndef USE_VC4_SIMULATOR
301 ret
= drmIoctl(vc4
->fd
, DRM_IOCTL_VC4_SUBMIT_CL
, &submit
);
303 ret
= vc4_simulator_flush(vc4
, &submit
);
306 fprintf(stderr
, "VC4 submit failed\n");
311 vc4_reset_cl(&vc4
->bcl
);
312 vc4_reset_cl(&vc4
->rcl
);
313 vc4_reset_cl(&vc4
->shader_rec
);
314 vc4_reset_cl(&vc4
->uniforms
);
315 vc4_reset_cl(&vc4
->bo_handles
);
316 struct vc4_bo
**referenced_bos
= vc4
->bo_pointers
.base
;
317 for (int i
= 0; i
< submit
.bo_handle_count
; i
++)
318 vc4_bo_unreference(&referenced_bos
[i
]);
319 vc4_reset_cl(&vc4
->bo_pointers
);
320 vc4
->shader_rec_count
= 0;
322 vc4
->needs_flush
= false;
323 vc4
->draw_call_queued
= false;
325 /* We have no hardware context saved between our draw calls, so we
326 * need to flag the next draw as needing all state emitted. Emitting
327 * all state at the start of our draws is also what ensures that we
328 * return to the state we need after a previous tile has finished.
336 vc4_pipe_flush(struct pipe_context
*pctx
, struct pipe_fence_handle
**fence
,
343 * Flushes the current command lists if they reference the given BO.
345 * This helps avoid flushing the command buffers when unnecessary.
348 vc4_flush_for_bo(struct pipe_context
*pctx
, struct vc4_bo
*bo
)
350 struct vc4_context
*vc4
= vc4_context(pctx
);
352 if (!vc4
->needs_flush
)
355 /* Walk all the referenced BOs in the drawing command list to see if
358 struct vc4_bo
**referenced_bos
= vc4
->bo_pointers
.base
;
359 for (int i
= 0; i
< (vc4
->bo_handles
.next
-
360 vc4
->bo_handles
.base
) / 4; i
++) {
361 if (referenced_bos
[i
] == bo
) {
367 /* Also check for the Z/color buffers, since the references to those
368 * are only added immediately before submit.
370 struct vc4_surface
*csurf
= vc4_surface(vc4
->framebuffer
.cbufs
[0]);
372 struct vc4_resource
*ctex
= vc4_resource(csurf
->base
.texture
);
373 if (ctex
->bo
== bo
) {
379 struct vc4_surface
*zsurf
= vc4_surface(vc4
->framebuffer
.zsbuf
);
381 struct vc4_resource
*ztex
=
382 vc4_resource(zsurf
->base
.texture
);
383 if (ztex
->bo
== bo
) {
391 vc4_context_destroy(struct pipe_context
*pctx
)
393 struct vc4_context
*vc4
= vc4_context(pctx
);
396 util_blitter_destroy(vc4
->blitter
);
398 if (vc4
->primconvert
)
399 util_primconvert_destroy(vc4
->primconvert
);
401 util_slab_destroy(&vc4
->transfer_pool
);
406 struct pipe_context
*
407 vc4_context_create(struct pipe_screen
*pscreen
, void *priv
)
409 struct vc4_screen
*screen
= vc4_screen(pscreen
);
410 struct vc4_context
*vc4
;
412 /* Prevent dumping of the shaders built during context setup. */
413 uint32_t saved_shaderdb_flag
= vc4_debug
& VC4_DEBUG_SHADERDB
;
414 vc4_debug
&= ~VC4_DEBUG_SHADERDB
;
416 vc4
= rzalloc(NULL
, struct vc4_context
);
419 struct pipe_context
*pctx
= &vc4
->base
;
421 vc4
->screen
= screen
;
423 pctx
->screen
= pscreen
;
425 pctx
->destroy
= vc4_context_destroy
;
426 pctx
->flush
= vc4_pipe_flush
;
429 vc4_state_init(pctx
);
430 vc4_program_init(pctx
);
431 vc4_query_init(pctx
);
432 vc4_resource_context_init(pctx
);
434 vc4_init_cl(vc4
, &vc4
->bcl
);
435 vc4_init_cl(vc4
, &vc4
->rcl
);
436 vc4_init_cl(vc4
, &vc4
->shader_rec
);
437 vc4_init_cl(vc4
, &vc4
->bo_handles
);
440 vc4
->fd
= screen
->fd
;
442 util_slab_create(&vc4
->transfer_pool
, sizeof(struct vc4_transfer
),
443 16, UTIL_SLAB_SINGLETHREADED
);
444 vc4
->blitter
= util_blitter_create(pctx
);
448 vc4
->primconvert
= util_primconvert_create(pctx
,
449 (1 << PIPE_PRIM_QUADS
) - 1);
450 if (!vc4
->primconvert
)
453 vc4_debug
|= saved_shaderdb_flag
;