src/gallium/drivers/vc4/vc4_context.h

   1 /*
   2  * Copyright © 2014 Broadcom
   3  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22  * IN THE SOFTWARE.
  23  */
  24
  25 #ifndef VC4_CONTEXT_H
  26 #define VC4_CONTEXT_H
  27
  28 #include <stdio.h>
  29
  30 #include "pipe/p_context.h"
  31 #include "pipe/p_state.h"
  32 #include "util/u_slab.h"
  33
  34 #define __user
  35 #include "vc4_drm.h"
  36 #include "vc4_bufmgr.h"
  37 #include "vc4_resource.h"
  38 #include "vc4_cl.h"
  39 #include "vc4_qir.h"
  40
  41 #define VC4_DIRTY_BLEND         (1 <<  0)
  42 #define VC4_DIRTY_RASTERIZER    (1 <<  1)
  43 #define VC4_DIRTY_ZSA           (1 <<  2)
  44 #define VC4_DIRTY_FRAGTEX       (1 <<  3)
  45 #define VC4_DIRTY_VERTTEX       (1 <<  4)
  46 #define VC4_DIRTY_TEXSTATE      (1 <<  5)
  47 #define VC4_DIRTY_PROG          (1 <<  6)
  48 #define VC4_DIRTY_BLEND_COLOR   (1 <<  7)
  49 #define VC4_DIRTY_STENCIL_REF   (1 <<  8)
  50 #define VC4_DIRTY_SAMPLE_MASK   (1 <<  9)
  51 #define VC4_DIRTY_FRAMEBUFFER   (1 << 10)
  52 #define VC4_DIRTY_STIPPLE       (1 << 11)
  53 #define VC4_DIRTY_VIEWPORT      (1 << 12)
  54 #define VC4_DIRTY_CONSTBUF      (1 << 13)
  55 #define VC4_DIRTY_VTXSTATE      (1 << 14)
  56 #define VC4_DIRTY_VTXBUF        (1 << 15)
  57 #define VC4_DIRTY_INDEXBUF      (1 << 16)
  58 #define VC4_DIRTY_SCISSOR       (1 << 17)
  59 #define VC4_DIRTY_FLAT_SHADE_FLAGS (1 << 18)
  60 #define VC4_DIRTY_PRIM_MODE     (1 << 19)
  61
  62 #define VC4_SHADER_DIRTY_VP     (1 << 0)
  63 #define VC4_SHADER_DIRTY_FP     (1 << 1)
  64
  65 struct vc4_texture_stateobj {
  66         struct pipe_sampler_view *textures[PIPE_MAX_SAMPLERS];
  67         unsigned num_textures;
  68         struct pipe_sampler_state *samplers[PIPE_MAX_SAMPLERS];
  69         unsigned num_samplers;
  70         unsigned dirty_samplers;
  71 };
  72
  73 struct vc4_shader_uniform_info {
  74         enum quniform_contents *contents;
  75         uint32_t *data;
  76         uint32_t count;
  77         uint32_t num_texture_samples;
  78 };
  79
  80 struct vc4_uncompiled_shader {
  81         struct pipe_shader_state base;
  82         const struct tgsi_token *twoside_tokens;
  83 };
  84
  85 struct vc4_compiled_shader {
  86         struct vc4_bo *bo;
  87
  88         struct vc4_shader_uniform_info uniforms;
  89
  90         /** bitmask of which inputs are color inputs, for flat shade handling. */
  91         uint32_t color_inputs;
  92
  93         uint8_t num_inputs;
  94 };
  95
  96 struct vc4_program_stateobj {
  97         struct vc4_uncompiled_shader *bind_vs, *bind_fs;
  98         struct vc4_compiled_shader *cs, *vs, *fs;
  99         uint32_t dirty;
 100         uint8_t num_exports;
 101         /* Indexed by semantic name or TGSI_SEMANTIC_COUNT + semantic index
 102          * for TGSI_SEMANTIC_GENERIC.  Special vs exports (position and point-
 103          * size) are not included in this
 104          */
 105         uint8_t export_linkage[63];
 106 };
 107
 108 struct vc4_constbuf_stateobj {
 109         struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS];
 110         uint32_t enabled_mask;
 111         uint32_t dirty_mask;
 112 };
 113
 114 struct vc4_vertexbuf_stateobj {
 115         struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
 116         unsigned count;
 117         uint32_t enabled_mask;
 118         uint32_t dirty_mask;
 119 };
 120
 121 struct vc4_vertex_stateobj {
 122         struct pipe_vertex_element pipe[PIPE_MAX_ATTRIBS];
 123         unsigned num_elements;
 124 };
 125
 126 struct vc4_context {
 127         struct pipe_context base;
 128
 129         int fd;
 130         struct vc4_screen *screen;
 131
 132         struct vc4_cl bcl;
 133         struct vc4_cl rcl;
 134         struct vc4_cl shader_rec;
 135         struct vc4_cl uniforms;
 136         struct vc4_cl bo_handles;
 137         struct vc4_cl bo_pointers;
 138         uint32_t shader_rec_count;
 139
 140         struct vc4_bo *tile_alloc;
 141         struct vc4_bo *tile_state;
 142
 143         struct util_slab_mempool transfer_pool;
 144         struct blitter_context *blitter;
 145
 146         /** bitfield of VC4_DIRTY_* */
 147         uint32_t dirty;
 148         /* Bitmask of PIPE_CLEAR_* of buffers that were cleared before the
 149          * first rendering.
 150          */
 151         uint32_t cleared;
 152         /* Bitmask of PIPE_CLEAR_* of buffers that have been rendered to
 153          * (either clears or draws).
 154          */
 155         uint32_t resolve;
 156         uint32_t clear_color[2];
 157         uint32_t clear_depth; /**< 24-bit unorm depth */
 158         uint8_t clear_stencil;
 159
 160         /**
 161          * Set if some drawing (triangles, blits, or just a glClear()) has
 162          * been done to the FBO, meaning that we need to
 163          * DRM_IOCTL_VC4_SUBMIT_CL.
 164          */
 165         bool needs_flush;
 166
 167         /**
 168          * Set when needs_flush, and the queued rendering is not just composed
 169          * of full-buffer clears.
 170          */
 171         bool draw_call_queued;
 172
 173         struct primconvert_context *primconvert;
 174
 175         struct util_hash_table *fs_cache, *vs_cache;
 176
 177         struct ra_regs *regs;
 178         unsigned int reg_class_any;
 179         unsigned int reg_class_a;
 180
 181         uint8_t prim_mode;
 182
 183         /** @{ Current pipeline state objects */
 184         struct pipe_scissor_state scissor;
 185         struct pipe_blend_state *blend;
 186         struct vc4_rasterizer_state *rasterizer;
 187         struct vc4_depth_stencil_alpha_state *zsa;
 188
 189         struct vc4_texture_stateobj verttex, fragtex;
 190
 191         struct vc4_program_stateobj prog;
 192
 193         struct vc4_vertex_stateobj *vtx;
 194
 195         struct pipe_blend_color blend_color;
 196         struct pipe_stencil_ref stencil_ref;
 197         unsigned sample_mask;
 198         struct pipe_framebuffer_state framebuffer;
 199         struct pipe_poly_stipple stipple;
 200         struct pipe_viewport_state viewport;
 201         struct vc4_constbuf_stateobj constbuf[PIPE_SHADER_TYPES];
 202         struct vc4_vertexbuf_stateobj vertexbuf;
 203         struct pipe_index_buffer indexbuf;
 204         /** @} */
 205 };
 206
 207 struct vc4_rasterizer_state {
 208         struct pipe_rasterizer_state base;
 209
 210         /* VC4_CONFIGURATION_BITS */
 211         uint8_t config_bits[3];
 212
 213         float point_size;
 214
 215         /**
 216          * Half-float (1/8/7 bits) value of polygon offset units for
 217          * VC4_PACKET_DEPTH_OFFSET
 218          */
 219         uint16_t offset_units;
 220         /**
 221          * Half-float (1/8/7 bits) value of polygon offset scale for
 222          * VC4_PACKET_DEPTH_OFFSET
 223          */
 224         uint16_t offset_factor;
 225 };
 226
 227 struct vc4_depth_stencil_alpha_state {
 228         struct pipe_depth_stencil_alpha_state base;
 229
 230         /* VC4_CONFIGURATION_BITS */
 231         uint8_t config_bits[3];
 232
 233         /** Uniforms for stencil state.
 234          *
 235          * Index 0 is either the front config, or the front-and-back config.
 236          * Index 1 is the back config if doing separate back stencil.
 237          * Index 2 is the writemask config if it's not a common mask value.
 238          */
 239         uint32_t stencil_uniforms[3];
 240 };
 241
 242 static inline struct vc4_context *
 243 vc4_context(struct pipe_context *pcontext)
 244 {
 245         return (struct vc4_context *)pcontext;
 246 }
 247
 248 struct pipe_context *vc4_context_create(struct pipe_screen *pscreen,
 249                                         void *priv);
 250 void vc4_draw_init(struct pipe_context *pctx);
 251 void vc4_state_init(struct pipe_context *pctx);
 252 void vc4_program_init(struct pipe_context *pctx);
 253 void vc4_query_init(struct pipe_context *pctx);
 254 void vc4_simulator_init(struct vc4_screen *screen);
 255 int vc4_simulator_flush(struct vc4_context *vc4,
 256                         struct drm_vc4_submit_cl *args);
 257
 258 void vc4_write_uniforms(struct vc4_context *vc4,
 259                         struct vc4_compiled_shader *shader,
 260                         struct vc4_constbuf_stateobj *cb,
 261                         struct vc4_texture_stateobj *texstate);
 262
 263 void vc4_flush(struct pipe_context *pctx);
 264 void vc4_flush_for_bo(struct pipe_context *pctx, struct vc4_bo *bo);
 265 void vc4_emit_state(struct pipe_context *pctx);
 266 void vc4_generate_code(struct vc4_context *vc4, struct vc4_compile *c);
 267 struct qpu_reg *vc4_register_allocate(struct vc4_context *vc4, struct vc4_compile *c);
 268 void vc4_update_compiled_shaders(struct vc4_context *vc4, uint8_t prim_mode);
 269
 270 bool vc4_rt_format_supported(enum pipe_format f);
 271 bool vc4_rt_format_is_565(enum pipe_format f);
 272 bool vc4_tex_format_supported(enum pipe_format f);
 273 uint8_t vc4_get_tex_format(enum pipe_format f);
 274 const uint8_t *vc4_get_format_swizzle(enum pipe_format f);
 275 void vc4_init_query_functions(struct vc4_context *vc4);
 276 #endif /* VC4_CONTEXT_H */