vc4: Also consider uniform 0 in uniform lowering.
[mesa.git] / src / gallium / drivers / vc4 / vc4_context.h
1 /*
2 * Copyright © 2014 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #ifndef VC4_CONTEXT_H
26 #define VC4_CONTEXT_H
27
28 #include <stdio.h>
29
30 #include "pipe/p_context.h"
31 #include "pipe/p_state.h"
32 #include "util/u_slab.h"
33
34 #define __user
35 #include "vc4_drm.h"
36 #include "vc4_bufmgr.h"
37 #include "vc4_resource.h"
38 #include "vc4_cl.h"
39 #include "vc4_qir.h"
40
41 #ifdef USE_VC4_SIMULATOR
42 #define using_vc4_simulator true
43 #else
44 #define using_vc4_simulator false
45 #endif
46
47 #define VC4_DIRTY_BLEND (1 << 0)
48 #define VC4_DIRTY_RASTERIZER (1 << 1)
49 #define VC4_DIRTY_ZSA (1 << 2)
50 #define VC4_DIRTY_FRAGTEX (1 << 3)
51 #define VC4_DIRTY_VERTTEX (1 << 4)
52 #define VC4_DIRTY_TEXSTATE (1 << 5)
53
54 #define VC4_DIRTY_BLEND_COLOR (1 << 7)
55 #define VC4_DIRTY_STENCIL_REF (1 << 8)
56 #define VC4_DIRTY_SAMPLE_MASK (1 << 9)
57 #define VC4_DIRTY_FRAMEBUFFER (1 << 10)
58 #define VC4_DIRTY_STIPPLE (1 << 11)
59 #define VC4_DIRTY_VIEWPORT (1 << 12)
60 #define VC4_DIRTY_CONSTBUF (1 << 13)
61 #define VC4_DIRTY_VTXSTATE (1 << 14)
62 #define VC4_DIRTY_VTXBUF (1 << 15)
63 #define VC4_DIRTY_INDEXBUF (1 << 16)
64 #define VC4_DIRTY_SCISSOR (1 << 17)
65 #define VC4_DIRTY_FLAT_SHADE_FLAGS (1 << 18)
66 #define VC4_DIRTY_PRIM_MODE (1 << 19)
67 #define VC4_DIRTY_CLIP (1 << 20)
68 #define VC4_DIRTY_UNCOMPILED_VS (1 << 21)
69 #define VC4_DIRTY_UNCOMPILED_FS (1 << 22)
70 #define VC4_DIRTY_COMPILED_FS (1 << 24)
71
72 struct vc4_sampler_view {
73 struct pipe_sampler_view base;
74 uint32_t texture_p0;
75 uint32_t texture_p1;
76 };
77
78 struct vc4_sampler_state {
79 struct pipe_sampler_state base;
80 uint32_t texture_p1;
81 };
82
83 struct vc4_texture_stateobj {
84 struct pipe_sampler_view *textures[PIPE_MAX_SAMPLERS];
85 unsigned num_textures;
86 struct pipe_sampler_state *samplers[PIPE_MAX_SAMPLERS];
87 unsigned num_samplers;
88 unsigned dirty_samplers;
89 };
90
91 struct vc4_shader_uniform_info {
92 enum quniform_contents *contents;
93 uint32_t *data;
94 uint32_t count;
95 uint32_t num_texture_samples;
96 };
97
98 struct vc4_uncompiled_shader {
99 /** A name for this program, so you can track it in shader-db output. */
100 uint32_t program_id;
101 /** How many variants of this program were compiled, for shader-db. */
102 uint32_t compiled_variant_count;
103 struct pipe_shader_state base;
104 const struct tgsi_token *twoside_tokens;
105 };
106
107 struct vc4_ubo_range {
108 /**
109 * offset in bytes from the start of the ubo where this range is
110 * uploaded.
111 *
112 * Only set once used is set.
113 */
114 uint32_t dst_offset;
115
116 /**
117 * offset in bytes from the start of the gallium uniforms where the
118 * data comes from.
119 */
120 uint32_t src_offset;
121
122 /** size in bytes of this ubo range */
123 uint32_t size;
124 };
125
126 struct vc4_compiled_shader {
127 uint64_t program_id;
128 struct vc4_bo *bo;
129
130 struct vc4_shader_uniform_info uniforms;
131
132 struct vc4_ubo_range *ubo_ranges;
133 uint32_t num_ubo_ranges;
134 uint32_t ubo_size;
135
136 /** bitmask of which inputs are color inputs, for flat shade handling. */
137 uint32_t color_inputs;
138
139 uint8_t num_inputs;
140
141 /* Byte offsets for the start of the vertex attributes 0-7, and the
142 * total size as "attribute" 8.
143 */
144 uint8_t vattr_offsets[9];
145 uint8_t vattrs_live;
146
147 /**
148 * Array of the meanings of the VPM inputs this shader needs.
149 *
150 * It doesn't include those that aren't part of the VPM, like
151 * point/line coordinates.
152 */
153 struct vc4_varying_semantic *input_semantics;
154 };
155
156 struct vc4_program_stateobj {
157 struct vc4_uncompiled_shader *bind_vs, *bind_fs;
158 struct vc4_compiled_shader *cs, *vs, *fs;
159 uint8_t num_exports;
160 /* Indexed by semantic name or TGSI_SEMANTIC_COUNT + semantic index
161 * for TGSI_SEMANTIC_GENERIC. Special vs exports (position and point-
162 * size) are not included in this
163 */
164 uint8_t export_linkage[63];
165 };
166
167 struct vc4_constbuf_stateobj {
168 struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS];
169 uint32_t enabled_mask;
170 uint32_t dirty_mask;
171 };
172
173 struct vc4_vertexbuf_stateobj {
174 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
175 unsigned count;
176 uint32_t enabled_mask;
177 uint32_t dirty_mask;
178 };
179
180 struct vc4_vertex_stateobj {
181 struct pipe_vertex_element pipe[PIPE_MAX_ATTRIBS];
182 unsigned num_elements;
183 };
184
185 struct vc4_context {
186 struct pipe_context base;
187
188 int fd;
189 struct vc4_screen *screen;
190
191 struct vc4_cl bcl;
192 struct vc4_cl shader_rec;
193 struct vc4_cl uniforms;
194 struct vc4_cl bo_handles;
195 struct vc4_cl bo_pointers;
196 uint32_t shader_rec_count;
197
198 /** @{ Surfaces to submit rendering for. */
199 struct pipe_surface *color_read;
200 struct pipe_surface *color_write;
201 struct pipe_surface *zs_read;
202 struct pipe_surface *zs_write;
203 /** @} */
204 /** @{
205 * Bounding box of the scissor across all queued drawing.
206 *
207 * Note that the max values are exclusive.
208 */
209 uint32_t draw_min_x;
210 uint32_t draw_min_y;
211 uint32_t draw_max_x;
212 uint32_t draw_max_y;
213 /** @} */
214 /** @{
215 * Width/height of the color framebuffer being rendered to,
216 * for VC4_TILE_RENDERING_MODE_CONFIG.
217 */
218 uint32_t draw_width;
219 uint32_t draw_height;
220 /** @} */
221
222 struct util_slab_mempool transfer_pool;
223 struct blitter_context *blitter;
224
225 /** bitfield of VC4_DIRTY_* */
226 uint32_t dirty;
227 /* Bitmask of PIPE_CLEAR_* of buffers that were cleared before the
228 * first rendering.
229 */
230 uint32_t cleared;
231 /* Bitmask of PIPE_CLEAR_* of buffers that have been rendered to
232 * (either clears or draws).
233 */
234 uint32_t resolve;
235 uint32_t clear_color[2];
236 uint32_t clear_depth; /**< 24-bit unorm depth */
237 uint8_t clear_stencil;
238
239 /**
240 * Set if some drawing (triangles, blits, or just a glClear()) has
241 * been done to the FBO, meaning that we need to
242 * DRM_IOCTL_VC4_SUBMIT_CL.
243 */
244 bool needs_flush;
245
246 /**
247 * Set when needs_flush, and the queued rendering is not just composed
248 * of full-buffer clears.
249 */
250 bool draw_call_queued;
251
252 struct primconvert_context *primconvert;
253
254 struct hash_table *fs_cache, *vs_cache;
255 uint32_t next_uncompiled_program_id;
256 uint64_t next_compiled_program_id;
257
258 struct ra_regs *regs;
259 unsigned int reg_class_any;
260 unsigned int reg_class_a;
261
262 uint8_t prim_mode;
263
264 /** Seqno of the last CL flush's job. */
265 uint64_t last_emit_seqno;
266
267 struct u_upload_mgr *uploader;
268
269 /** @{ Current pipeline state objects */
270 struct pipe_scissor_state scissor;
271 struct pipe_blend_state *blend;
272 struct vc4_rasterizer_state *rasterizer;
273 struct vc4_depth_stencil_alpha_state *zsa;
274
275 struct vc4_texture_stateobj verttex, fragtex;
276
277 struct vc4_program_stateobj prog;
278
279 struct vc4_vertex_stateobj *vtx;
280
281 struct pipe_blend_color blend_color;
282 struct pipe_stencil_ref stencil_ref;
283 unsigned sample_mask;
284 struct pipe_framebuffer_state framebuffer;
285 struct pipe_poly_stipple stipple;
286 struct pipe_clip_state clip;
287 struct pipe_viewport_state viewport;
288 struct vc4_constbuf_stateobj constbuf[PIPE_SHADER_TYPES];
289 struct vc4_vertexbuf_stateobj vertexbuf;
290 struct pipe_index_buffer indexbuf;
291 /** @} */
292 };
293
294 struct vc4_rasterizer_state {
295 struct pipe_rasterizer_state base;
296
297 /* VC4_CONFIGURATION_BITS */
298 uint8_t config_bits[3];
299
300 float point_size;
301
302 /**
303 * Half-float (1/8/7 bits) value of polygon offset units for
304 * VC4_PACKET_DEPTH_OFFSET
305 */
306 uint16_t offset_units;
307 /**
308 * Half-float (1/8/7 bits) value of polygon offset scale for
309 * VC4_PACKET_DEPTH_OFFSET
310 */
311 uint16_t offset_factor;
312 };
313
314 struct vc4_depth_stencil_alpha_state {
315 struct pipe_depth_stencil_alpha_state base;
316
317 /* VC4_CONFIGURATION_BITS */
318 uint8_t config_bits[3];
319
320 /** Uniforms for stencil state.
321 *
322 * Index 0 is either the front config, or the front-and-back config.
323 * Index 1 is the back config if doing separate back stencil.
324 * Index 2 is the writemask config if it's not a common mask value.
325 */
326 uint32_t stencil_uniforms[3];
327 };
328
329 #define perf_debug(...) do { \
330 if (unlikely(vc4_debug & VC4_DEBUG_PERF)) \
331 fprintf(stderr, __VA_ARGS__); \
332 } while (0)
333
334 static inline struct vc4_context *
335 vc4_context(struct pipe_context *pcontext)
336 {
337 return (struct vc4_context *)pcontext;
338 }
339
340 static inline struct vc4_sampler_view *
341 vc4_sampler_view(struct pipe_sampler_view *psview)
342 {
343 return (struct vc4_sampler_view *)psview;
344 }
345
346 static inline struct vc4_sampler_state *
347 vc4_sampler_state(struct pipe_sampler_state *psampler)
348 {
349 return (struct vc4_sampler_state *)psampler;
350 }
351
352 struct pipe_context *vc4_context_create(struct pipe_screen *pscreen,
353 void *priv);
354 void vc4_draw_init(struct pipe_context *pctx);
355 void vc4_state_init(struct pipe_context *pctx);
356 void vc4_program_init(struct pipe_context *pctx);
357 void vc4_program_fini(struct pipe_context *pctx);
358 void vc4_query_init(struct pipe_context *pctx);
359 void vc4_simulator_init(struct vc4_screen *screen);
360 int vc4_simulator_flush(struct vc4_context *vc4,
361 struct drm_vc4_submit_cl *args);
362
363 void vc4_write_uniforms(struct vc4_context *vc4,
364 struct vc4_compiled_shader *shader,
365 struct vc4_constbuf_stateobj *cb,
366 struct vc4_texture_stateobj *texstate);
367
368 void vc4_flush(struct pipe_context *pctx);
369 void vc4_job_init(struct vc4_context *vc4);
370 void vc4_job_submit(struct vc4_context *vc4);
371 void vc4_job_reset(struct vc4_context *vc4);
372 bool vc4_cl_references_bo(struct pipe_context *pctx, struct vc4_bo *bo);
373 void vc4_emit_state(struct pipe_context *pctx);
374 void vc4_generate_code(struct vc4_context *vc4, struct vc4_compile *c);
375 struct qpu_reg *vc4_register_allocate(struct vc4_context *vc4, struct vc4_compile *c);
376 void vc4_update_compiled_shaders(struct vc4_context *vc4, uint8_t prim_mode);
377
378 bool vc4_rt_format_supported(enum pipe_format f);
379 bool vc4_rt_format_is_565(enum pipe_format f);
380 bool vc4_tex_format_supported(enum pipe_format f);
381 uint8_t vc4_get_tex_format(enum pipe_format f);
382 const uint8_t *vc4_get_format_swizzle(enum pipe_format f);
383 void vc4_init_query_functions(struct vc4_context *vc4);
384 void vc4_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info);
385 #endif /* VC4_CONTEXT_H */