src/gallium/drivers/vc4/vc4_context.h

   1 /*
   2  * Copyright © 2014 Broadcom
   3  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22  * IN THE SOFTWARE.
  23  */
  24
  25 #ifndef VC4_CONTEXT_H
  26 #define VC4_CONTEXT_H
  27
  28 #include <stdio.h>
  29
  30 #include "pipe/p_context.h"
  31 #include "pipe/p_state.h"
  32 #include "util/u_slab.h"
  33
  34 #define __user
  35 #include "vc4_drm.h"
  36 #include "vc4_bufmgr.h"
  37 #include "vc4_resource.h"
  38 #include "vc4_cl.h"
  39 #include "vc4_qir.h"
  40
  41 #ifdef USE_VC4_SIMULATOR
  42 #define using_vc4_simulator true
  43 #else
  44 #define using_vc4_simulator false
  45 #endif
  46
  47 #define VC4_DIRTY_BLEND         (1 <<  0)
  48 #define VC4_DIRTY_RASTERIZER    (1 <<  1)
  49 #define VC4_DIRTY_ZSA           (1 <<  2)
  50 #define VC4_DIRTY_FRAGTEX       (1 <<  3)
  51 #define VC4_DIRTY_VERTTEX       (1 <<  4)
  52 #define VC4_DIRTY_TEXSTATE      (1 <<  5)
  53
  54 #define VC4_DIRTY_BLEND_COLOR   (1 <<  7)
  55 #define VC4_DIRTY_STENCIL_REF   (1 <<  8)
  56 #define VC4_DIRTY_SAMPLE_MASK   (1 <<  9)
  57 #define VC4_DIRTY_FRAMEBUFFER   (1 << 10)
  58 #define VC4_DIRTY_STIPPLE       (1 << 11)
  59 #define VC4_DIRTY_VIEWPORT      (1 << 12)
  60 #define VC4_DIRTY_CONSTBUF      (1 << 13)
  61 #define VC4_DIRTY_VTXSTATE      (1 << 14)
  62 #define VC4_DIRTY_VTXBUF        (1 << 15)
  63 #define VC4_DIRTY_INDEXBUF      (1 << 16)
  64 #define VC4_DIRTY_SCISSOR       (1 << 17)
  65 #define VC4_DIRTY_FLAT_SHADE_FLAGS (1 << 18)
  66 #define VC4_DIRTY_PRIM_MODE     (1 << 19)
  67 #define VC4_DIRTY_CLIP          (1 << 20)
  68 #define VC4_DIRTY_UNCOMPILED_VS (1 << 21)
  69 #define VC4_DIRTY_UNCOMPILED_FS (1 << 22)
  70 #define VC4_DIRTY_COMPILED_FS   (1 << 24)
  71
  72 struct vc4_texture_stateobj {
  73         struct pipe_sampler_view *textures[PIPE_MAX_SAMPLERS];
  74         unsigned num_textures;
  75         struct pipe_sampler_state *samplers[PIPE_MAX_SAMPLERS];
  76         unsigned num_samplers;
  77         unsigned dirty_samplers;
  78 };
  79
  80 struct vc4_shader_uniform_info {
  81         enum quniform_contents *contents;
  82         uint32_t *data;
  83         uint32_t count;
  84         uint32_t num_texture_samples;
  85 };
  86
  87 struct vc4_uncompiled_shader {
  88         /** A name for this program, so you can track it in shader-db output. */
  89         uint32_t program_id;
  90         /** How many variants of this program were compiled, for shader-db. */
  91         uint32_t compiled_variant_count;
  92         struct pipe_shader_state base;
  93         const struct tgsi_token *twoside_tokens;
  94 };
  95
  96 struct vc4_ubo_range {
  97         /**
  98          * offset in bytes from the start of the ubo where this range is
  99          * uploaded.
 100          *
 101          * Only set once used is set.
 102          */
 103         uint32_t dst_offset;
 104
 105         /**
 106          * offset in bytes from the start of the gallium uniforms where the
 107          * data comes from.
 108          */
 109         uint32_t src_offset;
 110
 111         /** size in bytes of this ubo range */
 112         uint32_t size;
 113 };
 114
 115 struct vc4_compiled_shader {
 116         uint64_t program_id;
 117         struct vc4_bo *bo;
 118
 119         struct vc4_shader_uniform_info uniforms;
 120
 121         struct vc4_ubo_range *ubo_ranges;
 122         uint32_t num_ubo_ranges;
 123         uint32_t ubo_size;
 124
 125         /** bitmask of which inputs are color inputs, for flat shade handling. */
 126         uint32_t color_inputs;
 127
 128         uint8_t num_inputs;
 129
 130         /* Byte offsets for the start of the vertex attributes 0-7, and the
 131          * total size as "attribute" 8.
 132          */
 133         uint8_t vattr_offsets[9];
 134         uint8_t vattrs_live;
 135
 136         /**
 137          * Array of the meanings of the VPM inputs this shader needs.
 138          *
 139          * It doesn't include those that aren't part of the VPM, like
 140          * point/line coordinates.
 141          */
 142         struct vc4_varying_semantic *input_semantics;
 143 };
 144
 145 struct vc4_program_stateobj {
 146         struct vc4_uncompiled_shader *bind_vs, *bind_fs;
 147         struct vc4_compiled_shader *cs, *vs, *fs;
 148         uint8_t num_exports;
 149         /* Indexed by semantic name or TGSI_SEMANTIC_COUNT + semantic index
 150          * for TGSI_SEMANTIC_GENERIC.  Special vs exports (position and point-
 151          * size) are not included in this
 152          */
 153         uint8_t export_linkage[63];
 154 };
 155
 156 struct vc4_constbuf_stateobj {
 157         struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS];
 158         uint32_t enabled_mask;
 159         uint32_t dirty_mask;
 160 };
 161
 162 struct vc4_vertexbuf_stateobj {
 163         struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
 164         unsigned count;
 165         uint32_t enabled_mask;
 166         uint32_t dirty_mask;
 167 };
 168
 169 struct vc4_vertex_stateobj {
 170         struct pipe_vertex_element pipe[PIPE_MAX_ATTRIBS];
 171         unsigned num_elements;
 172 };
 173
 174 struct vc4_context {
 175         struct pipe_context base;
 176
 177         int fd;
 178         struct vc4_screen *screen;
 179
 180         struct vc4_cl bcl;
 181         struct vc4_cl shader_rec;
 182         struct vc4_cl uniforms;
 183         struct vc4_cl bo_handles;
 184         struct vc4_cl bo_pointers;
 185         uint32_t shader_rec_count;
 186
 187         /** @{ Surfaces to submit rendering for. */
 188         struct pipe_surface *color_read;
 189         struct pipe_surface *color_write;
 190         struct pipe_surface *zs_read;
 191         struct pipe_surface *zs_write;
 192         /** @} */
 193         /** @{
 194          * Bounding box of the scissor across all queued drawing.
 195          *
 196          * Note that the max values are exclusive.
 197          */
 198         uint32_t draw_min_x;
 199         uint32_t draw_min_y;
 200         uint32_t draw_max_x;
 201         uint32_t draw_max_y;
 202         /** @} */
 203         /** @{
 204          * Width/height of the color framebuffer being rendered to,
 205          * for VC4_TILE_RENDERING_MODE_CONFIG.
 206         */
 207         uint32_t draw_width;
 208         uint32_t draw_height;
 209         /** @} */
 210
 211         struct vc4_bo *tile_alloc;
 212         struct vc4_bo *tile_state;
 213
 214         struct util_slab_mempool transfer_pool;
 215         struct blitter_context *blitter;
 216
 217         /** bitfield of VC4_DIRTY_* */
 218         uint32_t dirty;
 219         /* Bitmask of PIPE_CLEAR_* of buffers that were cleared before the
 220          * first rendering.
 221          */
 222         uint32_t cleared;
 223         /* Bitmask of PIPE_CLEAR_* of buffers that have been rendered to
 224          * (either clears or draws).
 225          */
 226         uint32_t resolve;
 227         uint32_t clear_color[2];
 228         uint32_t clear_depth; /**< 24-bit unorm depth */
 229         uint8_t clear_stencil;
 230
 231         /**
 232          * Set if some drawing (triangles, blits, or just a glClear()) has
 233          * been done to the FBO, meaning that we need to
 234          * DRM_IOCTL_VC4_SUBMIT_CL.
 235          */
 236         bool needs_flush;
 237
 238         /**
 239          * Set when needs_flush, and the queued rendering is not just composed
 240          * of full-buffer clears.
 241          */
 242         bool draw_call_queued;
 243
 244         struct primconvert_context *primconvert;
 245
 246         struct hash_table *fs_cache, *vs_cache;
 247         uint32_t next_uncompiled_program_id;
 248         uint64_t next_compiled_program_id;
 249
 250         struct ra_regs *regs;
 251         unsigned int reg_class_any;
 252         unsigned int reg_class_a;
 253
 254         uint8_t prim_mode;
 255
 256         /** Seqno of the last CL flush's job. */
 257         uint64_t last_emit_seqno;
 258
 259         struct u_upload_mgr *uploader;
 260
 261         /** @{ Current pipeline state objects */
 262         struct pipe_scissor_state scissor;
 263         struct pipe_blend_state *blend;
 264         struct vc4_rasterizer_state *rasterizer;
 265         struct vc4_depth_stencil_alpha_state *zsa;
 266
 267         struct vc4_texture_stateobj verttex, fragtex;
 268
 269         struct vc4_program_stateobj prog;
 270
 271         struct vc4_vertex_stateobj *vtx;
 272
 273         struct pipe_blend_color blend_color;
 274         struct pipe_stencil_ref stencil_ref;
 275         unsigned sample_mask;
 276         struct pipe_framebuffer_state framebuffer;
 277         struct pipe_poly_stipple stipple;
 278         struct pipe_clip_state clip;
 279         struct pipe_viewport_state viewport;
 280         struct vc4_constbuf_stateobj constbuf[PIPE_SHADER_TYPES];
 281         struct vc4_vertexbuf_stateobj vertexbuf;
 282         struct pipe_index_buffer indexbuf;
 283         /** @} */
 284 };
 285
 286 struct vc4_rasterizer_state {
 287         struct pipe_rasterizer_state base;
 288
 289         /* VC4_CONFIGURATION_BITS */
 290         uint8_t config_bits[3];
 291
 292         float point_size;
 293
 294         /**
 295          * Half-float (1/8/7 bits) value of polygon offset units for
 296          * VC4_PACKET_DEPTH_OFFSET
 297          */
 298         uint16_t offset_units;
 299         /**
 300          * Half-float (1/8/7 bits) value of polygon offset scale for
 301          * VC4_PACKET_DEPTH_OFFSET
 302          */
 303         uint16_t offset_factor;
 304 };
 305
 306 struct vc4_depth_stencil_alpha_state {
 307         struct pipe_depth_stencil_alpha_state base;
 308
 309         /* VC4_CONFIGURATION_BITS */
 310         uint8_t config_bits[3];
 311
 312         /** Uniforms for stencil state.
 313          *
 314          * Index 0 is either the front config, or the front-and-back config.
 315          * Index 1 is the back config if doing separate back stencil.
 316          * Index 2 is the writemask config if it's not a common mask value.
 317          */
 318         uint32_t stencil_uniforms[3];
 319 };
 320
 321 #define perf_debug(...) do {                            \
 322         if (unlikely(vc4_debug & VC4_DEBUG_PERF))       \
 323                 fprintf(stderr, __VA_ARGS__);           \
 324 } while (0)
 325
 326 static inline struct vc4_context *
 327 vc4_context(struct pipe_context *pcontext)
 328 {
 329         return (struct vc4_context *)pcontext;
 330 }
 331
 332 struct pipe_context *vc4_context_create(struct pipe_screen *pscreen,
 333                                         void *priv);
 334 void vc4_draw_init(struct pipe_context *pctx);
 335 void vc4_state_init(struct pipe_context *pctx);
 336 void vc4_program_init(struct pipe_context *pctx);
 337 void vc4_program_fini(struct pipe_context *pctx);
 338 void vc4_query_init(struct pipe_context *pctx);
 339 void vc4_simulator_init(struct vc4_screen *screen);
 340 int vc4_simulator_flush(struct vc4_context *vc4,
 341                         struct drm_vc4_submit_cl *args);
 342
 343 void vc4_write_uniforms(struct vc4_context *vc4,
 344                         struct vc4_compiled_shader *shader,
 345                         struct vc4_constbuf_stateobj *cb,
 346                         struct vc4_texture_stateobj *texstate);
 347
 348 void vc4_flush(struct pipe_context *pctx);
 349 void vc4_job_init(struct vc4_context *vc4);
 350 void vc4_job_submit(struct vc4_context *vc4);
 351 void vc4_job_reset(struct vc4_context *vc4);
 352 bool vc4_cl_references_bo(struct pipe_context *pctx, struct vc4_bo *bo);
 353 void vc4_emit_state(struct pipe_context *pctx);
 354 void vc4_generate_code(struct vc4_context *vc4, struct vc4_compile *c);
 355 struct qpu_reg *vc4_register_allocate(struct vc4_context *vc4, struct vc4_compile *c);
 356 void vc4_update_compiled_shaders(struct vc4_context *vc4, uint8_t prim_mode);
 357
 358 bool vc4_rt_format_supported(enum pipe_format f);
 359 bool vc4_rt_format_is_565(enum pipe_format f);
 360 bool vc4_tex_format_supported(enum pipe_format f);
 361 uint8_t vc4_get_tex_format(enum pipe_format f);
 362 const uint8_t *vc4_get_format_swizzle(enum pipe_format f);
 363 void vc4_init_query_functions(struct vc4_context *vc4);
 364 void vc4_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info);
 365 #endif /* VC4_CONTEXT_H */