be7df1bd34744aece940a4f2daff5b844009c1de
[mesa.git] / src / gallium / drivers / vc4 / vc4_context.h
1 /*
2 * Copyright © 2014 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #ifndef VC4_CONTEXT_H
26 #define VC4_CONTEXT_H
27
28 #include <stdio.h>
29
30 #include "pipe/p_context.h"
31 #include "pipe/p_state.h"
32 #include "util/u_slab.h"
33
34 #define __user
35 #include "vc4_drm.h"
36 #include "vc4_bufmgr.h"
37 #include "vc4_resource.h"
38 #include "vc4_cl.h"
39 #include "vc4_qir.h"
40
41 #ifdef USE_VC4_SIMULATOR
42 #define using_vc4_simulator true
43 #else
44 #define using_vc4_simulator false
45 #endif
46
47 #define VC4_DIRTY_BLEND (1 << 0)
48 #define VC4_DIRTY_RASTERIZER (1 << 1)
49 #define VC4_DIRTY_ZSA (1 << 2)
50 #define VC4_DIRTY_FRAGTEX (1 << 3)
51 #define VC4_DIRTY_VERTTEX (1 << 4)
52 #define VC4_DIRTY_TEXSTATE (1 << 5)
53
54 #define VC4_DIRTY_BLEND_COLOR (1 << 7)
55 #define VC4_DIRTY_STENCIL_REF (1 << 8)
56 #define VC4_DIRTY_SAMPLE_MASK (1 << 9)
57 #define VC4_DIRTY_FRAMEBUFFER (1 << 10)
58 #define VC4_DIRTY_STIPPLE (1 << 11)
59 #define VC4_DIRTY_VIEWPORT (1 << 12)
60 #define VC4_DIRTY_CONSTBUF (1 << 13)
61 #define VC4_DIRTY_VTXSTATE (1 << 14)
62 #define VC4_DIRTY_VTXBUF (1 << 15)
63 #define VC4_DIRTY_INDEXBUF (1 << 16)
64 #define VC4_DIRTY_SCISSOR (1 << 17)
65 #define VC4_DIRTY_FLAT_SHADE_FLAGS (1 << 18)
66 #define VC4_DIRTY_PRIM_MODE (1 << 19)
67 #define VC4_DIRTY_CLIP (1 << 20)
68 #define VC4_DIRTY_UNCOMPILED_VS (1 << 21)
69 #define VC4_DIRTY_UNCOMPILED_FS (1 << 22)
70 #define VC4_DIRTY_COMPILED_FS (1 << 24)
71
72 struct vc4_sampler_view {
73 struct pipe_sampler_view base;
74 uint32_t texture_p0;
75 uint32_t texture_p1;
76 };
77
78 struct vc4_texture_stateobj {
79 struct pipe_sampler_view *textures[PIPE_MAX_SAMPLERS];
80 unsigned num_textures;
81 struct pipe_sampler_state *samplers[PIPE_MAX_SAMPLERS];
82 unsigned num_samplers;
83 unsigned dirty_samplers;
84 };
85
86 struct vc4_shader_uniform_info {
87 enum quniform_contents *contents;
88 uint32_t *data;
89 uint32_t count;
90 uint32_t num_texture_samples;
91 };
92
93 struct vc4_uncompiled_shader {
94 /** A name for this program, so you can track it in shader-db output. */
95 uint32_t program_id;
96 /** How many variants of this program were compiled, for shader-db. */
97 uint32_t compiled_variant_count;
98 struct pipe_shader_state base;
99 const struct tgsi_token *twoside_tokens;
100 };
101
102 struct vc4_ubo_range {
103 /**
104 * offset in bytes from the start of the ubo where this range is
105 * uploaded.
106 *
107 * Only set once used is set.
108 */
109 uint32_t dst_offset;
110
111 /**
112 * offset in bytes from the start of the gallium uniforms where the
113 * data comes from.
114 */
115 uint32_t src_offset;
116
117 /** size in bytes of this ubo range */
118 uint32_t size;
119 };
120
121 struct vc4_compiled_shader {
122 uint64_t program_id;
123 struct vc4_bo *bo;
124
125 struct vc4_shader_uniform_info uniforms;
126
127 struct vc4_ubo_range *ubo_ranges;
128 uint32_t num_ubo_ranges;
129 uint32_t ubo_size;
130
131 /** bitmask of which inputs are color inputs, for flat shade handling. */
132 uint32_t color_inputs;
133
134 uint8_t num_inputs;
135
136 /* Byte offsets for the start of the vertex attributes 0-7, and the
137 * total size as "attribute" 8.
138 */
139 uint8_t vattr_offsets[9];
140 uint8_t vattrs_live;
141
142 /**
143 * Array of the meanings of the VPM inputs this shader needs.
144 *
145 * It doesn't include those that aren't part of the VPM, like
146 * point/line coordinates.
147 */
148 struct vc4_varying_semantic *input_semantics;
149 };
150
151 struct vc4_program_stateobj {
152 struct vc4_uncompiled_shader *bind_vs, *bind_fs;
153 struct vc4_compiled_shader *cs, *vs, *fs;
154 uint8_t num_exports;
155 /* Indexed by semantic name or TGSI_SEMANTIC_COUNT + semantic index
156 * for TGSI_SEMANTIC_GENERIC. Special vs exports (position and point-
157 * size) are not included in this
158 */
159 uint8_t export_linkage[63];
160 };
161
162 struct vc4_constbuf_stateobj {
163 struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS];
164 uint32_t enabled_mask;
165 uint32_t dirty_mask;
166 };
167
168 struct vc4_vertexbuf_stateobj {
169 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
170 unsigned count;
171 uint32_t enabled_mask;
172 uint32_t dirty_mask;
173 };
174
175 struct vc4_vertex_stateobj {
176 struct pipe_vertex_element pipe[PIPE_MAX_ATTRIBS];
177 unsigned num_elements;
178 };
179
180 struct vc4_context {
181 struct pipe_context base;
182
183 int fd;
184 struct vc4_screen *screen;
185
186 struct vc4_cl bcl;
187 struct vc4_cl shader_rec;
188 struct vc4_cl uniforms;
189 struct vc4_cl bo_handles;
190 struct vc4_cl bo_pointers;
191 uint32_t shader_rec_count;
192
193 /** @{ Surfaces to submit rendering for. */
194 struct pipe_surface *color_read;
195 struct pipe_surface *color_write;
196 struct pipe_surface *zs_read;
197 struct pipe_surface *zs_write;
198 /** @} */
199 /** @{
200 * Bounding box of the scissor across all queued drawing.
201 *
202 * Note that the max values are exclusive.
203 */
204 uint32_t draw_min_x;
205 uint32_t draw_min_y;
206 uint32_t draw_max_x;
207 uint32_t draw_max_y;
208 /** @} */
209 /** @{
210 * Width/height of the color framebuffer being rendered to,
211 * for VC4_TILE_RENDERING_MODE_CONFIG.
212 */
213 uint32_t draw_width;
214 uint32_t draw_height;
215 /** @} */
216
217 struct util_slab_mempool transfer_pool;
218 struct blitter_context *blitter;
219
220 /** bitfield of VC4_DIRTY_* */
221 uint32_t dirty;
222 /* Bitmask of PIPE_CLEAR_* of buffers that were cleared before the
223 * first rendering.
224 */
225 uint32_t cleared;
226 /* Bitmask of PIPE_CLEAR_* of buffers that have been rendered to
227 * (either clears or draws).
228 */
229 uint32_t resolve;
230 uint32_t clear_color[2];
231 uint32_t clear_depth; /**< 24-bit unorm depth */
232 uint8_t clear_stencil;
233
234 /**
235 * Set if some drawing (triangles, blits, or just a glClear()) has
236 * been done to the FBO, meaning that we need to
237 * DRM_IOCTL_VC4_SUBMIT_CL.
238 */
239 bool needs_flush;
240
241 /**
242 * Set when needs_flush, and the queued rendering is not just composed
243 * of full-buffer clears.
244 */
245 bool draw_call_queued;
246
247 struct primconvert_context *primconvert;
248
249 struct hash_table *fs_cache, *vs_cache;
250 uint32_t next_uncompiled_program_id;
251 uint64_t next_compiled_program_id;
252
253 struct ra_regs *regs;
254 unsigned int reg_class_any;
255 unsigned int reg_class_a;
256
257 uint8_t prim_mode;
258
259 /** Seqno of the last CL flush's job. */
260 uint64_t last_emit_seqno;
261
262 struct u_upload_mgr *uploader;
263
264 /** @{ Current pipeline state objects */
265 struct pipe_scissor_state scissor;
266 struct pipe_blend_state *blend;
267 struct vc4_rasterizer_state *rasterizer;
268 struct vc4_depth_stencil_alpha_state *zsa;
269
270 struct vc4_texture_stateobj verttex, fragtex;
271
272 struct vc4_program_stateobj prog;
273
274 struct vc4_vertex_stateobj *vtx;
275
276 struct pipe_blend_color blend_color;
277 struct pipe_stencil_ref stencil_ref;
278 unsigned sample_mask;
279 struct pipe_framebuffer_state framebuffer;
280 struct pipe_poly_stipple stipple;
281 struct pipe_clip_state clip;
282 struct pipe_viewport_state viewport;
283 struct vc4_constbuf_stateobj constbuf[PIPE_SHADER_TYPES];
284 struct vc4_vertexbuf_stateobj vertexbuf;
285 struct pipe_index_buffer indexbuf;
286 /** @} */
287 };
288
289 struct vc4_rasterizer_state {
290 struct pipe_rasterizer_state base;
291
292 /* VC4_CONFIGURATION_BITS */
293 uint8_t config_bits[3];
294
295 float point_size;
296
297 /**
298 * Half-float (1/8/7 bits) value of polygon offset units for
299 * VC4_PACKET_DEPTH_OFFSET
300 */
301 uint16_t offset_units;
302 /**
303 * Half-float (1/8/7 bits) value of polygon offset scale for
304 * VC4_PACKET_DEPTH_OFFSET
305 */
306 uint16_t offset_factor;
307 };
308
309 struct vc4_depth_stencil_alpha_state {
310 struct pipe_depth_stencil_alpha_state base;
311
312 /* VC4_CONFIGURATION_BITS */
313 uint8_t config_bits[3];
314
315 /** Uniforms for stencil state.
316 *
317 * Index 0 is either the front config, or the front-and-back config.
318 * Index 1 is the back config if doing separate back stencil.
319 * Index 2 is the writemask config if it's not a common mask value.
320 */
321 uint32_t stencil_uniforms[3];
322 };
323
324 #define perf_debug(...) do { \
325 if (unlikely(vc4_debug & VC4_DEBUG_PERF)) \
326 fprintf(stderr, __VA_ARGS__); \
327 } while (0)
328
329 static inline struct vc4_context *
330 vc4_context(struct pipe_context *pcontext)
331 {
332 return (struct vc4_context *)pcontext;
333 }
334
335 static inline struct vc4_sampler_view *
336 vc4_sampler_view(struct pipe_sampler_view *psview)
337 {
338 return (struct vc4_sampler_view *)psview;
339 }
340
341 struct pipe_context *vc4_context_create(struct pipe_screen *pscreen,
342 void *priv);
343 void vc4_draw_init(struct pipe_context *pctx);
344 void vc4_state_init(struct pipe_context *pctx);
345 void vc4_program_init(struct pipe_context *pctx);
346 void vc4_program_fini(struct pipe_context *pctx);
347 void vc4_query_init(struct pipe_context *pctx);
348 void vc4_simulator_init(struct vc4_screen *screen);
349 int vc4_simulator_flush(struct vc4_context *vc4,
350 struct drm_vc4_submit_cl *args);
351
352 void vc4_write_uniforms(struct vc4_context *vc4,
353 struct vc4_compiled_shader *shader,
354 struct vc4_constbuf_stateobj *cb,
355 struct vc4_texture_stateobj *texstate);
356
357 void vc4_flush(struct pipe_context *pctx);
358 void vc4_job_init(struct vc4_context *vc4);
359 void vc4_job_submit(struct vc4_context *vc4);
360 void vc4_job_reset(struct vc4_context *vc4);
361 bool vc4_cl_references_bo(struct pipe_context *pctx, struct vc4_bo *bo);
362 void vc4_emit_state(struct pipe_context *pctx);
363 void vc4_generate_code(struct vc4_context *vc4, struct vc4_compile *c);
364 struct qpu_reg *vc4_register_allocate(struct vc4_context *vc4, struct vc4_compile *c);
365 void vc4_update_compiled_shaders(struct vc4_context *vc4, uint8_t prim_mode);
366
367 bool vc4_rt_format_supported(enum pipe_format f);
368 bool vc4_rt_format_is_565(enum pipe_format f);
369 bool vc4_tex_format_supported(enum pipe_format f);
370 uint8_t vc4_get_tex_format(enum pipe_format f);
371 const uint8_t *vc4_get_format_swizzle(enum pipe_format f);
372 void vc4_init_query_functions(struct vc4_context *vc4);
373 void vc4_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info);
374 #endif /* VC4_CONTEXT_H */