2 * Copyright © 2014 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30 #include "pipe/p_context.h"
31 #include "pipe/p_state.h"
32 #include "util/u_slab.h"
36 #include "vc4_bufmgr.h"
37 #include "vc4_resource.h"
41 #ifdef USE_VC4_SIMULATOR
42 #define using_vc4_simulator true
44 #define using_vc4_simulator false
47 #define VC4_DIRTY_BLEND (1 << 0)
48 #define VC4_DIRTY_RASTERIZER (1 << 1)
49 #define VC4_DIRTY_ZSA (1 << 2)
50 #define VC4_DIRTY_FRAGTEX (1 << 3)
51 #define VC4_DIRTY_VERTTEX (1 << 4)
53 #define VC4_DIRTY_BLEND_COLOR (1 << 7)
54 #define VC4_DIRTY_STENCIL_REF (1 << 8)
55 #define VC4_DIRTY_SAMPLE_MASK (1 << 9)
56 #define VC4_DIRTY_FRAMEBUFFER (1 << 10)
57 #define VC4_DIRTY_STIPPLE (1 << 11)
58 #define VC4_DIRTY_VIEWPORT (1 << 12)
59 #define VC4_DIRTY_CONSTBUF (1 << 13)
60 #define VC4_DIRTY_VTXSTATE (1 << 14)
61 #define VC4_DIRTY_VTXBUF (1 << 15)
62 #define VC4_DIRTY_INDEXBUF (1 << 16)
63 #define VC4_DIRTY_SCISSOR (1 << 17)
64 #define VC4_DIRTY_FLAT_SHADE_FLAGS (1 << 18)
65 #define VC4_DIRTY_PRIM_MODE (1 << 19)
66 #define VC4_DIRTY_CLIP (1 << 20)
67 #define VC4_DIRTY_UNCOMPILED_VS (1 << 21)
68 #define VC4_DIRTY_UNCOMPILED_FS (1 << 22)
69 #define VC4_DIRTY_COMPILED_CS (1 << 23)
70 #define VC4_DIRTY_COMPILED_VS (1 << 24)
71 #define VC4_DIRTY_COMPILED_FS (1 << 25)
72 #define VC4_DIRTY_FS_INPUTS (1 << 26)
74 struct vc4_sampler_view
{
75 struct pipe_sampler_view base
;
78 bool force_first_level
;
81 struct vc4_sampler_state
{
82 struct pipe_sampler_state base
;
86 struct vc4_texture_stateobj
{
87 struct pipe_sampler_view
*textures
[PIPE_MAX_SAMPLERS
];
88 unsigned num_textures
;
89 struct pipe_sampler_state
*samplers
[PIPE_MAX_SAMPLERS
];
90 unsigned num_samplers
;
93 struct vc4_shader_uniform_info
{
94 enum quniform_contents
*contents
;
97 uint32_t num_texture_samples
;
100 struct vc4_uncompiled_shader
{
101 /** A name for this program, so you can track it in shader-db output. */
103 /** How many variants of this program were compiled, for shader-db. */
104 uint32_t compiled_variant_count
;
105 struct pipe_shader_state base
;
108 struct vc4_ubo_range
{
110 * offset in bytes from the start of the ubo where this range is
113 * Only set once used is set.
118 * offset in bytes from the start of the gallium uniforms where the
123 /** size in bytes of this ubo range */
127 struct vc4_fs_inputs
{
129 * Array of the meanings of the VPM inputs this shader needs.
131 * It doesn't include those that aren't part of the VPM, like
132 * point/line coordinates.
134 struct vc4_varying_slot
*input_slots
;
138 struct vc4_compiled_shader
{
142 struct vc4_shader_uniform_info uniforms
;
144 struct vc4_ubo_range
*ubo_ranges
;
145 uint32_t num_ubo_ranges
;
148 * VC4_DIRTY_* flags that, when set in vc4->dirty, mean that the
149 * uniforms have to be rewritten (and therefore the shader state
152 uint32_t uniform_dirty_bits
;
154 /** bitmask of which inputs are color inputs, for flat shade handling. */
155 uint32_t color_inputs
;
157 bool disable_early_z
;
161 /* Byte offsets for the start of the vertex attributes 0-7, and the
162 * total size as "attribute" 8.
164 uint8_t vattr_offsets
[9];
167 const struct vc4_fs_inputs
*fs_inputs
;
170 struct vc4_program_stateobj
{
171 struct vc4_uncompiled_shader
*bind_vs
, *bind_fs
;
172 struct vc4_compiled_shader
*cs
, *vs
, *fs
;
175 struct vc4_constbuf_stateobj
{
176 struct pipe_constant_buffer cb
[PIPE_MAX_CONSTANT_BUFFERS
];
177 uint32_t enabled_mask
;
181 struct vc4_vertexbuf_stateobj
{
182 struct pipe_vertex_buffer vb
[PIPE_MAX_ATTRIBS
];
184 uint32_t enabled_mask
;
188 struct vc4_vertex_stateobj
{
189 struct pipe_vertex_element pipe
[PIPE_MAX_ATTRIBS
];
190 unsigned num_elements
;
194 struct pipe_context base
;
197 struct vc4_screen
*screen
;
200 struct vc4_cl shader_rec
;
201 struct vc4_cl uniforms
;
202 struct vc4_cl bo_handles
;
203 struct vc4_cl bo_pointers
;
204 uint32_t shader_rec_count
;
206 /** @{ Surfaces to submit rendering for. */
207 struct pipe_surface
*color_read
;
208 struct pipe_surface
*color_write
;
209 struct pipe_surface
*zs_read
;
210 struct pipe_surface
*zs_write
;
211 struct pipe_surface
*msaa_color_write
;
212 struct pipe_surface
*msaa_zs_write
;
215 * Bounding box of the scissor across all queued drawing.
217 * Note that the max values are exclusive.
225 * Width/height of the color framebuffer being rendered to,
226 * for VC4_TILE_RENDERING_MODE_CONFIG.
229 uint32_t draw_height
;
231 /** @{ Tile information, depending on MSAA and float color buffer. */
232 uint32_t draw_tiles_x
; /** @< Number of tiles wide for framebuffer. */
233 uint32_t draw_tiles_y
; /** @< Number of tiles high for framebuffer. */
235 uint32_t tile_width
; /** @< Width of a tile. */
236 uint32_t tile_height
; /** @< Height of a tile. */
237 /** Whether the current rendering is in a 4X MSAA tile buffer. */
241 struct util_slab_mempool transfer_pool
;
242 struct blitter_context
*blitter
;
244 /** bitfield of VC4_DIRTY_* */
246 /* Bitmask of PIPE_CLEAR_* of buffers that were cleared before the
250 /* Bitmask of PIPE_CLEAR_* of buffers that have been rendered to
251 * (either clears or draws).
254 uint32_t clear_color
[2];
255 uint32_t clear_depth
; /**< 24-bit unorm depth */
256 uint8_t clear_stencil
;
259 * Set if some drawing (triangles, blits, or just a glClear()) has
260 * been done to the FBO, meaning that we need to
261 * DRM_IOCTL_VC4_SUBMIT_CL.
266 * Number of draw calls (not counting full buffer clears) queued in
269 uint32_t draw_calls_queued
;
271 /** Maximum index buffer valid for the current shader_rec. */
273 /** Last index bias baked into the current shader_rec. */
274 uint32_t last_index_bias
;
276 struct primconvert_context
*primconvert
;
278 struct hash_table
*fs_cache
, *vs_cache
;
279 struct set
*fs_inputs_set
;
280 uint32_t next_uncompiled_program_id
;
281 uint64_t next_compiled_program_id
;
283 struct ra_regs
*regs
;
284 unsigned int reg_class_any
;
285 unsigned int reg_class_a_or_b_or_acc
;
286 unsigned int reg_class_r4_or_a
;
287 unsigned int reg_class_a
;
291 /** Seqno of the last CL flush's job. */
292 uint64_t last_emit_seqno
;
294 struct u_upload_mgr
*uploader
;
296 /** @{ Current pipeline state objects */
297 struct pipe_scissor_state scissor
;
298 struct pipe_blend_state
*blend
;
299 struct vc4_rasterizer_state
*rasterizer
;
300 struct vc4_depth_stencil_alpha_state
*zsa
;
302 struct vc4_texture_stateobj verttex
, fragtex
;
304 struct vc4_program_stateobj prog
;
306 struct vc4_vertex_stateobj
*vtx
;
309 struct pipe_blend_color f
;
312 struct pipe_stencil_ref stencil_ref
;
313 unsigned sample_mask
;
314 struct pipe_framebuffer_state framebuffer
;
315 struct pipe_poly_stipple stipple
;
316 struct pipe_clip_state clip
;
317 struct pipe_viewport_state viewport
;
318 struct vc4_constbuf_stateobj constbuf
[PIPE_SHADER_TYPES
];
319 struct vc4_vertexbuf_stateobj vertexbuf
;
320 struct pipe_index_buffer indexbuf
;
324 struct vc4_rasterizer_state
{
325 struct pipe_rasterizer_state base
;
327 /* VC4_CONFIGURATION_BITS */
328 uint8_t config_bits
[3];
333 * Half-float (1/8/7 bits) value of polygon offset units for
334 * VC4_PACKET_DEPTH_OFFSET
336 uint16_t offset_units
;
338 * Half-float (1/8/7 bits) value of polygon offset scale for
339 * VC4_PACKET_DEPTH_OFFSET
341 uint16_t offset_factor
;
344 struct vc4_depth_stencil_alpha_state
{
345 struct pipe_depth_stencil_alpha_state base
;
347 /* VC4_CONFIGURATION_BITS */
348 uint8_t config_bits
[3];
350 /** Uniforms for stencil state.
352 * Index 0 is either the front config, or the front-and-back config.
353 * Index 1 is the back config if doing separate back stencil.
354 * Index 2 is the writemask config if it's not a common mask value.
356 uint32_t stencil_uniforms
[3];
359 #define perf_debug(...) do { \
360 if (unlikely(vc4_debug & VC4_DEBUG_PERF)) \
361 fprintf(stderr, __VA_ARGS__); \
364 static inline struct vc4_context
*
365 vc4_context(struct pipe_context
*pcontext
)
367 return (struct vc4_context
*)pcontext
;
370 static inline struct vc4_sampler_view
*
371 vc4_sampler_view(struct pipe_sampler_view
*psview
)
373 return (struct vc4_sampler_view
*)psview
;
376 static inline struct vc4_sampler_state
*
377 vc4_sampler_state(struct pipe_sampler_state
*psampler
)
379 return (struct vc4_sampler_state
*)psampler
;
382 struct pipe_context
*vc4_context_create(struct pipe_screen
*pscreen
,
383 void *priv
, unsigned flags
);
384 void vc4_draw_init(struct pipe_context
*pctx
);
385 void vc4_state_init(struct pipe_context
*pctx
);
386 void vc4_program_init(struct pipe_context
*pctx
);
387 void vc4_program_fini(struct pipe_context
*pctx
);
388 void vc4_query_init(struct pipe_context
*pctx
);
389 void vc4_simulator_init(struct vc4_screen
*screen
);
390 int vc4_simulator_flush(struct vc4_context
*vc4
,
391 struct drm_vc4_submit_cl
*args
);
393 void vc4_set_shader_uniform_dirty_flags(struct vc4_compiled_shader
*shader
);
394 void vc4_write_uniforms(struct vc4_context
*vc4
,
395 struct vc4_compiled_shader
*shader
,
396 struct vc4_constbuf_stateobj
*cb
,
397 struct vc4_texture_stateobj
*texstate
);
399 void vc4_flush(struct pipe_context
*pctx
);
400 void vc4_job_init(struct vc4_context
*vc4
);
401 void vc4_job_submit(struct vc4_context
*vc4
);
402 void vc4_job_reset(struct vc4_context
*vc4
);
403 bool vc4_cl_references_bo(struct pipe_context
*pctx
, struct vc4_bo
*bo
,
405 void vc4_emit_state(struct pipe_context
*pctx
);
406 void vc4_generate_code(struct vc4_context
*vc4
, struct vc4_compile
*c
);
407 struct qpu_reg
*vc4_register_allocate(struct vc4_context
*vc4
, struct vc4_compile
*c
);
408 void vc4_update_compiled_shaders(struct vc4_context
*vc4
, uint8_t prim_mode
);
410 bool vc4_rt_format_supported(enum pipe_format f
);
411 bool vc4_rt_format_is_565(enum pipe_format f
);
412 bool vc4_tex_format_supported(enum pipe_format f
);
413 uint8_t vc4_get_tex_format(enum pipe_format f
);
414 const uint8_t *vc4_get_format_swizzle(enum pipe_format f
);
415 void vc4_init_query_functions(struct vc4_context
*vc4
);
416 void vc4_blit(struct pipe_context
*pctx
, const struct pipe_blit_info
*blit_info
);
417 #endif /* VC4_CONTEXT_H */