2 * Copyright © 2014 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30 #include "pipe/p_context.h"
31 #include "pipe/p_state.h"
32 #include "util/u_slab.h"
36 #include "vc4_bufmgr.h"
37 #include "vc4_resource.h"
41 #define VC4_DIRTY_BLEND (1 << 0)
42 #define VC4_DIRTY_RASTERIZER (1 << 1)
43 #define VC4_DIRTY_ZSA (1 << 2)
44 #define VC4_DIRTY_FRAGTEX (1 << 3)
45 #define VC4_DIRTY_VERTTEX (1 << 4)
46 #define VC4_DIRTY_TEXSTATE (1 << 5)
47 #define VC4_DIRTY_PROG (1 << 6)
48 #define VC4_DIRTY_BLEND_COLOR (1 << 7)
49 #define VC4_DIRTY_STENCIL_REF (1 << 8)
50 #define VC4_DIRTY_SAMPLE_MASK (1 << 9)
51 #define VC4_DIRTY_FRAMEBUFFER (1 << 10)
52 #define VC4_DIRTY_STIPPLE (1 << 11)
53 #define VC4_DIRTY_VIEWPORT (1 << 12)
54 #define VC4_DIRTY_CONSTBUF (1 << 13)
55 #define VC4_DIRTY_VTXSTATE (1 << 14)
56 #define VC4_DIRTY_VTXBUF (1 << 15)
57 #define VC4_DIRTY_INDEXBUF (1 << 16)
58 #define VC4_DIRTY_SCISSOR (1 << 17)
60 #define VC4_SHADER_DIRTY_VP (1 << 0)
61 #define VC4_SHADER_DIRTY_FP (1 << 1)
63 struct vc4_texture_stateobj
{
64 struct pipe_sampler_view
*textures
[PIPE_MAX_SAMPLERS
];
65 unsigned num_textures
;
66 struct pipe_sampler_state
*samplers
[PIPE_MAX_SAMPLERS
];
67 unsigned num_samplers
;
68 unsigned dirty_samplers
;
71 struct vc4_shader_uniform_info
{
72 enum quniform_contents
*contents
;
75 uint32_t num_texture_samples
;
78 struct vc4_compiled_shader
{
81 struct vc4_shader_uniform_info uniforms
[2];
83 uint32_t coord_shader_offset
;
87 struct vc4_program_stateobj
{
88 struct pipe_shader_state
*bind_vs
, *bind_fs
;
89 struct vc4_compiled_shader
*vs
, *fs
;
92 /* Indexed by semantic name or TGSI_SEMANTIC_COUNT + semantic index
93 * for TGSI_SEMANTIC_GENERIC. Special vs exports (position and point-
94 * size) are not included in this
96 uint8_t export_linkage
[63];
99 struct vc4_constbuf_stateobj
{
100 struct pipe_constant_buffer cb
[PIPE_MAX_CONSTANT_BUFFERS
];
101 uint32_t enabled_mask
;
105 struct vc4_vertexbuf_stateobj
{
106 struct pipe_vertex_buffer vb
[PIPE_MAX_ATTRIBS
];
108 uint32_t enabled_mask
;
112 struct vc4_vertex_stateobj
{
113 struct pipe_vertex_element pipe
[PIPE_MAX_ATTRIBS
];
114 unsigned num_elements
;
118 struct pipe_context base
;
121 struct vc4_screen
*screen
;
125 struct vc4_cl shader_rec
;
126 struct vc4_cl uniforms
;
127 struct vc4_cl bo_handles
;
128 struct vc4_cl bo_pointers
;
129 uint32_t shader_rec_count
;
131 struct vc4_bo
*tile_alloc
;
132 struct vc4_bo
*tile_state
;
134 struct util_slab_mempool transfer_pool
;
135 struct blitter_context
*blitter
;
137 /** bitfield of VC4_DIRTY_* */
139 /* Bitmask of PIPE_CLEAR_* of buffers that were cleared before the
143 /* Bitmask of PIPE_CLEAR_* of buffers that have been rendered to
144 * (either clears or draws).
147 uint32_t clear_color
[2];
148 uint32_t clear_depth
; /**< 24-bit unorm depth */
149 uint8_t clear_stencil
;
152 * Set if some drawing (triangles, blits, or just a glClear()) has
153 * been done to the FBO, meaning that we need to
154 * DRM_IOCTL_VC4_SUBMIT_CL.
159 * Set when needs_flush, and the queued rendering is not just composed
160 * of full-buffer clears.
162 bool draw_call_queued
;
164 struct primconvert_context
*primconvert
;
166 struct util_hash_table
*fs_cache
, *vs_cache
;
168 /** @{ Current pipeline state objects */
169 struct pipe_scissor_state scissor
;
170 struct pipe_blend_state
*blend
;
171 struct vc4_rasterizer_state
*rasterizer
;
172 struct vc4_depth_stencil_alpha_state
*zsa
;
174 struct vc4_texture_stateobj verttex
, fragtex
;
176 struct vc4_program_stateobj prog
;
178 struct vc4_vertex_stateobj
*vtx
;
180 struct pipe_blend_color blend_color
;
181 struct pipe_stencil_ref stencil_ref
;
182 unsigned sample_mask
;
183 struct pipe_framebuffer_state framebuffer
;
184 struct pipe_poly_stipple stipple
;
185 struct pipe_viewport_state viewport
;
186 struct vc4_constbuf_stateobj constbuf
[PIPE_SHADER_TYPES
];
187 struct vc4_vertexbuf_stateobj vertexbuf
;
188 struct pipe_index_buffer indexbuf
;
192 struct vc4_rasterizer_state
{
193 struct pipe_rasterizer_state base
;
195 /* VC4_CONFIGURATION_BITS */
196 uint8_t config_bits
[3];
201 struct vc4_depth_stencil_alpha_state
{
202 struct pipe_depth_stencil_alpha_state base
;
204 /* VC4_CONFIGURATION_BITS */
205 uint8_t config_bits
[3];
207 /** Uniforms for stencil state.
209 * Index 0 is either the front config, or the front-and-back config.
210 * Index 1 is the back config if doing separate back stencil.
211 * Index 2 is the writemask config if it's not a common mask value.
213 uint32_t stencil_uniforms
[3];
216 static inline struct vc4_context
*
217 vc4_context(struct pipe_context
*pcontext
)
219 return (struct vc4_context
*)pcontext
;
222 struct pipe_context
*vc4_context_create(struct pipe_screen
*pscreen
,
224 void vc4_draw_init(struct pipe_context
*pctx
);
225 void vc4_state_init(struct pipe_context
*pctx
);
226 void vc4_program_init(struct pipe_context
*pctx
);
227 void vc4_simulator_init(struct vc4_screen
*screen
);
228 int vc4_simulator_flush(struct vc4_context
*vc4
,
229 struct drm_vc4_submit_cl
*args
);
231 void vc4_write_uniforms(struct vc4_context
*vc4
,
232 struct vc4_compiled_shader
*shader
,
233 struct vc4_constbuf_stateobj
*cb
,
234 struct vc4_texture_stateobj
*texstate
,
237 void vc4_flush(struct pipe_context
*pctx
);
238 void vc4_flush_for_bo(struct pipe_context
*pctx
, struct vc4_bo
*bo
);
239 void vc4_emit_state(struct pipe_context
*pctx
);
240 void vc4_generate_code(struct vc4_compile
*c
);
241 struct qpu_reg
*vc4_register_allocate(struct vc4_compile
*c
);
242 void vc4_update_compiled_shaders(struct vc4_context
*vc4
, uint8_t prim_mode
);
244 bool vc4_rt_format_supported(enum pipe_format f
);
245 bool vc4_rt_format_is_565(enum pipe_format f
);
246 bool vc4_tex_format_supported(enum pipe_format f
);
247 uint8_t vc4_get_tex_format(enum pipe_format f
);
248 const uint8_t *vc4_get_format_swizzle(enum pipe_format f
);
250 #endif /* VC4_CONTEXT_H */